drm/amdgpu: fix gmc init fail in sriov mode

"adev->gfx.rlc.rlcg_reg_access_supported = true;"
the above varible were set too late during driver initialization.
it will cause the driver to fail to write/read register during GMC hw init
in sriov mode.

move gfx_xxx_init_rlcg_reg_access_ctrl() function to gfx early init stage
to avoid this issue.

Fixes: 5d447e29670148 ("drm/amdgpu: add helper for rlcg indirect reg access")

Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index f54e106..3d8c5fe 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4343,7 +4343,6 @@ static int gfx_v10_0_rlc_init(struct amdgpu_device *adev)
        if (adev->gfx.rlc.funcs->update_spm_vmid)
                adev->gfx.rlc.funcs->update_spm_vmid(adev, 0xf);
 
-       gfx_v10_0_init_rlcg_reg_access_ctrl(adev);
 
        return 0;
 }
@@ -7682,6 +7681,9 @@ static int gfx_v10_0_early_init(void *handle)
        gfx_v10_0_set_gds_init(adev);
        gfx_v10_0_set_rlc_funcs(adev);
 
+       /* init rlcg reg access ctrl */
+       gfx_v10_0_init_rlcg_reg_access_ctrl(adev);
+
        return 0;
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index ca7b886..744253b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -1934,9 +1934,6 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev)
        if (adev->gfx.rlc.funcs->update_spm_vmid)
                adev->gfx.rlc.funcs->update_spm_vmid(adev, 0xf);
 
-       /* init rlcg reg access ctrl */
-       gfx_v9_0_init_rlcg_reg_access_ctrl(adev);
-
        return 0;
 }
 
@@ -4755,6 +4752,9 @@ static int gfx_v9_0_early_init(void *handle)
        gfx_v9_0_set_gds_init(adev);
        gfx_v9_0_set_rlc_funcs(adev);
 
+       /* init rlcg reg access ctrl */
+       gfx_v9_0_init_rlcg_reg_access_ctrl(adev);
+
        return 0;
 }