Merge branch irq/loongarch-acpi into irq/irqchip-next

* irq/loongarch-acpi:
  : .
  : More APCI fixes and improvements for the LoongArch architecture:
  :
  : - Work around trigger type for INTx interrupts described
  :   via ACPI (Jianmin Lv).
  :
  : - ACPI support got the HTVEC controller (Huacai Chen)
  :
  : - Suspend/resume across the board (Huacai Chen)
  :
  : - Fixes and random cleanups
  : .
  irqchip/loongarch: Adjust acpi_cascade_irqdomain_init() and sub-routines
  irqchip/loongson-pch-lpc: Add suspend/resume support
  irqchip/loongson-pch-pic: Add suspend/resume support
  irqchip/loongson-eiointc: Add suspend/resume support
  irqchip/loongson-htvec: Add suspend/resume support
  irqchip/loongson-htvec: Add ACPI init support
  irqchip/loongson-liointc: Support to set IRQ type for ACPI path
  irqchip/loongson-pch-pic: Support to set IRQ type for ACPI path
  irqchip/loongson-pch-pic: Fix translate callback for DT path
  ACPI / PCI: fix LPIC IRQ model default PCI IRQ polarity

Signed-off-by: Marc Zyngier <maz@kernel.org>