static char cmd_buf[256];
/* for debug zone */
-unsigned int sd_debug_zone[4]={
+unsigned int sd_debug_zone[4] = {
0,
0,
0,
};
/* mode select */
-u32 dma_size[4]={
+u32 dma_size[4] = {
512,
512,
512,
512
};
-msdc_mode drv_mode[4]={
+
+msdc_mode drv_mode[4] = {
MODE_SIZE_DEP, /* using DMA or not depend on the size */
MODE_SIZE_DEP,
MODE_SIZE_DEP,
MODE_SIZE_DEP
};
-#if defined (MT6575_SD_DEBUG)
+#if defined(MT6575_SD_DEBUG)
/* for driver profile */
#define TICKS_ONE_MS (13000)
u32 gpt_enable = 0;
config.clkSrc = GPT_CLK_SRC_SYS;
config.clkDiv = GPT_CLK_DIV_1; /* 13MHz GPT6 */
- if (GPT_Config(config) == FALSE )
+ if (GPT_Config(config) == FALSE)
return;
GPT_Start(GPT6);
if (new_H32 == old_H32) {
ret = new_L32 - old_L32;
- } else if(new_H32 == (old_H32 + 1)) {
+ } else if (new_H32 == (old_H32 + 1)) {
if (new_L32 > old_L32) {
printk("msdc old_L<0x%x> new_L<0x%x>\n", old_L32, new_L32);
}
/* CMD52 Dump */
cmd = &result->cmd52_rx;
printk("sdio === CMD52 Rx <%d>times tick<%d> Max<%d> Min<%d> Aver<%d>\n", cmd->count, cmd->tot_tc,
- cmd->max_tc, cmd->min_tc, cmd->tot_tc/cmd->count);
+ cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count);
cmd = &result->cmd52_tx;
printk("sdio === CMD52 Tx <%d>times tick<%d> Max<%d> Min<%d> Aver<%d>\n", cmd->count, cmd->tot_tc,
- cmd->max_tc, cmd->min_tc, cmd->tot_tc/cmd->count);
+ cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count);
/* CMD53 Rx bytes + block mode */
- for (i=0; i<512; i++) {
+ for (i = 0; i < 512; i++) {
cmd = &result->cmd53_rx_byte[i];
if (cmd->count) {
printk("sdio<%6d><%3dB>_Rx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", cmd->count, i, cmd->tot_tc,
- cmd->max_tc, cmd->min_tc, cmd->tot_tc/cmd->count,
- cmd->tot_bytes, (cmd->tot_bytes/10)*13 / (cmd->tot_tc/10));
+ cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count,
+ cmd->tot_bytes, (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10));
}
}
- for (i=0; i<100; i++) {
+ for (i = 0; i < 100; i++) {
cmd = &result->cmd53_rx_blk[i];
if (cmd->count) {
printk("sdio<%6d><%3d>B_Rx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", cmd->count, i, cmd->tot_tc,
- cmd->max_tc, cmd->min_tc, cmd->tot_tc/cmd->count,
- cmd->tot_bytes, (cmd->tot_bytes/10)*13 / (cmd->tot_tc/10));
+ cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count,
+ cmd->tot_bytes, (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10));
}
}
/* CMD53 Tx bytes + block mode */
- for (i=0; i<512; i++) {
+ for (i = 0; i < 512; i++) {
cmd = &result->cmd53_tx_byte[i];
if (cmd->count) {
printk("sdio<%6d><%3dB>_Tx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", cmd->count, i, cmd->tot_tc,
- cmd->max_tc, cmd->min_tc, cmd->tot_tc/cmd->count,
- cmd->tot_bytes, (cmd->tot_bytes/10)*13 / (cmd->tot_tc/10));
+ cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count,
+ cmd->tot_bytes, (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10));
}
}
- for (i=0; i<100; i++) {
+ for (i = 0; i < 100; i++) {
cmd = &result->cmd53_tx_blk[i];
if (cmd->count) {
printk("sdio<%6d><%3d>B_Tx_<%9d><%9d><%6d><%6d>_<%9dB><%2dM>\n", cmd->count, i, cmd->tot_tc,
- cmd->max_tc, cmd->min_tc, cmd->tot_tc/cmd->count,
- cmd->tot_bytes, (cmd->tot_bytes/10)*13 / (cmd->tot_tc/10));
+ cmd->max_tc, cmd->min_tc, cmd->tot_tc / cmd->count,
+ cmd->tot_bytes, (cmd->tot_bytes / 10) * 13 / (cmd->tot_tc / 10));
}
}
block = sizes / 512;
if (block >= 99) {
printk("cmd53 error blocks\n");
- while(1);
+ while (1);
}
cmd = bRx ? &result->cmd53_rx_blk[block] : &result->cmd53_tx_blk[block];
}
}
/* update the members */
- if (ticks > cmd->max_tc){
+ if (ticks > cmd->max_tc) {
cmd->max_tc = ticks;
}
if (cmd->min_tc == 0 || ticks < cmd->min_tc) {
}
cmd->tot_tc += ticks;
cmd->tot_bytes += sizes;
- cmd->count ++;
+ cmd->count++;
if (bRx) {
result->total_rx_bytes += sizes;
/* dump when total_tc > 30s */
if (result->total_tc >= sdio_pro_time * TICKS_ONE_MS * 1000) {
msdc_sdio_profile(result);
- memset(result, 0 , sizeof(struct sdio_profile));
+ memset(result, 0, sizeof(struct sdio_profile));
}
}
int mode, size;
if (count == 0)return -1;
- if(count > 255)count = 255;
+ if (count > 255)count = 255;
ret = copy_from_user(cmd_buf, buf, count);
if (ret < 0)return -1;
sscanf(cmd_buf, "%x %x %x", &cmd, &p1, &p2);
- if(cmd == SD_TOOL_ZONE) {
+ if (cmd == SD_TOOL_ZONE) {
id = p1; zone = p2; zone &= 0x3ff;
printk("msdc host_id<%d> zone<0x%.8x>\n", id, zone);
- if(id >=0 && id<=3){
+ if (id >= 0 && id <= 3) {
sd_debug_zone[id] = zone;
}
- else if(id == 4){
+ else if (id == 4) {
sd_debug_zone[0] = sd_debug_zone[1] = zone;
sd_debug_zone[2] = sd_debug_zone[3] = zone;
}
printk("msdc host_id error when set debug zone\n");
}
} else if (cmd == SD_TOOL_DMA_SIZE) {
- id = p1>>4; mode = (p1&0xf); size = p2;
- if(id >=0 && id<=3){
+ id = p1 >> 4; mode = (p1 & 0xf); size = p2;
+ if (id >= 0 && id <= 3) {
drv_mode[id] = mode;
dma_size[id] = p2;
}
- else if(id == 4){
+ else if (id == 4) {
drv_mode[0] = drv_mode[1] = mode;
drv_mode[2] = drv_mode[3] = mode;
dma_size[0] = dma_size[1] = p2;
}
sdio_pro_enable = 1;
if (p2 == 0) p2 = 1; if (p2 >= 30) p2 = 30;
- sdio_pro_time = p2 ;
+ sdio_pro_time = p2;
} else if (p1 == 0) {
/* todo */
sdio_pro_enable = 0;
if (!de || IS_ERR(de))
printk("!! Create MSDC debug PROC fail !!\n");
- return 0 ;
+ return 0;
}
EXPORT_SYMBOL_GPL(msdc_debug_proc_init);
#endif
#include <asm/dma.h>
/* end of +++ */
-
#include <asm/mach-ralink/ralink_regs.h>
#if 0 /* --- by chhung */
#define HOST_MAX_NUM (1) /* +/- by chhung */
-#if defined (CONFIG_SOC_MT7620)
+#if defined(CONFIG_SOC_MT7620)
#define HOST_MAX_MCLK (48000000) /* +/- by chhung */
-#elif defined (CONFIG_SOC_MT7621)
+#elif defined(CONFIG_SOC_MT7621)
#define HOST_MAX_MCLK (50000000) /* +/- by chhung */
#endif
#define HOST_MIN_MCLK (260000)
#define DEFAULT_DEBOUNCE (8) /* 8 cycles */
#define DEFAULT_DTOC (40) /* data timeout counter. 65536x40 sclk. */
-#define CMD_TIMEOUT (HZ/10) /* 100ms */
-#define DAT_TIMEOUT (HZ/2 * 5) /* 500ms x5 */
+#define CMD_TIMEOUT (HZ / 10) /* 100ms */
+#define DAT_TIMEOUT (HZ / 2 * 5) /* 500ms x5 */
#define MAX_DMA_CNT (64 * 1024 - 512) /* a single transaction for WIFI may be 50K*/
//#define PERI_MSDC2_PDN (17)
//#define PERI_MSDC3_PDN (18)
-struct msdc_host *msdc_6575_host[] = {NULL,NULL,NULL,NULL};
+struct msdc_host *msdc_6575_host[] = {NULL, NULL, NULL, NULL};
#if 0 /* --- by chhung */
/* gate means clock power down */
static int g_clk_gate = 0;
#define msdc_gate_clock(id) \
do { \
g_clk_gate &= ~(1 << ((id) + PERI_MSDC0_PDN)); \
- } while(0)
+ } while (0)
/* not like power down register. 1 means clock on. */
#define msdc_ungate_clock(id) \
do { \
g_clk_gate |= 1 << ((id) + PERI_MSDC0_PDN); \
- } while(0)
+ } while (0)
// do we need sync object or not
void msdc_clk_status(int * status)
static struct resource mtk_sd_resources[] = {
[0] = {
.start = RALINK_MSDC_BASE,
- .end = RALINK_MSDC_BASE+0x3fff,
+ .end = RALINK_MSDC_BASE + 0x3fff,
.flags = IORESOURCE_MEM,
},
[1] = {
};
/* For Inhanced DMA */
-#define msdc_init_gpd_ex(gpd,extlen,cmd,arg,blknum) \
+#define msdc_init_gpd_ex(gpd, extlen, cmd, arg, blknum) \
do { \
((gpd_t*)gpd)->extlen = extlen; \
((gpd_t*)gpd)->cmd = cmd; \
((gpd_t*)gpd)->arg = arg; \
((gpd_t*)gpd)->blknum = blknum; \
- }while(0)
+ } while (0)
#define msdc_init_bd(bd, blkpad, dwpad, dptr, dlen) \
do { \
((bd_t*)bd)->dwpad = dwpad; \
((bd_t*)bd)->ptr = (void*)dptr; \
((bd_t*)bd)->buflen = dlen; \
- }while(0)
+ } while (0)
#define msdc_txfifocnt() ((sdr_read32(MSDC_FIFOCS) & MSDC_FIFOCS_TXCNT) >> 16)
#define msdc_rxfifocnt() ((sdr_read32(MSDC_FIFOCS) & MSDC_FIFOCS_RXCNT) >> 0)
#define msdc_fifo_read32() sdr_read32(MSDC_RXDATA)
#define msdc_fifo_read8() sdr_read8(MSDC_RXDATA)
-
#define msdc_dma_on() sdr_clr_bits(MSDC_CFG, MSDC_CFG_PIO)
#define msdc_dma_off() sdr_set_bits(MSDC_CFG, MSDC_CFG_PIO)
-#define msdc_retry(expr,retry,cnt) \
+#define msdc_retry(expr, retry, cnt) \
do { \
int backup = cnt; \
while (retry) { \
} \
} \
WARN_ON(retry == 0); \
- } while(0)
+ } while (0)
#if 0 /* --- by chhung */
#define msdc_reset() \
sdr_set_bits(MSDC_CFG, MSDC_CFG_RST); \
dsb(); \
msdc_retry(sdr_read32(MSDC_CFG) & MSDC_CFG_RST, retry, cnt); \
- } while(0)
+ } while (0)
#else
#define msdc_reset() \
do { \
int retry = 3, cnt = 1000; \
sdr_set_bits(MSDC_CFG, MSDC_CFG_RST); \
msdc_retry(sdr_read32(MSDC_CFG) & MSDC_CFG_RST, retry, cnt); \
- } while(0)
+ } while (0)
#endif /* end of +/- */
#define msdc_clr_int() \
do { \
volatile u32 val = sdr_read32(MSDC_INT); \
sdr_write32(MSDC_INT, val); \
- } while(0)
+ } while (0)
#define msdc_clr_fifo() \
do { \
int retry = 3, cnt = 1000; \
sdr_set_bits(MSDC_FIFOCS, MSDC_FIFOCS_CLR); \
msdc_retry(sdr_read32(MSDC_FIFOCS) & MSDC_FIFOCS_CLR, retry, cnt); \
- } while(0)
+ } while (0)
#define msdc_irq_save(val) \
do { \
val = sdr_read32(MSDC_INTEN); \
sdr_clr_bits(MSDC_INTEN, val); \
- } while(0)
+ } while (0)
#define msdc_irq_restore(val) \
do { \
sdr_set_bits(MSDC_INTEN, val); \
- } while(0)
+ } while (0)
/* clock source for host: global */
-#if defined (CONFIG_SOC_MT7620)
+#if defined(CONFIG_SOC_MT7620)
static u32 hclks[] = {48000000}; /* +/- by chhung */
-#elif defined (CONFIG_SOC_MT7621)
+#elif defined(CONFIG_SOC_MT7621)
static u32 hclks[] = {50000000}; /* +/- by chhung */
#endif
#define sdc_is_busy() (sdr_read32(SDC_STS) & SDC_STS_SDCBUSY)
#define sdc_is_cmd_busy() (sdr_read32(SDC_STS) & SDC_STS_CMDBUSY)
-#define sdc_send_cmd(cmd,arg) \
+#define sdc_send_cmd(cmd, arg) \
do { \
sdr_write32(SDC_ARG, (arg)); \
sdr_write32(SDC_CMD, (cmd)); \
- } while(0)
+ } while (0)
// can modify to read h/w register.
//#define is_card_present(h) ((sdr_read32(MSDC_PS) & MSDC_PS_CDSTS) ? 0 : 1);
int tune,
unsigned long timeout);
-static int msdc_tune_cmdrsp(struct msdc_host*host,struct mmc_command *cmd);
+static int msdc_tune_cmdrsp(struct msdc_host*host, struct mmc_command *cmd);
#ifdef MT6575_SD_DEBUG
static void msdc_dump_card_status(struct msdc_host *host, u32 status)
#if 0
static void msdc_tasklet_card(unsigned long arg)
{
- struct msdc_host *host = (struct msdc_host *)arg;
+ struct msdc_host *host = (struct msdc_host *)arg;
#else
static void msdc_tasklet_card(struct work_struct *work)
{
msdc_irq_save(flags);
-#if defined (CONFIG_MT7621_FPGA) || defined (CONFIG_MT7628_FPGA)
+#if defined(CONFIG_MT7621_FPGA) || defined(CONFIG_MT7628_FPGA)
mode = 0x0; /* use divisor */
if (hz >= (hclk >> 1)) {
div = 0; /* mean div = 1/2 */
msdc_set_timeout(host, host->timeout_ns, host->timeout_clks); // need?
INIT_MSG("================");
- INIT_MSG("!!! Set<%dKHz> Source<%dKHz> -> sclk<%dKHz>", hz/1000, hclk/1000, sclk/1000);
+ INIT_MSG("!!! Set<%dKHz> Source<%dKHz> -> sclk<%dKHz>", hz / 1000, hclk / 1000, sclk / 1000);
INIT_MSG("================");
msdc_irq_restore(flags);
host->pm_state = state; /* default PMSG_RESUME */
INIT_MSG("%s Suspend", evt == PM_EVENT_SUSPEND ? "PM" : "USR");
- if(host->hw->flags & MSDC_SYS_SUSPEND) /* set for card */
+ if (host->hw->flags & MSDC_SYS_SUSPEND) /* set for card */
(void)mmc_suspend_host(host->mmc);
else {
// host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY; /* just for double confirm */ /* --- by chhung */
mmc_remove_host(host->mmc);
}
} else if (evt == PM_EVENT_RESUME || evt == PM_EVENT_USER_RESUME) {
- if (!host->suspend){
+ if (!host->suspend) {
//ERR_MSG("warning: already resume");
return;
}
host->pm_state = state;
INIT_MSG("%s Resume", evt == PM_EVENT_RESUME ? "PM" : "USR");
- if(host->hw->flags & MSDC_SYS_SUSPEND) { /* will not set for WIFI */
+ if (host->hw->flags & MSDC_SYS_SUSPEND) { /* will not set for WIFI */
(void)mmc_resume_host(host->mmc);
}
else {
rawcmd &= ~(0x0FFF << 16);
}
- N_MSG(CMD, "CMD<%d><0x%.8x> Arg<0x%.8x>", opcode , rawcmd, cmd->arg);
+ N_MSG(CMD, "CMD<%d><0x%.8x> Arg<0x%.8x>", opcode, rawcmd, cmd->arg);
tmo = jiffies + timeout;
goto end;
}
}
- }else {
+ } else {
for (;;) {
if (!sdc_is_busy())
break;
//sdr_set_bits(MSDC_INTEN, wints);
spin_unlock(&host->lock);
- if(!wait_for_completion_timeout(&host->cmd_done, 10*timeout)){
+ if (!wait_for_completion_timeout(&host->cmd_done, 10 * timeout)) {
ERR_MSG("XXX CMD<%d> wait_for_completion timeout ARG<0x%.8x>", opcode, cmd->arg);
cmd->error = (unsigned int)-ETIMEDOUT;
msdc_reset();
}
/* memory card CRC */
- if(host->hw->flags & MSDC_REMOVABLE && cmd->error == (unsigned int)(-EIO) ) {
+ if (host->hw->flags & MSDC_REMOVABLE && cmd->error == (unsigned int)(-EIO)) {
if (sdr_read32(SDC_CMD) & 0x1800) { /* check if has data phase */
msdc_abort_data(host);
} else {
msdc_clr_fifo();
msdc_clr_int();
}
- cmd->error = msdc_tune_cmdrsp(host,cmd);
+ cmd->error = msdc_tune_cmdrsp(host, cmd);
}
// check DAT0
ret = 1;
}
- if(ret) {
+ if (ret) {
msdc_reset();
msdc_clr_fifo();
msdc_clr_int();
u8 *u8ptr;
u32 left = 0;
u32 count, size = 0;
- u32 wints = MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR ;
+ u32 wints = MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR;
unsigned long tmo = jiffies + DAT_TIMEOUT;
sdr_set_bits(MSDC_INTEN, wints);
}
u8ptr = (u8 *)ptr;
- while(left) {
- * u8ptr++ = msdc_fifo_read8();
+ while (left) {
+ *u8ptr++ = msdc_fifo_read8();
left--;
}
}
N_MSG(FIO, " PIO Read<%d>bytes", size);
sdr_clr_bits(MSDC_INTEN, wints);
- if(data->error) ERR_MSG("read pio data->error<%d> left<%d> size<%d>", data->error, left, size);
+ if (data->error) ERR_MSG("read pio data->error<%d> left<%d> size<%d>", data->error, left, size);
return data->error;
}
u8 *u8ptr;
u32 left;
u32 count, size = 0;
- u32 wints = MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR ;
+ u32 wints = MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR;
unsigned long tmo = jiffies + DAT_TIMEOUT;
sdr_set_bits(MSDC_INTEN, wints);
}
u8ptr = (u8*)ptr;
- while(left){
+ while (left) {
msdc_fifo_write8(*u8ptr); u8ptr++;
left--;
}
end:
data->bytes_xfered += size;
N_MSG(FIO, " PIO Write<%d>bytes", size);
- if(data->error) ERR_MSG("write pio data->error<%d>", data->error);
+ if (data->error) ERR_MSG("write pio data->error<%d>", data->error);
sdr_clr_bits(MSDC_INTEN, wints);
return data->error;
static void msdc_dma_start(struct msdc_host *host)
{
u32 base = host->base;
- u32 wints = MSDC_INTEN_XFER_COMPL | MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR ;
+ u32 wints = MSDC_INTEN_XFER_COMPL | MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR;
sdr_set_bits(MSDC_INTEN, wints);
//dsb(); /* --- by chhung */
{
u32 base = host->base;
//u32 retries=500;
- u32 wints = MSDC_INTEN_XFER_COMPL | MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR ;
+ u32 wints = MSDC_INTEN_XFER_COMPL | MSDC_INTEN_DATTMO | MSDC_INTEN_DATCRCERR;
- N_MSG(DMA, "DMA status: 0x%.8x",sdr_read32(MSDC_DMA_CFG));
+ N_MSG(DMA, "DMA status: 0x%.8x", sdr_read32(MSDC_DMA_CFG));
//while (sdr_read32(MSDC_DMA_CFG) & MSDC_DMA_CFG_STS);
sdr_set_field(MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP, 1);
/* dump gpd */
ERR_MSG(".gpd<0x%.8x> gpd_phy<0x%.8x>", (int)gpd, (int)dma->gpd_addr);
- ERR_MSG("...hwo <%d>", gpd->hwo );
- ERR_MSG("...bdp <%d>", gpd->bdp );
- ERR_MSG("...chksum<0x%.8x>", gpd->chksum );
+ ERR_MSG("...hwo <%d>", gpd->hwo);
+ ERR_MSG("...bdp <%d>", gpd->bdp);
+ ERR_MSG("...chksum<0x%.8x>", gpd->chksum);
//ERR_MSG("...intr <0x%.8x>", gpd->intr );
- ERR_MSG("...next <0x%.8x>", (int)gpd->next );
- ERR_MSG("...ptr <0x%.8x>", (int)gpd->ptr );
- ERR_MSG("...buflen<0x%.8x>", gpd->buflen );
+ ERR_MSG("...next <0x%.8x>", (int)gpd->next);
+ ERR_MSG("...ptr <0x%.8x>", (int)gpd->ptr);
+ ERR_MSG("...buflen<0x%.8x>", gpd->buflen);
//ERR_MSG("...extlen<0x%.8x>", gpd->extlen );
//ERR_MSG("...arg <0x%.8x>", gpd->arg );
//ERR_MSG("...blknum<0x%.8x>", gpd->blknum );
p_to_v = ((u32)bd - (u32)dma->bd_addr);
while (1) {
ERR_MSG(".bd[%d]", i); i++;
- ERR_MSG("...eol <%d>", ptr->eol );
- ERR_MSG("...chksum<0x%.8x>", ptr->chksum );
+ ERR_MSG("...eol <%d>", ptr->eol);
+ ERR_MSG("...chksum<0x%.8x>", ptr->chksum);
//ERR_MSG("...blkpad<0x%.8x>", ptr->blkpad );
//ERR_MSG("...dwpad <0x%.8x>", ptr->dwpad );
- ERR_MSG("...next <0x%.8x>", (int)ptr->next );
- ERR_MSG("...ptr <0x%.8x>", (int)ptr->ptr );
- ERR_MSG("...buflen<0x%.8x>", (int)ptr->buflen );
+ ERR_MSG("...next <0x%.8x>", (int)ptr->next);
+ ERR_MSG("...ptr <0x%.8x>", (int)ptr->ptr);
+ ERR_MSG("...buflen<0x%.8x>", (int)ptr->buflen);
if (ptr->eol == 1) {
break;
static u8 msdc_dma_calcs(u8 *buf, u32 len)
{
u32 i, sum = 0;
+
for (i = 0; i < len; i++) {
sum += buf[i];
}
sdr_set_field(MSDC_DMA_CTRL, MSDC_DMA_CTRL_XFERSZ, sg_dma_len(sg));
//#elif defined (CONFIG_RALINK_MT7621) || defined (CONFIG_RALINK_MT7628)
else
- sdr_write32((volatile u32*)(RALINK_MSDC_BASE+0xa8), sg_dma_len(sg));
+ sdr_write32((volatile u32*)(RALINK_MSDC_BASE + 0xa8), sg_dma_len(sg));
//#endif
sdr_set_field(MSDC_DMA_CTRL, MSDC_DMA_CTRL_BRUSTSZ, dma->burstsz);
sdr_set_field(MSDC_DMA_CTRL, MSDC_DMA_CTRL_MODE, 0);
/* calculate the required number of gpd */
num = (sglen + MAX_BD_PER_GPD - 1) / MAX_BD_PER_GPD;
- BUG_ON(num !=1 );
+ BUG_ON(num != 1);
gpd = dma->gpd;
bd = dma->bd;
/* modify bd*/
for (j = 0; j < bdlen; j++) {
msdc_init_bd(&bd[j], blkpad, dwpad, sg_dma_address(sg), sg_dma_len(sg));
- if(j == bdlen - 1) {
+ if (j == bdlen - 1) {
bd[j].eol = 1; /* the last bd */
} else {
bd[j].eol = 0;
struct mmc_data *data;
u32 base = host->base;
//u32 intsts = 0;
- unsigned int left=0;
- int dma = 0, read = 1, dir = DMA_FROM_DEVICE, send_type=0;
+ unsigned int left = 0;
+ int dma = 0, read = 1, dir = DMA_FROM_DEVICE, send_type = 0;
#define SND_DAT 0
#define SND_CMD 1
#endif /* end of --- */
if (!data) {
- send_type=SND_CMD;
+ send_type = SND_CMD;
if (msdc_do_command(host, cmd, 1, CMD_TIMEOUT) != 0) {
goto done;
}
} else {
BUG_ON(data->blksz > HOST_MAX_BLKSZ);
- send_type=SND_DAT;
+ send_type = SND_DAT;
data->error = 0;
read = data->flags & MMC_DATA_READ ? 1 : 0;
msdc_dma_start(host);
spin_unlock(&host->lock);
- if(!wait_for_completion_timeout(&host->xfer_done, DAT_TIMEOUT)){
+ if (!wait_for_completion_timeout(&host->xfer_done, DAT_TIMEOUT)) {
ERR_MSG("XXX CMD<%d> wait xfer_done<%d> timeout!!", cmd->opcode, data->blocks * data->blksz);
ERR_MSG(" DMA_SA = 0x%x", sdr_read32(MSDC_DMA_SA));
ERR_MSG(" DMA_CA = 0x%x", sdr_read32(MSDC_DMA_CA));
/* Secondly: pio data phase */
if (read) {
- if (msdc_pio_read(host, data)){
+ if (msdc_pio_read(host, data)) {
goto done;
}
} else {
/* For write case: make sure contents in fifo flushed to device */
if (!read) {
while (1) {
- left=msdc_txfifocnt();
+ left = msdc_txfifocnt();
if (left == 0) {
break;
}
} // PIO mode
/* Last: stop transfer */
- if (data->stop){
+ if (data->stop) {
if (msdc_do_command(host, data->stop, 0, CMD_TIMEOUT) != 0) {
goto done;
}
host->blksz = 0;
#if 0 // don't stop twice!
- if(host->hw->flags & MSDC_REMOVABLE && data->error) {
+ if (host->hw->flags & MSDC_REMOVABLE && data->error) {
msdc_abort_data(host);
/* reset in IRQ, stop command has issued. -> No need */
}
#endif
- N_MSG(OPS, "CMD<%d> data<%s %s> blksz<%d> block<%d> error<%d>",cmd->opcode, (dma? "dma":"pio"),
- (read ? "read ":"write") ,data->blksz, data->blocks, data->error);
+ N_MSG(OPS, "CMD<%d> data<%s %s> blksz<%d> block<%d> error<%d>", cmd->opcode, (dma ? "dma" : "pio"),
+ (read ? "read " : "write"), data->blksz, data->blocks, data->error);
}
#if 0 /* --- by chhung */
#if 1
//if(host->id==1) {
- if(send_type==SND_CMD) {
- if(cmd->opcode == MMC_SEND_STATUS) {
- if((cmd->resp[0] & CARD_READY_FOR_DATA) ||(CARD_CURRENT_STATE(cmd->resp[0]) != 7)){
- N_MSG(OPS,"disable clock, CMD13 IDLE");
+ if (send_type == SND_CMD) {
+ if (cmd->opcode == MMC_SEND_STATUS) {
+ if ((cmd->resp[0] & CARD_READY_FOR_DATA) || (CARD_CURRENT_STATE(cmd->resp[0]) != 7)) {
+ N_MSG(OPS, "disable clock, CMD13 IDLE");
msdc_gate_clock(host->id);
}
} else {
- N_MSG(OPS,"disable clock, CMD<%d>", cmd->opcode);
+ N_MSG(OPS, "disable clock, CMD<%d>", cmd->opcode);
msdc_gate_clock(host->id);
}
} else {
- if(read) {
- N_MSG(OPS,"disable clock!!! Read CMD<%d>",cmd->opcode);
+ if (read) {
+ N_MSG(OPS, "disable clock!!! Read CMD<%d>", cmd->opcode);
msdc_gate_clock(host->id);
}
}
/* Lv2: PAD_CMD_RESP_RXDLY[26:22] */
cur_rrdly = (orig_rrdly + rrdly + 1) % 32;
sdr_set_field(MSDC_PAD_TUNE, MSDC_PAD_TUNE_CMDRRDLY, cur_rrdly);
- }while (++rrdly < 32);
+ } while (++rrdly < 32);
return result;
}
{
struct msdc_host *host = mmc_priv(mmc);
u32 base = host->base;
- u32 ddr=0;
- u32 dcrc=0;
+ u32 ddr = 0;
+ u32 dcrc = 0;
u32 rxdly, cur_rxdly0, cur_rxdly1;
u32 dsmpl, cur_dsmpl, orig_dsmpl;
u32 cur_dat0, cur_dat1, cur_dat2, cur_dat3;
continue;
}
}
- result = msdc_do_request(mmc,mrq);
+ result = msdc_do_request(mmc, mrq);
- sdr_get_field(SDC_DCRC_STS, SDC_DCRC_STS_POS|SDC_DCRC_STS_NEG, dcrc); /* RO */
+ sdr_get_field(SDC_DCRC_STS, SDC_DCRC_STS_POS | SDC_DCRC_STS_NEG, dcrc); /* RO */
if (!ddr) dcrc &= ~SDC_DCRC_STS_NEG;
ERR_MSG("TUNE_BREAD<%s> dcrc<0x%x> DATRDDLY0/1<0x%x><0x%x> dsmpl<0x%x>",
(result == 0 && dcrc == 0) ? "PASS" : "FAIL", dcrc,
return result;
}
-static int msdc_tune_bwrite(struct mmc_host *mmc,struct mmc_request *mrq)
+static int msdc_tune_bwrite(struct mmc_host *mmc, struct mmc_request *mrq)
{
struct msdc_host *host = mmc_priv(mmc);
u32 base = host->base;
// MSDC_IOCON_DDR50CKD need to check. [Fix me]
sdr_get_field(MSDC_PAD_TUNE, MSDC_PAD_TUNE_DATWRDLY, orig_wrrdly);
- sdr_get_field(MSDC_IOCON, MSDC_IOCON_DSPL, orig_dsmpl );
+ sdr_get_field(MSDC_IOCON, MSDC_IOCON_DSPL, orig_dsmpl);
/* Tune Method 2. just DAT0 */
sdr_set_field(MSDC_IOCON, MSDC_IOCON_DDLSEL, 1);
continue;
}
}
- result = msdc_do_request(mmc,mrq);
+ result = msdc_do_request(mmc, mrq);
ERR_MSG("TUNE_BWRITE<%s> DSPL<%d> DATWRDLY<%d> MSDC_DAT_RDDLY0<0x%x>",
result == 0 ? "PASS" : "FAIL",
struct mmc_command *cmd;
struct mmc_data *data;
//u32 base = host->base;
- int ret=0, read;
+ int ret = 0, read;
cmd = mrq->cmd;
data = mrq->cmd->data;
if (read) {
if (data->error == (unsigned int)(-EIO)) {
- ret = msdc_tune_bread(mmc,mrq);
+ ret = msdc_tune_bread(mmc, mrq);
}
} else {
ret = msdc_check_busy(mmc, host);
- if (ret){
+ if (ret) {
ERR_MSG("XXX cmd13 wait program done failed");
return ret;
}
/* CRC and TO */
/* Fix me: don't care card status? */
- ret = msdc_tune_bwrite(mmc,mrq);
+ ret = msdc_tune_bwrite(mmc, mrq);
}
return ret;
}
/* ops.request */
-static void msdc_ops_request(struct mmc_host *mmc,struct mmc_request *mrq)
+static void msdc_ops_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
struct msdc_host *host = mmc_priv(mmc);
u32 ticks = 0, opcode = 0, sizes = 0, bRx = 0;
#endif /* end of --- */
- if(host->mrq){
+ if (host->mrq) {
ERR_MSG("XXX host->mrq<0x%.8x>", (int)host->mrq);
BUG();
}
host->mrq = mrq;
- if (msdc_do_request(mmc,mrq)) {
- if(host->hw->flags & MSDC_REMOVABLE && ralink_soc == MT762X_SOC_MT7621AT && mrq->data && mrq->data->error) {
- msdc_tune_request(mmc,mrq);
+ if (msdc_do_request(mmc, mrq)) {
+ if (host->hw->flags & MSDC_REMOVABLE && ralink_soc == MT762X_SOC_MT7621AT && mrq->data && mrq->data->error) {
+ msdc_tune_request(mmc, mrq);
}
}
opcode = mrq->cmd->opcode;
if (mrq->cmd->data) {
sizes = mrq->cmd->data->blocks * mrq->cmd->data->blksz;
- bRx = mrq->cmd->data->flags & MMC_DATA_READ ? 1 : 0 ;
+ bRx = mrq->cmd->data->flags & MMC_DATA_READ ? 1 : 0;
} else {
bRx = mrq->cmd->arg & 0x80000000 ? 1 : 0;
}
static void msdc_ops_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct msdc_host *host = mmc_priv(mmc);
- struct msdc_hw *hw=host->hw;
+ struct msdc_hw *hw = host->hw;
u32 base = host->base;
u32 ddr = 0;
/* Clock control */
if (host->mclk != ios->clock) {
- if(ios->clock > 25000000) {
+ if (ios->clock > 25000000) {
//if (!(host->hw->flags & MSDC_REMOVABLE)) {
INIT_MSG("SD data latch edge<%d>", hw->data_edge);
sdr_set_field(MSDC_IOCON, MSDC_IOCON_RSPL, hw->cmd_edge);
u32 cmdsts = MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO | MSDC_INT_CMDRDY |
MSDC_INT_ACMDCRCERR | MSDC_INT_ACMDTMO | MSDC_INT_ACMDRDY |
MSDC_INT_ACMD19_DONE;
- u32 datsts = MSDC_INT_DATCRCERR |MSDC_INT_DATTMO;
+ u32 datsts = MSDC_INT_DATCRCERR | MSDC_INT_DATTMO;
u32 intsts = sdr_read32(MSDC_INT);
u32 inten = sdr_read32(MSDC_INTEN); inten &= intsts;
/* MSG will cause fatal error */
/* card change interrupt */
- if (intsts & MSDC_INT_CDSC){
+ if (intsts & MSDC_INT_CDSC) {
if (mtk_sw_poll)
return IRQ_HANDLED;
IRQ_MSG("MSDC_INT_CDSC irq<0x%.8x>", intsts);
}
/* sdio interrupt */
- if (intsts & MSDC_INT_SDIOIRQ){
+ if (intsts & MSDC_INT_SDIOIRQ) {
IRQ_MSG("XXX MSDC_INT_SDIOIRQ"); /* seems not sdio irq */
//mmc_signal_sdio_irq(host->mmc);
}
msdc_clr_int();
atomic_set(&host->abort, 1); /* For PIO mode exit */
- if (intsts & MSDC_INT_DATTMO){
+ if (intsts & MSDC_INT_DATTMO) {
IRQ_MSG("XXX CMD<%d> MSDC_INT_DATTMO", host->mrq->cmd->opcode);
data->error = (unsigned int)-ETIMEDOUT;
}
- else if (intsts & MSDC_INT_DATCRCERR){
+ else if (intsts & MSDC_INT_DATCRCERR) {
IRQ_MSG("XXX CMD<%d> MSDC_INT_DATCRCERR, SDC_DCRC_STS<0x%x>", host->mrq->cmd->opcode, sdr_read32(SDC_DCRC_STS));
data->error = (unsigned int)-EIO;
}
break;
}
} else if ((intsts & MSDC_INT_RSPCRCERR) || (intsts & MSDC_INT_ACMDCRCERR)) {
- if(intsts & MSDC_INT_ACMDCRCERR){
- IRQ_MSG("XXX CMD<%d> MSDC_INT_ACMDCRCERR",cmd->opcode);
+ if (intsts & MSDC_INT_ACMDCRCERR) {
+ IRQ_MSG("XXX CMD<%d> MSDC_INT_ACMDCRCERR", cmd->opcode);
}
else {
- IRQ_MSG("XXX CMD<%d> MSDC_INT_RSPCRCERR",cmd->opcode);
+ IRQ_MSG("XXX CMD<%d> MSDC_INT_RSPCRCERR", cmd->opcode);
}
cmd->error = (unsigned int)-EIO;
} else if ((intsts & MSDC_INT_CMDTMO) || (intsts & MSDC_INT_ACMDTMO)) {
- if(intsts & MSDC_INT_ACMDTMO){
- IRQ_MSG("XXX CMD<%d> MSDC_INT_ACMDTMO",cmd->opcode);
+ if (intsts & MSDC_INT_ACMDTMO) {
+ IRQ_MSG("XXX CMD<%d> MSDC_INT_ACMDTMO", cmd->opcode);
}
else {
- IRQ_MSG("XXX CMD<%d> MSDC_INT_CMDTMO",cmd->opcode);
+ IRQ_MSG("XXX CMD<%d> MSDC_INT_CMDTMO", cmd->opcode);
}
cmd->error = (unsigned int)-ETIMEDOUT;
msdc_reset();
while (ptr != bd) {
prev = ptr - 1;
- prev->next = (void *)(dma->bd_addr + sizeof(bd_t) *(ptr - bd));
+ prev->next = (void *)(dma->bd_addr + sizeof(bd_t) * (ptr - bd));
ptr = prev;
}
}
mmc->caps |= MMC_CAP_NEEDS_POLL;
/* MMC core transfer sizes tunable parameters */
-#if LINUX_VERSION_CODE > KERNEL_VERSION(3,10,0)
+#if LINUX_VERSION_CODE > KERNEL_VERSION(3, 10, 0)
mmc->max_segs = MAX_HW_SGMTS;
#else
mmc->max_hw_segs = MAX_HW_SGMTS;
host->id = 0;
host->error = 0;
host->irq = irq;
- host->base = (unsigned long) base;
+ host->base = (unsigned long)base;
host->mclk = 0; /* mclk: the request clock of mmc sub-system */
host->hclk = hclks[hw->clk_src]; /* hclk: clock of clock source to msdc controller */
host->sclk = 0; /* sclk: the really clock after divition */
#ifdef CONFIG_PM
hw->register_pm(msdc_pm, (void*)host); /* combo_sdio_register_pm() */
#endif
- if(hw->flags & MSDC_SYS_SUSPEND) { /* will not set for WIFI */
+ if (hw->flags & MSDC_SYS_SUSPEND) { /* will not set for WIFI */
ERR_MSG("MSDC_SYS_SUSPEND and register_pm both set");
}
//mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY; /* pm not controlled by system but by client. */ /* --- by chhung */
/* +++ by chhung */
u32 reg;
-#if defined (CONFIG_MTD_ANY_RALINK)
+#if defined(CONFIG_MTD_ANY_RALINK)
extern int ra_check_flash_type(void);
- if(ra_check_flash_type() == 2) { /* NAND */
+ if (ra_check_flash_type() == 2) { /* NAND */
printk("%s: !!!!! SDXC Module Initialize Fail !!!!!", __func__);
return 0;
}
mtk_sd_device.dev.platform_data = &msdc0_hw;
if (ralink_soc == MT762X_SOC_MT7620A || ralink_soc == MT762X_SOC_MT7621AT) {
//#if defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621)
- reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3<<18);
+ reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3 << 18);
//#if defined (CONFIG_RALINK_MT7620)
if (ralink_soc == MT762X_SOC_MT7620A)
- reg |= 0x1<<18;
+ reg |= 0x1 << 18;
//#endif
} else {
//#elif defined (CONFIG_RALINK_MT7628)
reg |= 0x1e << 16;
sdr_write32((volatile u32*)(RALINK_SYSCTL_BASE + 0x3c), reg);
- reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3<<10);
-#if defined (CONFIG_MTK_MMC_EMMC_8BIT)
- reg |= 0x3<<26 | 0x3<<28 | 0x3<<30;
+ reg = sdr_read32((volatile u32*)(RALINK_SYSCTL_BASE + 0x60)) & ~(0x3 << 10);
+#if defined(CONFIG_MTK_MMC_EMMC_8BIT)
+ reg |= 0x3 << 26 | 0x3 << 28 | 0x3 << 30;
msdc0_hw.data_pins = 8,
#endif
//#endif
}
printk(KERN_INFO DRV_NAME ": MediaTek MT6575 MSDC Driver\n");
-#if defined (MT6575_SD_DEBUG)
+#if defined(MT6575_SD_DEBUG)
msdc_debug_proc_init();
#endif
return 0;