clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw
authorSamuel Holland <samuel@sholland.org>
Fri, 19 Nov 2021 04:35:41 +0000 (22:35 -0600)
committerMaxime Ripard <maxime@cerno.tech>
Tue, 23 Nov 2021 09:29:05 +0000 (10:29 +0100)
Referencing parents with clk_hw pointers is more efficient and removes
the dependency on global clock names. clk_parent_data is needed when
some parent clocks are provided from another driver. Add macros for
declaring dividers that take advantage of these.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-4-samuel@sholland.org
drivers/clk/sunxi-ng/ccu_mp.h

index b392e0d..6e50f37 100644 (file)
@@ -82,6 +82,55 @@ struct ccu_mp {
                                   _muxshift, _muxwidth,                \
                                   0, _flags)
 
+#define SUNXI_CCU_MP_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg,        \
+                                       _mshift, _mwidth,               \
+                                       _pshift, _pwidth,               \
+                                       _muxshift, _muxwidth,           \
+                                       _gate, _flags)                  \
+       struct ccu_mp _struct = {                                       \
+               .enable = _gate,                                        \
+               .m      = _SUNXI_CCU_DIV(_mshift, _mwidth),             \
+               .p      = _SUNXI_CCU_DIV(_pshift, _pwidth),             \
+               .mux    = _SUNXI_CCU_MUX(_muxshift, _muxwidth),         \
+               .common = {                                             \
+                       .reg            = _reg,                         \
+                       .hw.init        = CLK_HW_INIT_PARENTS_DATA(_name, \
+                                                                  _parents, \
+                                                                  &ccu_mp_ops, \
+                                                                  _flags), \
+               }                                                       \
+       }
+
+#define SUNXI_CCU_MP_DATA_WITH_MUX(_struct, _name, _parents, _reg,     \
+                                  _mshift, _mwidth,                    \
+                                  _pshift, _pwidth,                    \
+                                  _muxshift, _muxwidth,                \
+                                  _flags)                              \
+       SUNXI_CCU_MP_DATA_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
+                                       _mshift, _mwidth,               \
+                                       _pshift, _pwidth,               \
+                                       _muxshift, _muxwidth,           \
+                                       0, _flags)
+
+#define SUNXI_CCU_MP_HW_WITH_MUX_GATE(_struct, _name, _parents, _reg,  \
+                                     _mshift, _mwidth,                 \
+                                     _pshift, _pwidth,                 \
+                                     _muxshift, _muxwidth,             \
+                                     _gate, _flags)                    \
+       struct ccu_mp _struct = {                                       \
+               .enable = _gate,                                        \
+               .m      = _SUNXI_CCU_DIV(_mshift, _mwidth),             \
+               .p      = _SUNXI_CCU_DIV(_pshift, _pwidth),             \
+               .mux    = _SUNXI_CCU_MUX(_muxshift, _muxwidth),         \
+               .common = {                                             \
+                       .reg            = _reg,                         \
+                       .hw.init        = CLK_HW_INIT_PARENTS_HW(_name, \
+                                                                _parents, \
+                                                                &ccu_mp_ops, \
+                                                                _flags), \
+               }                                                       \
+       }
+
 static inline struct ccu_mp *hw_to_ccu_mp(struct clk_hw *hw)
 {
        struct ccu_common *common = hw_to_ccu_common(hw);