microsoft/compiler: Sort all user varyings before any sysvals

User varyings are linked by both name and register. The name is based
on how many *variables* are before it in final driver_location sort
order, not necessarily how many registers are before it.

In some cases where clip/cull distance are involved, it's possible
for one shader to write into a part of the cull distance that's
ignored by a downstream shader, but because linking is done by
*whole* register locations, and clip/cull can be combined using
*fractional* register locations, this is hard to detect. Since no
non-sysvals end up using fractional locations, just put all non-sysvals
first so they always generate the same semantic names for the same
register locations.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20346>

diff --git a/src/microsoft/compiler/dxil_nir.c b/src/microsoft/compiler/dxil_nir.c
index 5990cce45d57625a1b43ab92c393a7f779e5f739..0a66fe9d7f8f2c076594e2fea81942c33d62e43a 100644 (file)
--- a/src/microsoft/compiler/dxil_nir.c
+++ b/src/microsoft/compiler/dxil_nir.c
@@ -1685,6 +1685,7 @@ dxil_sort_ps_outputs(nir_shader* s)
 
 enum dxil_sysvalue_type {
    DXIL_NO_SYSVALUE = 0,
+   DXIL_USED_SYSVALUE,
    DXIL_SYSVALUE,
    DXIL_GENERATED_SYSVALUE
 };
@@ -1706,7 +1707,7 @@ nir_var_to_dxil_sysvalue_type(nir_variable *var, uint64_t other_stage_mask)
    case VARYING_SLOT_LAYER:
       if (!((1ull << var->data.location) & other_stage_mask))
          return DXIL_SYSVALUE;
-      FALLTHROUGH;
+      return DXIL_USED_SYSVALUE;
    default:
       return DXIL_NO_SYSVALUE;
    }