if (priv->config == PIRQ_VIA_PCI)
dm_pci_read_config8(dev->parent, LINK_N2V(link, base), &pirq);
else
- pirq = readb(priv->ibase + LINK_N2V(link, base));
+ pirq = readb((uintptr_t)priv->ibase + LINK_N2V(link, base));
pirq &= 0xf;
if (priv->config == PIRQ_VIA_PCI)
dm_pci_write_config8(dev->parent, LINK_N2V(link, base), irq);
else
- writeb(irq, priv->ibase + LINK_N2V(link, base));
+ writeb(irq, (uintptr_t)priv->ibase + LINK_N2V(link, base));
}
static struct irq_info *check_dup_entry(struct irq_info *slot_base,
if (priv->config == PIRQ_VIA_PCI)
dm_pci_write_config32(dev->parent, priv->actl_addr, 0);
else
- writel(0, priv->ibase + priv->actl_addr);
+ writel(0, (uintptr_t)priv->ibase + priv->actl_addr);
}
}
static void qemu_x86_fwcfg_read_entry_dma(struct fw_cfg_dma_access *dma)
{
/* the DMA address register is big endian */
- outl(cpu_to_be32((uint32_t)dma), FW_DMA_PORT_HIGH);
+ outl(cpu_to_be32((uintptr_t)dma), FW_DMA_PORT_HIGH);
while (be32_to_cpu(dma->control) & ~FW_CFG_DMA_ERROR)
__asm__ __volatile__ ("pause");