ARM: tegra: Rename GPIO hog nodes to match schema
authorThierry Reding <treding@nvidia.com>
Tue, 7 Dec 2021 09:59:24 +0000 (10:59 +0100)
committerThierry Reding <treding@nvidia.com>
Tue, 14 Dec 2021 15:07:42 +0000 (16:07 +0100)
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to
the DT schema. Rename all such nodes to allow validation to pass.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra124-apalis-eval.dts
arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
arch/arm/boot/dts/tegra124-apalis.dtsi
arch/arm/boot/dts/tegra20-colibri.dtsi
arch/arm/boot/dts/tegra30-apalis-eval.dts
arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts
arch/arm/boot/dts/tegra30-colibri.dtsi

index 28c29b6..3209554 100644 (file)
 
 &gpio {
        /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
-       pex-perst-n {
+       pex-perst-n-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
                output-high;
index f3afde4..814257c 100644 (file)
 
 &gpio {
        /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
-       pex-perst-n {
+       pex-perst-n-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
                output-high;
index cde9ae8..4ba4d52 100644 (file)
 
 &gpio {
        /* I210 Gigabit Ethernet Controller Reset */
-       lan-reset-n {
+       lan-reset-n-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
                output-high;
        };
 
        /* Control MXM3 pin 26 Reset Module Output Carrier Input */
-       reset-moci-ctrl {
+       reset-moci-ctrl-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
                output-high;
index a46d9ba..3760744 100644 (file)
 
 &gpio {
        /* I210 Gigabit Ethernet Controller Reset */
-       lan-reset-n {
+       lan-reset-n-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
                output-high;
        };
 
        /* Control MXM3 pin 26 Reset Module Output Carrier Input */
-       reset-moci-ctrl {
+       reset-moci-ctrl-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
                output-high;
index 585a5b4..80e4390 100644 (file)
 };
 
 &gpio {
-       lan-reset-n {
+       lan-reset-n-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(V, 4) GPIO_ACTIVE_HIGH>;
                output-high;
        };
 
        /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
-       npwe {
+       npwe-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
                output-high;
        };
 
        /* Not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR */
-       rdnwr {
+       rdnwr-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(T, 6) GPIO_ACTIVE_HIGH>;
                output-low;
index 9f653ef..93b83b3 100644 (file)
 
 &gpio {
        /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
-       pex-perst-n {
+       pex-perst-n-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
                output-high;
index 86e138e..fbfa75e 100644 (file)
 
 &gpio {
        /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
-       pex-perst-n {
+       pex-perst-n-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>;
                output-high;
index 413e352..fcd3d26 100644 (file)
 };
 
 &gpio {
-       lan-reset-n {
+       lan-reset-n-hog {
                gpio-hog;
                gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
                output-high;