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[X86] Add (and (or x, C), D) -> D iff (C & D) == D non-splat vector test
author
Simon Pilgrim
<llvm-dev@redking.me.uk>
Thu, 21 Dec 2017 14:33:40 +0000
(14:33 +0000)
committer
Simon Pilgrim
<llvm-dev@redking.me.uk>
Thu, 21 Dec 2017 14:33:40 +0000
(14:33 +0000)
llvm-svn: 321268
llvm/test/CodeGen/X86/combine-and.ll
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diff --git
a/llvm/test/CodeGen/X86/combine-and.ll
b/llvm/test/CodeGen/X86/combine-and.ll
index
e92237f
..
df89ee4
100644
(file)
--- a/
llvm/test/CodeGen/X86/combine-and.ll
+++ b/
llvm/test/CodeGen/X86/combine-and.ll
@@
-220,6
+220,17
@@
define <4 x i32> @and_or_v4i32(<4 x i32> %a0) {
ret <4 x i32> %2
}
+define <8 x i16> @and_or_v8i16(<8 x i16> %a0) {
+; CHECK-LABEL: and_or_v8i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: orps {{.*}}(%rip), %xmm0
+; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %1 = or <8 x i16> %a0, <i16 255, i16 127, i16 63, i16 31, i16 15, i16 31, i16 63, i16 -1>
+ %2 = and <8 x i16> %1, <i16 15, i16 7, i16 3, i16 1, i16 14, i16 10, i16 2, i16 32767>
+ ret <8 x i16> %2
+}
+
;
; known bits folding
;