drm/amdgpu: handle polaris10/11 overlap asics (v2)

commit 1d4624cd72b912b2680c08d0be48338a1629a858 upstream.

Some special polaris 10 chips overlap with the polaris11
DID range.  Handle this properly in the driver.

v2: use local flags for other function calls.

Acked-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 28dea2e..cabbf02 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -2008,6 +2008,15 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
                         "See modparam exp_hw_support\n");
                return -ENODEV;
        }
+       /* differentiate between P10 and P11 asics with the same DID */
+       if (pdev->device == 0x67FF &&
+           (pdev->revision == 0xE3 ||
+            pdev->revision == 0xE7 ||
+            pdev->revision == 0xF3 ||
+            pdev->revision == 0xF7)) {
+               flags &= ~AMD_ASIC_MASK;
+               flags |= CHIP_POLARIS10;
+       }
 
        /* Due to hardware bugs, S/G Display on raven requires a 1:1 IOMMU mapping,
         * however, SME requires an indirect IOMMU mapping because the encryption
@@ -2081,12 +2090,12 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
 
        pci_set_drvdata(pdev, ddev);
 
-       ret = amdgpu_driver_load_kms(adev, ent->driver_data);
+       ret = amdgpu_driver_load_kms(adev, flags);
        if (ret)
                goto err_pci;
 
 retry_init:
-       ret = drm_dev_register(ddev, ent->driver_data);
+       ret = drm_dev_register(ddev, flags);
        if (ret == -EAGAIN && ++retry <= 3) {
                DRM_INFO("retry init %d\n", retry);
                /* Don't request EX mode too frequently which is attacking */