req->qp_ctx = qp_ctx;
qp_ctx->req_list[req_id] = req;
+
return req_id;
}
j * SEC_PBUF_PKG + pbuf_page_offset;
}
}
+
return 0;
}
}
return 0;
+
alloc_pbuf_fail:
if (ctx->alg_type == SEC_AEAD)
sec_free_mac_resource(dev, qp_ctx->res);
alloc_fail:
sec_free_civ_resource(dev, res);
-
return ret;
}
hisi_acc_free_sgl_pool(dev, qp_ctx->c_in_pool);
err_destroy_idr:
idr_destroy(&qp_ctx->req_idr);
-
return ret;
}
goto err_cipher_init;
return 0;
+
err_cipher_init:
sec_ctx_base_uninit(ctx);
-
return ret;
}
if (unlikely(pbuf_length != copy_size))
dev_err(dev, "copy pbuf data to dst error!\n");
-
}
static int sec_cipher_map(struct sec_ctx *ctx, struct sec_req *req,
}
return 0;
+
bad_key:
memzero_explicit(&keys, sizeof(struct crypto_authenc_keys));
-
return -EINVAL;
}
unmap_req_buf:
ctx->req_op->buf_unmap(ctx, req);
-
return ret;
}
atomic64_inc(&ctx->sec->debug.dfx.recv_busy_cnt);
}
-
sk_req->base.complete(&sk_req->base, err);
}
sec_request_untransfer(ctx, req);
err_uninit_req:
sec_request_uninit(ctx, req);
-
return ret;
}
sec_auth_uninit(ctx);
err_auth_init:
sec_ctx_base_uninit(ctx);
-
return ret;
}
}
return 0;
}
-
dev_err(dev, "skcipher algorithm error!\n");
+
return -EINVAL;
}
if (unlikely(c_alg != SEC_CALG_AES)) {
dev_err(SEC_CTX_DEV(ctx), "aead crypto alg error!\n");
return -EINVAL;
-
}
if (sreq->c_req.encrypt)
sreq->c_req.c_len = req->cryptlen;
if (ret)
goto failed_to_create;
-
return 0;
failed_to_create:
debugfs_remove_recursive(sec_debugfs_root);
-
return ret;
}
while (errs->msg) {
if (errs->int_msk & err_sts) {
dev_err(dev, "%s [error status=0x%x] found\n",
- errs->msg, errs->int_msk);
+ errs->msg, errs->int_msk);
if (SEC_CORE_INT_STATUS_M_ECC & errs->int_msk) {
err_val = readl(qm->io_base +
SEC_CORE_SRAM_ECC_ERR_INFO);
dev_err(dev, "multi ecc sram num=0x%x\n",
- SEC_ECC_NUM(err_val));
+ SEC_ECC_NUM(err_val));
}
}
errs++;
.log_dev_hw_err = sec_log_hw_error,
.open_axi_master_ooo = sec_open_axi_master_ooo,
.err_info = {
- .ce = QM_BASE_CE,
- .nfe = QM_BASE_NFE | QM_ACC_DO_TASK_TIMEOUT |
- QM_ACC_WB_NOT_READY_TIMEOUT,
- .fe = 0,
- .ecc_2bits_mask = SEC_CORE_INT_STATUS_M_ECC,
- .msi_wr_port = BIT(0),
- .acpi_rst = "SRST",
+ .ce = QM_BASE_CE,
+ .nfe = QM_BASE_NFE | QM_ACC_DO_TASK_TIMEOUT |
+ QM_ACC_WB_NOT_READY_TIMEOUT,
+ .fe = 0,
+ .ecc_2bits_mask = SEC_CORE_INT_STATUS_M_ECC,
+ .msi_wr_port = BIT(0),
+ .acpi_rst = "SRST",
}
};
err_alg_unregister:
hisi_qm_alg_unregister(qm, &sec_devices);
-
err_qm_stop:
sec_debugfs_exit(qm);
hisi_qm_stop(qm, QM_NORMAL);
-
err_probe_uninit:
sec_probe_uninit(qm);
-
err_qm_uninit:
sec_qm_uninit(qm);
-
return ret;
}
static const struct pci_error_handlers sec_err_handler = {
.error_detected = hisi_qm_dev_err_detected,
- .slot_reset = hisi_qm_dev_slot_reset,
- .reset_prepare = hisi_qm_reset_prepare,
- .reset_done = hisi_qm_reset_done,
+ .slot_reset = hisi_qm_dev_slot_reset,
+ .reset_prepare = hisi_qm_reset_prepare,
+ .reset_done = hisi_qm_reset_done,
};
static struct pci_driver sec_pci_driver = {