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freedreno/ir3: Fix 16-bit bit_count.
author
Emma Anholt
<emma@anholt.net>
Wed, 11 May 2022 23:31:33 +0000
(16:31 -0700)
committer
Marge Bot
<emma+marge@anholt.net>
Thu, 19 May 2022 19:43:36 +0000
(19:43 +0000)
No need to do the 16-bit lowering if it already is.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
src/freedreno/ir3/ir3_compiler_nir.c
patch
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diff --git
a/src/freedreno/ir3/ir3_compiler_nir.c
b/src/freedreno/ir3/ir3_compiler_nir.c
index
980c83b
..
5a02af2
100644
(file)
--- a/
src/freedreno/ir3/ir3_compiler_nir.c
+++ b/
src/freedreno/ir3/ir3_compiler_nir.c
@@
-769,7
+769,7
@@
emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
break;
}
case nir_op_bit_count: {
- if (ctx->compiler->gen < 5) {
+ if (ctx->compiler->gen < 5
|| (src[0]->dsts[0]->flags & IR3_REG_HALF)
) {
dst[0] = ir3_CBITS_B(b, src[0], 0);
break;
}