arm64: dts: renesas: r8a774b1: Add SDHI support

Add SDHI support for the r8a774b1 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-2-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index ed4a57f..532c9ca 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -880,23 +880,51 @@
                };
 
                sdhi0: sd@ee100000 {
+                       compatible = "renesas,sdhi-r8a774b1",
+                                    "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
-                       /* placeholder */
+                       interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 314>;
+                       max-frequency = <200000000>;
+                       power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+                       resets = <&cpg 314>;
+                       status = "disabled";
                };
 
                sdhi1: sd@ee120000 {
+                       compatible = "renesas,sdhi-r8a774b1",
+                                    "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee120000 0 0x2000>;
-                       /* placeholder */
+                       interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 313>;
+                       max-frequency = <200000000>;
+                       power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+                       resets = <&cpg 313>;
+                       status = "disabled";
                };
 
                sdhi2: sd@ee140000 {
+                       compatible = "renesas,sdhi-r8a774b1",
+                                    "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
-                       /* placeholder */
+                       interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 312>;
+                       max-frequency = <200000000>;
+                       power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+                       resets = <&cpg 312>;
+                       status = "disabled";
                };
 
                sdhi3: sd@ee160000 {
+                       compatible = "renesas,sdhi-r8a774b1",
+                                    "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee160000 0 0x2000>;
-                       /* placeholder */
+                       interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 311>;
+                       max-frequency = <200000000>;
+                       power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+                       resets = <&cpg 311>;
+                       status = "disabled";
                };
 
                gic: interrupt-controller@f1010000 {