clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable

[ Upstream commit e7fe73fc6b68ee97b1e8f124a66a5ee50d8d5e5b ]

The PCIe GDSCs on most Qualcomm platforms expect the OS to always
consider collapse requests as successful. This also concerns SM8550.

Add the VOTABLE flag to the GDSCs in question to comply with these
expectations.

Fixes: 955f2ea3b9e9 ("clk: qcom: Add GCC driver for SM8550")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-4-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/qcom/gcc-sm8550.c b/drivers/clk/qcom/gcc-sm8550.c
index 1c3d785..a16d074 100644 (file)
--- a/drivers/clk/qcom/gcc-sm8550.c
+++ b/drivers/clk/qcom/gcc-sm8550.c
@@ -3002,7 +3002,7 @@ static struct gdsc pcie_0_gdsc = {
                .name = "pcie_0_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
+       .flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc pcie_0_phy_gdsc = {
@@ -3011,7 +3011,7 @@ static struct gdsc pcie_0_phy_gdsc = {
                .name = "pcie_0_phy_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
+       .flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc pcie_1_gdsc = {
@@ -3020,7 +3020,7 @@ static struct gdsc pcie_1_gdsc = {
                .name = "pcie_1_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
+       .flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc pcie_1_phy_gdsc = {
@@ -3029,7 +3029,7 @@ static struct gdsc pcie_1_phy_gdsc = {
                .name = "pcie_1_phy_gdsc",
        },
        .pwrsts = PWRSTS_OFF_ON,
-       .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
+       .flags = VOTABLE | POLL_CFG_GDSCR | RETAIN_FF_ENABLE,
 };
 
 static struct gdsc ufs_phy_gdsc = {