clk: samsung: exynos5420: do not define number of clocks in bindings
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 8 Aug 2023 08:27:33 +0000 (10:27 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 15 Aug 2023 05:49:24 +0000 (07:49 +0200)
Number of clocks supported by Linux drivers might vary - sometimes we
add new clocks, not exposed previously.  Therefore these numbers of
clocks should not be in the bindings, as that prevents changing them.

Define number of clocks per each clock controller inside the driver
directly.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20230808082738.122804-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
drivers/clk/samsung/clk-exynos5420.c

index 1e0cbf7..199843f 100644 (file)
 #define SRC_KFC                        0x28200
 #define DIV_KFC0               0x28500
 
+/* NOTE: Must be equal to the last clock ID increased by one */
+#define CLKS_NR                        (CLK_DOUT_PCLK_DREX1 + 1)
+
 /* Exynos5x SoC type */
 enum exynos5x_soc {
        EXYNOS5420,
@@ -1587,7 +1590,7 @@ static void __init exynos5x_clk_init(struct device_node *np,
 
        exynos5x_soc = soc;
 
-       ctx = samsung_clk_init(NULL, reg_base, CLK_NR_CLKS);
+       ctx = samsung_clk_init(NULL, reg_base, CLKS_NR);
        hws = ctx->clk_data.hws;
 
        samsung_clk_of_register_fixed_ext(ctx, exynos5x_fixed_rate_ext_clks,