drm/amd/display: Fix surface optimization regression on Carrizo

[Why]
DCE legacy optimization path isn't well tested under new DC optimization
flow which can result in underflow occuring when initializing X11 on
Carrizo.

[How]
Retain the legacy optimization flow for DCE and keep the new one for DCN
to satisfy optimizations being correctly applied for ASIC that can
support it.

Fixes: 34316c1e561db0 ("drm/amd/display: Optimize bandwidth on following fast update")
Reported-by: Tom St Denis <tom.stdenis@amd.com>
Tested-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index da942e9f5142d336441ead0a60841cb8275580b2..f9876e429f262526355952accc095a22ca50f86c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3118,8 +3118,13 @@ void dc_commit_updates_for_stream(struct dc *dc,
                        if (new_pipe->plane_state && new_pipe->plane_state != old_pipe->plane_state)
                                new_pipe->plane_state->force_full_update = true;
                }
-       } else if (update_type == UPDATE_TYPE_FAST) {
-               /* Previous frame finished and HW is ready for optimization. */
+       } else if (update_type == UPDATE_TYPE_FAST && dc_ctx->dce_version >= DCE_VERSION_MAX) {
+               /*
+                * Previous frame finished and HW is ready for optimization.
+                *
+                * Only relevant for DCN behavior where we can guarantee the optimization
+                * is safe to apply - retain the legacy behavior for DCE.
+                */
                dc_post_update_surfaces_to_stream(dc);
        }
 
@@ -3178,6 +3183,12 @@ void dc_commit_updates_for_stream(struct dc *dc,
                }
        }
 
+       /* Legacy optimization path for DCE. */
+       if (update_type >= UPDATE_TYPE_FULL && dc_ctx->dce_version < DCE_VERSION_MAX) {
+               dc_post_update_surfaces_to_stream(dc);
+               TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce);
+       }
+
        return;
 
 }