if( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "WITH_ASSERTS" )
if( LLVM_ENABLE_ASSERTIONS )
set( LLVM_ENABLE_ABI_BREAKING_CHECKS 1 )
- else()
- set( LLVM_ENABLE_ABI_BREAKING_CHECKS 0 )
endif()
elseif( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "FORCE_ON" )
set( LLVM_ENABLE_ABI_BREAKING_CHECKS 1 )
elseif( uppercase_LLVM_ABI_BREAKING_CHECKS STREQUAL "FORCE_OFF" )
- set( LLVM_ENABLE_ABI_BREAKING_CHECKS 0 )
+ # We don't need to do anything special to turn off ABI breaking checks.
elseif( NOT DEFINED LLVM_ABI_BREAKING_CHECKS )
# Treat LLVM_ABI_BREAKING_CHECKS like "FORCE_OFF" when it has not been
# defined.
- set( LLVM_ENABLE_ABI_BREAKING_CHECKS 0 )
else()
message(FATAL_ERROR "Unknown value for LLVM_ABI_BREAKING_CHECKS: \"${LLVM_ABI_BREAKING_CHECKS}\"!")
endif()
DenseMap<const SDNode *, CallSiteDbgInfo> SDCallSiteDbgInfo;
-#if LLVM_ENABLE_ABI_BREAKING_CHECKS
uint16_t NextPersistentId = 0;
-#endif
/// Are instruction referencing variable locations desired for this function?
bool UseInstrRefDebugInfo = false;
public:
/// Unique and persistent id per SDNode in the DAG.
/// Used for debug printing.
-#if LLVM_ENABLE_ABI_BREAKING_CHECKS
uint16_t PersistentId;
-#endif
//===--------------------------------------------------------------------===//
// Accessors
: SDNode(ISD::HANDLENODE, 0, DebugLoc(), getSDVTList(MVT::Other)) {
// HandleSDNodes are never inserted into the DAG, so they won't be
// auto-numbered. Use ID 65535 as a sentinel.
-#if LLVM_ENABLE_ABI_BREAKING_CHECKS
PersistentId = 0xffff;
-#endif
// Manually set up the operand list. This node type is special in that it's
// always stack allocated and SelectionDAG does not manage its operands.
/// verification and other common operations when a new node is allocated.
void SelectionDAG::InsertNode(SDNode *N) {
AllNodes.push_back(N);
-#if LLVM_ENABLE_ABI_BREAKING_CHECKS
- N->PersistentId = NextPersistentId++;
-#endif
#ifndef NDEBUG
+ N->PersistentId = NextPersistentId++;
VerifySDNode(N);
#endif
for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
AllNodes.remove(AllNodes.begin());
while (!AllNodes.empty())
DeallocateNode(&AllNodes.front());
-#if LLVM_ENABLE_ABI_BREAKING_CHECKS
+#ifndef NDEBUG
NextPersistentId = 0;
#endif
}
static Printable PrintNodeId(const SDNode &Node) {
return Printable([&Node](raw_ostream &OS) {
-#if LLVM_ENABLE_ABI_BREAKING_CHECKS
+#ifndef NDEBUG
OS << 't' << Node.PersistentId;
#else
- OS << (const void *)&Node;
+ OS << (const void*)&Node;
#endif
});
}
const SelectionDAG *Graph) {
std::string R;
raw_string_ostream OS(R);
-#if LLVM_ENABLE_ABI_BREAKING_CHECKS
+#ifndef NDEBUG
OS << 't' << Node->PersistentId;
#else
OS << static_cast<const void *>(Node);
; RUN: llc < %s -mtriple=aarch64-- -debug 2>&1 | FileCheck %s
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
declare float @llvm.pow.f32(float, float)
declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
; RUN: llc < %s -debug-only=legalize-types 2>&1 | FileCheck %s --check-prefix=CHECK-LEGALIZATION
; RUN: llc < %s | FileCheck %s
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
target triple = "aarch64-unknown-linux-gnu"
attributes #0 = {"target-features"="+sve"}
; REQUIRES: arm-registered-target
; REQUIRES: asserts
-; REQUIRES: abi_breaking_checks
; RUN: llc -o /dev/null %s -debug-only=legalize-types 2>&1 | FileCheck %s
; This test check that when v4f64 gets broken down to two v2f64 it maintains
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabihf -mattr=neon -debug 2>&1 | FileCheck %s
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
declare float @llvm.pow.f32(float, float)
declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
; RUN: llc -march=hexagon -debug-only=isel < %s 2>&1 | FileCheck %s
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; This test validates that ISel picks the correct equivalent of below mentioned intrinsics
; For S2_asr_i_r_rnd_goodsyntax:
; RUN: llc -march=mips -relocation-model=pic -mattr=+xgot,+micromips < %s \
; RUN: -debug 2>&1 | FileCheck %s --check-prefix=MM-XGOT
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; Tests that the correct ISA is selected for computing a global address.
; RUN: llc < %s -mtriple=mips64-linux-gnu -target-abi n64 -verify-machineinstrs \
; RUN: -debug 2>&1 | FileCheck %s --check-prefix=N64-SDAG
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; Test that reserved argument area is shared between the memcpy call and the
; call to f2. This eliminates the nested call sequence nodes.
; RUN: llc -march=mips < %s -debug 2>&1 | FileCheck %s --check-prefix=MIPS
; RUN: llc -march=mips -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefix=MM
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; Test that the correct ISA is selected for the materialization of constants.
; RUN: llc -mtriple=mips-mti-linux-gnu -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MM
; RUN: llc -mtriple=mips64-mti-linux-gnu < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MIPS64
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; CHECK-LABEL: Instruction selection ends:
; RUN: llc --mtriple=mips-mti-linux-gnu < %s -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MIPS
; RUN: llc --mtriple=mips-mti-linux-gnu < %s -mattr=+micromips -debug 2>&1 | FileCheck %s --check-prefixes=CHECK,MM
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; Test that the correct mul instruction is selected upfront.
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s \
; RUN: -verify-machineinstrs -debug 2>&1 | FileCheck %s
define zeroext i1 @addiCmpiUnsigned(i32 zeroext %x) {
entry:
- %add = add nuw i32 10, %x
+ %add = add nuw i32 10, %x
%cmp = icmp ugt i32 %add, 100
ret i1 %cmp
define zeroext i1 @addiCmpiSigned(i32 signext %x) {
entry:
- %add = add nsw i32 16, %x
+ %add = add nsw i32 16, %x
%cmp = icmp sgt i32 %add, 30
ret i1 %cmp
define zeroext i1 @addiCmpiUnsignedOverflow(i32 zeroext %x) {
entry:
- %add = add nuw i32 110, %x
+ %add = add nuw i32 110, %x
%cmp = icmp ugt i32 %add, 100
ret i1 %cmp
define zeroext i1 @addiCmpiSignedOverflow(i16 signext %x) {
entry:
- %add = add nsw i16 16, %x
+ %add = add nsw i16 16, %x
%cmp = icmp sgt i16 %add, -32767
ret i1 %cmp
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; RUN: llc < %s -mtriple=powerpc64le -debug-only=isel -o /dev/null 2>&1 | FileCheck %s --check-prefix=FMFDEBUG
; RUN: llc < %s -mtriple=powerpc64le | FileCheck %s --check-prefix=FMF
; RUN: llc < %s -mtriple=powerpc64le -debug-only=isel -o /dev/null 2>&1 -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s --check-prefix=GLOBALDEBUG
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -debug 2>&1 | FileCheck %s
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
declare float @llvm.pow.f32(float, float)
declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
; RUN: llc -verify-machineinstrs -mtriple=s390x-linux-gnu < %s -debug -stop-after=machineverifier 2>&1 | FileCheck %s
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
define i128 @func1({ i128, i8* } %struct) {
; Verify that we get a combine on the build_pair, creating a LD8 load somewhere
; between "Initial selection DAG" and "Optimized lowered selection DAG".
; RUN: llc < %s -mtriple=s390x-linux-gnu -debug-only=systemz-isel -o - 2>&1 | \
; RUN: FileCheck %s
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
;
; Check that some debug output is printed without problems.
; CHECK: SystemZAddressingMode
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; RUN: not --crash llc < %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
-; CHECK: t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
+; CHECK: t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; RUN: not --crash llc < %s -march=ve -mattr=+vpu -o /dev/null 2>&1 | FileCheck %s
-; CHECK: t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
+; CHECK: t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]
; CHECK: [[A]]: v256i32
; CHECK: [[B]]: v256i32
; CHECK: [[MASK]]: v256i1
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -o /dev/null -debug-only=isel 2>&1 | FileCheck %s
; Make sure we emit the basic block exports and the TokenFactor before the
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx512f -debug-only=isel < %s -o /dev/null 2>&1 | FileCheck %s
; This tests the propagation of fast-math-flags from IR instructions to SDNodeFlags.
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s -o /dev/null 2>&1 | FileCheck -check-prefix=DBGDAG %s
; RUN: llc < %s -mtriple=x86_64-- -debug 2>&1 | FileCheck %s
-; REQUIRES: asserts, abi_breaking_checks
+; REQUIRES: asserts
declare float @llvm.pow.f32(float, float)
declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
if config.expensive_checks:
config.available_features.add('expensive_checks')
-if config.abi_breaking_checks:
- config.available_features.add('abi_breaking_checks')
-
if "MemoryWithOrigins" in config.llvm_use_sanitizer:
config.available_features.add('use_msan_with_origins')
config.llvm_inliner_model_autogenerated = @LLVM_INLINER_MODEL_AUTOGENERATED@
config.llvm_raevict_model_autogenerated = @LLVM_RAEVICT_MODEL_AUTOGENERATED@
config.expensive_checks = @LLVM_ENABLE_EXPENSIVE_CHECKS@
-config.abi_breaking_checks = @LLVM_ENABLE_ABI_BREAKING_CHECKS@
import lit.llvm
lit.llvm.initialize(lit_config, config)
# REQUIRES: asserts
-# REQUIRES: abi_breaking_checks
# REQUIRES: amdgpu-registered-target
## Basic test checking that update_llc_test_checks.py can update a file with isel debug output
# REQUIRES: asserts
-# REQUIRES: abi_breaking_checks
# REQUIRES: lanai-registered-target
## Basic test checking that update_llc_test_checks.py can update a file with isel debug output
# REQUIRES: asserts
-# REQUIRES: abi_breaking_checks
# REQUIRES: x86-registered-target
## Basic test checking that update_llc_test_checks.py can update a file with isel debug output