AArch64/GlobalISel: Fix memory type in test

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-split-zero-stores.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-split-zero-stores.mir
index b4c856c..ba0d814 100644 (file)
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-split-zero-stores.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-split-zero-stores.mir
@@ -166,12 +166,12 @@ body:             |
     ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
     ; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
     ; CHECK-NEXT: %zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero(s64), %zero(s64)
-    ; CHECK-NEXT: G_STORE %zerovec(<2 x s64>), [[COPY]](p0) :: (volatile store (<4 x s32>))
+    ; CHECK-NEXT: G_STORE %zerovec(<2 x s64>), [[COPY]](p0) :: (volatile store (<2 x s64>))
     ; CHECK-NEXT: RET_ReallyLR
     %0:_(p0) = COPY $x0
     %zero:_(s64) = G_CONSTANT i64 0
     %zerovec:_(<2 x s64>) = G_BUILD_VECTOR %zero, %zero
-    G_STORE %zerovec(<2 x s64>), %0(p0) :: (volatile store (<4 x s32>))
+    G_STORE %zerovec(<2 x s64>), %0(p0) :: (volatile store (<2 x s64>))
     RET_ReallyLR
 
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