[turbofan] Use load/store indexes as 64-bit registers on arm64.

Since r25024 load/store indexes are 64-bit value but arm64 backend was still
treating them as 32-bit value.

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/698383003

Cr-Commit-Position: refs/heads/master@{#25144}
git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@25144 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/src/compiler/arm64/code-generator-arm64.cc b/src/compiler/arm64/code-generator-arm64.cc
index 58886ae..0c75b7c 100644 (file)
--- a/src/compiler/arm64/code-generator-arm64.cc
+++ b/src/compiler/arm64/code-generator-arm64.cc
@@ -100,8 +100,7 @@ class Arm64OperandConverter FINAL : public InstructionOperandConverter {
         return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
       case kMode_MRR:
         *first_index += 2;
-        return MemOperand(InputRegister(index + 0), InputRegister(index + 1),
-                          SXTW);
+        return MemOperand(InputRegister(index + 0), InputRegister(index + 1));
     }
     UNREACHABLE();
     return MemOperand(no_reg);