}
| predicate sendop execsize dst sendleadreg payload directsrcoperand instoptions
{
+ if (IS_GENp(6))
+ error(&@2, "the syntax of send instruction\n");
+
memset(&$$, 0, sizeof($$));
set_instruction_opcode(&$$, $2);
GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */
}
| predicate sendop execsize dst sendleadreg payload imm32reg instoptions
{
+ if (IS_GENp(6))
+ error(&@2, "the syntax of send instruction\n");
+
if ($7.reg.type != BRW_REGISTER_TYPE_UD &&
$7.reg.type != BRW_REGISTER_TYPE_D &&
$7.reg.type != BRW_REGISTER_TYPE_V) {
}
| predicate sendop execsize dst sendleadreg payload sndopr imm32reg instoptions
{
+ if (IS_GENp(6))
+ error(&@2, "the syntax of send instruction\n");
+
if ($8.reg.type != BRW_REGISTER_TYPE_UD &&
$8.reg.type != BRW_REGISTER_TYPE_D &&
$8.reg.type != BRW_REGISTER_TYPE_V) {
}
| predicate sendop execsize dst sendleadreg payload exp directsrcoperand instoptions
{
+ if (IS_GENp(6))
+ error(&@2, "the syntax of send instruction\n");
+
memset(&$$, 0, sizeof($$));
set_instruction_opcode(&$$, $2);
GEN(&$$)->header.destreg__conditionalmod = $5.nr; /* msg reg index */