Merge patch series "Some style cleanups for recent extension additions"
authorPalmer Dabbelt <palmer@rivosinc.com>
Thu, 13 Oct 2022 15:46:31 +0000 (08:46 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 13 Oct 2022 15:46:31 +0000 (08:46 -0700)
Heiko Stuebner <heiko@sntech.de> says:

As noted by some people, some parts of the recently added extensions
(svpbmt, zicbom) + t-head errata could use some styling upgrades.

So this series provides these.

changes in v2:
- add patch also converting cpufeature probe to BIT()
- update commit message in patch1 (Conor)

Heiko Stuebner (5):
  riscv: cleanup svpbmt cpufeature probing
  riscv: drop some idefs from CMO initialization
  riscv: use BIT() macros in t-head errata init
  riscv: use BIT() marco for cpufeature probing
  riscv: check for kernel config option in t-head memory types errata

arch/riscv/errata/thead/errata.c    | 14 ++++++-----
 arch/riscv/include/asm/cacheflush.h |  2 ++
 arch/riscv/kernel/cpufeature.c      | 39 ++++++++++++-----------------
 3 files changed, 26 insertions(+), 29 deletions(-)

Link: https://lore.kernel.org/r/20220905111027.2463297-1-heiko@sntech.de
* b4-shazam-merge:
  riscv: check for kernel config option in t-head memory types errata
  riscv: use BIT() marco for cpufeature probing
  riscv: use BIT() macros in t-head errata init
  riscv: drop some idefs from CMO initialization
  riscv: cleanup svpbmt cpufeature probing

Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
1  2 
arch/riscv/errata/thead/errata.c
arch/riscv/include/asm/cacheflush.h
arch/riscv/kernel/cpufeature.c

@@@ -37,12 -42,8 +42,9 @@@ static bool errata_probe_cmo(unsigned i
        if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
                return false;
  
 +      riscv_cbom_block_size = L1_CACHE_BYTES;
        riscv_noncoherent_supported();
        return true;
- #else
-       return false;
- #endif
  }
  
  static u32 thead_errata_probe(unsigned int stage,
Simple merge
Simple merge