#include <asm/setup.h>
#include "board.h"
-#include "clock.h"
#include "common.h"
#include "iomap.h"
{}
};
-static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
- /* name parent rate enabled */
- { "uarta", "pll_p", 216000000, true },
- { "uartd", "pll_p", 216000000, true },
- { "usbd", "clk_m", 12000000, false },
- { "usb2", "clk_m", 12000000, false },
- { "usb3", "clk_m", 12000000, false },
- { "pll_a", "pll_p_out1", 56448000, true },
- { "pll_a_out0", "pll_a", 11289600, true },
- { "cdev1", NULL, 0, true },
- { "blink", "clk_32k", 32768, true },
- { "i2s1", "pll_a_out0", 11289600, false},
- { "i2s2", "pll_a_out0", 11289600, false},
- { "sdmmc1", "pll_p", 48000000, false},
- { "sdmmc3", "pll_p", 48000000, false},
- { "sdmmc4", "pll_p", 48000000, false},
- { "spi", "pll_p", 20000000, false },
- { "sbc1", "pll_p", 100000000, false },
- { "sbc2", "pll_p", 100000000, false },
- { "sbc3", "pll_p", 100000000, false },
- { "sbc4", "pll_p", 100000000, false },
- { "host1x", "pll_c", 150000000, false },
- { "disp1", "pll_p", 600000000, false },
- { "disp2", "pll_p", 600000000, false },
- { NULL, NULL, 0, 0},
-};
-
static void __init tegra_dt_init(void)
{
- tegra_clk_init_from_table(tegra_dt_clk_init_table);
-
/*
* Finished with the static registrations now; fill in the missing
* devices
#include <asm/hardware/gic.h>
#include "board.h"
-#include "clock.h"
#include "common.h"
#include "iomap.h"
{}
};
-static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
- /* name parent rate enabled */
- { "uarta", "pll_p", 408000000, true },
- { "pll_a", "pll_p_out1", 564480000, true },
- { "pll_a_out0", "pll_a", 11289600, true },
- { "extern1", "pll_a_out0", 0, true },
- { "clk_out_1", "extern1", 0, true },
- { "blink", "clk_32k", 32768, true },
- { "i2s0", "pll_a_out0", 11289600, false},
- { "i2s1", "pll_a_out0", 11289600, false},
- { "i2s2", "pll_a_out0", 11289600, false},
- { "i2s3", "pll_a_out0", 11289600, false},
- { "i2s4", "pll_a_out0", 11289600, false},
- { "sdmmc1", "pll_p", 48000000, false},
- { "sdmmc3", "pll_p", 48000000, false},
- { "sdmmc4", "pll_p", 48000000, false},
- { "sbc1", "pll_p", 100000000, false},
- { "sbc2", "pll_p", 100000000, false},
- { "sbc3", "pll_p", 100000000, false},
- { "sbc4", "pll_p", 100000000, false},
- { "sbc5", "pll_p", 100000000, false},
- { "sbc6", "pll_p", 100000000, false},
- { "host1x", "pll_c", 150000000, false},
- { "disp1", "pll_p", 600000000, false},
- { "disp2", "pll_p", 600000000, false},
- { NULL, NULL, 0, 0},
-};
-
static void __init tegra30_dt_init(void)
{
- tegra_clk_init_from_table(tegra_dt_clk_init_table);
-
of_platform_populate(NULL, of_default_bus_match_table,
tegra30_auxdata_lookup, NULL);
}
#include "board.h"
#include "clock.h"
-/* Global data of Tegra CPU CAR ops */
-struct tegra_cpu_car_ops *tegra_cpu_car_ops;
-
/*
* Locking:
*
tegra_clk_init_one_from_table(table);
}
-void tegra_periph_reset_deassert(struct clk *c)
-{
- struct clk_tegra *clk = to_clk_tegra(__clk_get_hw(c));
- BUG_ON(!clk->reset);
- clk->reset(__clk_get_hw(c), false);
-}
-EXPORT_SYMBOL(tegra_periph_reset_deassert);
-
-void tegra_periph_reset_assert(struct clk *c)
-{
- struct clk_tegra *clk = to_clk_tegra(__clk_get_hw(c));
- BUG_ON(!clk->reset);
- clk->reset(__clk_get_hw(c), true);
-}
-EXPORT_SYMBOL(tegra_periph_reset_assert);
-
/* Several extended clock configuration bits (e.g., clock routing, clock
* phase control) are included in PLL and peripheral clock source
* registers. */
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/of_irq.h>
+#include <linux/clk/tegra.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <mach/powergate.h>
#include "board.h"
-#include "clock.h"
#include "common.h"
#include "fuse.h"
#include "iomap.h"
void __init tegra_dt_init_irq(void)
{
+ tegra_clocks_init();
tegra_init_irq();
of_irq_init(tegra_dt_irq_match);
}
writel_relaxed(reg, reset);
}
-#ifdef CONFIG_ARCH_TEGRA_2x_SOC
-static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
- /* name parent rate enabled */
- { "clk_m", NULL, 0, true },
- { "pll_p", "clk_m", 216000000, true },
- { "pll_p_out1", "pll_p", 28800000, true },
- { "pll_p_out2", "pll_p", 48000000, true },
- { "pll_p_out3", "pll_p", 72000000, true },
- { "pll_p_out4", "pll_p", 24000000, true },
- { "pll_c", "clk_m", 600000000, true },
- { "pll_c_out1", "pll_c", 120000000, true },
- { "sclk", "pll_c_out1", 120000000, true },
- { "hclk", "sclk", 120000000, true },
- { "pclk", "hclk", 60000000, true },
- { "csite", NULL, 0, true },
- { "emc", NULL, 0, true },
- { "cpu", NULL, 0, true },
- { NULL, NULL, 0, 0},
-};
-#endif
-
-#ifdef CONFIG_ARCH_TEGRA_3x_SOC
-static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = {
- /* name parent rate enabled */
- { "clk_m", NULL, 0, true },
- { "pll_p", "pll_ref", 408000000, true },
- { "pll_p_out1", "pll_p", 9600000, true },
- { "pll_p_out4", "pll_p", 102000000, true },
- { "sclk", "pll_p_out4", 102000000, true },
- { "hclk", "sclk", 102000000, true },
- { "pclk", "hclk", 51000000, true },
- { "csite", NULL, 0, true },
- { NULL, NULL, 0, 0},
-};
-#endif
-
-
static void __init tegra_init_cache(void)
{
#ifdef CONFIG_CACHE_L2X0
tegra_cpu_reset_handler_init();
tegra_apb_io_init();
tegra_init_fuse();
- tegra2_init_clocks();
- tegra_clk_init_from_table(tegra20_clk_init_table);
tegra_init_cache();
tegra_pmc_init();
tegra_powergate_init();
tegra_cpu_reset_handler_init();
tegra_apb_io_init();
tegra_init_fuse();
- tegra30_init_clocks();
- tegra_clk_init_from_table(tegra30_clk_init_table);
tegra_init_cache();
tegra_pmc_init();
tegra_powergate_init();
if (IS_ERR(pll_x_clk))
return PTR_ERR(pll_x_clk);
- pll_p_clk = clk_get_sys(NULL, "pll_p");
+ pll_p_clk = clk_get_sys(NULL, "pll_p_cclk");
if (IS_ERR(pll_p_clk))
return PTR_ERR(pll_p_clk);
TEGRA_CLK_PLLD_MIPI_MUX_SEL,
};
-void tegra_periph_reset_deassert(struct clk *c);
-void tegra_periph_reset_assert(struct clk *c);
-
#ifndef CONFIG_COMMON_CLK
unsigned long clk_get_rate_all_locked(struct clk *c);
#endif
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/export.h>
+#include <linux/clk/tegra.h>
#include <asm/sizes.h>
#include <asm/mach/pci.h>
-#include <mach/clk.h>
#include <mach/powergate.h>
#include "board.h"
#include <linux/io.h>
#include <linux/seq_file.h>
#include <linux/spinlock.h>
+#include <linux/clk/tegra.h>
-#include <mach/clk.h>
#include <mach/powergate.h>
#include "fuse.h"
gate_ops->disable(gate_hw);
}
+void tegra_periph_reset_deassert(struct clk *c)
+{
+ struct clk_hw *hw = __clk_get_hw(c);
+ struct tegra_clk_periph *periph = to_clk_periph(hw);
+ struct tegra_clk_periph_gate *gate;
+
+ if (periph->magic != TEGRA_CLK_PERIPH_MAGIC) {
+ gate = to_clk_periph_gate(hw);
+ if (gate->magic != TEGRA_CLK_PERIPH_GATE_MAGIC) {
+ WARN_ON(1);
+ return;
+ }
+ } else {
+ gate = &periph->gate;
+ }
+
+ tegra_periph_reset(gate, 0);
+}
+
+void tegra_periph_reset_assert(struct clk *c)
+{
+ struct clk_hw *hw = __clk_get_hw(c);
+ struct tegra_clk_periph *periph = to_clk_periph(hw);
+ struct tegra_clk_periph_gate *gate;
+
+ if (periph->magic != TEGRA_CLK_PERIPH_MAGIC) {
+ gate = to_clk_periph_gate(hw);
+ if (gate->magic != TEGRA_CLK_PERIPH_GATE_MAGIC) {
+ WARN_ON(1);
+ return;
+ }
+ } else {
+ gate = &periph->gate;
+ }
+
+ tegra_periph_reset(gate, 1);
+}
+
const struct clk_ops tegra_clk_periph_ops = {
.get_parent = clk_periph_get_parent,
.set_parent = clk_periph_set_parent,
#include <linux/clk.h>
#include <linux/clk-provider.h>
+#include <linux/of.h>
+#include <linux/clk/tegra.h>
#include "clk.h"
+/* Global data of Tegra CPU CAR ops */
+struct tegra_cpu_car_ops *tegra_cpu_car_ops;
+
void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,
struct clk *clks[], int clk_max)
{
}
}
}
+
+static const struct of_device_id tegra_dt_clk_match[] = {
+ { .compatible = "nvidia,tegra20-car", .data = tegra20_clock_init },
+ { .compatible = "nvidia,tegra30-car", .data = tegra30_clock_init },
+ { }
+};
+
+void __init tegra_clocks_init(void)
+{
+ of_clk_init(tegra_dt_clk_match);
+}
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
+#include <linux/clk/tegra.h>
-#include <mach/clk.h>
#include "dmaengine.h"
#define TEGRA_APBDMA_GENERAL 0x0
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
-
-#include <mach/clk.h>
+#include <linux/clk/tegra.h>
#include "drm.h"
#include "dc.h"
#include <linux/of_address.h>
#include <linux/of_platform.h>
-#include <mach/clk.h>
#include <linux/dma-mapping.h>
#include <asm/dma-iommu.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
-
-#include <mach/clk.h>
+#include <linux/clk/tegra.h>
#include "hdmi.h"
#include "drm.h"
#include <linux/of_i2c.h>
#include <linux/of_device.h>
#include <linux/module.h>
+#include <linux/clk/tegra.h>
#include <asm/unaligned.h>
-#include <mach/clk.h>
-
#define TEGRA_I2C_TIMEOUT (msecs_to_jiffies(1000))
#define BYTES_PER_FIFO_WORD 4
#include <linux/clk.h>
#include <linux/slab.h>
#include <linux/input/tegra_kbc.h>
-#include <mach/clk.h>
+#include <linux/clk/tegra.h>
#define KBC_MAX_DEBOUNCE_CNT 0x3ffu
#include <linux/of_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi-tegra.h>
-#include <mach/clk.h>
+#include <linux/clk/tegra.h>
#define SPI_COMMAND 0x000
#define SPI_GO BIT(30)
#include <linux/of_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi-tegra.h>
-#include <mach/clk.h>
+#include <linux/clk/tegra.h>
#define SLINK_COMMAND 0x000
#define SLINK_BIT_LENGTH(x) (((x) & 0x1f) << 0)
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
-
-#include <mach/clk.h>
+#include <linux/clk/tegra.h>
#include "nvec.h"
#ifndef __LINUX_CLK_TEGRA_H_
#define __LINUX_CLK_TEGRA_H_
+#include <linux/clk.h>
+
/*
* Tegra CPU clock and reset control ops
*
void tegra20_cpu_car_ops_init(void);
void tegra30_cpu_car_ops_init(void);
+void tegra_periph_reset_deassert(struct clk *c);
+void tegra_periph_reset_assert(struct clk *c);
+void tegra_clocks_init(void);
#endif /* __LINUX_CLK_TEGRA_H_ */
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>
-#include <mach/clk.h>
+#include <linux/clk/tegra.h>
#include <sound/soc.h>
#include "tegra30_ahub.h"