drm/i915: Move GT init to intel_gt.c

Code in i915_gem_init_hw is all about GT init so move it to intel_gt.c
renaming to intel_gt_init_hw.

Existing intel_gt_init_hw is renamed to intel_gt_init_hw_early since it
is currently called from driver probe.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190910143823.10686-2-tvrtko.ursulin@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 9b1129a..3bd7641 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -242,7 +242,7 @@ void i915_gem_resume(struct drm_i915_private *i915)
        mutex_lock(&i915->drm.struct_mutex);
        intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
 
-       if (i915_gem_init_hw(i915))
+       if (intel_gt_init_hw(&i915->gt))
                goto err_wedged;
 
        /*

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index e2cc697..eef9bda 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -6,6 +6,7 @@
 #include "i915_drv.h"
 #include "intel_gt.h"
 #include "intel_gt_pm.h"
+#include "intel_mocs.h"
 #include "intel_uncore.h"
 #include "intel_pm.h"
 
@@ -25,7 +26,7 @@ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
        intel_uc_init_early(&gt->uc);
 }
 
-void intel_gt_init_hw(struct drm_i915_private *i915)
+void intel_gt_init_hw_early(struct drm_i915_private *i915)
 {
        i915->gt.ggtt = &i915->ggtt;
 
@@ -33,6 +34,95 @@ void intel_gt_init_hw(struct drm_i915_private *i915)
        intel_gt_pm_disable(&i915->gt);
 }
 
+static void init_unused_ring(struct intel_gt *gt, u32 base)
+{
+       struct intel_uncore *uncore = gt->uncore;
+
+       intel_uncore_write(uncore, RING_CTL(base), 0);
+       intel_uncore_write(uncore, RING_HEAD(base), 0);
+       intel_uncore_write(uncore, RING_TAIL(base), 0);
+       intel_uncore_write(uncore, RING_START(base), 0);
+}
+
+static void init_unused_rings(struct intel_gt *gt)
+{
+       struct drm_i915_private *i915 = gt->i915;
+
+       if (IS_I830(i915)) {
+               init_unused_ring(gt, PRB1_BASE);
+               init_unused_ring(gt, SRB0_BASE);
+               init_unused_ring(gt, SRB1_BASE);
+               init_unused_ring(gt, SRB2_BASE);
+               init_unused_ring(gt, SRB3_BASE);
+       } else if (IS_GEN(i915, 2)) {
+               init_unused_ring(gt, SRB0_BASE);
+               init_unused_ring(gt, SRB1_BASE);
+       } else if (IS_GEN(i915, 3)) {
+               init_unused_ring(gt, PRB1_BASE);
+               init_unused_ring(gt, PRB2_BASE);
+       }
+}
+
+int intel_gt_init_hw(struct intel_gt *gt)
+{
+       struct drm_i915_private *i915 = gt->i915;
+       struct intel_uncore *uncore = gt->uncore;
+       int ret;
+
+       BUG_ON(!i915->kernel_context);
+       ret = intel_gt_terminally_wedged(gt);
+       if (ret)
+               return ret;
+
+       gt->last_init_time = ktime_get();
+
+       /* Double layer security blanket, see i915_gem_init() */
+       intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
+
+       if (HAS_EDRAM(i915) && INTEL_GEN(i915) < 9)
+               intel_uncore_rmw(uncore, HSW_IDICR, 0, IDIHASHMSK(0xf));
+
+       if (IS_HASWELL(i915))
+               intel_uncore_write(uncore,
+                                  MI_PREDICATE_RESULT_2,
+                                  IS_HSW_GT3(i915) ?
+                                  LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
+
+       /* Apply the GT workarounds... */
+       intel_gt_apply_workarounds(gt);
+       /* ...and determine whether they are sticking. */
+       intel_gt_verify_workarounds(gt, "init");
+
+       intel_gt_init_swizzling(gt);
+
+       /*
+        * At least 830 can leave some of the unused rings
+        * "active" (ie. head != tail) after resume which
+        * will prevent c3 entry. Makes sure all unused rings
+        * are totally idle.
+        */
+       init_unused_rings(gt);
+
+       ret = i915_ppgtt_init_hw(gt);
+       if (ret) {
+               DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
+               goto out;
+       }
+
+       /* We can't enable contexts until all firmware is loaded */
+       ret = intel_uc_init_hw(&gt->uc);
+       if (ret) {
+               i915_probe_error(i915, "Enabling uc failed (%d)\n", ret);
+               goto out;
+       }
+
+       intel_mocs_init(gt);
+
+out:
+       intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
+       return ret;
+}
+
 static void rmw_set(struct intel_uncore *uncore, i915_reg_t reg, u32 set)
 {
        intel_uncore_rmw(uncore, reg, 0, set);

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index 17af21c..e6ab0bf 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -28,7 +28,8 @@ static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
 }
 
 void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
-void intel_gt_init_hw(struct drm_i915_private *i915);
+void intel_gt_init_hw_early(struct drm_i915_private *i915);
+int __must_check intel_gt_init_hw(struct intel_gt *gt);
 int intel_gt_init(struct intel_gt *gt);
 void intel_gt_driver_register(struct intel_gt *gt);
 

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index b9d84d5..296bbc7 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -972,7 +972,7 @@ void intel_gt_reset(struct intel_gt *gt,
         * was running at the time of the reset (i.e. we weren't VT
         * switched away).
         */
-       ret = i915_gem_init_hw(gt->i915);
+       ret = intel_gt_init_hw(gt);
        if (ret) {
                DRM_ERROR("Failed to initialise HW following reset (%d)\n",
                          ret);

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0aadff9..8966672 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1269,7 +1269,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
        if (ret)
                goto err_ggtt;
 
-       intel_gt_init_hw(dev_priv);
+       intel_gt_init_hw_early(dev_priv);
 
        ret = i915_ggtt_enable_hw(dev_priv);
        if (ret) {

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index dc4d40b..51d575c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2322,7 +2322,6 @@ static inline u32 i915_reset_engine_count(struct i915_gpu_error *error,
 
 void i915_gem_init_mmio(struct drm_i915_private *i915);
 int __must_check i915_gem_init(struct drm_i915_private *dev_priv);
-int __must_check i915_gem_init_hw(struct drm_i915_private *dev_priv);
 void i915_gem_driver_register(struct drm_i915_private *i915);
 void i915_gem_driver_unregister(struct drm_i915_private *i915);
 void i915_gem_driver_remove(struct drm_i915_private *dev_priv);

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 141024c..db26815 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1148,95 +1148,6 @@ void i915_gem_sanitize(struct drm_i915_private *i915)
        intel_runtime_pm_put(&i915->runtime_pm, wakeref);
 }
 
-static void init_unused_ring(struct intel_gt *gt, u32 base)
-{
-       struct intel_uncore *uncore = gt->uncore;
-
-       intel_uncore_write(uncore, RING_CTL(base), 0);
-       intel_uncore_write(uncore, RING_HEAD(base), 0);
-       intel_uncore_write(uncore, RING_TAIL(base), 0);
-       intel_uncore_write(uncore, RING_START(base), 0);
-}
-
-static void init_unused_rings(struct intel_gt *gt)
-{
-       struct drm_i915_private *i915 = gt->i915;
-
-       if (IS_I830(i915)) {
-               init_unused_ring(gt, PRB1_BASE);
-               init_unused_ring(gt, SRB0_BASE);
-               init_unused_ring(gt, SRB1_BASE);
-               init_unused_ring(gt, SRB2_BASE);
-               init_unused_ring(gt, SRB3_BASE);
-       } else if (IS_GEN(i915, 2)) {
-               init_unused_ring(gt, SRB0_BASE);
-               init_unused_ring(gt, SRB1_BASE);
-       } else if (IS_GEN(i915, 3)) {
-               init_unused_ring(gt, PRB1_BASE);
-               init_unused_ring(gt, PRB2_BASE);
-       }
-}
-
-int i915_gem_init_hw(struct drm_i915_private *i915)
-{
-       struct intel_uncore *uncore = &i915->uncore;
-       struct intel_gt *gt = &i915->gt;
-       int ret;
-
-       BUG_ON(!i915->kernel_context);
-       ret = intel_gt_terminally_wedged(gt);
-       if (ret)
-               return ret;
-
-       gt->last_init_time = ktime_get();
-
-       /* Double layer security blanket, see i915_gem_init() */
-       intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
-
-       if (HAS_EDRAM(i915) && INTEL_GEN(i915) < 9)
-               intel_uncore_rmw(uncore, HSW_IDICR, 0, IDIHASHMSK(0xf));
-
-       if (IS_HASWELL(i915))
-               intel_uncore_write(uncore,
-                                  MI_PREDICATE_RESULT_2,
-                                  IS_HSW_GT3(i915) ?
-                                  LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
-
-       /* Apply the GT workarounds... */
-       intel_gt_apply_workarounds(gt);
-       /* ...and determine whether they are sticking. */
-       intel_gt_verify_workarounds(gt, "init");
-
-       intel_gt_init_swizzling(gt);
-
-       /*
-        * At least 830 can leave some of the unused rings
-        * "active" (ie. head != tail) after resume which
-        * will prevent c3 entry. Makes sure all unused rings
-        * are totally idle.
-        */
-       init_unused_rings(gt);
-
-       ret = i915_ppgtt_init_hw(gt);
-       if (ret) {
-               DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
-               goto out;
-       }
-
-       /* We can't enable contexts until all firmware is loaded */
-       ret = intel_uc_init_hw(&gt->uc);
-       if (ret) {
-               i915_probe_error(i915, "Enabling uc failed (%d)\n", ret);
-               goto out;
-       }
-
-       intel_mocs_init(gt);
-
-out:
-       intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
-       return ret;
-}
-
 static int __intel_engines_record_defaults(struct drm_i915_private *i915)
 {
        struct i915_request *requests[I915_NUM_ENGINES] = {};
@@ -1449,7 +1360,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 
        intel_uc_init(&dev_priv->gt.uc);
 
-       ret = i915_gem_init_hw(dev_priv);
+       ret = intel_gt_init_hw(&dev_priv->gt);
        if (ret)
                goto err_uc_init;
 

diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c
index e62a67e..7d5fb60 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/mock_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c
@@ -118,7 +118,7 @@ void mock_init_ggtt(struct drm_i915_private *i915, struct i915_ggtt *ggtt)
 
        i915_address_space_init(&ggtt->vm, VM_CLASS_GGTT);
 
-       intel_gt_init_hw(i915);
+       intel_gt_init_hw_early(i915);
 }
 
 void mock_fini_ggtt(struct i915_ggtt *ggtt)