ARM: dts: stm32: DT sync with kernel v5.10-rc1 for MCU's boards

Device tree alignment with kernel v5.10-rc1.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>

diff --git a/arch/arm/dts/stm32429i-eval-u-boot.dtsi b/arch/arm/dts/stm32429i-eval-u-boot.dtsi
index fe437bb..1e7429b 100644 (file)
--- a/arch/arm/dts/stm32429i-eval-u-boot.dtsi
+++ b/arch/arm/dts/stm32429i-eval-u-boot.dtsi
@@ -136,7 +136,7 @@
 };
 
 &pinctrl {
-       usart1_pins_a: usart1@0 {
+       usart1_pins_a: usart1-0 {
                u-boot,dm-pre-reloc;
                pins1 {
                        u-boot,dm-pre-reloc;

diff --git a/arch/arm/dts/stm32429i-eval.dts b/arch/arm/dts/stm32429i-eval.dts
index c5afa0c..592b182 100644 (file)
--- a/arch/arm/dts/stm32429i-eval.dts
+++ b/arch/arm/dts/stm32429i-eval.dts
@@ -19,7 +19,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@00000000 {
                device_type = "memory";
                reg = <0x00000000 0x2000000>;
        };
@@ -54,19 +54,26 @@
                regulator-max-microvolt = <3300000>;
        };
 
+       vdd_panel: vdd-panel {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd_panel";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+
        leds {
                compatible = "gpio-leds";
-               green {
+               led-green {
                        gpios = <&gpiog 6 1>;
                        linux,default-trigger = "heartbeat";
                };
-               orange {
+               led-orange {
                        gpios = <&gpiog 7 1>;
                };
-               red {
+               led-red {
                        gpios = <&gpiog 10 1>;
                };
-               blue {
+               led-blue {
                        gpios = <&gpiog 12 1>;
                };
        };
@@ -97,6 +104,7 @@
 
        panel_rgb: panel-rgb {
                compatible = "ampire,am-480272h3tmqw-t01h";
+               power-supply = <&vdd_panel>;
                status = "okay";
                port {
                        panel_in_rgb: endpoint {
@@ -191,9 +199,8 @@
 
 &ltdc {
        status = "okay";
-       pinctrl-0 = <&ltdc_pins>;
+       pinctrl-0 = <&ltdc_pins_a>;
        pinctrl-names = "default";
-       dma-ranges;
 
        port {
                ltdc_out_rgb: endpoint {

diff --git a/arch/arm/dts/stm32746g-eval-u-boot.dtsi b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
index d5fb927..f2195a6 100644 (file)
--- a/arch/arm/dts/stm32746g-eval-u-boot.dtsi
+++ b/arch/arm/dts/stm32746g-eval-u-boot.dtsi
@@ -165,7 +165,7 @@
                };
        };
 
-       usart1_pins_a: usart1@0 {
+       usart1_pins_a: usart1-0 {
                u-boot,dm-pre-reloc;
                pins1 {
                        u-boot,dm-pre-reloc;
@@ -178,7 +178,7 @@
 
 &qspi {
        reg = <0xA0001000 0x1000>, <0x90000000 0x4000000>;
-       qflash0: n25q512a {
+       qflash0: n25q512a@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "jedec,spi-nor";

diff --git a/arch/arm/dts/stm32746g-eval.dts b/arch/arm/dts/stm32746g-eval.dts
index d77eb53..9940cf1 100644 (file)
--- a/arch/arm/dts/stm32746g-eval.dts
+++ b/arch/arm/dts/stm32746g-eval.dts
@@ -19,7 +19,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@c0000000 {
                device_type = "memory";
                reg = <0xc0000000 0x2000000>;
        };
@@ -30,17 +30,17 @@
 
        leds {
                compatible = "gpio-leds";
-               green {
+               led-green {
                        gpios = <&gpiof 10 1>;
                        linux,default-trigger = "heartbeat";
                };
-               orange {
+               led-orange {
                        gpios = <&stmfx_pinctrl 17 1>;
                };
-               red {
+               led-red {
                        gpios = <&gpiob 7 1>;
                };
-               blue {
+               led-blue {
                        gpios = <&stmfx_pinctrl 19 1>;
                };
        };
@@ -59,7 +59,6 @@
 
        joystick {
                compatible = "gpio-keys";
-               #size-cells = <0>;
                pinctrl-0 = <&joystick_pins>;
                pinctrl-names = "default";
                button-0 {
@@ -130,7 +129,7 @@
                interrupts = <8 IRQ_TYPE_EDGE_RISING>;
                interrupt-parent = <&gpioi>;
 
-               stmfx_pinctrl: stmfx-pin-controller {
+               stmfx_pinctrl: pinctrl {
                        compatible = "st,stmfx-0300-pinctrl";
                        gpio-controller;
                        #gpio-cells = <2>;

diff --git a/arch/arm/dts/stm32f4-pinctrl.dtsi b/arch/arm/dts/stm32f4-pinctrl.dtsi
index 7ed6828..adf5026 100644 (file)
--- a/arch/arm/dts/stm32f4-pinctrl.dtsi
+++ b/arch/arm/dts/stm32f4-pinctrl.dtsi
@@ -127,7 +127,7 @@
                                st,bank-name = "GPIOK";
                        };
 
-                       usart1_pins_a: usart1@0 {
+                       usart1_pins_a: usart1-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
                                        bias-disable;
@@ -140,7 +140,7 @@
                                };
                        };
 
-                       usart3_pins_a: usart3@0 {
+                       usart3_pins_a: usart3-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
                                        bias-disable;
@@ -153,7 +153,7 @@
                                };
                        };
 
-                       usbotg_fs_pins_a: usbotg_fs@0 {
+                       usbotg_fs_pins_a: usbotg-fs-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
                                                 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
@@ -164,7 +164,7 @@
                                };
                        };
 
-                       usbotg_fs_pins_b: usbotg_fs@1 {
+                       usbotg_fs_pins_b: usbotg-fs-1 {
                                pins {
                                        pinmux = <STM32_PINMUX('B', 12, AF12)>, /* OTG_HS_ID */
                                                 <STM32_PINMUX('B', 14, AF12)>, /* OTG_HS_DM */
@@ -175,7 +175,7 @@
                                };
                        };
 
-                       usbotg_hs_pins_a: usbotg_hs@0 {
+                       usbotg_hs_pins_a: usbotg-hs-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT*/
                                                 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
@@ -195,7 +195,7 @@
                                };
                        };
 
-                       ethernet_mii: mii@0 {
+                       ethernet_mii: mii-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_MII_TXD0_ETH_RMII_TXD0 */
                                                 <STM32_PINMUX('G', 14, AF11)>, /* ETH_MII_TXD1_ETH_RMII_TXD1 */
@@ -215,13 +215,13 @@
                                };
                        };
 
-                       adc3_in8_pin: adc@200 {
+                       adc3_in8_pin: adc-200 {
                                pins {
                                        pinmux = <STM32_PINMUX('F', 10, ANALOG)>;
                                };
                        };
 
-                       pwm1_pins: pwm@1 {
+                       pwm1_pins: pwm1-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('A', 8, AF1)>, /* TIM1_CH1 */
                                                 <STM32_PINMUX('B', 13, AF1)>, /* TIM1_CH1N */
@@ -229,14 +229,14 @@
                                };
                        };
 
-                       pwm3_pins: pwm@3 {
+                       pwm3_pins: pwm3-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('B', 4, AF2)>, /* TIM3_CH1 */
                                                 <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
                                };
                        };
 
-                       i2c1_pins: i2c1@0 {
+                       i2c1_pins: i2c1-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1_SDA */
                                                 <STM32_PINMUX('B', 6, AF4)>; /* I2C1_SCL */
@@ -246,7 +246,7 @@
                                };
                        };
 
-                       ltdc_pins: ltdc@0 {
+                       ltdc_pins_a: ltdc-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
                                                 <STM32_PINMUX('I', 13, AF14)>, /* LCD_VSYNC */
@@ -280,7 +280,86 @@
                                };
                        };
 
-                       dcmi_pins: dcmi@0 {
+                       ltdc_pins_b: ltdc-1 {
+                               pins {
+                                       pinmux = <STM32_PINMUX('C', 6,  AF14)>,
+                                               /* LCD_HSYNC */
+                                                <STM32_PINMUX('A', 4,  AF14)>,
+                                                /* LCD_VSYNC */
+                                                <STM32_PINMUX('G', 7,  AF14)>,
+                                                /* LCD_CLK */
+                                                <STM32_PINMUX('C', 10, AF14)>,
+                                                /* LCD_R2 */
+                                                <STM32_PINMUX('B', 0,  AF9)>,
+                                                /* LCD_R3 */
+                                                <STM32_PINMUX('A', 11, AF14)>,
+                                                /* LCD_R4 */
+                                                <STM32_PINMUX('A', 12, AF14)>,
+                                                /* LCD_R5 */
+                                                <STM32_PINMUX('B', 1,  AF9)>,
+                                                /* LCD_R6*/
+                                                <STM32_PINMUX('G', 6,  AF14)>,
+                                                /* LCD_R7 */
+                                                <STM32_PINMUX('A', 6,  AF14)>,
+                                                /* LCD_G2 */
+                                                <STM32_PINMUX('G', 10, AF9)>,
+                                                /* LCD_G3 */
+                                                <STM32_PINMUX('B', 10, AF14)>,
+                                                /* LCD_G4 */
+                                                <STM32_PINMUX('D', 6,  AF14)>,
+                                                /* LCD_B2 */
+                                                <STM32_PINMUX('G', 11, AF14)>,
+                                                /* LCD_B3*/
+                                                <STM32_PINMUX('B', 11, AF14)>,
+                                                /* LCD_G5 */
+                                                <STM32_PINMUX('C', 7,  AF14)>,
+                                                /* LCD_G6 */
+                                                <STM32_PINMUX('D', 3,  AF14)>,
+                                                /* LCD_G7 */
+                                                <STM32_PINMUX('G', 12, AF9)>,
+                                                /* LCD_B4 */
+                                                <STM32_PINMUX('A', 3,  AF14)>,
+                                                /* LCD_B5 */
+                                                <STM32_PINMUX('B', 8,  AF14)>,
+                                                /* LCD_B6 */
+                                                <STM32_PINMUX('B', 9,  AF14)>,
+                                                /* LCD_B7 */
+                                                <STM32_PINMUX('F', 10, AF14)>;
+                                                /* LCD_DE */
+                                       slew-rate = <2>;
+                               };
+                       };
+
+                       spi5_pins: spi5-0 {
+                               pins1 {
+                                       pinmux = <STM32_PINMUX('F', 7, AF5)>,
+                                               /* SPI5_CLK */
+                                                <STM32_PINMUX('F', 9, AF5)>;
+                                               /* SPI5_MOSI */
+                                       bias-disable;
+                                       drive-push-pull;
+                                       slew-rate = <0>;
+                               };
+                               pins2 {
+                                       pinmux = <STM32_PINMUX('F', 8, AF5)>;
+                                               /* SPI5_MISO */
+                                       bias-disable;
+                               };
+                       };
+
+                       i2c3_pins: i2c3-0 {
+                               pins {
+                                       pinmux = <STM32_PINMUX('C', 9, AF4)>,
+                                               /* I2C3_SDA */
+                                                <STM32_PINMUX('A', 8, AF4)>;
+                                               /* I2C3_SCL */
+                                       bias-disable;
+                                       drive-open-drain;
+                                       slew-rate = <3>;
+                               };
+                       };
+
+                       dcmi_pins: dcmi-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('A', 4, AF13)>, /* DCMI_HSYNC */
                                                 <STM32_PINMUX('B', 7, AF13)>, /* DCMI_VSYNC */
@@ -303,7 +382,7 @@
                                };
                        };
 
-                       sdio_pins: sdio_pins@0 {
+                       sdio_pins: sdio-pins-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
                                                 <STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
@@ -316,7 +395,7 @@
                                };
                        };
 
-                       sdio_pins_od: sdio_pins_od@0 {
+                       sdio_pins_od: sdio-pins-od-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
                                                 <STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */

diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
index 52f8032..77d5ea0 100644 (file)
--- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
@@ -123,7 +123,7 @@
 };
 
 &pinctrl {
-       usart1_pins_a: usart1@0 {
+       usart1_pins_a: usart1-0 {
                u-boot,dm-pre-reloc;
                pins1 {
                        u-boot,dm-pre-reloc;

diff --git a/arch/arm/dts/stm32f429-disco.dts b/arch/arm/dts/stm32f429-disco.dts
index 3a83ef5..42477c8 100644 (file)
--- a/arch/arm/dts/stm32f429-disco.dts
+++ b/arch/arm/dts/stm32f429-disco.dts
@@ -7,6 +7,8 @@
 #include "stm32f429.dtsi"
 #include "stm32f429-pinctrl.dtsi"
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        model = "STMicroelectronics STM32F429i-DISCO board";
@@ -17,7 +19,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@90000000 {
                device_type = "memory";
                reg = <0x90000000 0x800000>;
        };
@@ -28,10 +30,10 @@
 
        leds {
                compatible = "gpio-leds";
-               red {
+               led-red {
                        gpios = <&gpiog 14 0>;
                };
-               green {
+               led-green {
                        gpios = <&gpiog 13 0>;
                        linux,default-trigger = "heartbeat";
                };
@@ -66,12 +68,103 @@
        status = "okay";
 };
 
+&i2c3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c3_pins>;
+       clock-frequency = <100000>;
+       status = "okay";
+
+       stmpe811@41 {
+               compatible = "st,stmpe811";
+               reg = <0x41>;
+               interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
+               interrupt-parent = <&gpioa>;
+               /* 3.25 MHz ADC clock speed */
+               st,adc-freq = <1>;
+               /* 12-bit ADC */
+               st,mod-12b = <1>;
+               /* internal ADC reference */
+               st,ref-sel = <0>;
+               /* ADC converstion time: 80 clocks */
+               st,sample-time = <4>;
+
+               stmpe_touchscreen {
+                       compatible = "st,stmpe-ts";
+                       /* 8 sample average control */
+                       st,ave-ctrl = <3>;
+                       /* 7 length fractional part in z */
+                       st,fraction-z = <7>;
+                       /*
+                        * 50 mA typical 80 mA max touchscreen drivers
+                        * current limit value
+                        */
+                       st,i-drive = <1>;
+                       /* 1 ms panel driver settling time */
+                       st,settling = <3>;
+                       /* 5 ms touch detect interrupt delay */
+                       st,touch-det-delay = <5>;
+               };
+
+               stmpe_adc {
+                       compatible = "st,stmpe-adc";
+                       /* forbid to use ADC channels 3-0 (touch) */
+                       st,norequest-mask = <0x0F>;
+               };
+       };
+};
+
+&ltdc {
+       status = "okay";
+       pinctrl-0 = <&ltdc_pins_b>;
+       pinctrl-names = "default";
+
+       port {
+               ltdc_out_rgb: endpoint {
+                       remote-endpoint = <&panel_in_rgb>;
+               };
+       };
+};
+
 &rtc {
        assigned-clocks = <&rcc 1 CLK_RTC>;
        assigned-clock-parents = <&rcc 1 CLK_LSI>;
        status = "okay";
 };
 
+&spi5 {
+       status = "okay";
+       pinctrl-0 = <&spi5_pins>;
+       pinctrl-names = "default";
+       #address-cells = <1>;
+       #size-cells = <0>;
+       cs-gpios = <&gpioc 1 GPIO_ACTIVE_LOW>, <&gpioc 2 GPIO_ACTIVE_LOW>;
+
+       l3gd20: l3gd20@0 {
+               compatible = "st,l3gd20-gyro";
+               spi-max-frequency = <10000000>;
+               st,drdy-int-pin = <2>;
+               interrupt-parent = <&gpioa>;
+               interrupts = <1 IRQ_TYPE_EDGE_RISING>,
+                               <2 IRQ_TYPE_EDGE_RISING>;
+               reg = <0>;
+               status = "okay";
+       };
+
+       display: display@1{
+               /* Connect panel-ilitek-9341 to ltdc */
+               compatible = "st,sf-tc240t-9370-t";
+               reg = <1>;
+               spi-3wire;
+               spi-max-frequency = <10000000>;
+               dc-gpios = <&gpiod 13 0>;
+               port {
+                       panel_in_rgb: endpoint {
+                       remote-endpoint = <&ltdc_out_rgb>;
+                       };
+               };
+       };
+};
+
 &usart1 {
        pinctrl-0 = <&usart1_pins_a>;
        pinctrl-names = "default";

diff --git a/arch/arm/dts/stm32f429.dtsi b/arch/arm/dts/stm32f429.dtsi
index db0b82e..a81e916 100644 (file)
--- a/arch/arm/dts/stm32f429.dtsi
+++ b/arch/arm/dts/stm32f429.dtsi
@@ -39,7 +39,7 @@
        };
 
        soc {
-               romem: nvmem@1fff7800 {
+               romem: efuse@1fff7800 {
                        compatible = "st,stm32f4-otp";
                        reg = <0x1fff7800 0x400>;
                        #address-cells = <1>;
@@ -277,12 +277,10 @@
                        compatible = "st,stm32-rtc";
                        reg = <0x40002800 0x400>;
                        clocks = <&rcc 1 CLK_RTC>;
-                       clock-names = "ck_rtc";
                        assigned-clocks = <&rcc 1 CLK_RTC>;
                        assigned-clock-parents = <&rcc 1 CLK_LSE>;
                        interrupt-parent = <&exti>;
                        interrupts = <17 1>;
-                       interrupt-names = "alarm";
                        st,syscfg = <&pwrcfg 0x00 0x100>;
                        status = "disabled";
                };
@@ -362,6 +360,18 @@
                        status = "disabled";
                };
 
+               i2c3: i2c@40005c00 {
+                       compatible = "st,stm32f4-i2c";
+                       reg = <0x40005c00 0x400>;
+                       interrupts = <72>,
+                                    <73>;
+                       resets = <&rcc STM32F4_APB1_RESET(I2C3)>;
+                       clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C3)>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                dac: dac@40007400 {
                        compatible = "st,stm32f4-dac-core";
                        reg = <0x40007400 0x400>;
@@ -374,14 +384,14 @@
 
                        dac1: dac@1 {
                                compatible = "st,stm32-dac";
-                               #io-channels-cells = <1>;
+                               #io-channel-cells = <1>;
                                reg = <1>;
                                status = "disabled";
                        };
 
                        dac2: dac@2 {
                                compatible = "st,stm32-dac";
-                               #io-channels-cells = <1>;
+                               #io-channel-cells = <1>;
                                reg = <2>;
                                status = "disabled";
                        };
@@ -546,8 +556,8 @@
                        status = "disabled";
                };
 
-               syscfg: system-config@40013800 {
-                       compatible = "syscon";
+               syscfg: syscon@40013800 {
+                       compatible = "st,stm32-syscfg", "syscon";
                        reg = <0x40013800 0x400>;
                };
 
@@ -620,6 +630,9 @@
                        reg = <0x40015000 0x400>;
                        interrupts = <85>;
                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(SPI5)>;
+                       dmas = <&dma2 3 2 0x400 0x0>,
+                               <&dma2 4 2 0x400 0x0>;
+                       dma-names = "rx", "tx";
                        status = "disabled";
                };
 
@@ -634,7 +647,7 @@
                };
 
                pwrcfg: power-config@40007000 {
-                       compatible = "syscon";
+                       compatible = "st,stm32-power-config", "syscon";
                        reg = <0x40007000 0x400>;
                };
 
@@ -748,7 +761,6 @@
                rng: rng@50060800 {
                        compatible = "st,stm32-rng";
                        reg = <0x50060800 0x400>;
-                       interrupts = <80>;
                        clocks = <&rcc 0 STM32F4_AHB2_CLOCK(RNG)>;
 
                };

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index 5a89f13..3cf3a6a 100644 (file)
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -66,7 +66,7 @@
                       };
                };
 
-               qspi: quadspi@A0001000 {
+               qspi: spi@A0001000 {
                        compatible = "st,stm32f469-qspi";
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -220,7 +220,7 @@
                };
        };
 
-       usart3_pins_a: usart3@0 {
+       usart3_pins_a: usart3-0 {
                u-boot,dm-pre-reloc;
                pins1 {
                        u-boot,dm-pre-reloc;
@@ -245,7 +245,7 @@
 
 &qspi {
        reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>;
-       flash0: n25q128a {
+       flash0: n25q128a@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "jedec,spi-nor";

diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
index d50c38d..23d87ee 100644 (file)
--- a/arch/arm/dts/stm32f469-disco.dts
+++ b/arch/arm/dts/stm32f469-disco.dts
@@ -19,7 +19,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@00000000 {
                device_type = "memory";
                reg = <0x00000000 0x1000000>;
        };
@@ -35,23 +35,30 @@
                regulator-max-microvolt = <3300000>;
        };
 
+       vdd_dsi: vdd-dsi {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd_dsi";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+
        soc {
                dma-ranges = <0xc0000000 0x0 0x10000000>;
        };
 
        leds {
                compatible = "gpio-leds";
-               green {
+               led-green {
                        gpios = <&gpiog 6 GPIO_ACTIVE_LOW>;
                        linux,default-trigger = "heartbeat";
                };
-               orange {
+               led-orange {
                        gpios = <&gpiod 4 GPIO_ACTIVE_LOW>;
                };
-               red {
+               led-red {
                        gpios = <&gpiod 5 GPIO_ACTIVE_LOW>;
                };
-               blue {
+               led-blue {
                        gpios = <&gpiok 3 GPIO_ACTIVE_LOW>;
                };
        };
@@ -114,6 +121,7 @@
                compatible = "orisetech,otm8009a";
                reg = <0>; /* dsi virtual channel (0..3) */
                reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
+               power-supply = <&vdd_dsi>;
                status = "okay";
 
                port {
@@ -125,7 +133,6 @@
 };
 
 &ltdc {
-       dma-ranges;
        status = "okay";
 
        port {

diff --git a/arch/arm/dts/stm32f469.dtsi b/arch/arm/dts/stm32f469.dtsi
index 69c862d..5f6a797 100644 (file)
--- a/arch/arm/dts/stm32f469.dtsi
+++ b/arch/arm/dts/stm32f469.dtsi
@@ -8,7 +8,6 @@
                dsi: dsi@40016c00 {
                        compatible = "st,stm32-dsi";
                        reg = <0x40016c00 0x800>;
-                       interrupts = <92>;
                        resets = <&rcc STM32F4_APB2_RESET(DSI)>;
                        reset-names = "apb";
                        clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;

diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi
index 9314128..fe4cfda 100644 (file)
--- a/arch/arm/dts/stm32f7-pinctrl.dtsi
+++ b/arch/arm/dts/stm32f7-pinctrl.dtsi
@@ -127,7 +127,7 @@
                                st,bank-name = "GPIOK";
                        };
 
-                       cec_pins_a: cec@0 {
+                       cec_pins_a: cec-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('A', 15, AF4)>; /* HDMI CEC */
                                        slew-rate = <0>;
@@ -136,7 +136,7 @@
                                };
                        };
 
-                       usart1_pins_a: usart1@0 {
+                       usart1_pins_a: usart1-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
                                        bias-disable;
@@ -149,7 +149,7 @@
                                };
                        };
 
-                       usart1_pins_b: usart1@1 {
+                       usart1_pins_b: usart1-1 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('A', 9, AF7)>; /* USART1_TX */
                                        bias-disable;
@@ -162,7 +162,7 @@
                                };
                        };
 
-                       i2c1_pins_b: i2c1@0 {
+                       i2c1_pins_b: i2c1-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('B', 9, AF4)>, /* I2C1 SDA */
                                                 <STM32_PINMUX('B', 8, AF4)>; /* I2C1 SCL */
@@ -172,7 +172,7 @@
                                };
                        };
 
-                       usbotg_hs_pins_a: usbotg-hs@0 {
+                       usbotg_hs_pins_a: usbotg-hs-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
                                                 <STM32_PINMUX('I', 11, AF10)>, /* OTG_HS_ULPI_DIR */
@@ -192,7 +192,7 @@
                                };
                        };
 
-                       usbotg_hs_pins_b: usbotg-hs@1 {
+                       usbotg_hs_pins_b: usbotg-hs-1 {
                                pins {
                                        pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
                                                 <STM32_PINMUX('C', 2, AF10)>, /* OTG_HS_ULPI_DIR */
@@ -212,7 +212,7 @@
                                };
                        };
 
-                       usbotg_fs_pins_a: usbotg-fs@0 {
+                       usbotg_fs_pins_a: usbotg-fs-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('A', 10, AF10)>, /* OTG_FS_ID */
                                                 <STM32_PINMUX('A', 11, AF10)>, /* OTG_FS_DM */
@@ -223,7 +223,7 @@
                                };
                        };
 
-                       sdio_pins_a: sdio_pins_a@0 {
+                       sdio_pins_a: sdio-pins-a-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */
                                                 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
@@ -236,7 +236,7 @@
                                };
                        };
 
-                       sdio_pins_od_a: sdio_pins_od_a@0 {
+                       sdio_pins_od_a: sdio-pins-od-a-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1 D0 */
                                                 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1 D1 */
@@ -254,7 +254,7 @@
                                };
                        };
 
-                       sdio_pins_b: sdio_pins_b@0 {
+                       sdio_pins_b: sdio-pins-b-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
                                                 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */
@@ -267,7 +267,7 @@
                                };
                        };
 
-                       sdio_pins_od_b: sdio_pins_od_b@0 {
+                       sdio_pins_od_b: sdio-pins-od-b-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('G', 9, AF11)>, /* SDMMC2 D0 */
                                                 <STM32_PINMUX('G', 10, AF11)>, /* SDMMC2 D1 */

diff --git a/arch/arm/dts/stm32f7-u-boot.dtsi b/arch/arm/dts/stm32f7-u-boot.dtsi
index 32613c9..46bd110 100644 (file)
--- a/arch/arm/dts/stm32f7-u-boot.dtsi
+++ b/arch/arm/dts/stm32f7-u-boot.dtsi
@@ -26,7 +26,6 @@
                        interrupt-names = "macirq", "eth_wake_irq";
                        snps,pbl = <8>;
                        snps,mixed-burst;
-                       dma-ranges;
                        pinctrl-0 = <&ethernet_mii>;
                        phy-mode = "rmii";
                        phy-handle = <&phy0>;
@@ -43,7 +42,7 @@
                        };
                };
 
-               qspi: quadspi@A0001000 {
+               qspi: spi@A0001000 {
                        compatible = "st,stm32f469-qspi";
                        #address-cells = <1>;
                        #size-cells = <0>;

diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
index d8f9d8d..860dd77 100644 (file)
--- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi
@@ -212,7 +212,7 @@
                };
        };
 
-       usart1_pins_b: usart1@1 {
+       usart1_pins_b: usart1-1 {
                u-boot,dm-pre-reloc;
                pins1 {
                        u-boot,dm-pre-reloc;
@@ -229,7 +229,7 @@
 
 &qspi {
        reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>;
-       qflash0: n25q128a {
+       qflash0: n25q128a@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "jedec,spi-nor";

diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts
index 4fef016..9430dc0 100644 (file)
--- a/arch/arm/dts/stm32f746-disco.dts
+++ b/arch/arm/dts/stm32f746-disco.dts
@@ -19,7 +19,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@c0000000 {
                device_type = "memory";
                reg = <0xC0000000 0x800000>;
        };

diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 3f312ab..ba9b3cd 100644 (file)
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -264,12 +264,10 @@
                        compatible = "st,stm32-rtc";
                        reg = <0x40002800 0x400>;
                        clocks = <&rcc 1 CLK_RTC>;
-                       clock-names = "ck_rtc";
                        assigned-clocks = <&rcc 1 CLK_RTC>;
                        assigned-clock-parents = <&rcc 1 CLK_LSE>;
                        interrupt-parent = <&exti>;
                        interrupts = <17 1>;
-                       interrupt-names = "alarm";
                        st,syscfg = <&pwrcfg 0x00 0x100>;
                        status = "disabled";
                };
@@ -461,8 +459,8 @@
                        status = "disabled";
                };
 
-               syscfg: system-config@40013800 {
-                       compatible = "syscon";
+               syscfg: syscon@40013800 {
+                       compatible = "st,stm32-syscfg", "syscon";
                        reg = <0x40013800 0x400>;
                };
 
@@ -529,7 +527,7 @@
                };
 
                pwrcfg: power-config@40007000 {
-                       compatible = "syscon";
+                       compatible = "st,stm32-power-config", "syscon";
                        reg = <0x40007000 0x400>;
                };
 
@@ -551,7 +549,7 @@
                        assigned-clock-rates = <1000000>;
                };
 
-               dma1: dma@40026000 {
+               dma1: dma-controller@40026000 {
                        compatible = "st,stm32-dma";
                        reg = <0x40026000 0x400>;
                        interrupts = <11>,
@@ -567,7 +565,7 @@
                        status = "disabled";
                };
 
-               dma2: dma@40026400 {
+               dma2: dma-controller@40026400 {
                        compatible = "st,stm32-dma";
                        reg = <0x40026400 0x400>;
                        interrupts = <56>,

diff --git a/arch/arm/dts/stm32f769-disco-u-boot.dtsi b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
index c1d7d6b..7dfe430 100644 (file)
--- a/arch/arm/dts/stm32f769-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f769-disco-u-boot.dtsi
@@ -215,7 +215,7 @@
                };
        };
 
-       usart1_pins_a: usart1@0 {
+       usart1_pins_a: usart1-0 {
                u-boot,dm-pre-reloc;
                pins1 {
                        u-boot,dm-pre-reloc;
@@ -228,7 +228,7 @@
 
 &qspi {
        reg = <0xA0001000 0x1000>, <0x90000000 0x4000000>;
-       flash0: mx66l51235l {
+       flash0: mx66l51235l@0 {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "jedec,spi-nor";

diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 8d51e5b..03cfbd7 100644 (file)
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -19,7 +19,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@c0000000 {
                device_type = "memory";
                reg = <0xC0000000 0x1000000>;
        };
@@ -30,11 +30,11 @@
 
        leds {
                compatible = "gpio-leds";
-               green {
+               led-green {
                        gpios = <&gpioj 5 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "heartbeat";
                };
-               red {
+               led-red {
                        gpios = <&gpioj 13 GPIO_ACTIVE_HIGH>;
                };
        };

diff --git a/arch/arm/dts/stm32h743-pinctrl.dtsi b/arch/arm/dts/stm32h743-pinctrl.dtsi
index e3a5c53..141083f 100644 (file)
--- a/arch/arm/dts/stm32h743-pinctrl.dtsi
+++ b/arch/arm/dts/stm32h743-pinctrl.dtsi
@@ -163,7 +163,7 @@
                                #interrupt-cells = <2>;
                        };
 
-                       i2c1_pins_a: i2c1@0 {
+                       i2c1_pins_a: i2c1-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */
                                                 <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */
@@ -173,7 +173,7 @@
                                };
                        };
 
-                       ethernet_rmii: rmii@0 {
+                       ethernet_rmii: rmii-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('G', 11, AF11)>,
                                                 <STM32_PINMUX('G', 13, AF11)>,
@@ -256,7 +256,7 @@
                                };
                        };
 
-                       usart1_pins: usart1@0 {
+                       usart1_pins: usart1-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */
                                        bias-disable;
@@ -269,7 +269,7 @@
                                };
                        };
 
-                       usart2_pins: usart2@0 {
+                       usart2_pins: usart2-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */
                                        bias-disable;
@@ -282,7 +282,7 @@
                                };
                        };
 
-                       usbotg_hs_pins_a: usbotg-hs@0 {
+                       usbotg_hs_pins_a: usbotg-hs-0 {
                                pins {
                                        pinmux = <STM32_PINMUX('H', 4, AF10)>,  /* ULPI_NXT */
                                                         <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */

diff --git a/arch/arm/dts/stm32h743.dtsi b/arch/arm/dts/stm32h743.dtsi
index 4b4e7a9..e4e4723 100644 (file)
--- a/arch/arm/dts/stm32h743.dtsi
+++ b/arch/arm/dts/stm32h743.dtsi
@@ -74,6 +74,7 @@
                        compatible = "st,stm32h7-spi";
                        reg = <0x40003800 0x400>;
                        interrupts = <36>;
+                       resets = <&rcc STM32H7_APB1L_RESET(SPI2)>;
                        clocks = <&rcc SPI2_CK>;
                        status = "disabled";
 
@@ -85,12 +86,13 @@
                        compatible = "st,stm32h7-spi";
                        reg = <0x40003c00 0x400>;
                        interrupts = <51>;
+                       resets = <&rcc STM32H7_APB1L_RESET(SPI3)>;
                        clocks = <&rcc SPI3_CK>;
                        status = "disabled";
                };
 
                usart2: serial@40004400 {
-                       compatible = "st,stm32f7-uart";
+                       compatible = "st,stm32h7-uart";
                        reg = <0x40004400 0x400>;
                        interrupts = <38>;
                        status = "disabled";
@@ -144,21 +146,21 @@
 
                        dac1: dac@1 {
                                compatible = "st,stm32-dac";
-                               #io-channels-cells = <1>;
+                               #io-channel-cells = <1>;
                                reg = <1>;
                                status = "disabled";
                        };
 
                        dac2: dac@2 {
                                compatible = "st,stm32-dac";
-                               #io-channels-cells = <1>;
+                               #io-channel-cells = <1>;
                                reg = <2>;
                                status = "disabled";
                        };
                };
 
                usart1: serial@40011000 {
-                       compatible = "st,stm32f7-uart";
+                       compatible = "st,stm32h7-uart";
                        reg = <0x40011000 0x400>;
                        interrupts = <37>;
                        status = "disabled";
@@ -171,6 +173,7 @@
                        compatible = "st,stm32h7-spi";
                        reg = <0x40013000 0x400>;
                        interrupts = <35>;
+                       resets = <&rcc STM32H7_APB2_RESET(SPI1)>;
                        clocks = <&rcc SPI1_CK>;
                        status = "disabled";
                };
@@ -181,6 +184,7 @@
                        compatible = "st,stm32h7-spi";
                        reg = <0x40013400 0x400>;
                        interrupts = <84>;
+                       resets = <&rcc STM32H7_APB2_RESET(SPI4)>;
                        clocks = <&rcc SPI4_CK>;
                        status = "disabled";
                };
@@ -191,11 +195,12 @@
                        compatible = "st,stm32h7-spi";
                        reg = <0x40015000 0x400>;
                        interrupts = <85>;
+                       resets = <&rcc STM32H7_APB2_RESET(SPI5)>;
                        clocks = <&rcc SPI5_CK>;
                        status = "disabled";
                };
 
-               dma1: dma@40020000 {
+               dma1: dma-controller@40020000 {
                        compatible = "st,stm32-dma";
                        reg = <0x40020000 0x400>;
                        interrupts = <11>,
@@ -213,7 +218,7 @@
                        status = "disabled";
                };
 
-               dma2: dma@40020400 {
+               dma2: dma-controller@40020400 {
                        compatible = "st,stm32-dma";
                        reg = <0x40020400 0x400>;
                        interrupts = <56>,
@@ -293,7 +298,17 @@
                        status = "disabled";
                };
 
-               mdma1: dma@52000000 {
+               ltdc: display-controller@50001000 {
+                       compatible = "st,stm32-ltdc";
+                       reg = <0x50001000 0x200>;
+                       interrupts = <88>, <89>;
+                       resets = <&rcc STM32H7_APB3_RESET(LTDC)>;
+                       clocks = <&rcc LTDC_CK>;
+                       clock-names = "lcd";
+                       status = "disabled";
+               };
+
+               mdma1: dma-controller@52000000 {
                        compatible = "st,stm32h7-mdma";
                        reg = <0x52000000 0x1000>;
                        interrupts = <122>;
@@ -325,8 +340,8 @@
                        interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <62>, <76>;
                };
 
-               syscfg: system-config@58000400 {
-                       compatible = "syscon";
+               syscfg: syscon@58000400 {
+                       compatible = "st,stm32-syscfg", "syscon";
                        reg = <0x58000400 0x400>;
                };
 
@@ -336,6 +351,7 @@
                        compatible = "st,stm32h7-spi";
                        reg = <0x58001400 0x400>;
                        interrupts = <86>;
+                       resets = <&rcc STM32H7_APB4_RESET(SPI6)>;
                        clocks = <&rcc SPI6_CK>;
                        status = "disabled";
                };
@@ -451,7 +467,6 @@
                        assigned-clock-parents = <&rcc LSE_CK>;
                        interrupt-parent = <&exti>;
                        interrupts = <17 IRQ_TYPE_EDGE_RISING>;
-                       interrupt-names = "alarm";
                        st,syscfg = <&pwrcfg 0x00 0x100>;
                        status = "disabled";
                };
@@ -466,7 +481,7 @@
                };
 
                pwrcfg: power-config@58024800 {
-                       compatible = "syscon";
+                       compatible = "st,stm32-power-config", "syscon";
                        reg = <0x58024800 0x400>;
                };
 

diff --git a/arch/arm/dts/stm32h743i-disco.dts b/arch/arm/dts/stm32h743i-disco.dts
index 43c30bf..8100716 100644 (file)
--- a/arch/arm/dts/stm32h743i-disco.dts
+++ b/arch/arm/dts/stm32h743i-disco.dts
@@ -17,7 +17,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@d0000000 {
                device_type = "memory";
                reg = <0xd0000000 0x2000000>;
        };

diff --git a/arch/arm/dts/stm32h743i-eval.dts b/arch/arm/dts/stm32h743i-eval.dts
index e4d3c58..8f39817 100644 (file)
--- a/arch/arm/dts/stm32h743i-eval.dts
+++ b/arch/arm/dts/stm32h743i-eval.dts
@@ -53,7 +53,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@d0000000 {
                device_type = "memory";
                reg = <0xd0000000 0x2000000>;
        };