drm/i915/mtl: Add support for MTL in Display Init sequences

The initialization sequence for Meteorlake reuses the sequence for
icelake for most parts. Some changes viz. reset PICA handshake
are added.

Bspec: 49189

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220818234202.451742-10-radhakrishna.sripada@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index f7e8d1f..9c1fefb 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1382,6 +1382,9 @@ static void intel_pch_reset_handshake(struct drm_i915_private *dev_priv,
                reset_bits = RESET_PCH_HANDSHAKE_ENABLE;
        }
 
+       if (DISPLAY_VER(dev_priv) >= 14)
+               reset_bits |= MTL_RESET_PICA_HANDSHAKE_EN;
+
        val = intel_de_read(dev_priv, reg);
 
        if (enable)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2e3aa68..5f140c2 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5821,7 +5821,8 @@
                                                         _BW_BUDDY1_PAGE_MASK))
 
 #define HSW_NDE_RSTWRN_OPT     _MMIO(0x46408)
-#define  RESET_PCH_HANDSHAKE_ENABLE    (1 << 4)
+#define  MTL_RESET_PICA_HANDSHAKE_EN   REG_BIT(6)
+#define  RESET_PCH_HANDSHAKE_ENABLE    REG_BIT(4)
 
 #define GEN8_CHICKEN_DCPR_1                    _MMIO(0x46430)
 #define   SKL_SELECT_ALTERNATE_DC_EXIT         REG_BIT(30)