drm/i915/dg2: Add workaround 18019627453
authorJosé Roberto de Souza <jose.souza@intel.com>
Tue, 19 Apr 2022 18:27:53 +0000 (11:27 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Wed, 20 Apr 2022 16:55:45 +0000 (09:55 -0700)
A new DG2 workaround added to fix some corner cases hangs.

v2:
- implementing the second and preferred option for this workaround

BSpec: 54077
BSpec: 68173
BSpec: 71488
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220419182753.364237-2-jose.souza@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c

index 29c8cd0..a05c4b9 100644 (file)
@@ -2194,11 +2194,15 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
                 */
                wa_write_or(wal, GEN7_FF_THREAD_MODE,
                            GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
+       }
 
+       if (IS_ALDERLAKE_P(i915) || IS_DG2(i915) || IS_ALDERLAKE_S(i915) ||
+           IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
                /*
                 * Wa_1606700617:tgl,dg1,adl-p
                 * Wa_22010271021:tgl,rkl,dg1,adl-s,adl-p
                 * Wa_14010826681:tgl,dg1,rkl,adl-p
+                * Wa_18019627453:dg2
                 */
                wa_masked_en(wal,
                             GEN9_CS_DEBUG_MODE1,