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RISC-V: Print SSTC in canonical order
author
Palmer Dabbelt
<palmer@rivosinc.com>
Tue, 20 Sep 2022 20:45:18 +0000
(13:45 -0700)
committer
Palmer Dabbelt
<palmer@rivosinc.com>
Fri, 7 Oct 2022 03:03:27 +0000
(20:03 -0700)
This got out of order during a merge conflict, fix it by putting the
entries in the correct order.
Fixes:
7ab52f75a9cf
("RISC-V: Add Sstc extension support")
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Cc: stable@vger.kernel.org
Link:
https://lore.kernel.org/r/20220920204518.10988-1-palmer@rivosinc.com/
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/cpu.c
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diff --git
a/arch/riscv/kernel/cpu.c
b/arch/riscv/kernel/cpu.c
index
0be8a24
..
87455d1
100644
(file)
--- a/
arch/riscv/kernel/cpu.c
+++ b/
arch/riscv/kernel/cpu.c
@@
-92,10
+92,10
@@
int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
*/
static struct riscv_isa_ext_data isa_ext_arr[] = {
__RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
+ __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
__RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT),
__RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),
__RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
- __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
__RISCV_ISA_EXT_DATA("", RISCV_ISA_EXT_MAX),
};