[X86][SSE] Improve awareness of (v)cvtpd2ps implicit zeroing of upper 64-bits of...

Associate x86_sse2_cvtpd2ps with X86ISD::VFPROUND to avoid inserting unnecessary zeroing shuffles.

Differential Revision: https://reviews.llvm.org/D23797

llvm-svn: 280249

diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index 633add4..7bc6a5a 100644 (file)
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -1884,6 +1884,7 @@ static const IntrinsicData  IntrinsicsWithoutChain[] = {
   X86_INTRINSIC_DATA(sse2_comile_sd,    COMI, X86ISD::COMI, ISD::SETLE),
   X86_INTRINSIC_DATA(sse2_comilt_sd,    COMI, X86ISD::COMI, ISD::SETLT),
   X86_INTRINSIC_DATA(sse2_comineq_sd,   COMI, X86ISD::COMI, ISD::SETNE),
+  X86_INTRINSIC_DATA(sse2_cvtpd2ps,     INTR_TYPE_1OP, X86ISD::VFPROUND, 0),
   X86_INTRINSIC_DATA(sse2_max_pd,       INTR_TYPE_2OP, X86ISD::FMAX, 0),
   X86_INTRINSIC_DATA(sse2_min_pd,       INTR_TYPE_2OP, X86ISD::FMIN, 0),
   X86_INTRINSIC_DATA(sse2_movmsk_pd,    INTR_TYPE_1OP, X86ISD::MOVMSK, 0),

diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
index c5ed21c..4fcfa4d 100644 (file)
--- a/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
@@ -245,19 +245,17 @@ define <4 x float> @test_x86_sse2_cvtpd2ps(<2 x double> %a0) {
 declare <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double>) nounwind readnone
 
 define <4 x float> @test_x86_sse2_cvtpd2ps_zext(<2 x double> %a0) nounwind {
-; SSE-LABEL: test_x86_sse2_cvtpd2ps_zext:
-; SSE:       ## BB#0:
-; SSE-NEXT:    cvtpd2ps %xmm0, %xmm0
-; SSE-NEXT:    movq {{.*#+}} xmm0 = xmm0[0],zero
-; SSE-NEXT:    retl
-;
-; KNL-LABEL: test_x86_sse2_cvtpd2ps_zext:
-; KNL:       ## BB#0:
-; KNL-NEXT:    vcvtpd2ps %xmm0, %xmm0
-; KNL-NEXT:    vmovq {{.*#+}} xmm0 = xmm0[0],zero
-; KNL-NEXT:    retl
-  %cvt = call <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double> %a0)
-  %res = shufflevector <4 x float> %cvt, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
+; SSE-LABEL: test_x86_sse2_cvtpd2ps_zext:\r
+; SSE:       ## BB#0:\r
+; SSE-NEXT:    cvtpd2ps %xmm0, %xmm0\r
+; SSE-NEXT:    retl\r
+;\r
+; KNL-LABEL: test_x86_sse2_cvtpd2ps_zext:\r
+; KNL:       ## BB#0:\r
+; KNL-NEXT:    vcvtpd2ps %xmm0, %xmm0\r
+; KNL-NEXT:    retl\r
+  %cvt = call <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double> %a0)\r
+  %res = shufflevector <4 x float> %cvt, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 5>\r
   ret <4 x float> %res
 }