V4 JIT: enable register allocator on win32.

Change-Id: I7134bd3721df0e000ad0bd135c01e76c55271156
Reviewed-by: Simon Hausmann <simon.hausmann@digia.com>

diff --git a/src/qml/jit/qv4assembler_p.h b/src/qml/jit/qv4assembler_p.h
index 2774b8d..f28aed6 100644 (file)
--- a/src/qml/jit/qv4assembler_p.h
+++ b/src/qml/jit/qv4assembler_p.h
@@ -984,8 +984,10 @@ public:
         prepareRelativeCall(function, this);
         loadArgumentOnStackOrRegister<0>(arg1);
 
-#if OS(LINUX) && CPU(X86) && (defined(__PIC__) || defined(__PIE__))
-        load32(Address(StackFrameRegister, -sizeof(void*)), JSC::X86Registers::ebx); // restore the GOT ptr
+#if (OS(LINUX) && CPU(X86) && (defined(__PIC__) || defined(__PIE__))) || \
+    (OS(WINDOWS) && CPU(X86))
+        load32(Address(StackFrameRegister, -int(sizeof(void*))),
+               JSC::X86Registers::ebx); // restore the GOT ptr
 #endif
 
         callAbsolute(functionName, function);

diff --git a/src/qml/jit/qv4isel_masm.cpp b/src/qml/jit/qv4isel_masm.cpp
index 2317ed7..08bc0d7 100644 (file)
--- a/src/qml/jit/qv4isel_masm.cpp
+++ b/src/qml/jit/qv4isel_masm.cpp
@@ -269,6 +269,27 @@ static QVector<int> getFpRegisters()
             << JSC::ARMRegisters::d6;
     return fpRegisters;
 }
+#elif CPU(X86) && OS(WINDOWS)
+#  define REGALLOC_IS_SUPPORTED
+static QVector<int> getIntRegisters()
+{
+    static const QVector<int> intRegisters = QVector<int>()
+            << JSC::X86Registers::edx
+            << JSC::X86Registers::ebx;
+    return intRegisters;
+}
+
+static QVector<int> getFpRegisters()
+{
+    static const QVector<int> fpRegisters = QVector<int>()
+            << JSC::X86Registers::xmm2
+            << JSC::X86Registers::xmm3
+            << JSC::X86Registers::xmm4
+            << JSC::X86Registers::xmm5
+            << JSC::X86Registers::xmm6
+            << JSC::X86Registers::xmm7;
+    return fpRegisters;
+}
 #endif
 
 void InstructionSelection::run(int functionIndex)