ARM: dts: colibri-imx6ull: fix snvs pinmux group

A pin controlled by the iomuxc-snvs pin controller must be
specified under the dtb's iomuxc-snvs node.

Move the one and only pin of that category from the iomuxc node
and set the pinctrl-0 using it accordingly.

Fixes: 2aa9d6201949 ("ARM: dts: imx6ull-colibri: add touchscreen device nodes")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi
index 15621e0..2c3ae71 100644 (file)
--- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
@@ -166,7 +166,7 @@
        atmel_mxt_ts: touchscreen@4a {
                compatible = "atmel,maxtouch";
                pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_atmel_conn>;
+               pinctrl-0 = <&pinctrl_atmel_conn &pinctrl_atmel_snvs_conn>;
                reg = <0x4a>;
                interrupt-parent = <&gpio5>;
                interrupts = <4 IRQ_TYPE_EDGE_FALLING>;       /* SODIMM 107 / INT */
@@ -331,7 +331,6 @@
        pinctrl_atmel_conn: atmelconngrp {
                fsl,pins = <
                        MX6UL_PAD_JTAG_MOD__GPIO1_IO10          0xb0a0  /* SODIMM 106 */
-                       MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04     0xb0a0  /* SODIMM 107 */
                >;
        };
 
@@ -684,6 +683,12 @@
 };
 
 &iomuxc_snvs {
+       pinctrl_atmel_snvs_conn: atmelsnvsconngrp {
+               fsl,pins = <
+                       MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04     0xb0a0  /* SODIMM 107 */
+               >;
+       };
+
        pinctrl_snvs_gpio1: snvsgpio1grp {
                fsl,pins = <
                        MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06     0x110a0 /* SODIMM 93 */