drm/i915/dp: select 128b/132b channel encoding for UHBR rates
authorJani Nikula <jani.nikula@intel.com>
Thu, 9 Sep 2021 12:52:00 +0000 (15:52 +0300)
committerJani Nikula <jani.nikula@intel.com>
Mon, 20 Sep 2021 15:46:22 +0000 (18:46 +0300)
UHBR rates and 128b/132b channel encoding go hand in hand.

v2: Fix check for >= UHBR rates using intel_dp_is_uhbr() (Ville)

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b4ffd0187b306c0abaa08b89ed35c993ad8145c7.1631191763.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_dp_link_training.c

index 36b3523..4f116cd 100644 (file)
@@ -495,7 +495,8 @@ intel_dp_prepare_link_train(struct intel_dp *intel_dp,
                                  &rate_select, 1);
 
        link_config[0] = crtc_state->vrr.enable ? DP_MSA_TIMING_PAR_IGNORE_EN : 0;
-       link_config[1] = DP_SET_ANSI_8B10B;
+       link_config[1] = intel_dp_is_uhbr(crtc_state) ?
+               DP_SET_ANSI_128B132B : DP_SET_ANSI_8B10B;
        drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2);
 
        intel_dp->DP |= DP_PORT_EN;