MX31: Disable watchdog during low-power modes

Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes.

Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt
and there was no activity, the system entered into idle mode while watchdog timer was still active.

Fix this by disabling watchdog timer during idle mode.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index c05a39d..717a2b7 100644 (file)
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -173,8 +173,8 @@ void mxc_hw_watchdog_enable(void)
 #else
        secs = 64;
 #endif
-       writew(readw(&wdog->wcr) | (secs << WDOG_WT_SHIFT) | WDOG_ENABLE,
-               &wdog->wcr);
+       setbits_le16(&wdog->wcr, (secs << WDOG_WT_SHIFT) | WDOG_ENABLE
+                                                        | WDOG_WDZST);
 }
 
 

diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..0dcd9fe 100644 (file)
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -71,6 +71,8 @@ struct cspi_regs {
 /* Watchdog Timer (WDOG) registers */
 #define WDOG_ENABLE    (1 << 2)
 #define WDOG_WT_SHIFT  8
+#define WDOG_WDZST     (1 << 0)
+
 struct wdog_regs {
        u16 wcr;        /* Control */
        u16 wsr;        /* Service */