drm/i915: Clean up ADPA pipe select bits
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 14 May 2018 17:24:19 +0000 (20:24 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 17 May 2018 16:29:49 +0000 (19:29 +0300)
Clean up the ADPA pipe select bits. To make the whole situation a bit
less ugly we'll start to share the same code between .get_hw_state()
and the port state asserts.

v2: Order the defines shift,mask,value (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180514172423.9302-1-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_crt.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h

index f11bb21..ae3c262 100644 (file)
@@ -4133,11 +4133,12 @@ enum {
 
 #define   ADPA_DAC_ENABLE      (1<<31)
 #define   ADPA_DAC_DISABLE     0
-#define   ADPA_PIPE_SELECT_MASK        (1<<30)
-#define   ADPA_PIPE_A_SELECT   0
-#define   ADPA_PIPE_B_SELECT   (1<<30)
-#define   ADPA_PIPE_SELECT(pipe) ((pipe) << 30)
-/* CPT uses bits 29:30 for pch transcoder select */
+#define   ADPA_PIPE_SEL_SHIFT          30
+#define   ADPA_PIPE_SEL_MASK           (1<<30)
+#define   ADPA_PIPE_SEL(pipe)          ((pipe) << 30)
+#define   ADPA_PIPE_SEL_SHIFT_CPT      29
+#define   ADPA_PIPE_SEL_MASK_CPT       (3<<29)
+#define   ADPA_PIPE_SEL_CPT(pipe)      ((pipe) << 29)
 #define   ADPA_CRT_HOTPLUG_MASK  0x03ff0000 /* bit 25-16 */
 #define   ADPA_CRT_HOTPLUG_MONITOR_NONE  (0<<24)
 #define   ADPA_CRT_HOTPLUG_MONITOR_MASK  (3<<24)
index de0e223..211d601 100644 (file)
@@ -63,33 +63,35 @@ static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
        return intel_encoder_to_crt(intel_attached_encoder(connector));
 }
 
+bool intel_crt_port_enabled(struct drm_i915_private *dev_priv,
+                           i915_reg_t adpa_reg, enum pipe *pipe)
+{
+       u32 val;
+
+       val = I915_READ(adpa_reg);
+
+       /* asserts want to know the pipe even if the port is disabled */
+       if (HAS_PCH_CPT(dev_priv))
+               *pipe = (val & ADPA_PIPE_SEL_MASK_CPT) >> ADPA_PIPE_SEL_SHIFT_CPT;
+       else
+               *pipe = (val & ADPA_PIPE_SEL_MASK) >> ADPA_PIPE_SEL_SHIFT;
+
+       return val & ADPA_DAC_ENABLE;
+}
+
 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
                                   enum pipe *pipe)
 {
-       struct drm_device *dev = encoder->base.dev;
-       struct drm_i915_private *dev_priv = to_i915(dev);
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_crt *crt = intel_encoder_to_crt(encoder);
-       u32 tmp;
        bool ret;
 
        if (!intel_display_power_get_if_enabled(dev_priv,
                                                encoder->power_domain))
                return false;
 
-       ret = false;
-
-       tmp = I915_READ(crt->adpa_reg);
-
-       if (!(tmp & ADPA_DAC_ENABLE))
-               goto out;
+       ret = intel_crt_port_enabled(dev_priv, crt->adpa_reg, pipe);
 
-       if (HAS_PCH_CPT(dev_priv))
-               *pipe = PORT_TO_PIPE_CPT(tmp);
-       else
-               *pipe = PORT_TO_PIPE(tmp);
-
-       ret = true;
-out:
        intel_display_power_put(dev_priv, encoder->power_domain);
 
        return ret;
@@ -168,11 +170,9 @@ static void intel_crt_set_dpms(struct intel_encoder *encoder,
        if (HAS_PCH_LPT(dev_priv))
                ; /* Those bits don't exist here */
        else if (HAS_PCH_CPT(dev_priv))
-               adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
-       else if (crtc->pipe == 0)
-               adpa |= ADPA_PIPE_A_SELECT;
+               adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe);
        else
-               adpa |= ADPA_PIPE_B_SELECT;
+               adpa |= ADPA_PIPE_SEL(crtc->pipe);
 
        if (!HAS_PCH_SPLIT(dev_priv))
                I915_WRITE(BCLRPAT(crtc->pipe), 0);
index ad588d5..6daa8d9 100644 (file)
@@ -1360,21 +1360,6 @@ static bool lvds_pipe_enabled(struct drm_i915_private *dev_priv,
        return true;
 }
 
-static bool adpa_pipe_enabled(struct drm_i915_private *dev_priv,
-                             enum pipe pipe, u32 val)
-{
-       if ((val & ADPA_DAC_ENABLE) == 0)
-               return false;
-       if (HAS_PCH_CPT(dev_priv)) {
-               if ((val & PORT_TRANS_SEL_MASK) != PORT_TRANS_SEL_CPT(pipe))
-                       return false;
-       } else {
-               if ((val & ADPA_PIPE_SELECT_MASK) != ADPA_PIPE_SELECT(pipe))
-                       return false;
-       }
-       return true;
-}
-
 static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv,
                                   enum pipe pipe, i915_reg_t reg,
                                   u32 port_sel)
@@ -1405,16 +1390,17 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv,
 static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
                                      enum pipe pipe)
 {
+       enum pipe port_pipe;
        u32 val;
 
        assert_pch_dp_disabled(dev_priv, pipe, PCH_DP_B, TRANS_DP_PORT_SEL_B);
        assert_pch_dp_disabled(dev_priv, pipe, PCH_DP_C, TRANS_DP_PORT_SEL_C);
        assert_pch_dp_disabled(dev_priv, pipe, PCH_DP_D, TRANS_DP_PORT_SEL_D);
 
-       val = I915_READ(PCH_ADPA);
-       I915_STATE_WARN(adpa_pipe_enabled(dev_priv, pipe, val),
-            "PCH VGA enabled on transcoder %c, should be disabled\n",
-            pipe_name(pipe));
+       I915_STATE_WARN(intel_crt_port_enabled(dev_priv, PCH_ADPA, &port_pipe) &&
+                       port_pipe == pipe,
+                       "PCH VGA enabled on transcoder %c, should be disabled\n",
+                       pipe_name(pipe));
 
        val = I915_READ(PCH_LVDS);
        I915_STATE_WARN(lvds_pipe_enabled(dev_priv, pipe, val),
index d7dbca1..4237950 100644 (file)
@@ -1377,6 +1377,8 @@ void gen9_enable_guc_interrupts(struct drm_i915_private *dev_priv);
 void gen9_disable_guc_interrupts(struct drm_i915_private *dev_priv);
 
 /* intel_crt.c */
+bool intel_crt_port_enabled(struct drm_i915_private *dev_priv,
+                           i915_reg_t adpa_reg, enum pipe *pipe);
 void intel_crt_init(struct drm_i915_private *dev_priv);
 void intel_crt_reset(struct drm_encoder *encoder);