power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL0>;
clock-names = "gscl";
+ rot-max-hsize = <2048>;
+ rot-max-vsize = <2048>;
iommu = <&sysmmu_gsc1>;
};
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL1>;
clock-names = "gscl";
+ rot-max-hsize = <2048>;
+ rot-max-vsize = <2048>;
iommu = <&sysmmu_gsc1>;
};
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL2>;
clock-names = "gscl";
+ rot-max-hsize = <2048>;
+ rot-max-vsize = <2048>;
iommu = <&sysmmu_gsc2>;
};
power-domains = <&pd_gsc>;
clocks = <&clock CLK_GSCL3>;
clock-names = "gscl";
+ rot-max-hsize = <2048>;
+ rot-max-vsize = <2048>;
iommu = <&sysmmu_gsc3>;
};
clocks = <&clock CLK_GSCL0>;
clock-names = "gscl";
power-domains = <&gsc_pd>;
+ rot-max-hsize = <2016>;
+ rot-max-vsize = <2016>;
iommus = <&sysmmu_gscl0>;
};
clocks = <&clock CLK_GSCL1>;
clock-names = "gscl";
power-domains = <&gsc_pd>;
+ rot-max-hsize = <2016>;
+ rot-max-vsize = <2016>;
iommus = <&sysmmu_gscl1>;
};