}
}
+static int pci_msi_setup_check_result(struct pci_dev *dev, int type, int ret)
+{
+ struct msi_desc *entry;
+ int avail = 0;
+
+ if (type != PCI_CAP_ID_MSIX || ret >= 0)
+ return ret;
+
+ /* Scan the MSI descriptors for successfully allocated ones. */
+ for_each_pci_msi_entry(entry, dev) {
+ if (entry->irq != 0)
+ avail++;
+ }
+ return avail ? avail : ret;
+}
+
int pci_msi_legacy_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
- return arch_setup_msi_irqs(dev, nvec, type);
+ int ret = arch_setup_msi_irqs(dev, nvec, type);
+
+ return pci_msi_setup_check_result(dev, type, ret);
}
void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev)
ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
if (ret)
- goto out_avail;
+ goto out_free;
/* Check if all MSI entries honor device restrictions */
ret = msi_verify_entries(dev);
pcibios_free_irq(dev);
return 0;
-out_avail:
- if (ret < 0) {
- /*
- * If we had some success, report the number of IRQs
- * we succeeded in setting up.
- */
- struct msi_desc *entry;
- int avail = 0;
-
- for_each_pci_msi_entry(entry, dev) {
- if (entry->irq != 0)
- avail++;
- }
- if (avail != 0)
- ret = avail;
- }
-
out_free:
free_msi_irqs(dev);