pinctrl: Add s5pv210 support to pinctrl-exynos
authorMateusz Krawczuk <m.krawczuk@partner.samsung.com>
Tue, 27 Aug 2013 13:08:10 +0000 (15:08 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Wed, 28 Aug 2013 13:56:06 +0000 (15:56 +0200)
This patch implements pinctrl support and adds device tree bindings
for s5pv210.

Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
drivers/pinctrl/Kconfig
drivers/pinctrl/pinctrl-exynos.c
drivers/pinctrl/pinctrl-samsung.c
drivers/pinctrl/pinctrl-samsung.h

index 36281e7..257677d 100644 (file)
@@ -12,6 +12,7 @@ Required Properties:
   - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
   - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
   - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
+  - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
   - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
   - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
   - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
@@ -128,7 +129,7 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
      - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
        found on Samsung S3C64xx SoCs,
      - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
-       found on Samsung Exynos4210 SoC.
+       found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
    - interrupt-parent: phandle of the interrupt parent to which the external
      wakeup interrupts are forwarded to.
    - interrupts: interrupt used by multiplexed wakeup interrupts.
index b920901..b6e864e 100644 (file)
@@ -252,7 +252,7 @@ config PINCTRL_SAMSUNG
 
 config PINCTRL_EXYNOS
        bool "Pinctrl driver data for Samsung EXYNOS SoCs other than 5440"
-       depends on OF && GPIOLIB && ARCH_EXYNOS
+       depends on OF && GPIOLIB && (ARCH_EXYNOS || ARCH_S5PV210)
        select PINCTRL_SAMSUNG
 
 config PINCTRL_EXYNOS5440
index a74b3cb..2689f8d 100644 (file)
@@ -660,6 +660,64 @@ static void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata)
                        exynos_pinctrl_resume_bank(drvdata, bank);
 }
 
+/* pin banks of s5pv210 pin-controller */
+static struct samsung_pin_bank s5pv210_pin_bank[] = {
+       EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
+       EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
+       EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
+       EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpc0", 0x0c),
+       EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpc1", 0x10),
+       EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14),
+       EXYNOS_PIN_BANK_EINTG(4, 0x0c0, "gpd1", 0x18),
+       EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpe0", 0x1c),
+       EXYNOS_PIN_BANK_EINTG(8, 0x100, "gpe1", 0x20),
+       EXYNOS_PIN_BANK_EINTG(6, 0x120, "gpf0", 0x24),
+       EXYNOS_PIN_BANK_EINTG(8, 0x140, "gpf1", 0x28),
+       EXYNOS_PIN_BANK_EINTG(8, 0x160, "gpf2", 0x2c),
+       EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpf3", 0x30),
+       EXYNOS_PIN_BANK_EINTG(7, 0x1a0, "gpg0", 0x34),
+       EXYNOS_PIN_BANK_EINTG(7, 0x1c0, "gpg1", 0x38),
+       EXYNOS_PIN_BANK_EINTG(7, 0x1e0, "gpg2", 0x3c),
+       EXYNOS_PIN_BANK_EINTG(7, 0x200, "gpg3", 0x40),
+       EXYNOS_PIN_BANK_EINTN(7, 0x220, "gpi"),
+       EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpj0", 0x44),
+       EXYNOS_PIN_BANK_EINTG(6, 0x260, "gpj1", 0x48),
+       EXYNOS_PIN_BANK_EINTG(8, 0x280, "gpj2", 0x4c),
+       EXYNOS_PIN_BANK_EINTG(8, 0x2a0, "gpj3", 0x50),
+       EXYNOS_PIN_BANK_EINTG(5, 0x2c0, "gpj4", 0x54),
+       EXYNOS_PIN_BANK_EINTN(8, 0x2e0, "mp01"),
+       EXYNOS_PIN_BANK_EINTN(4, 0x300, "mp02"),
+       EXYNOS_PIN_BANK_EINTN(8, 0x320, "mp03"),
+       EXYNOS_PIN_BANK_EINTN(8, 0x340, "mp04"),
+       EXYNOS_PIN_BANK_EINTN(8, 0x360, "mp05"),
+       EXYNOS_PIN_BANK_EINTN(8, 0x380, "mp06"),
+       EXYNOS_PIN_BANK_EINTN(8, 0x3a0, "mp07"),
+       EXYNOS_PIN_BANK_EINTW(8, 0xc00, "gph0", 0x00),
+       EXYNOS_PIN_BANK_EINTW(8, 0xc20, "gph1", 0x04),
+       EXYNOS_PIN_BANK_EINTW(8, 0xc40, "gph2", 0x08),
+       EXYNOS_PIN_BANK_EINTW(8, 0xc60, "gph3", 0x0c),
+};
+
+struct samsung_pin_ctrl s5pv210_pin_ctrl[] = {
+       {
+               /* pin-controller instance 0 data */
+               .pin_banks      = s5pv210_pin_bank,
+               .nr_banks       = ARRAY_SIZE(s5pv210_pin_bank),
+               .geint_con      = EXYNOS_GPIO_ECON_OFFSET,
+               .geint_mask     = EXYNOS_GPIO_EMASK_OFFSET,
+               .geint_pend     = EXYNOS_GPIO_EPEND_OFFSET,
+               .weint_con      = EXYNOS_WKUP_ECON_OFFSET,
+               .weint_mask     = EXYNOS_WKUP_EMASK_OFFSET,
+               .weint_pend     = EXYNOS_WKUP_EPEND_OFFSET,
+               .svc            = EXYNOS_SVC_OFFSET,
+               .eint_gpio_init = exynos_eint_gpio_init,
+               .eint_wkup_init = exynos_eint_wkup_init,
+               .suspend        = exynos_pinctrl_suspend,
+               .resume         = exynos_pinctrl_resume,
+               .label          = "s5pv210-gpio-ctrl0",
+       },
+};
+
 /* pin banks of exynos4210 pin-controller 0 */
 static struct samsung_pin_bank exynos4210_pin_banks0[] = {
        EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
index 222648d..92a9d6c 100644 (file)
@@ -1122,6 +1122,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
                .data = (void *)exynos5250_pin_ctrl },
        { .compatible = "samsung,exynos5420-pinctrl",
                .data = (void *)exynos5420_pin_ctrl },
+       { .compatible = "samsung,s5pv210-pinctrl",
+               .data = (void *)s5pv210_pin_ctrl },
 #endif
 #ifdef CONFIG_PINCTRL_S3C64XX
        { .compatible = "samsung,s3c64xx-pinctrl",
index 11bb75b..30622d9 100644 (file)
@@ -260,5 +260,6 @@ extern struct samsung_pin_ctrl s3c2412_pin_ctrl[];
 extern struct samsung_pin_ctrl s3c2416_pin_ctrl[];
 extern struct samsung_pin_ctrl s3c2440_pin_ctrl[];
 extern struct samsung_pin_ctrl s3c2450_pin_ctrl[];
+extern struct samsung_pin_ctrl s5pv210_pin_ctrl[];
 
 #endif /* __PINCTRL_SAMSUNG_H */