Move CONFIG_FSL_ESDHC to defconfig
authorYangbo Lu <yangbo.lu@nxp.com>
Fri, 21 Jun 2019 03:42:26 +0000 (11:42 +0800)
committerPeng Fan <peng.fan@nxp.com>
Sun, 23 Jun 2019 06:15:30 +0000 (14:15 +0800)
Moved CONFIG_FSL_ESDHC from header files to defconfig files.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
22 files changed:
configs/apalis-imx8qm_defconfig
configs/colibri-imx8qxp_defconfig
configs/imx8mq_evk_defconfig
configs/imx8qm_mek_defconfig
configs/imx8qxp_mek_defconfig
configs/kp_imx6q_tpc_defconfig
configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
configs/ls1012afrwy_qspi_defconfig
configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
configs/ls1012afrwy_tfa_defconfig
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
configs/ls1028aqds_tfa_defconfig
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
configs/ls1028ardb_tfa_defconfig
include/configs/apalis-imx8.h
include/configs/colibri-imx8x.h
include/configs/imx8mq_evk.h
include/configs/imx8qm_mek.h
include/configs/imx8qxp_mek.h
include/configs/kp_imx6q_tpc.h
include/configs/ls1012afrwy.h
include/configs/ls1028a_common.h

index 7f6ccc9..2ed14bd 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_IMX_LPI2C=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_MICREL=y
index 8d6c078..ec345e7 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_IMX_LPI2C=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_MICREL=y
index f02b5e2..383b490 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_MXC=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_DM_ETH=y
 CONFIG_PINCTRL=y
index 6db0669..e627efa 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_ATHEROS=y
index d735d34..1ce175e 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
index 0ca83cb..9b6ff4a 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_ISO_PARTITION is not set
 # CONFIG_EFI_PARTITION is not set
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_FEC_MXC=y
index a4ae87b..3b1568f 100644 (file)
@@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
index aa3256f..08eedec 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
index 827d4ec..64c59d9 100644 (file)
@@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
index cbeb9ca..7af253c 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
index 7cd2f59..ef78f0d 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_DM=y
 CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
index 7982ce4..93d22a2 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
index 3432f90..a2a2181 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_DM=y
 CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
index c65e37d..2d0c2b1 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
index 780ae61..32623c2 100644 (file)
@@ -15,7 +15,6 @@
 
 #undef CONFIG_BOOTM_NETBSD
 
-#define CONFIG_FSL_ESDHC
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define USDHC1_BASE_ADDR               0x5b010000
index e15bab2..2469066 100644 (file)
@@ -15,7 +15,6 @@
 
 #undef CONFIG_BOOTM_NETBSD
 
-#define CONFIG_FSL_ESDHC
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define USDHC1_BASE_ADDR               0x5b010000
index e4fa2df..16e4136 100644 (file)
 #define CONFIG_IMX_BOOTAUX
 
 #define CONFIG_CMD_MMC
-#define CONFIG_FSL_ESDHC
 #define CONFIG_FSL_USDHC
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2
index d06ed61..8fdf677 100644 (file)
@@ -47,7 +47,6 @@
 #undef CONFIG_CMD_CRC32
 #undef CONFIG_BOOTM_NETBSD
 
-#define CONFIG_FSL_ESDHC
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define USDHC1_BASE_ADDR                0x5B010000
index a8591c9..c1f1934 100644 (file)
@@ -46,7 +46,6 @@
 #undef CONFIG_CMD_CRC32
 #undef CONFIG_BOOTM_NETBSD
 
-#define CONFIG_FSL_ESDHC
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define USDHC1_BASE_ADDR                0x5B010000
index d2ebf92..dbae276 100644 (file)
@@ -39,7 +39,6 @@
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /* MMC Configs */
-#define CONFIG_FSL_ESDHC
 #define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define CONFIG_SYS_FSL_USDHC_NUM       2
index 12e6437..77aa22b 100644 (file)
@@ -41,7 +41,6 @@
 
 /*  MMC  */
 #ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
index d3d787f..896d7a3 100644 (file)
 
 /*  MMC  */
 #ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
 
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 
-/*  MMC  */
-#ifdef CONFIG_MMC
-#define CONFIG_FSL_ESDHC
-#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
-#endif
-
 /* I2C bus multiplexer */
 #define I2C_MUX_PCA_ADDR_PRI            0x77 /* Primary Mux*/
 #define I2C_MUX_CH_DEFAULT              0x8