mips.h (TARGET_CPU_CPP_BUILTINS): Check mips_base_mips16 instead of TARGET_MIPS16.

gcc/
	* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Check
	mips_base_mips16 instead of TARGET_MIPS16.
	(mips_base_mips16): Declare.
	* config/mips/mips.c (mips_base_mips16): Make global.
	(was_mips16_p): Remove GTY marker.
	(was_mips16_pch_p): New variable.
	(mips_set_mips16_mode): Check both was_mips16_p and was_mips16_pch_p.
	(mips_override_options): Force to non-MIPS16 mode initially.
	Do not complain about MIPS16 PIC incompatibilities here.
	Only allow -mgpopt if -mexplicit-relocs is in force for
	non-MIPS16 code.

gcc/testsuite/
	* gcc.target/mips/gcc-have-sync-compare-and-swap-1.c: Expect the
	macros to be defined for MIPS16 too.
	* gcc.target/mips/gcc-have-sync-compare-and-swap-2.c: Likewise.
	* gcc.target/mips/gcc-have-sync-compare-and-swap-3.c: New test.
	* gcc.target/mips/gcc-have-sync-compare-and-swap-4.c: Likewise.

From-SVN: r137539

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a3f6462..2ecbb96 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2008-07-06  Richard Sandiford  <rdsandiford@googlemail.com>
+
+       * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Check
+       mips_base_mips16 instead of TARGET_MIPS16.
+       (mips_base_mips16): Declare.
+       * config/mips/mips.c (mips_base_mips16): Make global.
+       (was_mips16_p): Remove GTY marker.
+       (was_mips16_pch_p): New variable.
+       (mips_set_mips16_mode): Check both was_mips16_p and was_mips16_pch_p.
+       (mips_override_options): Force to non-MIPS16 mode initially.
+       Do not complain about MIPS16 PIC incompatibilities here.
+       Only allow -mgpopt if -mexplicit-relocs is in force for
+       non-MIPS16 code.
+
 2008-07-06  Andreas Tobler  <a.tobler@schweiz.org>
 
        * configure.ac: Check for caddr_t, define to char * if not defined.

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 48ba54b..e8d51bc 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -442,7 +442,7 @@ const struct mips_rtx_cost_data *mips_cost;
 static int mips_base_target_flags;
 
 /* True if MIPS16 is the default mode.  */
-static bool mips_base_mips16;
+bool mips_base_mips16;
 
 /* The ambient values of other global variables.  */
 static int mips_base_delayed_branch; /* flag_delayed_branch */
@@ -12333,8 +12333,14 @@ mips_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
 }
 \f
 /* The last argument passed to mips_set_mips16_mode, or negative if the
-   function hasn't been called yet.  */
-static GTY(()) int was_mips16_p = -1;
+   function hasn't been called yet.
+
+   There are two copies of this information.  One is saved and restored
+   by the PCH process while the other is specific to this compiler
+   invocation.  The information calculated by mips_set_mips16_mode
+   is invalid unless the two variables are the same.  */
+static int was_mips16_p = -1;
+static GTY(()) int was_mips16_pch_p = -1;
 
 /* Set up the target-dependent global state so that it matches the
    current function's ISA mode.  */
@@ -12342,7 +12348,8 @@ static GTY(()) int was_mips16_p = -1;
 static void
 mips_set_mips16_mode (int mips16_p)
 {
-  if (mips16_p == was_mips16_p)
+  if (mips16_p == was_mips16_p
+      && mips16_p == was_mips16_pch_p)
     return;
 
   /* Restore base settings of various flags.  */
@@ -12417,11 +12424,12 @@ mips_set_mips16_mode (int mips16_p)
   /* (Re)initialize MIPS target internals for new ISA.  */
   mips_init_relocs ();
 
-  if (was_mips16_p >= 0)
+  if (was_mips16_p >= 0 || was_mips16_pch_p >= 0)
     /* Reinitialize target-dependent state.  */
     target_reinit ();
 
   was_mips16_p = mips16_p;
+  was_mips16_pch_p = mips16_p;
 }
 
 /* Implement TARGET_SET_CURRENT_FUNCTION.  Decide whether the current
@@ -12627,6 +12635,10 @@ mips_override_options (void)
 {
   int i, start, regno, mode;
 
+  /* Process flags as though we were generating non-MIPS16 code.  */
+  mips_base_mips16 = TARGET_MIPS16;
+  target_flags &= ~MASK_MIPS16;
+
 #ifdef SUBTARGET_OVERRIDE_OPTIONS
   SUBTARGET_OVERRIDE_OPTIONS;
 #endif
@@ -12772,14 +12784,6 @@ mips_override_options (void)
       target_flags &= ~MASK_ABICALLS;
     }
 
-  /* MIPS16 cannot generate PIC yet.  */
-  if (TARGET_MIPS16 && (flag_pic || TARGET_ABICALLS))
-    {
-      sorry ("MIPS16 PIC");
-      target_flags &= ~MASK_ABICALLS;
-      flag_pic = flag_pie = flag_shlib = 0;
-    }
-
   if (TARGET_ABICALLS)
     /* We need to set flag_pic for executables as well as DSOs
        because we may reference symbols that are not defined in
@@ -12807,7 +12811,7 @@ mips_override_options (void)
     {
       if (!TARGET_GPOPT)
        {
-         if (!TARGET_MIPS16 && !TARGET_EXPLICIT_RELOCS)
+         if (!TARGET_EXPLICIT_RELOCS)
            error ("%<-mno-gpopt%> needs %<-mexplicit-relocs%>");
 
          TARGET_LOCAL_SDATA = false;
@@ -12911,7 +12915,6 @@ mips_override_options (void)
     target_flags |= MASK_FIX_R4400;
 
   /* Save base state of options.  */
-  mips_base_mips16 = TARGET_MIPS16;
   mips_base_target_flags = target_flags;
   mips_base_delayed_branch = flag_delayed_branch;
   mips_base_schedule_insns = flag_schedule_insns;
@@ -12921,8 +12924,11 @@ mips_override_options (void)
   mips_base_align_jumps = align_jumps;
   mips_base_align_functions = align_functions;
 
-  /* Now select the ISA mode.  */
-  mips_set_mips16_mode (mips_base_mips16);
+  /* Now select the ISA mode.
+
+     Do all CPP-sensitive stuff in non-MIPS16 mode; we'll switch to
+     MIPS16 mode afterwards if need be.  */
+  mips_set_mips16_mode (false);
 
   /* We call dbr_schedule from within mips_reorg.  */
   flag_delayed_branch = 0;

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 781528d..8518a86 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -390,7 +390,7 @@ enum mips_code_readable_setting {
       else                                                             \
        builtin_define ("__mips_fpr=32");                               \
                                                                        \
-      if (TARGET_MIPS16)                                               \
+      if (mips_base_mips16)                                            \
        builtin_define ("__mips16");                                    \
                                                                        \
       if (TARGET_MIPS3D)                                               \
@@ -3232,6 +3232,7 @@ extern int mips_abi;                      /* which ABI to use */
 extern const struct mips_cpu_info *mips_arch_info;
 extern const struct mips_cpu_info *mips_tune_info;
 extern const struct mips_rtx_cost_data *mips_cost;
+extern bool mips_base_mips16;
 extern enum mips_code_readable_setting mips_code_readable;
 #endif
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 25c118e..841f216 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2008-07-06  Richard Sandiford  <rdsandiford@googlemail.com>
+
+       * gcc.target/mips/gcc-have-sync-compare-and-swap-1.c: Expect the
+       macros to be defined for MIPS16 too.
+       * gcc.target/mips/gcc-have-sync-compare-and-swap-2.c: Likewise.
+       * gcc.target/mips/gcc-have-sync-compare-and-swap-3.c: New test.
+       * gcc.target/mips/gcc-have-sync-compare-and-swap-4.c: Likewise.
+
 2008-07-06  Richard Guenther  <rguenther@suse.de>
 
        * gcc.dg/tree-ssa/pta-callused.c: Adjust testcase.

diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c
index 4c64225..c12d08e 100644 (file)
--- a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c
+++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c
@@ -1,15 +1,15 @@
 /* { dg-do preprocess } */
 /* { dg-mips-options "-mips2" } */
 
-#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1) == defined (__mips16)
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
 #error nonono
 #endif
 
-#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2) == defined (__mips16)
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
 #error nonono
 #endif
 
-#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) == defined (__mips16)
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
 #error nonono
 #endif
 

diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c
index 4265e41..eaae780 100644 (file)
--- a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c
+++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c
@@ -1,19 +1,19 @@
 /* { dg-do preprocess } */
 /* { dg-mips-options "-mgp64" } */
 
-#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1) == defined (__mips16)
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
 #error nonono
 #endif
 
-#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2) == defined (__mips16)
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
 #error nonono
 #endif
 
-#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) == defined (__mips16)
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
 #error nonono
 #endif
 
-#if defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) == defined (__mips16)
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
 #error nonono
 #endif
 

diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-3.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-3.c
new file mode 100644 (file)
index 0000000..faf50fc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-3.c
@@ -0,0 +1,23 @@
+/* { dg-do preprocess { target mips16_attribute } } */
+/* { dg-mips-options "-mips2 -mips16" } */
+/* { dg-add-options mips16_attribute } */
+
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
+#error nonono
+#endif
+
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
+#error nonono
+#endif
+
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+#error nonono
+#endif
+
+#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
+#error nonono
+#endif
+
+#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
+#error nonono
+#endif

diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-4.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-4.c
new file mode 100644 (file)
index 0000000..b53f4b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-4.c
@@ -0,0 +1,23 @@
+/* { dg-do preprocess { target mips16_attribute } } */
+/* { dg-mips-options "-mgp64 -mips16" } */
+/* { dg-add-options mips16_attribute } */
+
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
+#error nonono
+#endif
+
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
+#error nonono
+#endif
+
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+#error nonono
+#endif
+
+#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
+#error nonono
+#endif
+
+#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16
+#error nonono
+#endif