2014-05-16 Richard Biener <rguenther@suse.de>

	PR tree-optimization/61194
	* tree-vect-patterns.c (adjust_bool_pattern): Also handle
	bool patterns ending in a COND_EXPR.

	* gcc.dg/vect/pr61194.c: New testcase.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210514 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4ec3c7d..f2d0508 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-05-16  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/61194
+       * tree-vect-patterns.c (adjust_bool_pattern): Also handle
+       bool patterns ending in a COND_EXPR.
+
 2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
 
        * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Fix FNMUL case.

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 66d0694..ddf7647 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,10 @@
 2014-05-16  Richard Biener  <rguenther@suse.de>
 
+       PR tree-optimization/61194
+       * gcc.dg/vect/pr61194.c: New testcase.
+
+2014-05-16  Richard Biener  <rguenther@suse.de>
+
        * gcc.dg/tree-ssa/ssa-fre-39.c: New testcase.
        * gcc.dg/tree-ssa/ssa-fre-40.c: Likewise.
        * gcc.dg/tree-ssa/ssa-pre-8.c: One more elimination.

diff --git a/gcc/testsuite/gcc.dg/vect/pr61194.c b/gcc/testsuite/gcc.dg/vect/pr61194.c
new file mode 100644 (file)
index 0000000..e10cff4
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr61194.c
@@ -0,0 +1,43 @@
+/* { dg-require-effective-target vect_cond_mixed } */
+/* { dg-additional-options "-ftree-loop-if-convert-stores" } */
+
+#include "tree-vect.h"
+
+static float x[1024];
+static float y[1024];
+static float z[1024];
+static float w[1024];
+
+void __attribute__((noinline,noclone)) barX()
+{
+  int i;
+  for (i=0; i<1024; ++i)
+    z[i] = ((x[i]>0) & (w[i]<0)) ? z[i] : y[i];
+}
+
+int main()
+{
+  int i;
+
+  check_vect ();
+
+  for (i = 0; i < 1024; ++i)
+    {
+      x[i] = -10 + i;
+      w[i] = 100 - i;
+      z[i] = 0.;
+      y[i] = 1.;
+      __asm__ volatile ("" : : : "memory");
+    }
+
+  barX();
+
+  for (i = 0; i < 1024; ++i)
+    if (z[i] != ((x[i]>0 && w[i]<0) ? 0. : 1.))
+      abort ();
+
+  return 0;
+}
+
+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+/* { dg-final { cleanup-tree-dump "vect" } } */

diff --git a/gcc/tree-vect-patterns.c b/gcc/tree-vect-patterns.c
index 094cf04..3d57eab 100644 (file)
--- a/gcc/tree-vect-patterns.c
+++ b/gcc/tree-vect-patterns.c
@@ -2889,7 +2889,12 @@ adjust_bool_pattern (tree var, tree out_type, tree trueval,
      S5  e_b = c_b | d_b;
      S6  f_T = (TYPE) e_b;
 
-   where type 'TYPE' is an integral type.
+   where type 'TYPE' is an integral type.  Or a similar pattern
+   ending in
+
+     S6  f_Y = e_b ? r_Y : s_Y;
+
+   as results from if-conversion of a complex condition.
 
    Input:
 
@@ -2972,6 +2977,45 @@ vect_recog_bool_pattern (vec<gimple> *stmts, tree *type_in,
 
       return pattern_stmt;
     }
+  else if (rhs_code == COND_EXPR
+          && TREE_CODE (var) == SSA_NAME)
+    {
+      vectype = get_vectype_for_scalar_type (TREE_TYPE (lhs));
+      if (vectype == NULL_TREE)
+       return NULL;
+
+      /* Build a scalar type for the boolean result that when
+         vectorized matches the vector type of the result in
+        size and number of elements.  */
+      unsigned prec
+       = wi::udiv_trunc (TYPE_SIZE (vectype),
+                         TYPE_VECTOR_SUBPARTS (vectype)).to_uhwi ();
+      tree type
+       = build_nonstandard_integer_type (prec,
+                                         TYPE_UNSIGNED (TREE_TYPE (var)));
+      if (get_vectype_for_scalar_type (type) == NULL_TREE)
+       return NULL;
+
+      if (!check_bool_pattern (var, loop_vinfo, bb_vinfo))
+       return NULL;
+
+      rhs = adjust_bool_pattern (var, type, NULL_TREE, stmts);
+      lhs = vect_recog_temp_ssa_var (TREE_TYPE (lhs), NULL);
+      pattern_stmt 
+         = gimple_build_assign_with_ops (COND_EXPR, lhs,
+                                         build2 (NE_EXPR, boolean_type_node,
+                                                 rhs, build_int_cst (type, 0)),
+                                         gimple_assign_rhs2 (last_stmt),
+                                         gimple_assign_rhs3 (last_stmt));
+      *type_out = vectype;
+      *type_in = vectype;
+      stmts->safe_push (last_stmt);
+      if (dump_enabled_p ())
+       dump_printf_loc (MSG_NOTE, vect_location,
+                         "vect_recog_bool_pattern: detected:\n");
+
+      return pattern_stmt;
+    }
   else if (rhs_code == SSA_NAME
           && STMT_VINFO_DATA_REF (stmt_vinfo))
     {