SP += (OP[3] & 0x3e) << 1;
- /* Load the registers with lower number registers being retrieved from lower addresses. */
- for (i = 0; i < 12; i++)
+ /* Load the registers with lower number registers being retrieved from higher addresses. */
+ for (i = 12; i--;)
if ((OP[3] & (1 << type1_regs[ i ])))
{
State.regs[ 20 + i ] = load_mem (SP, 4);
if (overflow) PSW |= PSW_OV;
if (quotient == 0) PSW |= PSW_Z;
+ if (quotient & 0x80000000) PSW |= PSW_S;
trace_output (OP_IMM_REG_REG_REG);
if (overflow) PSW |= PSW_OV;
if (quotient == 0) PSW |= PSW_Z;
+ if (quotient & 0x80000000) PSW |= PSW_S;
trace_output (OP_IMM_REG_REG_REG);
if (overflow) PSW |= PSW_OV;
if (quotient == 0) PSW |= PSW_Z;
+ if (quotient & 0x80000000) PSW |= PSW_S;
trace_output (OP_REG_REG_REG);
}
if (overflow) PSW |= PSW_OV;
if (quotient == 0) PSW |= PSW_Z;
+ if (quotient & 0x80000000) PSW |= PSW_S;
trace_output (OP_IMM_REG_REG_REG);
}
if (overflow) PSW |= PSW_OV;
if (quotient == 0) PSW |= PSW_Z;
+ if (quotient & 0x80000000) PSW |= PSW_S;
trace_output (OP_REG_REG_REG);
}
if (overflow) PSW |= PSW_OV;
if (quotient == 0) PSW |= PSW_Z;
+ if (quotient & 0x80000000) PSW |= PSW_S;
trace_output (OP_IMM_REG_REG_REG);
}
if (value == 0) PSW |= PSW_Z;
if (value & 0x80000000) PSW |= PSW_S;
- if (((value & 0xffff) == 0) || (value & 0xffff0000) == 0) PSW |= PSW_CY;
+ if (((value & 0xff) == 0) || (value & 0x00ff) == 0) PSW |= PSW_CY;
trace_output (OP_REG_REG3);
trace_input ("pushml", OP_PUSHPOP3, 0);
+ /* Store the registers with lower number registers being placed at higher addresses. */
+ for (i = 0; i < 15; i++)
+ if ((OP[3] & (1 << type3_regs[ i ])))
+ {
+ SP -= 4;
+ store_mem (SP & ~ 3, 4, State.regs[ i + 1 ]);
+ }
+
+ if (OP[3] & (1 << 3))
+ {
+ SP -= 4;
+
+ store_mem (SP & ~ 3, 4, PSW);
+ }
+
if (OP[3] & (1 << 19))
{
SP -= 8;
}
}
- if (OP[3] & (1 << 3))
- {
- SP -= 4;
-
- store_mem (SP & ~ 3, 4, PSW);
- }
-
- /* Store the registers with lower number registers being placed at lower addresses. */
- for (i = 15; i--;)
- if ((OP[3] & (1 << type3_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP & ~ 3, 4, State.regs[ i + 1 ]);
- }
-
trace_output (OP_PUSHPOP2);
}
else
trace_input ("prepare", OP_PUSHPOP1, 0);
- /* Store the registers with lower number registers being placed at lower addresses. */
- for (i = 12; i--;)
+ /* Store the registers with lower number registers being placed at higher addresses. */
+ for (i = 0; i < 12; i++)
if ((OP[3] & (1 << type1_regs[ i ])))
{
SP -= 4;
trace_input ("prepare", OP_PUSHPOP1, 0);
- /* Store the registers with lower number registers being placed at lower addresses. */
- for (i = 12; i--;)
+ /* Store the registers with lower number registers being placed at higher addresses. */
+ for (i = 0; i < 12; i++)
if ((OP[3] & (1 << type1_regs[ i ])))
{
SP -= 4;
trace_input ("prepare", OP_PUSHPOP1, 0);
- /* Store the registers with lower number registers being placed at lower addresses. */
- for (i = 12; i--;)
+ /* Store the registers with lower number registers being placed at higher addresses. */
+ for (i = 0; i < 12; i++)
if ((OP[3] & (1 << type1_regs[ i ])))
{
SP -= 4;
trace_input ("prepare", OP_PUSHPOP1, 0);
- /* Store the registers with lower number registers being placed at lower addresses. */
- for (i = 12; i--;)
+ /* Store the registers with lower number registers being placed at higher addresses. */
+ for (i = 0; i < 12; i++)
if ((OP[3] & (1 << type1_regs[ i ])))
{
SP -= 4;
trace_input ("prepare", OP_PUSHPOP1, 0);
- /* Store the registers with lower number registers being placed at lower addresses. */
- for (i = 12; i--;)
+ /* Store the registers with lower number registers being placed at higher addresses. */
+ for (i = 0; i < 12; i++)
if ((OP[3] & (1 << type1_regs[ i ])))
{
SP -= 4;
trace_input ("popmh", OP_PUSHPOP2, 0);
- /* Load the registers with lower number registers being retrieved from lower addresses. */
- for (i = 0; i++; i < 16)
- if ((OP[3] & (1 << type2_regs[ i ])))
- {
- State.regs[ i + 16 ] = load_mem (SP & ~ 3, 4);
- SP += 4;
- }
-
if (OP[3] & (1 << 19))
{
if ((PSW & PSW_NP) && ((PSW & PSW_EP) == 0))
SP += 8;
}
+ /* Load the registers with lower number registers being retrieved from higher addresses. */
+ for (i = 16; i--;)
+ if ((OP[3] & (1 << type2_regs[ i ])))
+ {
+ State.regs[ i + 16 ] = load_mem (SP & ~ 3, 4);
+ SP += 4;
+ }
+
trace_output (OP_PUSHPOP2);
return 4;
trace_input ("popml", OP_PUSHPOP3, 0);
- /* Load the registers with lower number registers being retrieved from lower addresses. */
- for (i = 0; i++; i < 15)
- if ((OP[3] & (1 << type3_regs[ i ])))
- {
- State.regs[ i + 1 ] = load_mem (SP & ~ 3, 4);
- SP += 4;
- }
-
- if (OP[3] & (1 << 3))
- {
- PSW = load_mem (SP & ~ 3, 4);
- SP += 4;
- }
-
if (OP[3] & (1 << 19))
{
if ((PSW & PSW_NP) && ((PSW & PSW_EP) == 0))
SP += 8;
}
+ if (OP[3] & (1 << 3))
+ {
+ PSW = load_mem (SP & ~ 3, 4);
+ SP += 4;
+ }
+
+ /* Load the registers with lower number registers being retrieved from higher addresses. */
+ for (i = 15; i--;)
+ if ((OP[3] & (1 << type3_regs[ i ])))
+ {
+ State.regs[ i + 1 ] = load_mem (SP & ~ 3, 4);
+ SP += 4;
+ }
+
trace_output (OP_PUSHPOP2);
}
trace_input ("pushmh", OP_PUSHPOP2, 0);
+ /* Store the registers with lower number registers being placed at higher addresses. */
+ for (i = 0; i < 16; i++)
+ if ((OP[3] & (1 << type2_regs[ i ])))
+ {
+ SP -= 4;
+ store_mem (SP & ~ 3, 4, State.regs[ i + 16 ]);
+ }
+
if (OP[3] & (1 << 19))
{
SP -= 8;
}
}
- /* Store the registers with lower number registers being placed at lower addresses. */
- for (i = 16; i--;)
- if ((OP[3] & (1 << type2_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP & ~ 3, 4, State.regs[ i + 16 ]);
- }
-
trace_output (OP_PUSHPOP2);
return 4;