net: hns3: Add configuration of TM QCN error event
authorJiaran Zhang <zhangjiaran@huawei.com>
Tue, 19 Oct 2021 14:16:28 +0000 (22:16 +0800)
committerDavid S. Miller <davem@davemloft.net>
Wed, 20 Oct 2021 10:38:11 +0000 (11:38 +0100)
Add configuration of interrupt type and fifo interrupt enable of TM QCN
error event if enabled, otherwise this event will not be reported when
there is error.

Fixes: d914971df022 ("net: hns3: remove redundant query in hclge_config_tm_hw_err_int()")
Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h

index bb9b026..93aa7f2 100644 (file)
@@ -1560,8 +1560,11 @@ static int hclge_config_tm_hw_err_int(struct hclge_dev *hdev, bool en)
 
        /* configure TM QCN hw errors */
        hclge_cmd_setup_basic_desc(&desc, HCLGE_TM_QCN_MEM_INT_CFG, false);
-       if (en)
+       desc.data[0] = cpu_to_le32(HCLGE_TM_QCN_ERR_INT_TYPE);
+       if (en) {
+               desc.data[0] |= cpu_to_le32(HCLGE_TM_QCN_FIFO_INT_EN);
                desc.data[1] = cpu_to_le32(HCLGE_TM_QCN_MEM_ERR_INT_EN);
+       }
 
        ret = hclge_cmd_send(&hdev->hw, &desc, 1);
        if (ret)
index 07987fb..d811eee 100644 (file)
@@ -50,6 +50,8 @@
 #define HCLGE_PPP_MPF_ECC_ERR_INT3_EN  0x003F
 #define HCLGE_PPP_MPF_ECC_ERR_INT3_EN_MASK     0x003F
 #define HCLGE_TM_SCH_ECC_ERR_INT_EN    0x3
+#define HCLGE_TM_QCN_ERR_INT_TYPE      0x29
+#define HCLGE_TM_QCN_FIFO_INT_EN       0xFFFF00
 #define HCLGE_TM_QCN_MEM_ERR_INT_EN    0xFFFFFF
 #define HCLGE_NCSI_ERR_INT_EN  0x3
 #define HCLGE_NCSI_ERR_INT_TYPE        0x9