clk: ti: dra7: add missing clkctrl register for SHA2 instance
authorTero Kristo <t-kristo@ti.com>
Mon, 7 Sep 2020 08:26:00 +0000 (11:26 +0300)
committerStephen Boyd <sboyd@kernel.org>
Tue, 22 Sep 2020 20:00:07 +0000 (13:00 -0700)
DRA7 SoC has two SHA instances. Add the clkctrl entry for the second
one.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Link: https://lore.kernel.org/r/20200907082600.454-4-t-kristo@ti.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/ti/clk-7xx.c
include/dt-bindings/clock/dra7.h

index b4cf578..4e27f88 100644 (file)
@@ -637,6 +637,7 @@ static const struct omap_clkctrl_reg_data dra7_l4sec_clkctrl_regs[] __initconst
        { DRA7_L4SEC_DES_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
        { DRA7_L4SEC_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "l4_root_clk_div" },
        { DRA7_L4SEC_SHAM_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
+       { DRA7_L4SEC_SHAM2_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
        { 0 },
 };
 
index 8cec5a1..5ec4137 100644 (file)
 #define DRA7_L4SEC_DES_CLKCTRL DRA7_L4SEC_CLKCTRL_INDEX(0x1b0)
 #define DRA7_L4SEC_RNG_CLKCTRL DRA7_L4SEC_CLKCTRL_INDEX(0x1c0)
 #define DRA7_L4SEC_SHAM_CLKCTRL        DRA7_L4SEC_CLKCTRL_INDEX(0x1c8)
+#define DRA7_L4SEC_SHAM2_CLKCTRL DRA7_L4SEC_CLKCTRL_INDEX(0x1f8)
 
 /* l4per2 clocks */
 #define DRA7_L4PER2_CLKCTRL_OFFSET     0xc