drm/amdgpu:imple mqd soft ini/fini
authorMonk Liu <Monk.Liu@amd.com>
Mon, 6 Feb 2017 08:28:53 +0000 (16:28 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:52:42 +0000 (23:52 -0400)
this is for SRIOV fix:
mqd soft init/fini will be invoked by sw_init to
allocate BO for compute MQD resource, instead of
original scheme that hw_init allocates MQD.

because if hw_init allocates MQD, then resume will
allocate MQD, and that lead to memory leak after
driver recovered from hang.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

index 505db77..1e16b72 100644 (file)
@@ -659,6 +659,8 @@ static u32 gfx_v8_0_get_csb_size(struct amdgpu_device *adev);
 static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev);
 static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring *ring, uint64_t addr);
 static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring *ring, uint64_t addr);
+static int gfx_v8_0_compute_mqd_soft_init(struct amdgpu_device *adev);
+static void gfx_v8_0_compute_mqd_soft_fini(struct amdgpu_device *adev);
 
 static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
 {
@@ -7330,3 +7332,53 @@ static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring *ring, uint64_t c
        amdgpu_ring_write(ring, upper_32_bits(de_payload_addr));
        amdgpu_ring_write_multiple(ring, (void *)&de_payload, cnt_de - 2);
 }
+
+/* create MQD for each compute queue */
+static int gfx_v8_0_compute_mqd_soft_init(struct amdgpu_device *adev)
+{
+       struct amdgpu_ring *ring = NULL;
+       int r, i;
+
+       /* create MQD for KIQ */
+       ring = &adev->gfx.kiq.ring;
+       if (!ring->mqd_obj) {
+               r = amdgpu_bo_create_kernel(adev, sizeof(struct vi_mqd), PAGE_SIZE,
+                                               AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
+                                               &ring->mqd_gpu_addr, (void **)&ring->mqd_ptr);
+               if (r) {
+                       dev_warn(adev->dev, "failed to create ring mqd ob (%d)", r);
+                       return r;
+               }
+       }
+
+       /* create MQD for each KCQ */
+       for (i = 0; i < adev->gfx.num_compute_rings; i++)
+       {
+               ring = &adev->gfx.compute_ring[i];
+               if (!ring->mqd_obj) {
+                       r = amdgpu_bo_create_kernel(adev, sizeof(struct vi_mqd), PAGE_SIZE,
+                                                       AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,
+                                                       &ring->mqd_gpu_addr, (void **)&ring->mqd_ptr);
+                       if (r) {
+                               dev_warn(adev->dev, "failed to create ring mqd ob (%d)", r);
+                               return r;
+                       }
+               }
+       }
+
+       return 0;
+}
+
+static void gfx_v8_0_compute_mqd_soft_fini(struct amdgpu_device *adev)
+{
+       struct amdgpu_ring *ring = NULL;
+       int i;
+
+       for (i = 0; i < adev->gfx.num_compute_rings; i++) {
+               ring = &adev->gfx.compute_ring[i];
+               amdgpu_bo_free_kernel(&ring->mqd_obj, &ring->mqd_gpu_addr, (void **)&ring->mqd_ptr);
+       }
+
+       ring = &adev->gfx.kiq.ring;
+       amdgpu_bo_free_kernel(&ring->mqd_obj, &ring->mqd_gpu_addr, (void **)&ring->mqd_ptr);
+}
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