[TypePromotion] Fix sext vs zext in promoted constant
authorDavid Green <david.green@arm.com>
Wed, 11 May 2022 09:47:44 +0000 (10:47 +0100)
committerDavid Green <david.green@arm.com>
Wed, 11 May 2022 09:47:44 +0000 (10:47 +0100)
As pointed out in #55342, given non-canonical IR with multiple
constants, we check the second operand in isSafeWrap, but can promote
both with sext. Fix that as suggested by @craig.topper by ensuring we
only extend the second constant if multiple are present.

Fixes #55342

Differential Revision: https://reviews.llvm.org/D125294

llvm/lib/CodeGen/TypePromotion.cpp
llvm/test/Transforms/TypePromotion/ARM/icmps.ll

index 6b991aa..fa7c797 100644 (file)
@@ -484,7 +484,7 @@ void IRPromoter::PromoteTree() {
         continue;
 
       if (auto *Const = dyn_cast<ConstantInt>(Op)) {
-        Constant *NewConst = SafeWrap.contains(I)
+        Constant *NewConst = (SafeWrap.contains(I) && i == 1)
                                  ? ConstantExpr::getSExt(Const, ExtTy)
                                  : ConstantExpr::getZExt(Const, ExtTy);
         I->setOperand(i, NewConst);
index 7aa1e7d..880ea18 100644 (file)
@@ -348,3 +348,16 @@ if.then:
 if.end:
   ret void
 }
+
+define i32 @degenerateicmp() {
+; CHECK-LABEL: @degenerateicmp(
+; CHECK-NEXT:    [[TMP1:%.*]] = sub i32 190, 0
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ugt i32 225, [[TMP1]]
+; CHECK-NEXT:    [[TMP3:%.*]] = select i1 [[TMP2]], i32 1, i32 0
+; CHECK-NEXT:    ret i32 [[TMP3]]
+;
+  %1 = sub i8 -66, 0
+  %2 = icmp ugt i8 -31, %1
+  %3 = select i1 %2, i32 1, i32 0
+  ret i32 %3
+}