drm/i915/guc: Convert guc_mmio_reg_state_init to iosys_map

Now that the regset list is prepared, convert guc_mmio_reg_state_init()
to use iosys_map to copy the array to the final location and
initialize additional fields in ads.reg_state_list.

v2: Just use an offset instead of temporary iosys_map.

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220216174147.3073235-15-lucas.demarchi@intel.com

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index ec0ccdf..90cbb93 100644 (file)
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -383,40 +383,44 @@ fail_regset_init:
        return ret;
 }
 
-static void guc_mmio_reg_state_init(struct intel_guc *guc,
-                                   struct __guc_ads_blob *blob)
+static void guc_mmio_reg_state_init(struct intel_guc *guc)
 {
        struct intel_gt *gt = guc_to_gt(guc);
        struct intel_engine_cs *engine;
-       struct guc_mmio_reg *ads_registers;
        enum intel_engine_id id;
        u32 addr_ggtt, offset;
 
        offset = guc_ads_regset_offset(guc);
        addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
-       ads_registers = (struct guc_mmio_reg *)(((u8 *)blob) + offset);
 
-       memcpy(ads_registers, guc->ads_regset, guc->ads_regset_size);
+       iosys_map_memcpy_to(&guc->ads_map, offset, guc->ads_regset,
+                           guc->ads_regset_size);
 
        for_each_engine(engine, gt, id) {
                u32 count = guc->ads_regset_count[id];
-               struct guc_mmio_reg_set *ads_reg_set;
                u8 guc_class;
 
                /* Class index is checked in class converter */
                GEM_BUG_ON(engine->instance >= GUC_MAX_INSTANCES_PER_CLASS);
 
                guc_class = engine_class_to_guc_class(engine->class);
-               ads_reg_set = &blob->ads.reg_state_list[guc_class][engine->instance];
 
                if (!count) {
-                       ads_reg_set->address = 0;
-                       ads_reg_set->count = 0;
+                       ads_blob_write(guc,
+                                      ads.reg_state_list[guc_class][engine->instance].address,
+                                      0);
+                       ads_blob_write(guc,
+                                      ads.reg_state_list[guc_class][engine->instance].count,
+                                      0);
                        continue;
                }
 
-               ads_reg_set->address = addr_ggtt;
-               ads_reg_set->count = count;
+               ads_blob_write(guc,
+                              ads.reg_state_list[guc_class][engine->instance].address,
+                              addr_ggtt);
+               ads_blob_write(guc,
+                              ads.reg_state_list[guc_class][engine->instance].count,
+                              count);
 
                addr_ggtt += count * sizeof(struct guc_mmio_reg);
        }
@@ -643,7 +647,7 @@ static void __guc_ads_init(struct intel_guc *guc)
        blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
 
        /* MMIO save/restore list */
-       guc_mmio_reg_state_init(guc, blob);
+       guc_mmio_reg_state_init(guc);
 
        /* Private Data */
        blob->ads.private_data = base + guc_ads_private_data_offset(guc);