fi
fi
# sysfs may not exist as the 'error' is a new interface in 3.11
+
+function drmtest_skip_on_simulation()
+{
+ [ -n "$INTEL_SIMULATION" ] && exit 77
+}
+
+drmtest_skip_on_simulation
int i;
char *ptr;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
char *ptr;
drm_intel_bo *load_bo;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
int i;
char *ptr;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
int i;
char *ptr;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
{
int fd;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
create0(fd);
bool skipped_all = true;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
srandom(0xdeadbeef);
int i, loop, fd;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
fd = drm_open_any();
int count;
drm_intel_bo *sample_batch_bo;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
uint32_t devid;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
fd = drm_open_any();
devid = intel_get_drm_devid(fd);
uint32_t ctx_id;
int ret, fd;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
ctx_id = context_create(fd);
uint32_t batch[2] = {MI_BATCH_BUFFER_END};
uint32_t ctx_id;
int fd;
+
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
ctx_id = context_create(fd);
int ret, fd;
struct local_drm_i915_gem_context_create create;
+ drmtest_skip_on_simulation();
+
create.ctx_id = rand();
create.pad = rand();
uint32_t batch[2] = {0, MI_BATCH_BUFFER_END};
uint32_t ctx_id;
int fd;
+
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
ctx_id = context_create(fd);
int fd;
int devid;
+ drmtest_skip_on_simulation();
+
if (argc != 1) {
fprintf(stderr, "usage: %s\n", argv[0]);
exit(-1);
int num_rings;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
fd = drm_open_any();
devid = intel_get_drm_devid(fd);
uint32_t reloc_ofs;
unsigned batch_size;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
for (batch_size = BATCH_SIZE/4; batch_size <= BATCH_SIZE; batch_size += 4096) {
{
int i;
+ drmtest_skip_on_simulation();
+
if (argc > 1) {
for (i = 1; i < argc; i++) {
int object_size = atoi(argv[i]);
{ .name = NULL },
}, *p;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
for (n = 0; n < MAX_NUM_EXEC; n++) {
main(int argc, char **argv)
{
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
if (drmtest_run_subtest("bo-write-verify-none"))
assert (run_test(0, bo_write_verify, I915_TILING_NONE, 80) == 0);
int
main(int argc, char **argv)
{
- int fd = drm_open_any();
- int num_fences = get_num_fences(fd);
- uint32_t devid = intel_get_drm_devid(fd);
+ int fd;
+ int num_fences;
+ uint32_t devid;
+
+ drmtest_skip_on_simulation();
+
+ fd = drm_open_any();
+ num_fences = get_num_fences(fd);
+ devid = intel_get_drm_devid(fd);
assert(num_fences <= MAX_FENCES);
int fd, loop, i;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
fd = drm_open_any();
uint32_t *ptr;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
handle = gem_create(fd, OBJ_SIZE);
int loop, i, tiling;
int fd;
+ drmtest_skip_on_simulation();
+
if (argc > 1)
size = atoi(argv[1]);
if (size == 0) {
unsigned long pitch, act_size;
int fd, i, devid;
+ drmtest_skip_on_simulation();
+
memset(blob, 'A', sizeof(blob));
fd = drm_open_any();
{
int fd;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
test_large_object(fd);
{
int fd, count = 0;
+ drmtest_skip_on_simulation();
+
drmtest_subtest_init(argc, argv);
fd = drm_open_any();
uint32_t handle;
int fd, i;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
handle = gem_create(fd, 4096);
{
int fd, i;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
/* we have 32bit of address space, so try to fit one MB more
srandom(0xdeadbeef);
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
fd = drm_open_any();
uint32_t *handle, *offset;
int fd, i;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
if (!test_can_pin(fd))
uint32_t *src, dst;
int fd, count;
+ drmtest_skip_on_simulation();
+
if (argc > 1)
object_size = atoi(argv[1]);
if (object_size == 0)
int ret;
int handle;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
handle = gem_create(fd, OBJECT_SIZE);
int fd, i, ring;
uint32_t test;
+ drmtest_skip_on_simulation();
+
memset(blob, 'A', sizeof(blob));
fd = drm_open_any();
uint32_t start = 0;
int i, j, fd, count;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
render_copy = get_render_copyfunc(intel_get_drm_devid(fd));
int fd, fails = 0;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
fd = drm_open_any();
int wcount = 0;
int r = -1;
+ drmtest_skip_on_simulation();
+
parse_options(argc, argv);
card_index = drm_get_card(0);
uint32_t tiling, tiling_after;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
for (i = 0; i < 1024*256; i++)
data[i] = i;
bool tiling_changed;
int tile_height;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
if (IS_GEN2(intel_get_drm_devid(fd)))
int i;
uint32_t handle;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
for (i = 0; i < OBJECT_SIZE/4; i++)
int fd;
int devid;
+ drmtest_skip_on_simulation();
+
if (argc != 1) {
fprintf(stderr, "usage: %s\n", argv[0]);
exit(-1);
unsigned long pitch = 0;
int r;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
assert(fd >= 0);
uint32_t start = 0;
int fd, i, count;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
count = 3 * gem_aperture_size(fd) / (1024*1024) / 2;
if (count > intel_get_total_ram_mb() * 9 / 10) {
uint32_t tiling_mode = I915_TILING_X;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
srandom(0xdeadbeef);
uint32_t handle;
uint32_t devid;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
handle = create_bo(fd);
uint32_t handle, handle_target;
int count;
+ drmtest_skip_on_simulation();
fd = drm_open_any();
count = intel_get_total_ram_mb() * 9 / 10;
int count;
current_tiling_mode = I915_TILING_X;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
/* need slightly more than total ram */
count = intel_get_total_ram_mb() * 11 / 10;
drm_intel_bo *busy_bo, *test_bo;
uint32_t tiling = I915_TILING_X;
+ drmtest_skip_on_simulation();
+
for (i = 0; i < 1024*256; i++)
data[i] = i;
{
int fd, i;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
uint32_t start = 0;
int i, fd, count;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
if (!has_vmap(fd)) {
bool done = false;
int i, iter = 1;
+ drmtest_skip_on_simulation();
+
fd = drm_open_any();
bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
int i;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
fd = drm_open_any();
int i;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
drm_fd = drm_open_any();
int i;
drmtest_subtest_init(argc, argv);
+ drmtest_skip_on_simulation();
if (!drmtest_only_list_subtests()) {
drm_fd = drm_open_any();
#include "intel_bufmgr.h"
#include "intel_gpu_tools.h"
#include "intel_batchbuffer.h"
+#include "drmtest.h"
int intel_fd = -1, udl_fd = -1;
drm_intel_bufmgr *bufmgr;
{
int ret;
+ drmtest_skip_on_simulation();
+
ret = find_and_open_devices();
if (ret < 0)
return ret;
# we sometimes take a *really* long time. So let's just check for some reasonable timing here
#
+[ -n "$INTEL_SIMULATION" ] && exit 77
+
TIME1=$(date +%s%N)
cat $(find /sys/devices/|grep drm | grep /status) > /dev/null
TIME2=$(date +%s%N)
FILE *file;
int diff;
+ drmtest_skip_on_simulation();
+
/* Use drm_open_any to verify device existence */
fd = drm_open_any();
close(fd);
struct junk *junk = stuff;
int fd, ret;
+ drmtest_skip_on_simulation();
+
if (argc > 1)
verbose++;
GMainLoop *mainloop;
float force_clock;
+ drmtest_skip_on_simulation();
+
enter_exec_path( argv );
opterr = 0;