const char *path);
/**
- * \brief Loads an object file in its own context.
+ * Loads an object file in its own context.
*
* Loads an object file in its own LLVMContext. This function call is
* thread-safe. However, modules created this way should not be merged into an
const char *path);
/**
- * \brief Loads an object file in the codegen context.
+ * Loads an object file in the codegen context.
*
* Loads an object file into the same context as \c cg. The module is safe to
* add using \a lto_codegen_add_module().
lto_codegen_create(void);
/**
- * \brief Instantiate a code generator in its own context.
+ * Instantiate a code generator in its own context.
*
* Instantiates a code generator in its own context. Modules added via \a
* lto_codegen_add_module() must have all been created in the same context,
lto_bool_t ShouldInternalize);
/**
- * \brief Set whether to embed uselists in bitcode.
+ * Set whether to embed uselists in bitcode.
*
* Sets whether \a lto_codegen_write_merged_modules() should embed uselists in
* output bitcode. This should be turned on for all -save-temps output.
return X;
}
-/// \brief Returns the negated value of the argument.
+/// Returns the negated value of the argument.
inline APFloat neg(APFloat X) {
X.changeSign();
return X;
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a class to represent arbitrary precision
+/// This file implements a class to represent arbitrary precision
/// integral constant values and operations on them.
///
//===----------------------------------------------------------------------===//
// APInt Class
//===----------------------------------------------------------------------===//
-/// \brief Class for arbitrary precision integers.
+/// Class for arbitrary precision integers.
///
/// APInt is a functional replacement for common case unsigned integer type like
/// "unsigned", "unsigned long" or "uint64_t", but also allows non-byte-width
friend class APSInt;
- /// \brief Fast internal constructor
+ /// Fast internal constructor
///
/// This constructor is used only internally for speed of construction of
/// temporaries. It is unsafe for general use so it is not public.
U.pVal = val;
}
- /// \brief Determine if this APInt just has one word to store value.
+ /// Determine if this APInt just has one word to store value.
///
/// \returns true if the number of bits <= 64, false otherwise.
bool isSingleWord() const { return BitWidth <= APINT_BITS_PER_WORD; }
- /// \brief Determine which word a bit is in.
+ /// Determine which word a bit is in.
///
/// \returns the word position for the specified bit position.
static unsigned whichWord(unsigned bitPosition) {
return bitPosition / APINT_BITS_PER_WORD;
}
- /// \brief Determine which bit in a word a bit is in.
+ /// Determine which bit in a word a bit is in.
///
/// \returns the bit position in a word for the specified bit position
/// in the APInt.
return bitPosition % APINT_BITS_PER_WORD;
}
- /// \brief Get a single bit mask.
+ /// Get a single bit mask.
///
/// \returns a uint64_t with only bit at "whichBit(bitPosition)" set
/// This method generates and returns a uint64_t (word) mask for a single
return 1ULL << whichBit(bitPosition);
}
- /// \brief Clear unused high order bits
+ /// Clear unused high order bits
///
/// This method is used internally to clear the top "N" bits in the high order
/// word that are not used by the APInt. This is needed after the most
return *this;
}
- /// \brief Get the word corresponding to a bit position
+ /// Get the word corresponding to a bit position
/// \returns the corresponding word for the specified bit position.
uint64_t getWord(unsigned bitPosition) const {
return isSingleWord() ? U.VAL : U.pVal[whichWord(bitPosition)];
/// value of any bits upon return. Caller should populate the bits after.
void reallocate(unsigned NewBitWidth);
- /// \brief Convert a char array into an APInt
+ /// Convert a char array into an APInt
///
/// \param radix 2, 8, 10, 16, or 36
/// Converts a string into a number. The string must be non-empty
/// result to hold the input.
void fromString(unsigned numBits, StringRef str, uint8_t radix);
- /// \brief An internal division function for dividing APInts.
+ /// An internal division function for dividing APInts.
///
/// This is used by the toString method to divide by the radix. It simply
/// provides a more convenient form of divide for internal use since KnuthDiv
/// \name Constructors
/// @{
- /// \brief Create a new APInt of numBits width, initialized as val.
+ /// Create a new APInt of numBits width, initialized as val.
///
/// If isSigned is true then val is treated as if it were a signed value
/// (i.e. as an int64_t) and the appropriate sign extension to the bit width
}
}
- /// \brief Construct an APInt of numBits width, initialized as bigVal[].
+ /// Construct an APInt of numBits width, initialized as bigVal[].
///
/// Note that bigVal.size() can be smaller or larger than the corresponding
/// bit width but any extraneous bits will be dropped.
/// constructor.
APInt(unsigned numBits, unsigned numWords, const uint64_t bigVal[]);
- /// \brief Construct an APInt from a string representation.
+ /// Construct an APInt from a string representation.
///
/// This constructor interprets the string \p str in the given radix. The
/// interpretation stops when the first character that is not suitable for the
initSlowCase(that);
}
- /// \brief Move Constructor.
+ /// Move Constructor.
APInt(APInt &&that) : BitWidth(that.BitWidth) {
memcpy(&U, &that.U, sizeof(U));
that.BitWidth = 0;
}
- /// \brief Destructor.
+ /// Destructor.
~APInt() {
if (needsCleanup())
delete[] U.pVal;
}
- /// \brief Default constructor that creates an uninteresting APInt
+ /// Default constructor that creates an uninteresting APInt
/// representing a 1-bit zero value.
///
/// This is useful for object deserialization (pair this with the static
/// method Read).
explicit APInt() : BitWidth(1) { U.VAL = 0; }
- /// \brief Returns whether this instance allocated memory.
+ /// Returns whether this instance allocated memory.
bool needsCleanup() const { return !isSingleWord(); }
/// Used to insert APInt objects, or objects that contain APInt objects, into
/// \name Value Tests
/// @{
- /// \brief Determine sign of this APInt.
+ /// Determine sign of this APInt.
///
/// This tests the high bit of this APInt to determine if it is set.
///
/// \returns true if this APInt is negative, false otherwise
bool isNegative() const { return (*this)[BitWidth - 1]; }
- /// \brief Determine if this APInt Value is non-negative (>= 0)
+ /// Determine if this APInt Value is non-negative (>= 0)
///
/// This tests the high bit of the APInt to determine if it is unset.
bool isNonNegative() const { return !isNegative(); }
- /// \brief Determine if sign bit of this APInt is set.
+ /// Determine if sign bit of this APInt is set.
///
/// This tests the high bit of this APInt to determine if it is set.
///
/// \returns true if this APInt has its sign bit set, false otherwise.
bool isSignBitSet() const { return (*this)[BitWidth-1]; }
- /// \brief Determine if sign bit of this APInt is clear.
+ /// Determine if sign bit of this APInt is clear.
///
/// This tests the high bit of this APInt to determine if it is clear.
///
/// \returns true if this APInt has its sign bit clear, false otherwise.
bool isSignBitClear() const { return !isSignBitSet(); }
- /// \brief Determine if this APInt Value is positive.
+ /// Determine if this APInt Value is positive.
///
/// This tests if the value of this APInt is positive (> 0). Note
/// that 0 is not a positive value.
/// \returns true if this APInt is positive.
bool isStrictlyPositive() const { return isNonNegative() && !isNullValue(); }
- /// \brief Determine if all bits are set
+ /// Determine if all bits are set
///
/// This checks to see if the value has all bits of the APInt are set or not.
bool isAllOnesValue() const {
return countTrailingOnesSlowCase() == BitWidth;
}
- /// \brief Determine if all bits are clear
+ /// Determine if all bits are clear
///
/// This checks to see if the value has all bits of the APInt are clear or
/// not.
bool isNullValue() const { return !*this; }
- /// \brief Determine if this is a value of 1.
+ /// Determine if this is a value of 1.
///
/// This checks to see if the value of this APInt is one.
bool isOneValue() const {
return countLeadingZerosSlowCase() == BitWidth - 1;
}
- /// \brief Determine if this is the largest unsigned value.
+ /// Determine if this is the largest unsigned value.
///
/// This checks to see if the value of this APInt is the maximum unsigned
/// value for the APInt's bit width.
bool isMaxValue() const { return isAllOnesValue(); }
- /// \brief Determine if this is the largest signed value.
+ /// Determine if this is the largest signed value.
///
/// This checks to see if the value of this APInt is the maximum signed
/// value for the APInt's bit width.
return !isNegative() && countTrailingOnesSlowCase() == BitWidth - 1;
}
- /// \brief Determine if this is the smallest unsigned value.
+ /// Determine if this is the smallest unsigned value.
///
/// This checks to see if the value of this APInt is the minimum unsigned
/// value for the APInt's bit width.
bool isMinValue() const { return isNullValue(); }
- /// \brief Determine if this is the smallest signed value.
+ /// Determine if this is the smallest signed value.
///
/// This checks to see if the value of this APInt is the minimum signed
/// value for the APInt's bit width.
return isNegative() && countTrailingZerosSlowCase() == BitWidth - 1;
}
- /// \brief Check if this APInt has an N-bits unsigned integer value.
+ /// Check if this APInt has an N-bits unsigned integer value.
bool isIntN(unsigned N) const {
assert(N && "N == 0 ???");
return getActiveBits() <= N;
}
- /// \brief Check if this APInt has an N-bits signed integer value.
+ /// Check if this APInt has an N-bits signed integer value.
bool isSignedIntN(unsigned N) const {
assert(N && "N == 0 ???");
return getMinSignedBits() <= N;
}
- /// \brief Check if this APInt's value is a power of two greater than zero.
+ /// Check if this APInt's value is a power of two greater than zero.
///
/// \returns true if the argument APInt value is a power of two > 0.
bool isPowerOf2() const {
return countPopulationSlowCase() == 1;
}
- /// \brief Check if the APInt's value is returned by getSignMask.
+ /// Check if the APInt's value is returned by getSignMask.
///
/// \returns true if this is the value returned by getSignMask.
bool isSignMask() const { return isMinSignedValue(); }
- /// \brief Convert APInt to a boolean value.
+ /// Convert APInt to a boolean value.
///
/// This converts the APInt to a boolean value as a test against zero.
bool getBoolValue() const { return !!*this; }
return ugt(Limit) ? Limit : getZExtValue();
}
- /// \brief Check if the APInt consists of a repeated bit pattern.
+ /// Check if the APInt consists of a repeated bit pattern.
///
/// e.g. 0x01010101 satisfies isSplat(8).
/// \param SplatSizeInBits The size of the pattern in bits. Must divide bit
return (Ones > 0) && ((Ones + countLeadingZerosSlowCase()) == BitWidth);
}
- /// \brief Return true if this APInt value contains a sequence of ones with
+ /// Return true if this APInt value contains a sequence of ones with
/// the remainder zero.
bool isShiftedMask() const {
if (isSingleWord())
/// \name Value Generators
/// @{
- /// \brief Gets maximum unsigned value of APInt for specific bit width.
+ /// Gets maximum unsigned value of APInt for specific bit width.
static APInt getMaxValue(unsigned numBits) {
return getAllOnesValue(numBits);
}
- /// \brief Gets maximum signed value of APInt for a specific bit width.
+ /// Gets maximum signed value of APInt for a specific bit width.
static APInt getSignedMaxValue(unsigned numBits) {
APInt API = getAllOnesValue(numBits);
API.clearBit(numBits - 1);
return API;
}
- /// \brief Gets minimum unsigned value of APInt for a specific bit width.
+ /// Gets minimum unsigned value of APInt for a specific bit width.
static APInt getMinValue(unsigned numBits) { return APInt(numBits, 0); }
- /// \brief Gets minimum signed value of APInt for a specific bit width.
+ /// Gets minimum signed value of APInt for a specific bit width.
static APInt getSignedMinValue(unsigned numBits) {
APInt API(numBits, 0);
API.setBit(numBits - 1);
return API;
}
- /// \brief Get the SignMask for a specific bit width.
+ /// Get the SignMask for a specific bit width.
///
/// This is just a wrapper function of getSignedMinValue(), and it helps code
/// readability when we want to get a SignMask.
return getSignedMinValue(BitWidth);
}
- /// \brief Get the all-ones value.
+ /// Get the all-ones value.
///
/// \returns the all-ones value for an APInt of the specified bit-width.
static APInt getAllOnesValue(unsigned numBits) {
return APInt(numBits, WORD_MAX, true);
}
- /// \brief Get the '0' value.
+ /// Get the '0' value.
///
/// \returns the '0' value for an APInt of the specified bit-width.
static APInt getNullValue(unsigned numBits) { return APInt(numBits, 0); }
- /// \brief Compute an APInt containing numBits highbits from this APInt.
+ /// Compute an APInt containing numBits highbits from this APInt.
///
/// Get an APInt with the same BitWidth as this APInt, just zero mask
/// the low bits and right shift to the least significant bit.
/// \returns the high "numBits" bits of this APInt.
APInt getHiBits(unsigned numBits) const;
- /// \brief Compute an APInt containing numBits lowbits from this APInt.
+ /// Compute an APInt containing numBits lowbits from this APInt.
///
/// Get an APInt with the same BitWidth as this APInt, just zero mask
/// the high bits.
/// \returns the low "numBits" bits of this APInt.
APInt getLoBits(unsigned numBits) const;
- /// \brief Return an APInt with exactly one bit set in the result.
+ /// Return an APInt with exactly one bit set in the result.
static APInt getOneBitSet(unsigned numBits, unsigned BitNo) {
APInt Res(numBits, 0);
Res.setBit(BitNo);
return Res;
}
- /// \brief Get a value with a block of bits set.
+ /// Get a value with a block of bits set.
///
/// Constructs an APInt value that has a contiguous range of bits set. The
/// bits from loBit (inclusive) to hiBit (exclusive) will be set. All other
return Res;
}
- /// \brief Get a value with upper bits starting at loBit set.
+ /// Get a value with upper bits starting at loBit set.
///
/// Constructs an APInt value that has a contiguous range of bits set. The
/// bits from loBit (inclusive) to numBits (exclusive) will be set. All other
return Res;
}
- /// \brief Get a value with high bits set
+ /// Get a value with high bits set
///
/// Constructs an APInt value that has the top hiBitsSet bits set.
///
return Res;
}
- /// \brief Get a value with low bits set
+ /// Get a value with low bits set
///
/// Constructs an APInt value that has the bottom loBitsSet bits set.
///
return Res;
}
- /// \brief Return a value containing V broadcasted over NewLen bits.
+ /// Return a value containing V broadcasted over NewLen bits.
static APInt getSplat(unsigned NewLen, const APInt &V);
- /// \brief Determine if two APInts have the same value, after zero-extending
+ /// Determine if two APInts have the same value, after zero-extending
/// one of them (if needed!) to ensure that the bit-widths match.
static bool isSameValue(const APInt &I1, const APInt &I2) {
if (I1.getBitWidth() == I2.getBitWidth())
return I1.zext(I2.getBitWidth()) == I2;
}
- /// \brief Overload to compute a hash_code for an APInt value.
+ /// Overload to compute a hash_code for an APInt value.
friend hash_code hash_value(const APInt &Arg);
/// This function returns a pointer to the internal storage of the APInt.
/// \name Unary Operators
/// @{
- /// \brief Postfix increment operator.
+ /// Postfix increment operator.
///
/// Increments *this by 1.
///
return API;
}
- /// \brief Prefix increment operator.
+ /// Prefix increment operator.
///
/// \returns *this incremented by one
APInt &operator++();
- /// \brief Postfix decrement operator.
+ /// Postfix decrement operator.
///
/// Decrements *this by 1.
///
return API;
}
- /// \brief Prefix decrement operator.
+ /// Prefix decrement operator.
///
/// \returns *this decremented by one.
APInt &operator--();
- /// \brief Logical negation operator.
+ /// Logical negation operator.
///
/// Performs logical negation operation on this APInt.
///
/// \name Assignment Operators
/// @{
- /// \brief Copy assignment operator.
+ /// Copy assignment operator.
///
/// \returns *this after assignment of RHS.
APInt &operator=(const APInt &RHS) {
return *this;
}
- /// \brief Assignment operator.
+ /// Assignment operator.
///
/// The RHS value is assigned to *this. If the significant bits in RHS exceed
/// the bit width, the excess bits are truncated. If the bit width is larger
return *this;
}
- /// \brief Bitwise AND assignment operator.
+ /// Bitwise AND assignment operator.
///
/// Performs a bitwise AND operation on this APInt and RHS. The result is
/// assigned to *this.
return *this;
}
- /// \brief Bitwise AND assignment operator.
+ /// Bitwise AND assignment operator.
///
/// Performs a bitwise AND operation on this APInt and RHS. RHS is
/// logically zero-extended or truncated to match the bit-width of
return *this;
}
- /// \brief Bitwise OR assignment operator.
+ /// Bitwise OR assignment operator.
///
/// Performs a bitwise OR operation on this APInt and RHS. The result is
/// assigned *this;
return *this;
}
- /// \brief Bitwise OR assignment operator.
+ /// Bitwise OR assignment operator.
///
/// Performs a bitwise OR operation on this APInt and RHS. RHS is
/// logically zero-extended or truncated to match the bit-width of
return *this;
}
- /// \brief Bitwise XOR assignment operator.
+ /// Bitwise XOR assignment operator.
///
/// Performs a bitwise XOR operation on this APInt and RHS. The result is
/// assigned to *this.
return *this;
}
- /// \brief Bitwise XOR assignment operator.
+ /// Bitwise XOR assignment operator.
///
/// Performs a bitwise XOR operation on this APInt and RHS. RHS is
/// logically zero-extended or truncated to match the bit-width of
return *this;
}
- /// \brief Multiplication assignment operator.
+ /// Multiplication assignment operator.
///
/// Multiplies this APInt by RHS and assigns the result to *this.
///
APInt &operator*=(const APInt &RHS);
APInt &operator*=(uint64_t RHS);
- /// \brief Addition assignment operator.
+ /// Addition assignment operator.
///
/// Adds RHS to *this and assigns the result to *this.
///
APInt &operator+=(const APInt &RHS);
APInt &operator+=(uint64_t RHS);
- /// \brief Subtraction assignment operator.
+ /// Subtraction assignment operator.
///
/// Subtracts RHS from *this and assigns the result to *this.
///
APInt &operator-=(const APInt &RHS);
APInt &operator-=(uint64_t RHS);
- /// \brief Left-shift assignment function.
+ /// Left-shift assignment function.
///
/// Shifts *this left by shiftAmt and assigns the result to *this.
///
return *this;
}
- /// \brief Left-shift assignment function.
+ /// Left-shift assignment function.
///
/// Shifts *this left by shiftAmt and assigns the result to *this.
///
/// \name Binary Operators
/// @{
- /// \brief Multiplication operator.
+ /// Multiplication operator.
///
/// Multiplies this APInt by RHS and returns the result.
APInt operator*(const APInt &RHS) const;
- /// \brief Left logical shift operator.
+ /// Left logical shift operator.
///
/// Shifts this APInt left by \p Bits and returns the result.
APInt operator<<(unsigned Bits) const { return shl(Bits); }
- /// \brief Left logical shift operator.
+ /// Left logical shift operator.
///
/// Shifts this APInt left by \p Bits and returns the result.
APInt operator<<(const APInt &Bits) const { return shl(Bits); }
- /// \brief Arithmetic right-shift function.
+ /// Arithmetic right-shift function.
///
/// Arithmetic right-shift this APInt by shiftAmt.
APInt ashr(unsigned ShiftAmt) const {
ashrSlowCase(ShiftAmt);
}
- /// \brief Logical right-shift function.
+ /// Logical right-shift function.
///
/// Logical right-shift this APInt by shiftAmt.
APInt lshr(unsigned shiftAmt) const {
lshrSlowCase(ShiftAmt);
}
- /// \brief Left-shift function.
+ /// Left-shift function.
///
/// Left-shift this APInt by shiftAmt.
APInt shl(unsigned shiftAmt) const {
return R;
}
- /// \brief Rotate left by rotateAmt.
+ /// Rotate left by rotateAmt.
APInt rotl(unsigned rotateAmt) const;
- /// \brief Rotate right by rotateAmt.
+ /// Rotate right by rotateAmt.
APInt rotr(unsigned rotateAmt) const;
- /// \brief Arithmetic right-shift function.
+ /// Arithmetic right-shift function.
///
/// Arithmetic right-shift this APInt by shiftAmt.
APInt ashr(const APInt &ShiftAmt) const {
/// Arithmetic right-shift this APInt by shiftAmt in place.
void ashrInPlace(const APInt &shiftAmt);
- /// \brief Logical right-shift function.
+ /// Logical right-shift function.
///
/// Logical right-shift this APInt by shiftAmt.
APInt lshr(const APInt &ShiftAmt) const {
/// Logical right-shift this APInt by ShiftAmt in place.
void lshrInPlace(const APInt &ShiftAmt);
- /// \brief Left-shift function.
+ /// Left-shift function.
///
/// Left-shift this APInt by shiftAmt.
APInt shl(const APInt &ShiftAmt) const {
return R;
}
- /// \brief Rotate left by rotateAmt.
+ /// Rotate left by rotateAmt.
APInt rotl(const APInt &rotateAmt) const;
- /// \brief Rotate right by rotateAmt.
+ /// Rotate right by rotateAmt.
APInt rotr(const APInt &rotateAmt) const;
- /// \brief Unsigned division operation.
+ /// Unsigned division operation.
///
/// Perform an unsigned divide operation on this APInt by RHS. Both this and
/// RHS are treated as unsigned quantities for purposes of this division.
APInt udiv(const APInt &RHS) const;
APInt udiv(uint64_t RHS) const;
- /// \brief Signed division function for APInt.
+ /// Signed division function for APInt.
///
/// Signed divide this APInt by APInt RHS.
APInt sdiv(const APInt &RHS) const;
APInt sdiv(int64_t RHS) const;
- /// \brief Unsigned remainder operation.
+ /// Unsigned remainder operation.
///
/// Perform an unsigned remainder operation on this APInt with RHS being the
/// divisor. Both this and RHS are treated as unsigned quantities for purposes
APInt urem(const APInt &RHS) const;
uint64_t urem(uint64_t RHS) const;
- /// \brief Function for signed remainder operation.
+ /// Function for signed remainder operation.
///
/// Signed remainder operation on APInt.
APInt srem(const APInt &RHS) const;
int64_t srem(int64_t RHS) const;
- /// \brief Dual division/remainder interface.
+ /// Dual division/remainder interface.
///
/// Sometimes it is convenient to divide two APInt values and obtain both the
/// quotient and remainder. This function does both operations in the same
APInt sshl_ov(const APInt &Amt, bool &Overflow) const;
APInt ushl_ov(const APInt &Amt, bool &Overflow) const;
- /// \brief Array-indexing support.
+ /// Array-indexing support.
///
/// \returns the bit value at bitPosition
bool operator[](unsigned bitPosition) const {
/// \name Comparison Operators
/// @{
- /// \brief Equality operator.
+ /// Equality operator.
///
/// Compares this APInt with RHS for the validity of the equality
/// relationship.
return EqualSlowCase(RHS);
}
- /// \brief Equality operator.
+ /// Equality operator.
///
/// Compares this APInt with a uint64_t for the validity of the equality
/// relationship.
return (isSingleWord() || getActiveBits() <= 64) && getZExtValue() == Val;
}
- /// \brief Equality comparison.
+ /// Equality comparison.
///
/// Compares this APInt with RHS for the validity of the equality
/// relationship.
/// \returns true if *this == Val
bool eq(const APInt &RHS) const { return (*this) == RHS; }
- /// \brief Inequality operator.
+ /// Inequality operator.
///
/// Compares this APInt with RHS for the validity of the inequality
/// relationship.
/// \returns true if *this != Val
bool operator!=(const APInt &RHS) const { return !((*this) == RHS); }
- /// \brief Inequality operator.
+ /// Inequality operator.
///
/// Compares this APInt with a uint64_t for the validity of the inequality
/// relationship.
/// \returns true if *this != Val
bool operator!=(uint64_t Val) const { return !((*this) == Val); }
- /// \brief Inequality comparison
+ /// Inequality comparison
///
/// Compares this APInt with RHS for the validity of the inequality
/// relationship.
/// \returns true if *this != Val
bool ne(const APInt &RHS) const { return !((*this) == RHS); }
- /// \brief Unsigned less than comparison
+ /// Unsigned less than comparison
///
/// Regards both *this and RHS as unsigned quantities and compares them for
/// the validity of the less-than relationship.
/// \returns true if *this < RHS when both are considered unsigned.
bool ult(const APInt &RHS) const { return compare(RHS) < 0; }
- /// \brief Unsigned less than comparison
+ /// Unsigned less than comparison
///
/// Regards both *this as an unsigned quantity and compares it with RHS for
/// the validity of the less-than relationship.
return (isSingleWord() || getActiveBits() <= 64) && getZExtValue() < RHS;
}
- /// \brief Signed less than comparison
+ /// Signed less than comparison
///
/// Regards both *this and RHS as signed quantities and compares them for
/// validity of the less-than relationship.
/// \returns true if *this < RHS when both are considered signed.
bool slt(const APInt &RHS) const { return compareSigned(RHS) < 0; }
- /// \brief Signed less than comparison
+ /// Signed less than comparison
///
/// Regards both *this as a signed quantity and compares it with RHS for
/// the validity of the less-than relationship.
: getSExtValue() < RHS;
}
- /// \brief Unsigned less or equal comparison
+ /// Unsigned less or equal comparison
///
/// Regards both *this and RHS as unsigned quantities and compares them for
/// validity of the less-or-equal relationship.
/// \returns true if *this <= RHS when both are considered unsigned.
bool ule(const APInt &RHS) const { return compare(RHS) <= 0; }
- /// \brief Unsigned less or equal comparison
+ /// Unsigned less or equal comparison
///
/// Regards both *this as an unsigned quantity and compares it with RHS for
/// the validity of the less-or-equal relationship.
/// \returns true if *this <= RHS when considered unsigned.
bool ule(uint64_t RHS) const { return !ugt(RHS); }
- /// \brief Signed less or equal comparison
+ /// Signed less or equal comparison
///
/// Regards both *this and RHS as signed quantities and compares them for
/// validity of the less-or-equal relationship.
/// \returns true if *this <= RHS when both are considered signed.
bool sle(const APInt &RHS) const { return compareSigned(RHS) <= 0; }
- /// \brief Signed less or equal comparison
+ /// Signed less or equal comparison
///
/// Regards both *this as a signed quantity and compares it with RHS for the
/// validity of the less-or-equal relationship.
/// \returns true if *this <= RHS when considered signed.
bool sle(uint64_t RHS) const { return !sgt(RHS); }
- /// \brief Unsigned greather than comparison
+ /// Unsigned greather than comparison
///
/// Regards both *this and RHS as unsigned quantities and compares them for
/// the validity of the greater-than relationship.
/// \returns true if *this > RHS when both are considered unsigned.
bool ugt(const APInt &RHS) const { return !ule(RHS); }
- /// \brief Unsigned greater than comparison
+ /// Unsigned greater than comparison
///
/// Regards both *this as an unsigned quantity and compares it with RHS for
/// the validity of the greater-than relationship.
return (!isSingleWord() && getActiveBits() > 64) || getZExtValue() > RHS;
}
- /// \brief Signed greather than comparison
+ /// Signed greather than comparison
///
/// Regards both *this and RHS as signed quantities and compares them for the
/// validity of the greater-than relationship.
/// \returns true if *this > RHS when both are considered signed.
bool sgt(const APInt &RHS) const { return !sle(RHS); }
- /// \brief Signed greater than comparison
+ /// Signed greater than comparison
///
/// Regards both *this as a signed quantity and compares it with RHS for
/// the validity of the greater-than relationship.
: getSExtValue() > RHS;
}
- /// \brief Unsigned greater or equal comparison
+ /// Unsigned greater or equal comparison
///
/// Regards both *this and RHS as unsigned quantities and compares them for
/// validity of the greater-or-equal relationship.
/// \returns true if *this >= RHS when both are considered unsigned.
bool uge(const APInt &RHS) const { return !ult(RHS); }
- /// \brief Unsigned greater or equal comparison
+ /// Unsigned greater or equal comparison
///
/// Regards both *this as an unsigned quantity and compares it with RHS for
/// the validity of the greater-or-equal relationship.
/// \returns true if *this >= RHS when considered unsigned.
bool uge(uint64_t RHS) const { return !ult(RHS); }
- /// \brief Signed greater or equal comparison
+ /// Signed greater or equal comparison
///
/// Regards both *this and RHS as signed quantities and compares them for
/// validity of the greater-or-equal relationship.
/// \returns true if *this >= RHS when both are considered signed.
bool sge(const APInt &RHS) const { return !slt(RHS); }
- /// \brief Signed greater or equal comparison
+ /// Signed greater or equal comparison
///
/// Regards both *this as a signed quantity and compares it with RHS for
/// the validity of the greater-or-equal relationship.
/// \name Resizing Operators
/// @{
- /// \brief Truncate to new width.
+ /// Truncate to new width.
///
/// Truncate the APInt to a specified width. It is an error to specify a width
/// that is greater than or equal to the current width.
APInt trunc(unsigned width) const;
- /// \brief Sign extend to a new width.
+ /// Sign extend to a new width.
///
/// This operation sign extends the APInt to a new width. If the high order
/// bit is set, the fill on the left will be done with 1 bits, otherwise zero.
/// current width.
APInt sext(unsigned width) const;
- /// \brief Zero extend to a new width.
+ /// Zero extend to a new width.
///
/// This operation zero extends the APInt to a new width. The high order bits
/// are filled with 0 bits. It is an error to specify a width that is less
/// than or equal to the current width.
APInt zext(unsigned width) const;
- /// \brief Sign extend or truncate to width
+ /// Sign extend or truncate to width
///
/// Make this APInt have the bit width given by \p width. The value is sign
/// extended, truncated, or left alone to make it that width.
APInt sextOrTrunc(unsigned width) const;
- /// \brief Zero extend or truncate to width
+ /// Zero extend or truncate to width
///
/// Make this APInt have the bit width given by \p width. The value is zero
/// extended, truncated, or left alone to make it that width.
APInt zextOrTrunc(unsigned width) const;
- /// \brief Sign extend or truncate to width
+ /// Sign extend or truncate to width
///
/// Make this APInt have the bit width given by \p width. The value is sign
/// extended, or left alone to make it that width.
APInt sextOrSelf(unsigned width) const;
- /// \brief Zero extend or truncate to width
+ /// Zero extend or truncate to width
///
/// Make this APInt have the bit width given by \p width. The value is zero
/// extended, or left alone to make it that width.
/// \name Bit Manipulation Operators
/// @{
- /// \brief Set every bit to 1.
+ /// Set every bit to 1.
void setAllBits() {
if (isSingleWord())
U.VAL = WORD_MAX;
clearUnusedBits();
}
- /// \brief Set a given bit to 1.
+ /// Set a given bit to 1.
///
/// Set the given bit to 1 whose position is given as "bitPosition".
void setBit(unsigned BitPosition) {
return setBits(BitWidth - hiBits, BitWidth);
}
- /// \brief Set every bit to 0.
+ /// Set every bit to 0.
void clearAllBits() {
if (isSingleWord())
U.VAL = 0;
memset(U.pVal, 0, getNumWords() * APINT_WORD_SIZE);
}
- /// \brief Set a given bit to 0.
+ /// Set a given bit to 0.
///
/// Set the given bit to 0 whose position is given as "bitPosition".
void clearBit(unsigned BitPosition) {
clearBit(BitWidth - 1);
}
- /// \brief Toggle every bit to its opposite value.
+ /// Toggle every bit to its opposite value.
void flipAllBits() {
if (isSingleWord()) {
U.VAL ^= WORD_MAX;
}
}
- /// \brief Toggles a given bit to its opposite value.
+ /// Toggles a given bit to its opposite value.
///
/// Toggle a given bit to its opposite value whose position is given
/// as "bitPosition".
/// \name Value Characterization Functions
/// @{
- /// \brief Return the number of bits in the APInt.
+ /// Return the number of bits in the APInt.
unsigned getBitWidth() const { return BitWidth; }
- /// \brief Get the number of words.
+ /// Get the number of words.
///
/// Here one word's bitwidth equals to that of uint64_t.
///
/// \returns the number of words to hold the integer value of this APInt.
unsigned getNumWords() const { return getNumWords(BitWidth); }
- /// \brief Get the number of words.
+ /// Get the number of words.
///
/// *NOTE* Here one word's bitwidth equals to that of uint64_t.
///
return ((uint64_t)BitWidth + APINT_BITS_PER_WORD - 1) / APINT_BITS_PER_WORD;
}
- /// \brief Compute the number of active bits in the value
+ /// Compute the number of active bits in the value
///
/// This function returns the number of active bits which is defined as the
/// bit width minus the number of leading zeros. This is used in several
/// computations to see how "wide" the value is.
unsigned getActiveBits() const { return BitWidth - countLeadingZeros(); }
- /// \brief Compute the number of active words in the value of this APInt.
+ /// Compute the number of active words in the value of this APInt.
///
/// This is used in conjunction with getActiveData to extract the raw value of
/// the APInt.
return numActiveBits ? whichWord(numActiveBits - 1) + 1 : 1;
}
- /// \brief Get the minimum bit size for this signed APInt
+ /// Get the minimum bit size for this signed APInt
///
/// Computes the minimum bit width for this APInt while considering it to be a
/// signed (and probably negative) value. If the value is not negative, this
return getActiveBits() + 1;
}
- /// \brief Get zero extended value
+ /// Get zero extended value
///
/// This method attempts to return the value of this APInt as a zero extended
/// uint64_t. The bitwidth must be <= 64 or the value must fit within a
return U.pVal[0];
}
- /// \brief Get sign extended value
+ /// Get sign extended value
///
/// This method attempts to return the value of this APInt as a sign extended
/// int64_t. The bit width must be <= 64 or the value must fit within an
return int64_t(U.pVal[0]);
}
- /// \brief Get bits required for string value.
+ /// Get bits required for string value.
///
/// This method determines how many bits are required to hold the APInt
/// equivalent of the string given by \p str.
static unsigned getBitsNeeded(StringRef str, uint8_t radix);
- /// \brief The APInt version of the countLeadingZeros functions in
+ /// The APInt version of the countLeadingZeros functions in
/// MathExtras.h.
///
/// It counts the number of zeros from the most significant bit to the first
return countLeadingZerosSlowCase();
}
- /// \brief Count the number of leading one bits.
+ /// Count the number of leading one bits.
///
/// This function is an APInt version of the countLeadingOnes
/// functions in MathExtras.h. It counts the number of ones from the most
return isNegative() ? countLeadingOnes() : countLeadingZeros();
}
- /// \brief Count the number of trailing zero bits.
+ /// Count the number of trailing zero bits.
///
/// This function is an APInt version of the countTrailingZeros
/// functions in MathExtras.h. It counts the number of zeros from the least
return countTrailingZerosSlowCase();
}
- /// \brief Count the number of trailing one bits.
+ /// Count the number of trailing one bits.
///
/// This function is an APInt version of the countTrailingOnes
/// functions in MathExtras.h. It counts the number of ones from the least
return countTrailingOnesSlowCase();
}
- /// \brief Count the number of bits set.
+ /// Count the number of bits set.
///
/// This function is an APInt version of the countPopulation functions
/// in MathExtras.h. It counts the number of 1 bits in the APInt value.
toString(Str, Radix, true, false);
}
- /// \brief Return the APInt as a std::string.
+ /// Return the APInt as a std::string.
///
/// Note that this is an inefficient method. It is better to pass in a
/// SmallVector/SmallString to the methods above to avoid thrashing the heap
/// Value.
APInt reverseBits() const;
- /// \brief Converts this APInt to a double value.
+ /// Converts this APInt to a double value.
double roundToDouble(bool isSigned) const;
- /// \brief Converts this unsigned APInt to a double value.
+ /// Converts this unsigned APInt to a double value.
double roundToDouble() const { return roundToDouble(false); }
- /// \brief Converts this signed APInt to a double value.
+ /// Converts this signed APInt to a double value.
double signedRoundToDouble() const { return roundToDouble(true); }
- /// \brief Converts APInt bits to a double
+ /// Converts APInt bits to a double
///
/// The conversion does not do a translation from integer to double, it just
/// re-interprets the bits as a double. Note that it is valid to do this on
return BitsToDouble(getWord(0));
}
- /// \brief Converts APInt bits to a double
+ /// Converts APInt bits to a double
///
/// The conversion does not do a translation from integer to float, it just
/// re-interprets the bits as a float. Note that it is valid to do this on
return BitsToFloat(getWord(0));
}
- /// \brief Converts a double to APInt bits.
+ /// Converts a double to APInt bits.
///
/// The conversion does not do a translation from double to integer, it just
/// re-interprets the bits of the double.
return APInt(sizeof(double) * CHAR_BIT, DoubleToBits(V));
}
- /// \brief Converts a float to APInt bits.
+ /// Converts a float to APInt bits.
///
/// The conversion does not do a translation from float to integer, it just
/// re-interprets the bits of the float.
return logBase2();
}
- /// \brief Compute the square root
+ /// Compute the square root
APInt sqrt() const;
- /// \brief Get the absolute value;
+ /// Get the absolute value;
///
/// If *this is < 0 then return -(*this), otherwise *this;
APInt abs() const {
/// Set the least significant BITS and clear the rest.
static void tcSetLeastSignificantBits(WordType *, unsigned, unsigned bits);
- /// \brief debug method
+ /// debug method
void dump() const;
/// @}
inline bool operator!=(uint64_t V1, const APInt &V2) { return V2 != V1; }
-/// \brief Unary bitwise complement operator.
+/// Unary bitwise complement operator.
///
/// \returns an APInt that is the bitwise complement of \p v.
inline APInt operator~(APInt v) {
namespace APIntOps {
-/// \brief Determine the smaller of two APInts considered to be signed.
+/// Determine the smaller of two APInts considered to be signed.
inline const APInt &smin(const APInt &A, const APInt &B) {
return A.slt(B) ? A : B;
}
-/// \brief Determine the larger of two APInts considered to be signed.
+/// Determine the larger of two APInts considered to be signed.
inline const APInt &smax(const APInt &A, const APInt &B) {
return A.sgt(B) ? A : B;
}
-/// \brief Determine the smaller of two APInts considered to be signed.
+/// Determine the smaller of two APInts considered to be signed.
inline const APInt &umin(const APInt &A, const APInt &B) {
return A.ult(B) ? A : B;
}
-/// \brief Determine the larger of two APInts considered to be unsigned.
+/// Determine the larger of two APInts considered to be unsigned.
inline const APInt &umax(const APInt &A, const APInt &B) {
return A.ugt(B) ? A : B;
}
-/// \brief Compute GCD of two unsigned APInt values.
+/// Compute GCD of two unsigned APInt values.
///
/// This function returns the greatest common divisor of the two APInt values
/// using Stein's algorithm.
/// \returns the greatest common divisor of A and B.
APInt GreatestCommonDivisor(APInt A, APInt B);
-/// \brief Converts the given APInt to a double value.
+/// Converts the given APInt to a double value.
///
/// Treats the APInt as an unsigned value for conversion purposes.
inline double RoundAPIntToDouble(const APInt &APIVal) {
return APIVal.roundToDouble();
}
-/// \brief Converts the given APInt to a double value.
+/// Converts the given APInt to a double value.
///
/// Treats the APInt as a signed value for conversion purposes.
inline double RoundSignedAPIntToDouble(const APInt &APIVal) {
return APIVal.signedRoundToDouble();
}
-/// \brief Converts the given APInt to a float vlalue.
+/// Converts the given APInt to a float vlalue.
inline float RoundAPIntToFloat(const APInt &APIVal) {
return float(RoundAPIntToDouble(APIVal));
}
-/// \brief Converts the given APInt to a float value.
+/// Converts the given APInt to a float value.
///
/// Treast the APInt as a signed value for conversion purposes.
inline float RoundSignedAPIntToFloat(const APInt &APIVal) {
return float(APIVal.signedRoundToDouble());
}
-/// \brief Converts the given double value into a APInt.
+/// Converts the given double value into a APInt.
///
/// This function convert a double value to an APInt value.
APInt RoundDoubleToAPInt(double Double, unsigned width);
-/// \brief Converts a float value into a APInt.
+/// Converts a float value into a APInt.
///
/// Converts a float value into an APInt value.
inline APInt RoundFloatToAPInt(float Float, unsigned width) {
}
using APInt::toString;
- /// \brief Get the correctly-extended \c int64_t value.
+ /// Get the correctly-extended \c int64_t value.
int64_t getExtValue() const {
assert(getMinSignedBits() <= 64 && "Too many bits for int64_t");
return isSigned() ? getSExtValue() : getZExtValue();
: APInt::getSignedMinValue(numBits), Unsigned);
}
- /// \brief Determine if two APSInts have the same value, zero- or
+ /// Determine if two APSInts have the same value, zero- or
/// sign-extending as needed.
static bool isSameValue(const APSInt &I1, const APSInt &I2) {
return !compareValues(I1, I2);
}
- /// \brief Compare underlying values of two numbers.
+ /// Compare underlying values of two numbers.
static int compareValues(const APSInt &I1, const APSInt &I2) {
if (I1.getBitWidth() == I2.getBitWidth() && I1.isSigned() == I2.isSigned())
return I1.IsUnsigned ? I1.compare(I2) : I1.compareSigned(I2);
/// slice(n) - Chop off the first N elements of the array.
ArrayRef<T> slice(size_t N) const { return slice(N, size() - N); }
- /// \brief Drop the first \p N elements of the array.
+ /// Drop the first \p N elements of the array.
ArrayRef<T> drop_front(size_t N = 1) const {
assert(size() >= N && "Dropping more elements than exist");
return slice(N, size() - N);
}
- /// \brief Drop the last \p N elements of the array.
+ /// Drop the last \p N elements of the array.
ArrayRef<T> drop_back(size_t N = 1) const {
assert(size() >= N && "Dropping more elements than exist");
return slice(0, size() - N);
}
- /// \brief Return a copy of *this with the first N elements satisfying the
+ /// Return a copy of *this with the first N elements satisfying the
/// given predicate removed.
template <class PredicateT> ArrayRef<T> drop_while(PredicateT Pred) const {
return ArrayRef<T>(find_if_not(*this, Pred), end());
}
- /// \brief Return a copy of *this with the first N elements not satisfying
+ /// Return a copy of *this with the first N elements not satisfying
/// the given predicate removed.
template <class PredicateT> ArrayRef<T> drop_until(PredicateT Pred) const {
return ArrayRef<T>(find_if(*this, Pred), end());
}
- /// \brief Return a copy of *this with only the first \p N elements.
+ /// Return a copy of *this with only the first \p N elements.
ArrayRef<T> take_front(size_t N = 1) const {
if (N >= size())
return *this;
return drop_back(size() - N);
}
- /// \brief Return a copy of *this with only the last \p N elements.
+ /// Return a copy of *this with only the last \p N elements.
ArrayRef<T> take_back(size_t N = 1) const {
if (N >= size())
return *this;
return drop_front(size() - N);
}
- /// \brief Return the first N elements of this Array that satisfy the given
+ /// Return the first N elements of this Array that satisfy the given
/// predicate.
template <class PredicateT> ArrayRef<T> take_while(PredicateT Pred) const {
return ArrayRef<T>(begin(), find_if_not(*this, Pred));
}
- /// \brief Return the first N elements of this Array that don't satisfy the
+ /// Return the first N elements of this Array that don't satisfy the
/// given predicate.
template <class PredicateT> ArrayRef<T> take_until(PredicateT Pred) const {
return ArrayRef<T>(begin(), find_if(*this, Pred));
return slice(N, this->size() - N);
}
- /// \brief Drop the first \p N elements of the array.
+ /// Drop the first \p N elements of the array.
MutableArrayRef<T> drop_front(size_t N = 1) const {
assert(this->size() >= N && "Dropping more elements than exist");
return slice(N, this->size() - N);
return slice(0, this->size() - N);
}
- /// \brief Return a copy of *this with the first N elements satisfying the
+ /// Return a copy of *this with the first N elements satisfying the
/// given predicate removed.
template <class PredicateT>
MutableArrayRef<T> drop_while(PredicateT Pred) const {
return MutableArrayRef<T>(find_if_not(*this, Pred), end());
}
- /// \brief Return a copy of *this with the first N elements not satisfying
+ /// Return a copy of *this with the first N elements not satisfying
/// the given predicate removed.
template <class PredicateT>
MutableArrayRef<T> drop_until(PredicateT Pred) const {
return MutableArrayRef<T>(find_if(*this, Pred), end());
}
- /// \brief Return a copy of *this with only the first \p N elements.
+ /// Return a copy of *this with only the first \p N elements.
MutableArrayRef<T> take_front(size_t N = 1) const {
if (N >= this->size())
return *this;
return drop_back(this->size() - N);
}
- /// \brief Return a copy of *this with only the last \p N elements.
+ /// Return a copy of *this with only the last \p N elements.
MutableArrayRef<T> take_back(size_t N = 1) const {
if (N >= this->size())
return *this;
return drop_front(this->size() - N);
}
- /// \brief Return the first N elements of this Array that satisfy the given
+ /// Return the first N elements of this Array that satisfy the given
/// predicate.
template <class PredicateT>
MutableArrayRef<T> take_while(PredicateT Pred) const {
return MutableArrayRef<T>(begin(), find_if_not(*this, Pred));
}
- /// \brief Return the first N elements of this Array that don't satisfy the
+ /// Return the first N elements of this Array that don't satisfy the
/// given predicate.
template <class PredicateT>
MutableArrayRef<T> take_until(PredicateT Pred) const {
}
private:
- /// \brief Perform a logical left shift of \p Count words by moving everything
+ /// Perform a logical left shift of \p Count words by moving everything
/// \p Count words to the right in memory.
///
/// While confusing, words are stored from least significant at Bits[0] to
clear_unused_bits();
}
- /// \brief Perform a logical right shift of \p Count words by moving those
+ /// Perform a logical right shift of \p Count words by moving those
/// words to the left in memory. See wordShl for more information.
///
void wordShr(uint32_t Count) {
return *this;
}
- /// \brief Skips all children of the current node and traverses to next node
+ /// Skips all children of the current node and traverses to next node
///
/// Note: This function takes care of incrementing the iterator. If you
/// always increment and call this function, you risk walking off the end.
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
-/// \brief A base class for data structure classes wishing to make iterators
+/// A base class for data structure classes wishing to make iterators
/// ("handles") pointing into themselves fail-fast. When building without
/// asserts, this class is empty and does nothing.
///
public:
DebugEpochBase() : Epoch(0) {}
- /// \brief Calling incrementEpoch invalidates all handles pointing into the
+ /// Calling incrementEpoch invalidates all handles pointing into the
/// calling instance.
void incrementEpoch() { ++Epoch; }
- /// \brief The destructor calls incrementEpoch to make use-after-free bugs
+ /// The destructor calls incrementEpoch to make use-after-free bugs
/// more likely to crash deterministically.
~DebugEpochBase() { incrementEpoch(); }
- /// \brief A base class for iterator classes ("handles") that wish to poll for
+ /// A base class for iterator classes ("handles") that wish to poll for
/// iterator invalidating modifications in the underlying data structure.
/// When LLVM is built without asserts, this class is empty and does nothing.
///
explicit HandleBase(const DebugEpochBase *Parent)
: EpochAddress(&Parent->Epoch), EpochAtCreation(Parent->Epoch) {}
- /// \brief Returns true if the DebugEpochBase this Handle is linked to has
+ /// Returns true if the DebugEpochBase this Handle is linked to has
/// not called incrementEpoch on itself since the creation of this
/// HandleBase instance.
bool isHandleInSync() const { return *EpochAddress == EpochAtCreation; }
- /// \brief Returns a pointer to the epoch word stored in the data structure
+ /// Returns a pointer to the epoch word stored in the data structure
/// this handle points into. Can be used to check if two iterators point
/// into the same data structure.
const void *getEpochAddress() const { return EpochAddress; }
namespace llvm {
-/// \brief An opaque object representing a hash code.
+/// An opaque object representing a hash code.
///
/// This object represents the result of hashing some entity. It is intended to
/// be used to implement hashtables or other hashing-based data structures.
size_t value;
public:
- /// \brief Default construct a hash_code.
+ /// Default construct a hash_code.
/// Note that this leaves the value uninitialized.
hash_code() = default;
- /// \brief Form a hash code directly from a numerical value.
+ /// Form a hash code directly from a numerical value.
hash_code(size_t value) : value(value) {}
- /// \brief Convert the hash code to its numerical value for use.
+ /// Convert the hash code to its numerical value for use.
/*explicit*/ operator size_t() const { return value; }
friend bool operator==(const hash_code &lhs, const hash_code &rhs) {
return lhs.value != rhs.value;
}
- /// \brief Allow a hash_code to be directly run through hash_value.
+ /// Allow a hash_code to be directly run through hash_value.
friend size_t hash_value(const hash_code &code) { return code.value; }
};
-/// \brief Compute a hash_code for any integer value.
+/// Compute a hash_code for any integer value.
///
/// Note that this function is intended to compute the same hash_code for
/// a particular value without regard to the pre-promotion type. This is in
typename std::enable_if<is_integral_or_enum<T>::value, hash_code>::type
hash_value(T value);
-/// \brief Compute a hash_code for a pointer's address.
+/// Compute a hash_code for a pointer's address.
///
/// N.B.: This hashes the *address*. Not the value and not the type.
template <typename T> hash_code hash_value(const T *ptr);
-/// \brief Compute a hash_code for a pair of objects.
+/// Compute a hash_code for a pair of objects.
template <typename T, typename U>
hash_code hash_value(const std::pair<T, U> &arg);
-/// \brief Compute a hash_code for a standard string.
+/// Compute a hash_code for a standard string.
template <typename T>
hash_code hash_value(const std::basic_string<T> &arg);
-/// \brief Override the execution seed with a fixed value.
+/// Override the execution seed with a fixed value.
///
/// This hashing library uses a per-execution seed designed to change on each
/// run with high probability in order to ensure that the hash codes are not
static const uint64_t k2 = 0x9ae16a3b2f90404fULL;
static const uint64_t k3 = 0xc949d7c7509e6557ULL;
-/// \brief Bitwise right rotate.
+/// Bitwise right rotate.
/// Normally this will compile to a single instruction, especially if the
/// shift is a manifest constant.
inline uint64_t rotate(uint64_t val, size_t shift) {
return k2 ^ seed;
}
-/// \brief The intermediate state used during hashing.
+/// The intermediate state used during hashing.
/// Currently, the algorithm for computing hash codes is based on CityHash and
/// keeps 56 bytes of arbitrary state.
struct hash_state {
uint64_t h0, h1, h2, h3, h4, h5, h6;
- /// \brief Create a new hash_state structure and initialize it based on the
+ /// Create a new hash_state structure and initialize it based on the
/// seed and the first 64-byte chunk.
/// This effectively performs the initial mix.
static hash_state create(const char *s, uint64_t seed) {
return state;
}
- /// \brief Mix 32-bytes from the input sequence into the 16-bytes of 'a'
+ /// Mix 32-bytes from the input sequence into the 16-bytes of 'a'
/// and 'b', including whatever is already in 'a' and 'b'.
static void mix_32_bytes(const char *s, uint64_t &a, uint64_t &b) {
a += fetch64(s);
a += c;
}
- /// \brief Mix in a 64-byte buffer of data.
+ /// Mix in a 64-byte buffer of data.
/// We mix all 64 bytes even when the chunk length is smaller, but we
/// record the actual length.
void mix(const char *s) {
std::swap(h2, h0);
}
- /// \brief Compute the final 64-bit hash code value based on the current
+ /// Compute the final 64-bit hash code value based on the current
/// state and the length of bytes hashed.
uint64_t finalize(size_t length) {
return hash_16_bytes(hash_16_bytes(h3, h5) + shift_mix(h1) * k1 + h2,
};
-/// \brief A global, fixed seed-override variable.
+/// A global, fixed seed-override variable.
///
/// This variable can be set using the \see llvm::set_fixed_execution_seed
/// function. See that function for details. Do not, under any circumstances,
}
-/// \brief Trait to indicate whether a type's bits can be hashed directly.
+/// Trait to indicate whether a type's bits can be hashed directly.
///
/// A type trait which is true if we want to combine values for hashing by
/// reading the underlying data. It is false if values of this type must
(sizeof(T) + sizeof(U)) ==
sizeof(std::pair<T, U>))> {};
-/// \brief Helper to get the hashable data representation for a type.
+/// Helper to get the hashable data representation for a type.
/// This variant is enabled when the type itself can be used.
template <typename T>
typename std::enable_if<is_hashable_data<T>::value, T>::type
get_hashable_data(const T &value) {
return value;
}
-/// \brief Helper to get the hashable data representation for a type.
+/// Helper to get the hashable data representation for a type.
/// This variant is enabled when we must first call hash_value and use the
/// result as our data.
template <typename T>
return hash_value(value);
}
-/// \brief Helper to store data from a value into a buffer and advance the
+/// Helper to store data from a value into a buffer and advance the
/// pointer into that buffer.
///
/// This routine first checks whether there is enough space in the provided
return true;
}
-/// \brief Implement the combining of integral values into a hash_code.
+/// Implement the combining of integral values into a hash_code.
///
/// This overload is selected when the value type of the iterator is
/// integral. Rather than computing a hash_code for each object and then
return state.finalize(length);
}
-/// \brief Implement the combining of integral values into a hash_code.
+/// Implement the combining of integral values into a hash_code.
///
/// This overload is selected when the value type of the iterator is integral
/// and when the input iterator is actually a pointer. Rather than computing
} // namespace hashing
-/// \brief Compute a hash_code for a sequence of values.
+/// Compute a hash_code for a sequence of values.
///
/// This hashes a sequence of values. It produces the same hash_code as
/// 'hash_combine(a, b, c, ...)', but can run over arbitrary sized sequences
namespace hashing {
namespace detail {
-/// \brief Helper class to manage the recursive combining of hash_combine
+/// Helper class to manage the recursive combining of hash_combine
/// arguments.
///
/// This class exists to manage the state and various calls involved in the
const size_t seed;
public:
- /// \brief Construct a recursive hash combining helper.
+ /// Construct a recursive hash combining helper.
///
/// This sets up the state for a recursive hash combine, including getting
/// the seed and buffer setup.
hash_combine_recursive_helper()
: seed(get_execution_seed()) {}
- /// \brief Combine one chunk of data into the current in-flight hash.
+ /// Combine one chunk of data into the current in-flight hash.
///
/// This merges one chunk of data into the hash. First it tries to buffer
/// the data. If the buffer is full, it hashes the buffer into its
return buffer_ptr;
}
- /// \brief Recursive, variadic combining method.
+ /// Recursive, variadic combining method.
///
/// This function recurses through each argument, combining that argument
/// into a single hash.
return combine(length, buffer_ptr, buffer_end, args...);
}
- /// \brief Base case for recursive, variadic combining.
+ /// Base case for recursive, variadic combining.
///
/// The base case when combining arguments recursively is reached when all
/// arguments have been handled. It flushes the remaining buffer and
} // namespace detail
} // namespace hashing
-/// \brief Combine values into a single hash_code.
+/// Combine values into a single hash_code.
///
/// This routine accepts a varying number of arguments of any type. It will
/// attempt to combine them into a single hash_code. For user-defined types it
namespace hashing {
namespace detail {
-/// \brief Helper to hash the value of a single integer.
+/// Helper to hash the value of a single integer.
///
/// Overloads for smaller integer types are not provided to ensure consistent
/// behavior in the presence of integral promotions. Essentially,
(Vector.begin() + Pos->second);
}
- /// \brief Remove the last element from the vector.
+ /// Remove the last element from the vector.
void pop_back() {
typename MapType::iterator Pos = Map.find(Vector.back().first);
Map.erase(Pos);
Vector.pop_back();
}
- /// \brief Remove the element given by Iterator.
+ /// Remove the element given by Iterator.
///
/// Returns an iterator to the element following the one which was removed,
/// which may be end().
return Next;
}
- /// \brief Remove all elements with the key value Key.
+ /// Remove all elements with the key value Key.
///
/// Returns the number of elements removed.
size_type erase(const KeyT &Key) {
return 1;
}
- /// \brief Remove the elements that match the predicate.
+ /// Remove the elements that match the predicate.
///
/// Erase all elements that match \c Pred in a single pass. Takes linear
/// time.
Vector.erase(O, Vector.end());
}
-/// \brief A MapVector that performs no allocations if smaller than a certain
+/// A MapVector that performs no allocations if smaller than a certain
/// size.
template <typename KeyT, typename ValueT, unsigned N>
struct SmallMapVector
#define LLVM_ADT_NONE_H
namespace llvm {
-/// \brief A simple null object to allow implicit construction of Optional<T>
+/// A simple null object to allow implicit construction of Optional<T>
/// and similar types without having to spell out the specialization's name.
// (constant value 1 in an attempt to workaround MSVC build issue... )
enum class NoneType { None = 1 };
}
};
-/// \brief Store a vector of values using a specific number of bits for each
+/// Store a vector of values using a specific number of bits for each
/// value. Both signed and unsigned types can be used, e.g
/// @code
/// PackedVector<signed, 2> vec;
namespace llvm {
-/// \brief Enumerate the SCCs of a directed graph in reverse topological order
+/// Enumerate the SCCs of a directed graph in reverse topological order
/// of the SCC DAG.
///
/// This is implemented using Tarjan's DFS algorithm using an internal stack to
}
static scc_iterator end(const GraphT &) { return scc_iterator(); }
- /// \brief Direct loop termination test which is more efficient than
+ /// Direct loop termination test which is more efficient than
/// comparison with \c end().
bool isAtEnd() const {
assert(!CurrentSCC.empty() || VisitStack.empty());
return CurrentSCC;
}
- /// \brief Test if the current SCC has a loop.
+ /// Test if the current SCC has a loop.
///
/// If the SCC has more than one node, this is trivially true. If not, it may
/// still contain a loop if the node has an edge back to itself.
return false;
}
-/// \brief Construct the begin iterator for a deduced graph type T.
+/// Construct the begin iterator for a deduced graph type T.
template <class T> scc_iterator<T> scc_begin(const T &G) {
return scc_iterator<T>::begin(G);
}
-/// \brief Construct the end iterator for a deduced graph type T.
+/// Construct the end iterator for a deduced graph type T.
template <class T> scc_iterator<T> scc_end(const T &G) {
return scc_iterator<T>::end(G);
}
// Extra additions to <utility>
//===----------------------------------------------------------------------===//
-/// \brief Function object to check whether the first component of a std::pair
+/// Function object to check whether the first component of a std::pair
/// compares less than the first component of another std::pair.
struct less_first {
template <typename T> bool operator()(const T &lhs, const T &rhs) const {
}
};
-/// \brief Function object to check whether the second component of a std::pair
+/// Function object to check whether the second component of a std::pair
/// compares less than the second component of another std::pair.
struct less_second {
template <typename T> bool operator()(const T &lhs, const T &rhs) const {
// A subset of N3658. More stuff can be added as-needed.
-/// \brief Represents a compile-time sequence of integers.
+/// Represents a compile-time sequence of integers.
template <class T, T... I> struct integer_sequence {
using value_type = T;
static constexpr size_t size() { return sizeof...(I); }
};
-/// \brief Alias for the common case of a sequence of size_ts.
+/// Alias for the common case of a sequence of size_ts.
template <size_t... I>
struct index_sequence : integer_sequence<std::size_t, I...> {};
template <std::size_t... I>
struct build_index_impl<0, I...> : index_sequence<I...> {};
-/// \brief Creates a compile-time integer sequence for a parameter pack.
+/// Creates a compile-time integer sequence for a parameter pack.
template <class... Ts>
struct index_sequence_for : build_index_impl<sizeof...(Ts)> {};
template <int N> struct rank : rank<N - 1> {};
template <> struct rank<0> {};
-/// \brief traits class for checking whether type T is one of any of the given
+/// traits class for checking whether type T is one of any of the given
/// types in the variadic list.
template <typename T, typename... Ts> struct is_one_of {
static const bool value = false;
std::is_same<T, U>::value || is_one_of<T, Ts...>::value;
};
-/// \brief traits class for checking whether type T is a base class for all
+/// traits class for checking whether type T is a base class for all
/// the given types in the variadic list.
template <typename T, typename... Ts> struct are_base_of {
static const bool value = true;
return std::lower_bound(adl_begin(Range), adl_end(Range), I);
}
-/// \brief Given a range of type R, iterate the entire range and return a
+/// Given a range of type R, iterate the entire range and return a
/// SmallVector with elements of the vector. This is useful, for example,
/// when you want to iterate a range and then sort the results.
template <unsigned Size, typename R>
// Implement make_unique according to N3656.
-/// \brief Constructs a `new T()` with the given args and returns a
+/// Constructs a `new T()` with the given args and returns a
/// `unique_ptr<T>` which owns the object.
///
/// Example:
return std::unique_ptr<T>(new T(std::forward<Args>(args)...));
}
-/// \brief Constructs a `new T[n]` with the given args and returns a
+/// Constructs a `new T[n]` with the given args and returns a
/// `unique_ptr<T[]>` which owns the object.
///
/// \param n size of the new array.
namespace llvm {
-/// \brief A vector that has set insertion semantics.
+/// A vector that has set insertion semantics.
///
/// This adapter class provides a way to keep a set of things that also has the
/// property of a deterministic iteration order. The order of iteration is the
using const_reverse_iterator = typename vector_type::const_reverse_iterator;
using size_type = typename vector_type::size_type;
- /// \brief Construct an empty SetVector
+ /// Construct an empty SetVector
SetVector() = default;
- /// \brief Initialize a SetVector with a range of elements
+ /// Initialize a SetVector with a range of elements
template<typename It>
SetVector(It Start, It End) {
insert(Start, End);
return std::move(vector_);
}
- /// \brief Determine if the SetVector is empty or not.
+ /// Determine if the SetVector is empty or not.
bool empty() const {
return vector_.empty();
}
- /// \brief Determine the number of elements in the SetVector.
+ /// Determine the number of elements in the SetVector.
size_type size() const {
return vector_.size();
}
- /// \brief Get an iterator to the beginning of the SetVector.
+ /// Get an iterator to the beginning of the SetVector.
iterator begin() {
return vector_.begin();
}
- /// \brief Get a const_iterator to the beginning of the SetVector.
+ /// Get a const_iterator to the beginning of the SetVector.
const_iterator begin() const {
return vector_.begin();
}
- /// \brief Get an iterator to the end of the SetVector.
+ /// Get an iterator to the end of the SetVector.
iterator end() {
return vector_.end();
}
- /// \brief Get a const_iterator to the end of the SetVector.
+ /// Get a const_iterator to the end of the SetVector.
const_iterator end() const {
return vector_.end();
}
- /// \brief Get an reverse_iterator to the end of the SetVector.
+ /// Get an reverse_iterator to the end of the SetVector.
reverse_iterator rbegin() {
return vector_.rbegin();
}
- /// \brief Get a const_reverse_iterator to the end of the SetVector.
+ /// Get a const_reverse_iterator to the end of the SetVector.
const_reverse_iterator rbegin() const {
return vector_.rbegin();
}
- /// \brief Get a reverse_iterator to the beginning of the SetVector.
+ /// Get a reverse_iterator to the beginning of the SetVector.
reverse_iterator rend() {
return vector_.rend();
}
- /// \brief Get a const_reverse_iterator to the beginning of the SetVector.
+ /// Get a const_reverse_iterator to the beginning of the SetVector.
const_reverse_iterator rend() const {
return vector_.rend();
}
- /// \brief Return the first element of the SetVector.
+ /// Return the first element of the SetVector.
const T &front() const {
assert(!empty() && "Cannot call front() on empty SetVector!");
return vector_.front();
}
- /// \brief Return the last element of the SetVector.
+ /// Return the last element of the SetVector.
const T &back() const {
assert(!empty() && "Cannot call back() on empty SetVector!");
return vector_.back();
}
- /// \brief Index into the SetVector.
+ /// Index into the SetVector.
const_reference operator[](size_type n) const {
assert(n < vector_.size() && "SetVector access out of range!");
return vector_[n];
}
- /// \brief Insert a new element into the SetVector.
+ /// Insert a new element into the SetVector.
/// \returns true if the element was inserted into the SetVector.
bool insert(const value_type &X) {
bool result = set_.insert(X).second;
return result;
}
- /// \brief Insert a range of elements into the SetVector.
+ /// Insert a range of elements into the SetVector.
template<typename It>
void insert(It Start, It End) {
for (; Start != End; ++Start)
vector_.push_back(*Start);
}
- /// \brief Remove an item from the set vector.
+ /// Remove an item from the set vector.
bool remove(const value_type& X) {
if (set_.erase(X)) {
typename vector_type::iterator I = find(vector_, X);
return vector_.erase(NI);
}
- /// \brief Remove items from the set vector based on a predicate function.
+ /// Remove items from the set vector based on a predicate function.
///
/// This is intended to be equivalent to the following code, if we could
/// write it:
return true;
}
- /// \brief Count the number of elements of a given key in the SetVector.
+ /// Count the number of elements of a given key in the SetVector.
/// \returns 0 if the element is not in the SetVector, 1 if it is.
size_type count(const key_type &key) const {
return set_.count(key);
}
- /// \brief Completely clear the SetVector
+ /// Completely clear the SetVector
void clear() {
set_.clear();
vector_.clear();
}
- /// \brief Remove the last element of the SetVector.
+ /// Remove the last element of the SetVector.
void pop_back() {
assert(!empty() && "Cannot remove an element from an empty SetVector!");
set_.erase(back());
return vector_ != that.vector_;
}
- /// \brief Compute This := This u S, return whether 'This' changed.
+ /// Compute This := This u S, return whether 'This' changed.
/// TODO: We should be able to use set_union from SetOperations.h, but
/// SetVector interface is inconsistent with DenseSet.
template <class STy>
return Changed;
}
- /// \brief Compute This := This - B
+ /// Compute This := This - B
/// TODO: We should be able to use set_subtract from SetOperations.h, but
/// SetVector interface is inconsistent with DenseSet.
template <class STy>
}
private:
- /// \brief A wrapper predicate designed for use with std::remove_if.
+ /// A wrapper predicate designed for use with std::remove_if.
///
/// This predicate wraps a predicate suitable for use with std::remove_if to
/// call set_.erase(x) on each element which is slated for removal.
vector_type vector_; ///< The vector.
};
-/// \brief A SetVector that performs no allocations if smaller than
+/// A SetVector that performs no allocations if smaller than
/// a certain size.
template <typename T, unsigned N>
class SmallSetVector
public:
SmallSetVector() = default;
- /// \brief Initialize a SmallSetVector with a range of elements
+ /// Initialize a SmallSetVector with a range of elements
template<typename It>
SmallSetVector(It Start, It End) {
this->insert(Start, End);
enum { Val = RoundUpToPowerOfTwoH<N, (N&(N-1)) == 0>::Val };
};
-/// \brief A templated base class for \c SmallPtrSet which provides the
+/// A templated base class for \c SmallPtrSet which provides the
/// typesafe interface that is common across all small sizes.
///
/// This is particularly useful for passing around between interface boundaries
#define STATISTIC(VARNAME, DESC) \
static llvm::Statistic VARNAME = {DEBUG_TYPE, #VARNAME, DESC, {0}, {false}}
-/// \brief Enable the collection and printing of statistics.
+/// Enable the collection and printing of statistics.
void EnableStatistics(bool PrintOnExit = true);
-/// \brief Check if statistics are enabled.
+/// Check if statistics are enabled.
bool AreStatisticsEnabled();
-/// \brief Return a file stream to print our output on.
+/// Return a file stream to print our output on.
std::unique_ptr<raw_fd_ostream> CreateInfoOutputFile();
-/// \brief Print statistics to the file returned by CreateInfoOutputFile().
+/// Print statistics to the file returned by CreateInfoOutputFile().
void PrintStatistics();
-/// \brief Print statistics to the given output stream.
+/// Print statistics to the given output stream.
void PrintStatistics(raw_ostream &OS);
/// Print statistics in JSON format. This does include all global timers (\see
/// PrintStatisticsJSON().
void PrintStatisticsJSON(raw_ostream &OS);
-/// \brief Get the statistics. This can be used to look up the value of
+/// Get the statistics. This can be used to look up the value of
/// statistics without needing to parse JSON.
///
/// This function does not prevent statistics being updated by other threads
/// completes.
const std::vector<std::pair<StringRef, unsigned>> GetStatistics();
-/// \brief Reset the statistics. This can be used to zero and de-register the
+/// Reset the statistics. This can be used to zero and de-register the
/// statistics in order to measure a compilation.
///
/// When this function begins to call destructors prior to returning, all
return Output;
}
-/// \brief Convert the string \p S to an integer of the specified type using
+/// Convert the string \p S to an integer of the specified type using
/// the radix \p Base. If \p Base is 0, auto-detects the radix.
/// Returns true if the number was successfully converted, false otherwise.
template <typename N> bool to_integer(StringRef S, N &Num, unsigned Base = 0) {
LLVM_NODISCARD
int compare_numeric(StringRef RHS) const;
- /// \brief Determine the edit distance between this string and another
+ /// Determine the edit distance between this string and another
/// string.
///
/// \param Other the string to compare this string against.
/// @}
- /// \brief Compute a hash_code for a StringRef.
+ /// Compute a hash_code for a StringRef.
LLVM_NODISCARD
hash_code hash_value(StringRef S);
namespace llvm {
-/// \brief A switch()-like statement whose cases are string literals.
+/// A switch()-like statement whose cases are string literals.
///
/// The StringSwitch class is a simple form of a switch() statement that
/// determines whether the given string matches one of the given string
/// \endcode
template<typename T, typename R = T>
class StringSwitch {
- /// \brief The string we are matching.
+ /// The string we are matching.
const StringRef Str;
- /// \brief The pointer to the result of this switch statement, once known,
+ /// The pointer to the result of this switch statement, once known,
/// null before that.
Optional<T> Result;
return Vector[ID - 1];
}
- /// \brief Return an iterator to the start of the vector.
+ /// Return an iterator to the start of the vector.
iterator begin() { return Vector.begin(); }
- /// \brief Return an iterator to the start of the vector.
+ /// Return an iterator to the start of the vector.
const_iterator begin() const { return Vector.begin(); }
- /// \brief Return an iterator to the end of the vector.
+ /// Return an iterator to the end of the vector.
iterator end() { return Vector.end(); }
- /// \brief Return an iterator to the end of the vector.
+ /// Return an iterator to the end of the vector.
const_iterator end() const { return Vector.end(); }
/// size - Returns the number of entries in the vector.
#define LLVM_COMMA_JOIN31(x) LLVM_COMMA_JOIN30(x), x ## 30
#define LLVM_COMMA_JOIN32(x) LLVM_COMMA_JOIN31(x), x ## 31
-/// \brief Class which can simulate a type-safe variadic function.
+/// Class which can simulate a type-safe variadic function.
///
/// The VariadicFunction class template makes it easy to define
/// type-safe variadic functions where all arguments have the same
namespace llvm {
-/// \brief Determine the edit distance between two sequences.
+/// Determine the edit distance between two sequences.
///
/// \param FromArray the first sequence to compare.
///
using base_list_type::sort;
- /// \brief Get the previous node, or \c nullptr for the list head.
+ /// Get the previous node, or \c nullptr for the list head.
pointer getPrevNode(reference N) const {
auto I = N.getIterator();
if (I == begin())
return nullptr;
return &*std::prev(I);
}
- /// \brief Get the previous node, or \c nullptr for the list head.
+ /// Get the previous node, or \c nullptr for the list head.
const_pointer getPrevNode(const_reference N) const {
return getPrevNode(const_cast<reference >(N));
}
- /// \brief Get the next node, or \c nullptr for the list tail.
+ /// Get the next node, or \c nullptr for the list tail.
pointer getNextNode(reference N) const {
auto Next = std::next(N.getIterator());
if (Next == end())
return nullptr;
return &*Next;
}
- /// \brief Get the next node, or \c nullptr for the list tail.
+ /// Get the next node, or \c nullptr for the list tail.
const_pointer getNextNode(const_reference N) const {
return getNextNode(const_cast<reference >(N));
}
public:
/// @name Adjacent Node Accessors
/// @{
- /// \brief Get the previous node, or \c nullptr for the list head.
+ /// Get the previous node, or \c nullptr for the list head.
NodeTy *getPrevNode() {
// Should be separated to a reused function, but then we couldn't use auto
// (and would need the type of the list).
return List.getPrevNode(*static_cast<NodeTy *>(this));
}
- /// \brief Get the previous node, or \c nullptr for the list head.
+ /// Get the previous node, or \c nullptr for the list head.
const NodeTy *getPrevNode() const {
return const_cast<ilist_node_with_parent *>(this)->getPrevNode();
}
- /// \brief Get the next node, or \c nullptr for the list tail.
+ /// Get the next node, or \c nullptr for the list tail.
NodeTy *getNextNode() {
// Should be separated to a reused function, but then we couldn't use auto
// (and would need the type of the list).
return List.getNextNode(*static_cast<NodeTy *>(this));
}
- /// \brief Get the next node, or \c nullptr for the list tail.
+ /// Get the next node, or \c nullptr for the list tail.
const NodeTy *getNextNode() const {
return const_cast<ilist_node_with_parent *>(this)->getNextNode();
}
namespace llvm {
-/// \brief CRTP base class which implements the entire standard iterator facade
+/// CRTP base class which implements the entire standard iterator facade
/// in terms of a minimal subset of the interface.
///
/// Use this when it is reasonable to implement most of the iterator
}
};
-/// \brief CRTP base class for adapting an iterator to a different type.
+/// CRTP base class for adapting an iterator to a different type.
///
/// This class can be used through CRTP to adapt one iterator into another.
/// Typically this is done through providing in the derived class a custom \c
ReferenceT operator*() const { return *I; }
};
-/// \brief An iterator type that allows iterating over the pointees via some
+/// An iterator type that allows iterating over the pointees via some
/// other iterator.
///
/// The typical usage of this is to expose a type that iterates over Ts, but
namespace llvm {
-/// \brief A range adaptor for a pair of iterators.
+/// A range adaptor for a pair of iterators.
///
/// This just wraps two iterators into a range-compatible interface. Nothing
/// fancy at all.
IteratorT end() const { return end_iterator; }
};
-/// \brief Convenience function for iterating over sub-ranges.
+/// Convenience function for iterating over sub-ranges.
///
/// This provides a bit of syntactic sugar to make using sub-ranges
/// in for loops a bit easier. Analogous to std::make_pair().
/// http://llvm.org/docs/AliasAnalysis.html#ModRefInfo
ModRefInfo getModRefInfo(ImmutableCallSite CS1, ImmutableCallSite CS2);
- /// \brief Return information about whether a particular call site modifies
+ /// Return information about whether a particular call site modifies
/// or reads the specified memory location \p MemLoc before instruction \p I
/// in a BasicBlock. An ordered basic block \p OBB can be used to speed up
/// instruction ordering queries inside the BasicBlock containing \p I.
const MemoryLocation &MemLoc, DominatorTree *DT,
OrderedBasicBlock *OBB = nullptr);
- /// \brief A convenience wrapper to synthesize a memory location.
+ /// A convenience wrapper to synthesize a memory location.
ModRefInfo callCapturesBefore(const Instruction *I, const Value *P,
uint64_t Size, DominatorTree *DT,
OrderedBasicBlock *OBB = nullptr) {
}
~AAEvaluator();
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
private:
class raw_ostream;
class Value;
-/// \brief A cache of \@llvm.assume calls within a function.
+/// A cache of \@llvm.assume calls within a function.
///
/// This cache provides fast lookup of assumptions within a function by caching
/// them and amortizing the cost of scanning for them across all queries. Passes
/// register any new \@llvm.assume calls that they create. Deletions of
/// \@llvm.assume calls do not require special handling.
class AssumptionCache {
- /// \brief The function for which this cache is handling assumptions.
+ /// The function for which this cache is handling assumptions.
///
/// We track this to lazily populate our assumptions.
Function &F;
- /// \brief Vector of weak value handles to calls of the \@llvm.assume
+ /// Vector of weak value handles to calls of the \@llvm.assume
/// intrinsic.
SmallVector<WeakTrackingVH, 4> AssumeHandles;
friend AffectedValueCallbackVH;
- /// \brief A map of values about which an assumption might be providing
+ /// A map of values about which an assumption might be providing
/// information to the relevant set of assumptions.
using AffectedValuesMap =
DenseMap<AffectedValueCallbackVH, SmallVector<WeakTrackingVH, 1>,
/// Copy affected values in the cache for OV to be affected values for NV.
void copyAffectedValuesInCache(Value *OV, Value *NV);
- /// \brief Flag tracking whether we have scanned the function yet.
+ /// Flag tracking whether we have scanned the function yet.
///
/// We want to be as lazy about this as possible, and so we scan the function
/// at the last moment.
bool Scanned = false;
- /// \brief Scan the function for assumptions and add them to the cache.
+ /// Scan the function for assumptions and add them to the cache.
void scanFunction();
public:
- /// \brief Construct an AssumptionCache from a function by scanning all of
+ /// Construct an AssumptionCache from a function by scanning all of
/// its instructions.
AssumptionCache(Function &F) : F(F) {}
return false;
}
- /// \brief Add an \@llvm.assume intrinsic to this function's cache.
+ /// Add an \@llvm.assume intrinsic to this function's cache.
///
/// The call passed in must be an instruction within this function and must
/// not already be in the cache.
void registerAssumption(CallInst *CI);
- /// \brief Update the cache of values being affected by this assumption (i.e.
+ /// Update the cache of values being affected by this assumption (i.e.
/// the values about which this assumption provides information).
void updateAffectedValues(CallInst *CI);
- /// \brief Clear the cache of \@llvm.assume intrinsics for a function.
+ /// Clear the cache of \@llvm.assume intrinsics for a function.
///
/// It will be re-scanned the next time it is requested.
void clear() {
Scanned = false;
}
- /// \brief Access the list of assumption handles currently tracked for this
+ /// Access the list of assumption handles currently tracked for this
/// function.
///
/// Note that these produce weak handles that may be null. The caller must
return AssumeHandles;
}
- /// \brief Access the list of assumptions which affect this value.
+ /// Access the list of assumptions which affect this value.
MutableArrayRef<WeakTrackingVH> assumptionsFor(const Value *V) {
if (!Scanned)
scanFunction();
}
};
-/// \brief A function analysis which provides an \c AssumptionCache.
+/// A function analysis which provides an \c AssumptionCache.
///
/// This analysis is intended for use with the new pass manager and will vend
/// assumption caches for a given function.
}
};
-/// \brief Printer pass for the \c AssumptionAnalysis results.
+/// Printer pass for the \c AssumptionAnalysis results.
class AssumptionPrinterPass : public PassInfoMixin<AssumptionPrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief An immutable pass that tracks lazily created \c AssumptionCache
+/// An immutable pass that tracks lazily created \c AssumptionCache
/// objects.
///
/// This is essentially a workaround for the legacy pass manager's weaknesses
FunctionCallsMap AssumptionCaches;
public:
- /// \brief Get the cached assumptions for a function.
+ /// Get the cached assumptions for a function.
///
/// If no assumptions are cached, this will scan the function. Otherwise, the
/// existing cache will be returned.
const DecomposedGEP &DecompGEP, const DecomposedGEP &DecompObject,
uint64_t ObjectAccessSize);
- /// \brief A Heuristic for aliasGEP that searches for a constant offset
+ /// A Heuristic for aliasGEP that searches for a constant offset
/// between the variables.
///
/// GetLinearExpression has some limitations, as generally zext(%x + 1)
/// floating points.
BlockFrequency getBlockFreq(const BasicBlock *BB) const;
- /// \brief Returns the estimated profile count of \p BB.
+ /// Returns the estimated profile count of \p BB.
/// This computes the relative block frequency of \p BB and multiplies it by
/// the enclosing function's count (if available) and returns the value.
Optional<uint64_t> getBlockProfileCount(const BasicBlock *BB) const;
- /// \brief Returns the estimated profile count of \p Freq.
+ /// Returns the estimated profile count of \p Freq.
/// This uses the frequency \p Freq and multiplies it by
/// the enclosing function's count (if available) and returns the value.
Optional<uint64_t> getProfileCountFromFreq(uint64_t Freq) const;
- /// \brief Returns true if \p BB is an irreducible loop header
+ /// Returns true if \p BB is an irreducible loop header
/// block. Otherwise false.
bool isIrrLoopHeader(const BasicBlock *BB);
void print(raw_ostream &OS) const;
};
-/// \brief Analysis pass which computes \c BlockFrequencyInfo.
+/// Analysis pass which computes \c BlockFrequencyInfo.
class BlockFrequencyAnalysis
: public AnalysisInfoMixin<BlockFrequencyAnalysis> {
friend AnalysisInfoMixin<BlockFrequencyAnalysis>;
static AnalysisKey Key;
public:
- /// \brief Provide the result type for this analysis pass.
+ /// Provide the result type for this analysis pass.
using Result = BlockFrequencyInfo;
- /// \brief Run the analysis pass over a function and produce BFI.
+ /// Run the analysis pass over a function and produce BFI.
Result run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Printer pass for the \c BlockFrequencyInfo results.
+/// Printer pass for the \c BlockFrequencyInfo results.
class BlockFrequencyPrinterPass
: public PassInfoMixin<BlockFrequencyPrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Legacy analysis pass which computes \c BlockFrequencyInfo.
+/// Legacy analysis pass which computes \c BlockFrequencyInfo.
class BlockFrequencyInfoWrapperPass : public FunctionPass {
BlockFrequencyInfo BFI;
// This is part of a workaround for a GCC 4.7 crash on lambdas.
template <class BT> struct BlockEdgesAdder;
-/// \brief Mass of a block.
+/// Mass of a block.
///
/// This class implements a sort of fixed-point fraction always between 0.0 and
/// 1.0. getMass() == std::numeric_limits<uint64_t>::max() indicates a value of
bool operator!() const { return isEmpty(); }
- /// \brief Add another mass.
+ /// Add another mass.
///
/// Adds another mass, saturating at \a isFull() rather than overflowing.
BlockMass &operator+=(BlockMass X) {
return *this;
}
- /// \brief Subtract another mass.
+ /// Subtract another mass.
///
/// Subtracts another mass, saturating at \a isEmpty() rather than
/// undeflowing.
bool operator<(BlockMass X) const { return Mass < X.Mass; }
bool operator>(BlockMass X) const { return Mass > X.Mass; }
- /// \brief Convert to scaled number.
+ /// Convert to scaled number.
///
/// Convert to \a ScaledNumber. \a isFull() gives 1.0, while \a isEmpty()
/// gives slightly above 0.0.
static const bool value = true;
};
-/// \brief Base class for BlockFrequencyInfoImpl
+/// Base class for BlockFrequencyInfoImpl
///
/// BlockFrequencyInfoImplBase has supporting data structures and some
/// algorithms for BlockFrequencyInfoImplBase. Only algorithms that depend on
using Scaled64 = ScaledNumber<uint64_t>;
using BlockMass = bfi_detail::BlockMass;
- /// \brief Representative of a block.
+ /// Representative of a block.
///
/// This is a simple wrapper around an index into the reverse-post-order
/// traversal of the blocks.
}
};
- /// \brief Stats about a block itself.
+ /// Stats about a block itself.
struct FrequencyData {
Scaled64 Scaled;
uint64_t Integer;
};
- /// \brief Data about a loop.
+ /// Data about a loop.
///
/// Contains the data necessary to represent a loop as a pseudo-node once it's
/// packaged.
}
};
- /// \brief Index of loop information.
+ /// Index of loop information.
struct WorkingData {
BlockNode Node; ///< This node.
LoopData *Loop = nullptr; ///< The loop this block is inside.
return Loop->Parent->Parent;
}
- /// \brief Resolve a node to its representative.
+ /// Resolve a node to its representative.
///
/// Get the node currently representing Node, which could be a containing
/// loop.
return L;
}
- /// \brief Get the appropriate mass for a node.
+ /// Get the appropriate mass for a node.
///
/// Get appropriate mass for Node. If Node is a loop-header (whose loop
/// has been packaged), returns the mass of its pseudo-node. If it's a
return Loop->Parent->Mass;
}
- /// \brief Has ContainingLoop been packaged up?
+ /// Has ContainingLoop been packaged up?
bool isPackaged() const { return getResolvedNode() != Node; }
- /// \brief Has Loop been packaged up?
+ /// Has Loop been packaged up?
bool isAPackage() const { return isLoopHeader() && Loop->IsPackaged; }
- /// \brief Has Loop been packaged up twice?
+ /// Has Loop been packaged up twice?
bool isADoublePackage() const {
return isDoubleLoopHeader() && Loop->Parent->IsPackaged;
}
};
- /// \brief Unscaled probability weight.
+ /// Unscaled probability weight.
///
/// Probability weight for an edge in the graph (including the
/// successor/target node).
: Type(Type), TargetNode(TargetNode), Amount(Amount) {}
};
- /// \brief Distribution of unscaled probability weight.
+ /// Distribution of unscaled probability weight.
///
/// Distribution of unscaled probability weight to a set of successors.
///
add(Node, Amount, Weight::Backedge);
}
- /// \brief Normalize the distribution.
+ /// Normalize the distribution.
///
/// Combines multiple edges to the same \a Weight::TargetNode and scales
/// down so that \a Total fits into 32-bits.
void add(const BlockNode &Node, uint64_t Amount, Weight::DistType Type);
};
- /// \brief Data about each block. This is used downstream.
+ /// Data about each block. This is used downstream.
std::vector<FrequencyData> Freqs;
- /// \brief Whether each block is an irreducible loop header.
+ /// Whether each block is an irreducible loop header.
/// This is used downstream.
SparseBitVector<> IsIrrLoopHeader;
- /// \brief Loop data: see initializeLoops().
+ /// Loop data: see initializeLoops().
std::vector<WorkingData> Working;
- /// \brief Indexed information about loops.
+ /// Indexed information about loops.
std::list<LoopData> Loops;
- /// \brief Virtual destructor.
+ /// Virtual destructor.
///
/// Need a virtual destructor to mask the compiler warning about
/// getBlockName().
virtual ~BlockFrequencyInfoImplBase() = default;
- /// \brief Add all edges out of a packaged loop to the distribution.
+ /// Add all edges out of a packaged loop to the distribution.
///
/// Adds all edges from LocalLoopHead to Dist. Calls addToDist() to add each
/// successor edge.
bool addLoopSuccessorsToDist(const LoopData *OuterLoop, LoopData &Loop,
Distribution &Dist);
- /// \brief Add an edge to the distribution.
+ /// Add an edge to the distribution.
///
/// Adds an edge to Succ to Dist. If \c LoopHead.isValid(), then whether the
/// edge is local/exit/backedge is in the context of LoopHead. Otherwise,
return *Working[Head.Index].Loop;
}
- /// \brief Analyze irreducible SCCs.
+ /// Analyze irreducible SCCs.
///
/// Separate irreducible SCCs from \c G, which is an explict graph of \c
/// OuterLoop (or the top-level function, if \c OuterLoop is \c nullptr).
analyzeIrreducible(const bfi_detail::IrreducibleGraph &G, LoopData *OuterLoop,
std::list<LoopData>::iterator Insert);
- /// \brief Update a loop after packaging irreducible SCCs inside of it.
+ /// Update a loop after packaging irreducible SCCs inside of it.
///
/// Update \c OuterLoop. Before finding irreducible control flow, it was
/// partway through \a computeMassInLoop(), so \a LoopData::Exits and \a
/// up need to be removed from \a OuterLoop::Nodes.
void updateLoopWithIrreducible(LoopData &OuterLoop);
- /// \brief Distribute mass according to a distribution.
+ /// Distribute mass according to a distribution.
///
/// Distributes the mass in Source according to Dist. If LoopHead.isValid(),
/// backedges and exits are stored in its entry in Loops.
void distributeMass(const BlockNode &Source, LoopData *OuterLoop,
Distribution &Dist);
- /// \brief Compute the loop scale for a loop.
+ /// Compute the loop scale for a loop.
void computeLoopScale(LoopData &Loop);
/// Adjust the mass of all headers in an irreducible loop.
void distributeIrrLoopHeaderMass(Distribution &Dist);
- /// \brief Package up a loop.
+ /// Package up a loop.
void packageLoop(LoopData &Loop);
- /// \brief Unwrap loops.
+ /// Unwrap loops.
void unwrapLoops();
- /// \brief Finalize frequency metrics.
+ /// Finalize frequency metrics.
///
/// Calculates final frequencies and cleans up no-longer-needed data
/// structures.
void finalizeMetrics();
- /// \brief Clear all memory.
+ /// Clear all memory.
void clear();
virtual std::string getBlockName(const BlockNode &Node) const;
using LoopInfoT = MachineLoopInfo;
};
-/// \brief Get the name of a MachineBasicBlock.
+/// Get the name of a MachineBasicBlock.
///
/// Get the name of a MachineBasicBlock. It's templated so that including from
/// CodeGen is unnecessary (that would be a layering issue).
return (MachineName + "[" + BB->getName() + "]").str();
return MachineName.str();
}
-/// \brief Get the name of a BasicBlock.
+/// Get the name of a BasicBlock.
template <> inline std::string getBlockName(const BasicBlock *BB) {
assert(BB && "Unexpected nullptr");
return BB->getName().str();
}
-/// \brief Graph of irreducible control flow.
+/// Graph of irreducible control flow.
///
/// This graph is used for determining the SCCs in a loop (or top-level
/// function) that has irreducible control flow.
std::vector<IrrNode> Nodes;
SmallDenseMap<uint32_t, IrrNode *, 4> Lookup;
- /// \brief Construct an explicit graph containing irreducible control flow.
+ /// Construct an explicit graph containing irreducible control flow.
///
/// Construct an explicit graph of the control flow in \c OuterLoop (or the
/// top-level function, if \c OuterLoop is \c nullptr). Uses \c
} // end namespace bfi_detail
-/// \brief Shared implementation for block frequency analysis.
+/// Shared implementation for block frequency analysis.
///
/// This is a shared implementation of BlockFrequencyInfo and
/// MachineBlockFrequencyInfo, and calculates the relative frequencies of
return RPOT[Node.Index];
}
- /// \brief Run (and save) a post-order traversal.
+ /// Run (and save) a post-order traversal.
///
/// Saves a reverse post-order traversal of all the nodes in \a F.
void initializeRPOT();
- /// \brief Initialize loop data.
+ /// Initialize loop data.
///
/// Build up \a Loops using \a LoopInfo. \a LoopInfo gives us a mapping from
/// each block to the deepest loop it's in, but we need the inverse. For each
/// the loop that are not in sub-loops.
void initializeLoops();
- /// \brief Propagate to a block's successors.
+ /// Propagate to a block's successors.
///
/// In the context of distributing mass through \c OuterLoop, divide the mass
/// currently assigned to \c Node between its successors.
/// \return \c true unless there's an irreducible backedge.
bool propagateMassToSuccessors(LoopData *OuterLoop, const BlockNode &Node);
- /// \brief Compute mass in a particular loop.
+ /// Compute mass in a particular loop.
///
/// Assign mass to \c Loop's header, and then for each block in \c Loop in
/// reverse post-order, distribute mass to its successors. Only visits nodes
/// \return \c true unless there's an irreducible backedge.
bool computeMassInLoop(LoopData &Loop);
- /// \brief Try to compute mass in the top-level function.
+ /// Try to compute mass in the top-level function.
///
/// Assign mass to the entry block, and then for each block in reverse
/// post-order, distribute mass to its successors. Skips nodes that have
/// \return \c true unless there's an irreducible backedge.
bool tryToComputeMassInFunction();
- /// \brief Compute mass in (and package up) irreducible SCCs.
+ /// Compute mass in (and package up) irreducible SCCs.
///
/// Find the irreducible SCCs in \c OuterLoop, add them to \a Loops (in front
/// of \c Insert), and call \a computeMassInLoop() on each of them.
void computeIrreducibleMass(LoopData *OuterLoop,
std::list<LoopData>::iterator Insert);
- /// \brief Compute mass in all loops.
+ /// Compute mass in all loops.
///
/// For each loop bottom-up, call \a computeMassInLoop().
///
/// \post \a computeMassInLoop() has returned \c true for every loop.
void computeMassInLoops();
- /// \brief Compute mass in the top-level function.
+ /// Compute mass in the top-level function.
///
/// Uses \a tryToComputeMassInFunction() and \a computeIrreducibleMass() to
/// compute mass in the top-level function.
const BranchProbabilityInfoT &getBPI() const { return *BPI; }
- /// \brief Print the frequencies for the current function.
+ /// Print the frequencies for the current function.
///
/// Prints the frequencies for the blocks in the current function.
///
class TargetLibraryInfo;
class Value;
-/// \brief Analysis providing branch probability information.
+/// Analysis providing branch probability information.
///
/// This is a function analysis which provides information on the relative
/// probabilities of each "edge" in the function's CFG where such an edge is
void print(raw_ostream &OS) const;
- /// \brief Get an edge's probability, relative to other out-edges of the Src.
+ /// Get an edge's probability, relative to other out-edges of the Src.
///
/// This routine provides access to the fractional probability between zero
/// (0%) and one (100%) of this edge executing, relative to other edges
BranchProbability getEdgeProbability(const BasicBlock *Src,
unsigned IndexInSuccessors) const;
- /// \brief Get the probability of going from Src to Dst.
+ /// Get the probability of going from Src to Dst.
///
/// It returns the sum of all probabilities for edges from Src to Dst.
BranchProbability getEdgeProbability(const BasicBlock *Src,
BranchProbability getEdgeProbability(const BasicBlock *Src,
succ_const_iterator Dst) const;
- /// \brief Test if an edge is hot relative to other out-edges of the Src.
+ /// Test if an edge is hot relative to other out-edges of the Src.
///
/// Check whether this edge out of the source block is 'hot'. We define hot
/// as having a relative probability >= 80%.
bool isEdgeHot(const BasicBlock *Src, const BasicBlock *Dst) const;
- /// \brief Retrieve the hot successor of a block if one exists.
+ /// Retrieve the hot successor of a block if one exists.
///
/// Given a basic block, look through its successors and if one exists for
/// which \see isEdgeHot would return true, return that successor block.
const BasicBlock *getHotSucc(const BasicBlock *BB) const;
- /// \brief Print an edge's probability.
+ /// Print an edge's probability.
///
/// Retrieves an edge's probability similarly to \see getEdgeProbability, but
/// then prints that probability to the provided stream. That stream is then
raw_ostream &printEdgeProbability(raw_ostream &OS, const BasicBlock *Src,
const BasicBlock *Dst) const;
- /// \brief Set the raw edge probability for the given edge.
+ /// Set the raw edge probability for the given edge.
///
/// This allows a pass to explicitly set the edge probability for an edge. It
/// can be used when updating the CFG to update and preserve the branch
DenseMap<Edge, BranchProbability> Probs;
- /// \brief Track the last function we run over for printing.
+ /// Track the last function we run over for printing.
const Function *LastF;
- /// \brief Track the set of blocks directly succeeded by a returning block.
+ /// Track the set of blocks directly succeeded by a returning block.
SmallPtrSet<const BasicBlock *, 16> PostDominatedByUnreachable;
- /// \brief Track the set of blocks that always lead to a cold call.
+ /// Track the set of blocks that always lead to a cold call.
SmallPtrSet<const BasicBlock *, 16> PostDominatedByColdCall;
void updatePostDominatedByUnreachable(const BasicBlock *BB);
bool calcInvokeHeuristics(const BasicBlock *BB);
};
-/// \brief Analysis pass which computes \c BranchProbabilityInfo.
+/// Analysis pass which computes \c BranchProbabilityInfo.
class BranchProbabilityAnalysis
: public AnalysisInfoMixin<BranchProbabilityAnalysis> {
friend AnalysisInfoMixin<BranchProbabilityAnalysis>;
static AnalysisKey Key;
public:
- /// \brief Provide the result type for this analysis pass.
+ /// Provide the result type for this analysis pass.
using Result = BranchProbabilityInfo;
- /// \brief Run the analysis pass over a function and produce BPI.
+ /// Run the analysis pass over a function and produce BPI.
BranchProbabilityInfo run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Printer pass for the \c BranchProbabilityAnalysis results.
+/// Printer pass for the \c BranchProbabilityAnalysis results.
class BranchProbabilityPrinterPass
: public PassInfoMixin<BranchProbabilityPrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Legacy analysis pass which computes \c BranchProbabilityInfo.
+/// Legacy analysis pass which computes \c BranchProbabilityInfo.
class BranchProbabilityInfoWrapperPass : public FunctionPass {
BranchProbabilityInfo BPI;
bool isCriticalEdge(const TerminatorInst *TI, unsigned SuccNum,
bool AllowIdenticalEdges = false);
-/// \brief Determine whether instruction 'To' is reachable from 'From',
+/// Determine whether instruction 'To' is reachable from 'From',
/// returning true if uncertain.
///
/// Determine whether there is a path from From to To within a single function.
const DominatorTree *DT = nullptr,
const LoopInfo *LI = nullptr);
-/// \brief Determine whether block 'To' is reachable from 'From', returning
+/// Determine whether block 'To' is reachable from 'From', returning
/// true if uncertain.
///
/// Determine whether there is a path from From to To within a single function.
const DominatorTree *DT = nullptr,
const LoopInfo *LI = nullptr);
-/// \brief Determine whether there is at least one path from a block in
+/// Determine whether there is at least one path from a block in
/// 'Worklist' to 'StopBB', returning true if uncertain.
///
/// Determine whether there is a path from at least one block in Worklist to
const DominatorTree *DT = nullptr,
const LoopInfo *LI = nullptr);
-/// \brief Return true if the control flow in \p RPOTraversal is irreducible.
+/// Return true if the control flow in \p RPOTraversal is irreducible.
///
/// This is a generic implementation to detect CFG irreducibility based on loop
/// info analysis. It can be used for any kind of CFG (Loop, MachineLoop,
/// Evict the given function from cache
void evict(const Function *Fn);
- /// \brief Get the alias summary for the given function
+ /// Get the alias summary for the given function
/// Return nullptr if the summary is not found or not available
const cflaa::AliasSummary *getAliasSummary(const Function &);
AliasResult alias(const MemoryLocation &, const MemoryLocation &);
private:
- /// \brief Ensures that the given function is available in the cache.
+ /// Ensures that the given function is available in the cache.
/// Returns the appropriate entry from the cache.
const Optional<FunctionInfo> &ensureCached(const Function &);
- /// \brief Inserts the given Function into the cache.
+ /// Inserts the given Function into the cache.
void scan(const Function &);
- /// \brief Build summary for a given function
+ /// Build summary for a given function
FunctionInfo buildInfoFrom(const Function &);
const TargetLibraryInfo &TLI;
- /// \brief Cached mapping of Functions to their StratifiedSets.
+ /// Cached mapping of Functions to their StratifiedSets.
/// If a function's sets are currently being built, it is marked
/// in the cache as an Optional without a value. This way, if we
/// have any kind of recursion, it is discernable from a function
return false;
}
- /// \brief Inserts the given Function into the cache.
+ /// Inserts the given Function into the cache.
void scan(Function *Fn);
void evict(Function *Fn);
- /// \brief Ensures that the given function is available in the cache.
+ /// Ensures that the given function is available in the cache.
/// Returns the appropriate entry from the cache.
const Optional<FunctionInfo> &ensureCached(Function *Fn);
- /// \brief Get the alias summary for the given function
+ /// Get the alias summary for the given function
/// Return nullptr if the summary is not found or not available
const cflaa::AliasSummary *getAliasSummary(Function &Fn);
private:
const TargetLibraryInfo &TLI;
- /// \brief Cached mapping of Functions to their StratifiedSets.
+ /// Cached mapping of Functions to their StratifiedSets.
/// If a function's sets are currently being built, it is marked
/// in the cache as an Optional without a value. This way, if we
/// have any kind of recursion, it is discernable from a function
extern template class AnalysisManager<LazyCallGraph::SCC, LazyCallGraph &>;
-/// \brief The CGSCC analysis manager.
+/// The CGSCC analysis manager.
///
/// See the documentation for the AnalysisManager template for detail
/// documentation. This type serves as a convenient way to refer to this
extern template class PassManager<LazyCallGraph::SCC, CGSCCAnalysisManager,
LazyCallGraph &, CGSCCUpdateResult &>;
-/// \brief The CGSCC pass manager.
+/// The CGSCC pass manager.
///
/// See the documentation for the PassManager template for details. It runs
/// a sequence of SCC passes over each SCC that the manager is run over. This
explicit Result(CGSCCAnalysisManager &InnerAM, LazyCallGraph &G)
: InnerAM(&InnerAM), G(&G) {}
- /// \brief Accessor for the analysis manager.
+ /// Accessor for the analysis manager.
CGSCCAnalysisManager &getManager() { return *InnerAM; }
- /// \brief Handler for invalidation of the Module.
+ /// Handler for invalidation of the Module.
///
/// If the proxy analysis itself is preserved, then we assume that the set of
/// SCCs in the Module hasn't changed. Thus any pointers to SCCs in the
&InlinedInternalEdges;
};
-/// \brief The core module pass which does a post-order walk of the SCCs and
+/// The core module pass which does a post-order walk of the SCCs and
/// runs a CGSCC pass over each one.
///
/// Designed to allow composition of a CGSCCPass(Manager) and
return *this;
}
- /// \brief Runs the CGSCC pass across every SCC in the module.
+ /// Runs the CGSCC pass across every SCC in the module.
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM) {
// Setup the CGSCC analysis manager from its proxy.
CGSCCAnalysisManager &CGAM =
CGSCCPassT Pass;
};
-/// \brief A function to deduce a function pass type and wrap it in the
+/// A function to deduce a function pass type and wrap it in the
/// templated adaptor.
template <typename CGSCCPassT>
ModuleToPostOrderCGSCCPassAdaptor<CGSCCPassT>
public:
explicit Result(FunctionAnalysisManager &FAM) : FAM(&FAM) {}
- /// \brief Accessor for the analysis manager.
+ /// Accessor for the analysis manager.
FunctionAnalysisManager &getManager() { return *FAM; }
bool invalidate(LazyCallGraph::SCC &C, const PreservedAnalyses &PA,
LazyCallGraph &G, LazyCallGraph::SCC &C, LazyCallGraph::Node &N,
CGSCCAnalysisManager &AM, CGSCCUpdateResult &UR);
-/// \brief Adaptor that maps from a SCC to its functions.
+/// Adaptor that maps from a SCC to its functions.
///
/// Designed to allow composition of a FunctionPass(Manager) and
/// a CGSCCPassManager. Note that if this pass is constructed with a pointer
return *this;
}
- /// \brief Runs the function pass across every function in the module.
+ /// Runs the function pass across every function in the module.
PreservedAnalyses run(LazyCallGraph::SCC &C, CGSCCAnalysisManager &AM,
LazyCallGraph &CG, CGSCCUpdateResult &UR) {
// Setup the function analysis manager from its proxy.
FunctionPassT Pass;
};
-/// \brief A function to deduce a function pass type and wrap it in the
+/// A function to deduce a function pass type and wrap it in the
/// templated adaptor.
template <typename FunctionPassT>
CGSCCToFunctionPassAdaptor<FunctionPassT>
int MaxIterations;
};
-/// \brief A function to deduce a function pass type and wrap it in the
+/// A function to deduce a function pass type and wrap it in the
/// templated adaptor.
template <typename PassT>
DevirtSCCRepeatedPass<PassT> createDevirtSCCRepeatedPass(PassT Pass,
class Module;
class raw_ostream;
-/// \brief The basic data container for the call graph of a \c Module of IR.
+/// The basic data container for the call graph of a \c Module of IR.
///
/// This class exposes both the interface to the call graph for a module of IR.
///
using FunctionMapTy =
std::map<const Function *, std::unique_ptr<CallGraphNode>>;
- /// \brief A map from \c Function* to \c CallGraphNode*.
+ /// A map from \c Function* to \c CallGraphNode*.
FunctionMapTy FunctionMap;
- /// \brief This node has edges to all external functions and those internal
+ /// This node has edges to all external functions and those internal
/// functions that have their address taken.
CallGraphNode *ExternalCallingNode;
- /// \brief This node has edges to it from all functions making indirect calls
+ /// This node has edges to it from all functions making indirect calls
/// or calling an external function.
std::unique_ptr<CallGraphNode> CallsExternalNode;
- /// \brief Replace the function represented by this node by another.
+ /// Replace the function represented by this node by another.
///
/// This does not rescan the body of the function, so it is suitable when
/// splicing the body of one function to another while also updating all
/// callers from the old function to the new.
void spliceFunction(const Function *From, const Function *To);
- /// \brief Add a function to the call graph, and link the node to all of the
+ /// Add a function to the call graph, and link the node to all of the
/// functions that it calls.
void addToCallGraph(Function *F);
using iterator = FunctionMapTy::iterator;
using const_iterator = FunctionMapTy::const_iterator;
- /// \brief Returns the module the call graph corresponds to.
+ /// Returns the module the call graph corresponds to.
Module &getModule() const { return M; }
inline iterator begin() { return FunctionMap.begin(); }
inline const_iterator begin() const { return FunctionMap.begin(); }
inline const_iterator end() const { return FunctionMap.end(); }
- /// \brief Returns the call graph node for the provided function.
+ /// Returns the call graph node for the provided function.
inline const CallGraphNode *operator[](const Function *F) const {
const_iterator I = FunctionMap.find(F);
assert(I != FunctionMap.end() && "Function not in callgraph!");
return I->second.get();
}
- /// \brief Returns the call graph node for the provided function.
+ /// Returns the call graph node for the provided function.
inline CallGraphNode *operator[](const Function *F) {
const_iterator I = FunctionMap.find(F);
assert(I != FunctionMap.end() && "Function not in callgraph!");
return I->second.get();
}
- /// \brief Returns the \c CallGraphNode which is used to represent
+ /// Returns the \c CallGraphNode which is used to represent
/// undetermined calls into the callgraph.
CallGraphNode *getExternalCallingNode() const { return ExternalCallingNode; }
// modified.
//
- /// \brief Unlink the function from this module, returning it.
+ /// Unlink the function from this module, returning it.
///
/// Because this removes the function from the module, the call graph node is
/// destroyed. This is only valid if the function does not call any other
/// this is to dropAllReferences before calling this.
Function *removeFunctionFromModule(CallGraphNode *CGN);
- /// \brief Similar to operator[], but this will insert a new CallGraphNode for
+ /// Similar to operator[], but this will insert a new CallGraphNode for
/// \c F if one does not already exist.
CallGraphNode *getOrInsertFunction(const Function *F);
};
-/// \brief A node in the call graph for a module.
+/// A node in the call graph for a module.
///
/// Typically represents a function in the call graph. There are also special
/// "null" nodes used to represent theoretical entries in the call graph.
class CallGraphNode {
public:
- /// \brief A pair of the calling instruction (a call or invoke)
+ /// A pair of the calling instruction (a call or invoke)
/// and the call graph node being called.
using CallRecord = std::pair<WeakTrackingVH, CallGraphNode *>;
public:
using CalledFunctionsVector = std::vector<CallRecord>;
- /// \brief Creates a node for the specified function.
+ /// Creates a node for the specified function.
inline CallGraphNode(Function *F) : F(F) {}
CallGraphNode(const CallGraphNode &) = delete;
using iterator = std::vector<CallRecord>::iterator;
using const_iterator = std::vector<CallRecord>::const_iterator;
- /// \brief Returns the function that this call graph node represents.
+ /// Returns the function that this call graph node represents.
Function *getFunction() const { return F; }
inline iterator begin() { return CalledFunctions.begin(); }
inline bool empty() const { return CalledFunctions.empty(); }
inline unsigned size() const { return (unsigned)CalledFunctions.size(); }
- /// \brief Returns the number of other CallGraphNodes in this CallGraph that
+ /// Returns the number of other CallGraphNodes in this CallGraph that
/// reference this node in their callee list.
unsigned getNumReferences() const { return NumReferences; }
- /// \brief Returns the i'th called function.
+ /// Returns the i'th called function.
CallGraphNode *operator[](unsigned i) const {
assert(i < CalledFunctions.size() && "Invalid index");
return CalledFunctions[i].second;
}
- /// \brief Print out this call graph node.
+ /// Print out this call graph node.
void dump() const;
void print(raw_ostream &OS) const;
// modified
//
- /// \brief Removes all edges from this CallGraphNode to any functions it
+ /// Removes all edges from this CallGraphNode to any functions it
/// calls.
void removeAllCalledFunctions() {
while (!CalledFunctions.empty()) {
}
}
- /// \brief Moves all the callee information from N to this node.
+ /// Moves all the callee information from N to this node.
void stealCalledFunctionsFrom(CallGraphNode *N) {
assert(CalledFunctions.empty() &&
"Cannot steal callsite information if I already have some");
std::swap(CalledFunctions, N->CalledFunctions);
}
- /// \brief Adds a function to the list of functions called by this one.
+ /// Adds a function to the list of functions called by this one.
void addCalledFunction(CallSite CS, CallGraphNode *M) {
assert(!CS.getInstruction() || !CS.getCalledFunction() ||
!CS.getCalledFunction()->isIntrinsic() ||
CalledFunctions.pop_back();
}
- /// \brief Removes the edge in the node for the specified call site.
+ /// Removes the edge in the node for the specified call site.
///
/// Note that this method takes linear time, so it should be used sparingly.
void removeCallEdgeFor(CallSite CS);
- /// \brief Removes all call edges from this node to the specified callee
+ /// Removes all call edges from this node to the specified callee
/// function.
///
/// This takes more time to execute than removeCallEdgeTo, so it should not
/// be used unless necessary.
void removeAnyCallEdgeTo(CallGraphNode *Callee);
- /// \brief Removes one edge associated with a null callsite from this node to
+ /// Removes one edge associated with a null callsite from this node to
/// the specified callee function.
void removeOneAbstractEdgeTo(CallGraphNode *Callee);
- /// \brief Replaces the edge in the node for the specified call site with a
+ /// Replaces the edge in the node for the specified call site with a
/// new one.
///
/// Note that this method takes linear time, so it should be used sparingly.
std::vector<CallRecord> CalledFunctions;
- /// \brief The number of times that this CallGraphNode occurs in the
+ /// The number of times that this CallGraphNode occurs in the
/// CalledFunctions array of this or other CallGraphNodes.
unsigned NumReferences = 0;
void DropRef() { --NumReferences; }
void AddRef() { ++NumReferences; }
- /// \brief A special function that should only be used by the CallGraph class.
+ /// A special function that should only be used by the CallGraph class.
void allReferencesDropped() { NumReferences = 0; }
};
-/// \brief An analysis pass to compute the \c CallGraph for a \c Module.
+/// An analysis pass to compute the \c CallGraph for a \c Module.
///
/// This class implements the concept of an analysis pass used by the \c
/// ModuleAnalysisManager to run an analysis over a module and cache the
static AnalysisKey Key;
public:
- /// \brief A formulaic type to inform clients of the result type.
+ /// A formulaic type to inform clients of the result type.
using Result = CallGraph;
- /// \brief Compute the \c CallGraph for the module \c M.
+ /// Compute the \c CallGraph for the module \c M.
///
/// The real work here is done in the \c CallGraph constructor.
CallGraph run(Module &M, ModuleAnalysisManager &) { return CallGraph(M); }
};
-/// \brief Printer pass for the \c CallGraphAnalysis results.
+/// Printer pass for the \c CallGraphAnalysis results.
class CallGraphPrinterPass : public PassInfoMixin<CallGraphPrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
-/// \brief The \c ModulePass which wraps up a \c CallGraph and the logic to
+/// The \c ModulePass which wraps up a \c CallGraph and the logic to
/// build it.
///
/// This class exposes both the interface to the call graph container and the
CallGraphWrapperPass();
~CallGraphWrapperPass() override;
- /// \brief The internal \c CallGraph around which the rest of this interface
+ /// The internal \c CallGraph around which the rest of this interface
/// is wrapped.
const CallGraph &getCallGraph() const { return *G; }
CallGraph &getCallGraph() { return *G; }
using iterator = CallGraph::iterator;
using const_iterator = CallGraph::const_iterator;
- /// \brief Returns the module the call graph corresponds to.
+ /// Returns the module the call graph corresponds to.
Module &getModule() const { return G->getModule(); }
inline iterator begin() { return G->begin(); }
inline const_iterator begin() const { return G->begin(); }
inline const_iterator end() const { return G->end(); }
- /// \brief Returns the call graph node for the provided function.
+ /// Returns the call graph node for the provided function.
inline const CallGraphNode *operator[](const Function *F) const {
return (*G)[F];
}
- /// \brief Returns the call graph node for the provided function.
+ /// Returns the call graph node for the provided function.
inline CallGraphNode *operator[](const Function *F) { return (*G)[F]; }
- /// \brief Returns the \c CallGraphNode which is used to represent
+ /// Returns the \c CallGraphNode which is used to represent
/// undetermined calls into the callgraph.
CallGraphNode *getExternalCallingNode() const {
return G->getExternalCallingNode();
// modified.
//
- /// \brief Unlink the function from this module, returning it.
+ /// Unlink the function from this module, returning it.
///
/// Because this removes the function from the module, the call graph node is
/// destroyed. This is only valid if the function does not call any other
return G->removeFunctionFromModule(CGN);
}
- /// \brief Similar to operator[], but this will insert a new CallGraphNode for
+ /// Similar to operator[], but this will insert a new CallGraphNode for
/// \c F if one does not already exist.
CallGraphNode *getOrInsertFunction(const Function *F) {
return G->getOrInsertFunction(F);
class TargetTransformInfo;
class Value;
-/// \brief Check whether a call will lower to something small.
+/// Check whether a call will lower to something small.
///
/// This tests checks whether this callsite will lower to something
/// significantly cheaper than a traditional call, often a single
/// return true, so will this function.
bool callIsSmall(ImmutableCallSite CS);
-/// \brief Utility to calculate the size and a few similar metrics for a set
+/// Utility to calculate the size and a few similar metrics for a set
/// of basic blocks.
struct CodeMetrics {
- /// \brief True if this function contains a call to setjmp or other functions
+ /// True if this function contains a call to setjmp or other functions
/// with attribute "returns twice" without having the attribute itself.
bool exposesReturnsTwice = false;
- /// \brief True if this function calls itself.
+ /// True if this function calls itself.
bool isRecursive = false;
- /// \brief True if this function cannot be duplicated.
+ /// True if this function cannot be duplicated.
///
/// True if this function contains one or more indirect branches, or it contains
/// one or more 'noduplicate' instructions.
bool notDuplicatable = false;
- /// \brief True if this function contains a call to a convergent function.
+ /// True if this function contains a call to a convergent function.
bool convergent = false;
- /// \brief True if this function calls alloca (in the C sense).
+ /// True if this function calls alloca (in the C sense).
bool usesDynamicAlloca = false;
- /// \brief Number of instructions in the analyzed blocks.
+ /// Number of instructions in the analyzed blocks.
unsigned NumInsts = false;
- /// \brief Number of analyzed blocks.
+ /// Number of analyzed blocks.
unsigned NumBlocks = false;
- /// \brief Keeps track of basic block code size estimates.
+ /// Keeps track of basic block code size estimates.
DenseMap<const BasicBlock *, unsigned> NumBBInsts;
- /// \brief Keep track of the number of calls to 'big' functions.
+ /// Keep track of the number of calls to 'big' functions.
unsigned NumCalls = false;
- /// \brief The number of calls to internal functions with a single caller.
+ /// The number of calls to internal functions with a single caller.
///
/// These are likely targets for future inlining, likely exposed by
/// interleaved devirtualization.
unsigned NumInlineCandidates = 0;
- /// \brief How many instructions produce vector values.
+ /// How many instructions produce vector values.
///
/// The inliner is more aggressive with inlining vector kernels.
unsigned NumVectorInsts = 0;
- /// \brief How many 'ret' instructions the blocks contain.
+ /// How many 'ret' instructions the blocks contain.
unsigned NumRets = 0;
- /// \brief Add information about a block to the current state.
+ /// Add information about a block to the current state.
void analyzeBasicBlock(const BasicBlock *BB, const TargetTransformInfo &TTI,
const SmallPtrSetImpl<const Value*> &EphValues);
- /// \brief Collect a loop's ephemeral values (those used only by an assume
+ /// Collect a loop's ephemeral values (those used only by an assume
/// or similar intrinsics in the loop).
static void collectEphemeralValues(const Loop *L, AssumptionCache *AC,
SmallPtrSetImpl<const Value *> &EphValues);
- /// \brief Collect a functions's ephemeral values (those used only by an
+ /// Collect a functions's ephemeral values (those used only by an
/// assume or similar intrinsics in the function).
static void collectEphemeralValues(const Function *L, AssumptionCache *AC,
SmallPtrSetImpl<const Value *> &EphValues);
Constant *RHS, const DataLayout &DL,
const TargetLibraryInfo *TLI = nullptr);
-/// \brief Attempt to constant fold a binary operation with the specified
+/// Attempt to constant fold a binary operation with the specified
/// operands. If it fails, it returns a constant expression of the specified
/// operands.
Constant *ConstantFoldBinaryOpOperands(unsigned Opcode, Constant *LHS,
Constant *RHS, const DataLayout &DL);
-/// \brief Attempt to constant fold a select instruction with the specified
+/// Attempt to constant fold a select instruction with the specified
/// operands. The constant result is returned if successful; if not, null is
/// returned.
Constant *ConstantFoldSelectInstruction(Constant *Cond, Constant *V1,
Constant *V2);
-/// \brief Attempt to constant fold a cast with the specified operand. If it
+/// Attempt to constant fold a cast with the specified operand. If it
/// fails, it returns a constant expression of the specified operand.
Constant *ConstantFoldCastOperand(unsigned Opcode, Constant *C, Type *DestTy,
const DataLayout &DL);
Constant *ConstantFoldInsertValueInstruction(Constant *Agg, Constant *Val,
ArrayRef<unsigned> Idxs);
-/// \brief Attempt to constant fold an extractvalue instruction with the
+/// Attempt to constant fold an extractvalue instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
Constant *ConstantFoldExtractValueInstruction(Constant *Agg,
ArrayRef<unsigned> Idxs);
-/// \brief Attempt to constant fold an insertelement instruction with the
+/// Attempt to constant fold an insertelement instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
Constant *ConstantFoldInsertElementInstruction(Constant *Val,
Constant *Elt,
Constant *Idx);
-/// \brief Attempt to constant fold an extractelement instruction with the
+/// Attempt to constant fold an extractelement instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
Constant *ConstantFoldExtractElementInstruction(Constant *Val, Constant *Idx);
-/// \brief Attempt to constant fold a shufflevector instruction with the
+/// Attempt to constant fold a shufflevector instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
Constant *ConstantFoldShuffleVectorInstruction(Constant *V1, Constant *V2,
Constant *ConstantFoldLoadThroughBitcast(Constant *C, Type *DestTy,
const DataLayout &DL);
-/// \brief Check whether the given call has no side-effects.
+/// Check whether the given call has no side-effects.
/// Specifically checks for math routimes which sometimes set errno.
bool isMathLibCallNoop(CallSite CS, const TargetLibraryInfo *TLI);
}
namespace llvm {
-/// \brief Default traits class for extracting a graph from an analysis pass.
+/// Default traits class for extracting a graph from an analysis pass.
///
/// This assumes that 'GraphT' is 'AnalysisT *' and so just passes it through.
template <typename AnalysisT, typename GraphT = AnalysisT *>
static AnalysisKey Key;
public:
- /// \brief Provide the result type for this analysis pass.
+ /// Provide the result type for this analysis pass.
using Result = DemandedBits;
- /// \brief Run the analysis pass over a function and produce demanded bits
+ /// Run the analysis pass over a function and produce demanded bits
/// information.
DemandedBits run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Printer pass for DemandedBits
+/// Printer pass for DemandedBits
class DemandedBitsPrinterPass : public PassInfoMixin<DemandedBitsPrinterPass> {
raw_ostream &OS;
SmallVectorImpl<Subscript> &Pair);
}; // class DependenceInfo
- /// \brief AnalysisPass to compute dependence information in a function
+ /// AnalysisPass to compute dependence information in a function
class DependenceAnalysis : public AnalysisInfoMixin<DependenceAnalysis> {
public:
typedef DependenceInfo Result;
friend struct AnalysisInfoMixin<DependenceAnalysis>;
}; // class DependenceAnalysis
- /// \brief Legacy pass manager pass to access dependence information
+ /// Legacy pass manager pass to access dependence information
class DependenceAnalysisWrapperPass : public FunctionPass {
public:
static char ID; // Class identification, replacement for typeinfo
extern template class DominanceFrontierBase<BasicBlock, true>;
extern template class ForwardDominanceFrontierBase<BasicBlock>;
-/// \brief Analysis pass which computes a \c DominanceFrontier.
+/// Analysis pass which computes a \c DominanceFrontier.
class DominanceFrontierAnalysis
: public AnalysisInfoMixin<DominanceFrontierAnalysis> {
friend AnalysisInfoMixin<DominanceFrontierAnalysis>;
static AnalysisKey Key;
public:
- /// \brief Provide the result type for this analysis pass.
+ /// Provide the result type for this analysis pass.
using Result = DominanceFrontier;
- /// \brief Run the analysis pass over a function and produce a dominator tree.
+ /// Run the analysis pass over a function and produce a dominator tree.
DominanceFrontier run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Printer pass for the \c DominanceFrontier.
+/// Printer pass for the \c DominanceFrontier.
class DominanceFrontierPrinterPass
: public PassInfoMixin<DominanceFrontierPrinterPass> {
raw_ostream &OS;
Rust
};
-/// \brief See if the given exception handling personality function is one
+/// See if the given exception handling personality function is one
/// that we understand. If so, return a description of it; otherwise return
/// Unknown.
EHPersonality classifyEHPersonality(const Value *Pers);
EHPersonality getDefaultEHPersonality(const Triple &T);
-/// \brief Returns true if this personality function catches asynchronous
+/// Returns true if this personality function catches asynchronous
/// exceptions.
inline bool isAsynchronousEHPersonality(EHPersonality Pers) {
// The two SEH personality functions can catch asynch exceptions. We assume
llvm_unreachable("invalid enum");
}
-/// \brief Returns true if this is a personality function that invokes
+/// Returns true if this is a personality function that invokes
/// handler funclets (which must return to it).
inline bool isFuncletEHPersonality(EHPersonality Pers) {
switch (Pers) {
llvm_unreachable("invalid enum");
}
-/// \brief Return true if this personality may be safely removed if there
+/// Return true if this personality may be safely removed if there
/// are no invoke instructions remaining in the current function.
inline bool isNoOpWithoutInvoke(EHPersonality Pers) {
switch (Pers) {
typedef TinyPtrVector<BasicBlock *> ColorVector;
-/// \brief If an EH funclet personality is in use (see isFuncletEHPersonality),
+/// If an EH funclet personality is in use (see isFuncletEHPersonality),
/// this will recompute which blocks are in which funclet. It is possible that
/// some blocks are in multiple funclets. Consider this analysis to be
/// expensive.
public:
ICallPromotionAnalysis();
- /// \brief Returns reference to array of InstrProfValueData for the given
+ /// Returns reference to array of InstrProfValueData for the given
/// instruction \p I.
///
/// The \p NumVals, \p TotalCount and \p NumCandidates
const unsigned TotalAllocaSizeRecursiveCaller = 1024;
}
-/// \brief Represents the cost of inlining a function.
+/// Represents the cost of inlining a function.
///
/// This supports special values for functions which should "always" or
/// "never" be inlined. Otherwise, the cost represents a unitless amount;
NeverInlineCost = INT_MAX
};
- /// \brief The estimated cost of inlining this callsite.
+ /// The estimated cost of inlining this callsite.
const int Cost;
- /// \brief The adjusted threshold against which this cost was computed.
+ /// The adjusted threshold against which this cost was computed.
const int Threshold;
// Trivial constructor, interesting logic in the factory functions below.
return InlineCost(NeverInlineCost, 0);
}
- /// \brief Test whether the inline cost is low enough for inlining.
+ /// Test whether the inline cost is low enough for inlining.
explicit operator bool() const {
return Cost < Threshold;
}
bool isNever() const { return Cost == NeverInlineCost; }
bool isVariable() const { return !isAlways() && !isNever(); }
- /// \brief Get the inline cost estimate.
+ /// Get the inline cost estimate.
/// It is an error to call this on an "always" or "never" InlineCost.
int getCost() const {
assert(isVariable() && "Invalid access of InlineCost");
return Cost;
}
- /// \brief Get the threshold against which the cost was computed
+ /// Get the threshold against which the cost was computed
int getThreshold() const {
assert(isVariable() && "Invalid access of InlineCost");
return Threshold;
}
- /// \brief Get the cost delta from the threshold for inlining.
+ /// Get the cost delta from the threshold for inlining.
/// Only valid if the cost is of the variable kind. Returns a negative
/// value if the cost is too high to inline.
int getCostDelta() const { return Threshold - getCost(); }
/// and the call/return instruction.
int getCallsiteCost(CallSite CS, const DataLayout &DL);
-/// \brief Get an InlineCost object representing the cost of inlining this
+/// Get an InlineCost object representing the cost of inlining this
/// callsite.
///
/// Note that a default threshold is passed into this function. This threshold
Optional<function_ref<BlockFrequencyInfo &(Function &)>> GetBFI,
ProfileSummaryInfo *PSI, OptimizationRemarkEmitter *ORE = nullptr);
-/// \brief Get an InlineCost with the callee explicitly specified.
+/// Get an InlineCost with the callee explicitly specified.
/// This allows you to calculate the cost of inlining a function via a
/// pointer. This behaves exactly as the version with no explicit callee
/// parameter in all other respects.
Optional<function_ref<BlockFrequencyInfo &(Function &)>> GetBFI,
ProfileSummaryInfo *PSI, OptimizationRemarkEmitter *ORE);
-/// \brief Minimal filter to detect invalid constructs for inlining.
+/// Minimal filter to detect invalid constructs for inlining.
bool isInlineViable(Function &Callee);
}
//
//===----------------------------------------------------------------------===//
//
-/// \brief Compute iterated dominance frontiers using a linear time algorithm.
+/// Compute iterated dominance frontiers using a linear time algorithm.
///
/// The algorithm used here is based on:
///
namespace llvm {
-/// \brief Determine the iterated dominance frontier, given a set of defining
+/// Determine the iterated dominance frontier, given a set of defining
/// blocks, and optionally, a set of live-in blocks.
///
/// In turn, the results can be used to place phi nodes.
IDFCalculator(DominatorTreeBase<BasicBlock, IsPostDom> &DT)
: DT(DT), useLiveIn(false) {}
- /// \brief Give the IDF calculator the set of blocks in which the value is
+ /// Give the IDF calculator the set of blocks in which the value is
/// defined. This is equivalent to the set of starting blocks it should be
/// calculating the IDF for (though later gets pruned based on liveness).
///
DefBlocks = &Blocks;
}
- /// \brief Give the IDF calculator the set of blocks in which the value is
+ /// Give the IDF calculator the set of blocks in which the value is
/// live on entry to the block. This is used to prune the IDF calculation to
/// not include blocks where any phi insertion would be dead.
///
useLiveIn = true;
}
- /// \brief Reset the live-in block set to be empty, and tell the IDF
+ /// Reset the live-in block set to be empty, and tell the IDF
/// calculator to not use liveness anymore.
void resetLiveInBlocks() {
LiveInBlocks = nullptr;
useLiveIn = false;
}
- /// \brief Calculate iterated dominance frontiers
+ /// Calculate iterated dominance frontiers
///
/// This uses the linear-time phi algorithm based on DJ-graphs mentioned in
/// the file-level comment. It performs DF->IDF pruning using the live-in
const LoopInfoT *LI;
};
-/// \brief This is an alternative analysis pass to
+/// This is an alternative analysis pass to
/// BlockFrequencyInfoWrapperPass. The difference is that with this pass the
/// block frequencies are not computed when the analysis pass is executed but
/// rather when the BFI result is explicitly requested by the analysis client.
LazyBlockFrequencyInfoPass();
- /// \brief Compute and return the block frequencies.
+ /// Compute and return the block frequencies.
BlockFrequencyInfo &getBFI() { return LBFI.getCalculated(); }
- /// \brief Compute and return the block frequencies.
+ /// Compute and return the block frequencies.
const BlockFrequencyInfo &getBFI() const { return LBFI.getCalculated(); }
void getAnalysisUsage(AnalysisUsage &AU) const override;
void print(raw_ostream &OS, const Module *M) const override;
};
-/// \brief Helper for client passes to initialize dependent passes for LBFI.
+/// Helper for client passes to initialize dependent passes for LBFI.
void initializeLazyBFIPassPass(PassRegistry &Registry);
}
#endif
class LoopInfo;
class TargetLibraryInfo;
-/// \brief This is an alternative analysis pass to
+/// This is an alternative analysis pass to
/// BranchProbabilityInfoWrapperPass. The difference is that with this pass the
/// branch probabilities are not computed when the analysis pass is executed but
/// rather when the BPI results is explicitly requested by the analysis client.
LazyBranchProbabilityInfoPass();
- /// \brief Compute and return the branch probabilities.
+ /// Compute and return the branch probabilities.
BranchProbabilityInfo &getBPI() { return LBPI->getCalculated(); }
- /// \brief Compute and return the branch probabilities.
+ /// Compute and return the branch probabilities.
const BranchProbabilityInfo &getBPI() const { return LBPI->getCalculated(); }
void getAnalysisUsage(AnalysisUsage &AU) const override;
void print(raw_ostream &OS, const Module *M) const override;
};
-/// \brief Helper for client passes to initialize dependent passes for LBPI.
+/// Helper for client passes to initialize dependent passes for LBPI.
void initializeLazyBPIPassPass(PassRegistry &Registry);
-/// \brief Simple trait class that provides a mapping between BPI passes and the
+/// Simple trait class that provides a mapping between BPI passes and the
/// corresponding BPInfo.
template <typename PassT> struct BPIPassTrait {
static PassT &getBPI(PassT *P) { return *P; }
FunctionAnalysisManager::Invalidator &Inv);
};
-/// \brief Analysis to compute lazy value information.
+/// Analysis to compute lazy value information.
class LazyValueAnalysis : public AnalysisInfoMixin<LazyValueAnalysis> {
public:
typedef LazyValueInfo Result;
class LoopAccessInfo;
class OptimizationRemarkEmitter;
-/// \brief Collection of parameters shared beetween the Loop Vectorizer and the
+/// Collection of parameters shared beetween the Loop Vectorizer and the
/// Loop Access Analysis.
struct VectorizerParams {
- /// \brief Maximum SIMD width.
+ /// Maximum SIMD width.
static const unsigned MaxVectorWidth;
- /// \brief VF as overridden by the user.
+ /// VF as overridden by the user.
static unsigned VectorizationFactor;
- /// \brief Interleave factor as overridden by the user.
+ /// Interleave factor as overridden by the user.
static unsigned VectorizationInterleave;
- /// \brief True if force-vector-interleave was specified by the user.
+ /// True if force-vector-interleave was specified by the user.
static bool isInterleaveForced();
- /// \\brief When performing memory disambiguation checks at runtime do not
+ /// \When performing memory disambiguation checks at runtime do not
/// make more than this number of comparisons.
static unsigned RuntimeMemoryCheckThreshold;
};
-/// \brief Checks memory dependences among accesses to the same underlying
+/// Checks memory dependences among accesses to the same underlying
/// object to determine whether there vectorization is legal or not (and at
/// which vectorization factor).
///
public:
typedef PointerIntPair<Value *, 1, bool> MemAccessInfo;
typedef SmallVector<MemAccessInfo, 8> MemAccessInfoList;
- /// \brief Set of potential dependent memory accesses.
+ /// Set of potential dependent memory accesses.
typedef EquivalenceClasses<MemAccessInfo> DepCandidates;
- /// \brief Dependece between memory access instructions.
+ /// Dependece between memory access instructions.
struct Dependence {
- /// \brief The type of the dependence.
+ /// The type of the dependence.
enum DepType {
// No dependence.
NoDep,
BackwardVectorizableButPreventsForwarding
};
- /// \brief String version of the types.
+ /// String version of the types.
static const char *DepName[];
- /// \brief Index of the source of the dependence in the InstMap vector.
+ /// Index of the source of the dependence in the InstMap vector.
unsigned Source;
- /// \brief Index of the destination of the dependence in the InstMap vector.
+ /// Index of the destination of the dependence in the InstMap vector.
unsigned Destination;
- /// \brief The type of the dependence.
+ /// The type of the dependence.
DepType Type;
Dependence(unsigned Source, unsigned Destination, DepType Type)
: Source(Source), Destination(Destination), Type(Type) {}
- /// \brief Return the source instruction of the dependence.
+ /// Return the source instruction of the dependence.
Instruction *getSource(const LoopAccessInfo &LAI) const;
- /// \brief Return the destination instruction of the dependence.
+ /// Return the destination instruction of the dependence.
Instruction *getDestination(const LoopAccessInfo &LAI) const;
- /// \brief Dependence types that don't prevent vectorization.
+ /// Dependence types that don't prevent vectorization.
static bool isSafeForVectorization(DepType Type);
- /// \brief Lexically forward dependence.
+ /// Lexically forward dependence.
bool isForward() const;
- /// \brief Lexically backward dependence.
+ /// Lexically backward dependence.
bool isBackward() const;
- /// \brief May be a lexically backward dependence type (includes Unknown).
+ /// May be a lexically backward dependence type (includes Unknown).
bool isPossiblyBackward() const;
- /// \brief Print the dependence. \p Instr is used to map the instruction
+ /// Print the dependence. \p Instr is used to map the instruction
/// indices to instructions.
void print(raw_ostream &OS, unsigned Depth,
const SmallVectorImpl<Instruction *> &Instrs) const;
ShouldRetryWithRuntimeCheck(false), SafeForVectorization(true),
RecordDependences(true) {}
- /// \brief Register the location (instructions are given increasing numbers)
+ /// Register the location (instructions are given increasing numbers)
/// of a write access.
void addAccess(StoreInst *SI) {
Value *Ptr = SI->getPointerOperand();
++AccessIdx;
}
- /// \brief Register the location (instructions are given increasing numbers)
+ /// Register the location (instructions are given increasing numbers)
/// of a write access.
void addAccess(LoadInst *LI) {
Value *Ptr = LI->getPointerOperand();
++AccessIdx;
}
- /// \brief Check whether the dependencies between the accesses are safe.
+ /// Check whether the dependencies between the accesses are safe.
///
/// Only checks sets with elements in \p CheckDeps.
bool areDepsSafe(DepCandidates &AccessSets, MemAccessInfoList &CheckDeps,
const ValueToValueMap &Strides);
- /// \brief No memory dependence was encountered that would inhibit
+ /// No memory dependence was encountered that would inhibit
/// vectorization.
bool isSafeForVectorization() const { return SafeForVectorization; }
- /// \brief The maximum number of bytes of a vector register we can vectorize
+ /// The maximum number of bytes of a vector register we can vectorize
/// the accesses safely with.
uint64_t getMaxSafeDepDistBytes() { return MaxSafeDepDistBytes; }
- /// \brief Return the number of elements that are safe to operate on
+ /// Return the number of elements that are safe to operate on
/// simultaneously, multiplied by the size of the element in bits.
uint64_t getMaxSafeRegisterWidth() const { return MaxSafeRegisterWidth; }
- /// \brief In same cases when the dependency check fails we can still
+ /// In same cases when the dependency check fails we can still
/// vectorize the loop with a dynamic array access check.
bool shouldRetryWithRuntimeCheck() { return ShouldRetryWithRuntimeCheck; }
- /// \brief Returns the memory dependences. If null is returned we exceeded
+ /// Returns the memory dependences. If null is returned we exceeded
/// the MaxDependences threshold and this information is not
/// available.
const SmallVectorImpl<Dependence> *getDependences() const {
void clearDependences() { Dependences.clear(); }
- /// \brief The vector of memory access instructions. The indices are used as
+ /// The vector of memory access instructions. The indices are used as
/// instruction identifiers in the Dependence class.
const SmallVectorImpl<Instruction *> &getMemoryInstructions() const {
return InstMap;
}
- /// \brief Generate a mapping between the memory instructions and their
+ /// Generate a mapping between the memory instructions and their
/// indices according to program order.
DenseMap<Instruction *, unsigned> generateInstructionOrderMap() const {
DenseMap<Instruction *, unsigned> OrderMap;
return OrderMap;
}
- /// \brief Find the set of instructions that read or write via \p Ptr.
+ /// Find the set of instructions that read or write via \p Ptr.
SmallVector<Instruction *, 4> getInstructionsForAccess(Value *Ptr,
bool isWrite) const;
PredicatedScalarEvolution &PSE;
const Loop *InnermostLoop;
- /// \brief Maps access locations (ptr, read/write) to program order.
+ /// Maps access locations (ptr, read/write) to program order.
DenseMap<MemAccessInfo, std::vector<unsigned> > Accesses;
- /// \brief Memory access instructions in program order.
+ /// Memory access instructions in program order.
SmallVector<Instruction *, 16> InstMap;
- /// \brief The program order index to be used for the next instruction.
+ /// The program order index to be used for the next instruction.
unsigned AccessIdx;
// We can access this many bytes in parallel safely.
uint64_t MaxSafeDepDistBytes;
- /// \brief Number of elements (from consecutive iterations) that are safe to
+ /// Number of elements (from consecutive iterations) that are safe to
/// operate on simultaneously, multiplied by the size of the element in bits.
/// The size of the element is taken from the memory access that is most
/// restrictive.
uint64_t MaxSafeRegisterWidth;
- /// \brief If we see a non-constant dependence distance we can still try to
+ /// If we see a non-constant dependence distance we can still try to
/// vectorize this loop with runtime checks.
bool ShouldRetryWithRuntimeCheck;
- /// \brief No memory dependence was encountered that would inhibit
+ /// No memory dependence was encountered that would inhibit
/// vectorization.
bool SafeForVectorization;
- //// \brief True if Dependences reflects the dependences in the
+ //// True if Dependences reflects the dependences in the
//// loop. If false we exceeded MaxDependences and
//// Dependences is invalid.
bool RecordDependences;
- /// \brief Memory dependences collected during the analysis. Only valid if
+ /// Memory dependences collected during the analysis. Only valid if
/// RecordDependences is true.
SmallVector<Dependence, 8> Dependences;
- /// \brief Check whether there is a plausible dependence between the two
+ /// Check whether there is a plausible dependence between the two
/// accesses.
///
/// Access \p A must happen before \p B in program order. The two indices
const MemAccessInfo &B, unsigned BIdx,
const ValueToValueMap &Strides);
- /// \brief Check whether the data dependence could prevent store-load
+ /// Check whether the data dependence could prevent store-load
/// forwarding.
///
/// \return false if we shouldn't vectorize at all or avoid larger
bool couldPreventStoreLoadForward(uint64_t Distance, uint64_t TypeByteSize);
};
-/// \brief Holds information about the memory runtime legality checks to verify
+/// Holds information about the memory runtime legality checks to verify
/// that a group of pointers do not overlap.
class RuntimePointerChecking {
public:
unsigned ASId, const ValueToValueMap &Strides,
PredicatedScalarEvolution &PSE);
- /// \brief No run-time memory checking is necessary.
+ /// No run-time memory checking is necessary.
bool empty() const { return Pointers.empty(); }
/// A grouping of pointers. A single memcheck is required between
/// two groups.
struct CheckingPtrGroup {
- /// \brief Create a new pointer checking group containing a single
+ /// Create a new pointer checking group containing a single
/// pointer, with index \p Index in RtCheck.
CheckingPtrGroup(unsigned Index, RuntimePointerChecking &RtCheck)
: RtCheck(RtCheck), High(RtCheck.Pointers[Index].End),
Members.push_back(Index);
}
- /// \brief Tries to add the pointer recorded in RtCheck at index
+ /// Tries to add the pointer recorded in RtCheck at index
/// \p Index to this pointer checking group. We can only add a pointer
/// to a checking group if we will still be able to get
/// the upper and lower bounds of the check. Returns true in case
SmallVector<unsigned, 2> Members;
};
- /// \brief A memcheck which made up of a pair of grouped pointers.
+ /// A memcheck which made up of a pair of grouped pointers.
///
/// These *have* to be const for now, since checks are generated from
/// CheckingPtrGroups in LAI::addRuntimeChecks which is a const member
typedef std::pair<const CheckingPtrGroup *, const CheckingPtrGroup *>
PointerCheck;
- /// \brief Generate the checks and store it. This also performs the grouping
+ /// Generate the checks and store it. This also performs the grouping
/// of pointers to reduce the number of memchecks necessary.
void generateChecks(MemoryDepChecker::DepCandidates &DepCands,
bool UseDependencies);
- /// \brief Returns the checks that generateChecks created.
+ /// Returns the checks that generateChecks created.
const SmallVector<PointerCheck, 4> &getChecks() const { return Checks; }
- /// \brief Decide if we need to add a check between two groups of pointers,
+ /// Decide if we need to add a check between two groups of pointers,
/// according to needsChecking.
bool needsChecking(const CheckingPtrGroup &M,
const CheckingPtrGroup &N) const;
- /// \brief Returns the number of run-time checks required according to
+ /// Returns the number of run-time checks required according to
/// needsChecking.
unsigned getNumberOfChecks() const { return Checks.size(); }
- /// \brief Print the list run-time memory checks necessary.
+ /// Print the list run-time memory checks necessary.
void print(raw_ostream &OS, unsigned Depth = 0) const;
/// Print \p Checks.
/// Holds a partitioning of pointers into "check groups".
SmallVector<CheckingPtrGroup, 2> CheckingGroups;
- /// \brief Check if pointers are in the same partition
+ /// Check if pointers are in the same partition
///
/// \p PtrToPartition contains the partition number for pointers (-1 if the
/// pointer belongs to multiple partitions).
arePointersInSamePartition(const SmallVectorImpl<int> &PtrToPartition,
unsigned PtrIdx1, unsigned PtrIdx2);
- /// \brief Decide whether we need to issue a run-time check for pointer at
+ /// Decide whether we need to issue a run-time check for pointer at
/// index \p I and \p J to prove their independence.
bool needsChecking(unsigned I, unsigned J) const;
- /// \brief Return PointerInfo for pointer at index \p PtrIdx.
+ /// Return PointerInfo for pointer at index \p PtrIdx.
const PointerInfo &getPointerInfo(unsigned PtrIdx) const {
return Pointers[PtrIdx];
}
private:
- /// \brief Groups pointers such that a single memcheck is required
+ /// Groups pointers such that a single memcheck is required
/// between two different groups. This will clear the CheckingGroups vector
/// and re-compute it. We will only group dependecies if \p UseDependencies
/// is true, otherwise we will create a separate group for each pointer.
/// Holds a pointer to the ScalarEvolution analysis.
ScalarEvolution *SE;
- /// \brief Set of run-time checks required to establish independence of
+ /// Set of run-time checks required to establish independence of
/// otherwise may-aliasing pointers in the loop.
SmallVector<PointerCheck, 4> Checks;
};
-/// \brief Drive the analysis of memory accesses in the loop
+/// Drive the analysis of memory accesses in the loop
///
/// This class is responsible for analyzing the memory accesses of a loop. It
/// collects the accesses and then its main helper the AccessAnalysis class
return PtrRtChecking.get();
}
- /// \brief Number of memchecks required to prove independence of otherwise
+ /// Number of memchecks required to prove independence of otherwise
/// may-alias pointers.
unsigned getNumRuntimePointerChecks() const {
return PtrRtChecking->getNumberOfChecks();
unsigned getNumStores() const { return NumStores; }
unsigned getNumLoads() const { return NumLoads;}
- /// \brief Add code that checks at runtime if the accessed arrays overlap.
+ /// Add code that checks at runtime if the accessed arrays overlap.
///
/// Returns a pair of instructions where the first element is the first
/// instruction generated in possibly a sequence of instructions and the
std::pair<Instruction *, Instruction *>
addRuntimeChecks(Instruction *Loc) const;
- /// \brief Generete the instructions for the checks in \p PointerChecks.
+ /// Generete the instructions for the checks in \p PointerChecks.
///
/// Returns a pair of instructions where the first element is the first
/// instruction generated in possibly a sequence of instructions and the
const SmallVectorImpl<RuntimePointerChecking::PointerCheck>
&PointerChecks) const;
- /// \brief The diagnostics report generated for the analysis. E.g. why we
+ /// The diagnostics report generated for the analysis. E.g. why we
/// couldn't analyze the loop.
const OptimizationRemarkAnalysis *getReport() const { return Report.get(); }
- /// \brief the Memory Dependence Checker which can determine the
+ /// the Memory Dependence Checker which can determine the
/// loop-independent and loop-carried dependences between memory accesses.
const MemoryDepChecker &getDepChecker() const { return *DepChecker; }
- /// \brief Return the list of instructions that use \p Ptr to read or write
+ /// Return the list of instructions that use \p Ptr to read or write
/// memory.
SmallVector<Instruction *, 4> getInstructionsForAccess(Value *Ptr,
bool isWrite) const {
return DepChecker->getInstructionsForAccess(Ptr, isWrite);
}
- /// \brief If an access has a symbolic strides, this maps the pointer value to
+ /// If an access has a symbolic strides, this maps the pointer value to
/// the stride symbol.
const ValueToValueMap &getSymbolicStrides() const { return SymbolicStrides; }
- /// \brief Pointer has a symbolic stride.
+ /// Pointer has a symbolic stride.
bool hasStride(Value *V) const { return StrideSet.count(V); }
- /// \brief Print the information about the memory accesses in the loop.
+ /// Print the information about the memory accesses in the loop.
void print(raw_ostream &OS, unsigned Depth = 0) const;
- /// \brief Checks existence of store to invariant address inside loop.
+ /// Checks existence of store to invariant address inside loop.
/// If the loop has any store to invariant address, then it returns true,
/// else returns false.
bool hasStoreToLoopInvariantAddress() const {
const PredicatedScalarEvolution &getPSE() const { return *PSE; }
private:
- /// \brief Analyze the loop.
+ /// Analyze the loop.
void analyzeLoop(AliasAnalysis *AA, LoopInfo *LI,
const TargetLibraryInfo *TLI, DominatorTree *DT);
- /// \brief Check if the structure of the loop allows it to be analyzed by this
+ /// Check if the structure of the loop allows it to be analyzed by this
/// pass.
bool canAnalyzeLoop();
- /// \brief Save the analysis remark.
+ /// Save the analysis remark.
///
/// LAA does not directly emits the remarks. Instead it stores it which the
/// client can retrieve and presents as its own analysis
OptimizationRemarkAnalysis &recordAnalysis(StringRef RemarkName,
Instruction *Instr = nullptr);
- /// \brief Collect memory access with loop invariant strides.
+ /// Collect memory access with loop invariant strides.
///
/// Looks for accesses like "a[i * StrideA]" where "StrideA" is loop
/// invariant.
/// at runtime. Using std::unique_ptr to make using move ctor simpler.
std::unique_ptr<RuntimePointerChecking> PtrRtChecking;
- /// \brief the Memory Dependence Checker which can determine the
+ /// the Memory Dependence Checker which can determine the
/// loop-independent and loop-carried dependences between memory accesses.
std::unique_ptr<MemoryDepChecker> DepChecker;
uint64_t MaxSafeDepDistBytes;
- /// \brief Cache the result of analyzeLoop.
+ /// Cache the result of analyzeLoop.
bool CanVecMem;
- /// \brief Indicator for storing to uniform addresses.
+ /// Indicator for storing to uniform addresses.
/// If a loop has write to a loop invariant address then it should be true.
bool StoreToLoopInvariantAddress;
- /// \brief The diagnostics report generated for the analysis. E.g. why we
+ /// The diagnostics report generated for the analysis. E.g. why we
/// couldn't analyze the loop.
std::unique_ptr<OptimizationRemarkAnalysis> Report;
- /// \brief If an access has a symbolic strides, this maps the pointer value to
+ /// If an access has a symbolic strides, this maps the pointer value to
/// the stride symbol.
ValueToValueMap SymbolicStrides;
- /// \brief Set of symbolic strides values.
+ /// Set of symbolic strides values.
SmallPtrSet<Value *, 8> StrideSet;
};
Value *stripIntegerCast(Value *V);
-/// \brief Return the SCEV corresponding to a pointer with the symbolic stride
+/// Return the SCEV corresponding to a pointer with the symbolic stride
/// replaced with constant one, assuming the SCEV predicate associated with
/// \p PSE is true.
///
const ValueToValueMap &PtrToStride,
Value *Ptr, Value *OrigPtr = nullptr);
-/// \brief If the pointer has a constant stride return it in units of its
+/// If the pointer has a constant stride return it in units of its
/// element size. Otherwise return zero.
///
/// Ensure that it does not wrap in the address space, assuming the predicate
const ValueToValueMap &StridesMap = ValueToValueMap(),
bool Assume = false, bool ShouldCheckWrap = true);
-/// \brief Attempt to sort the pointers in \p VL and return the sorted indices
+/// Attempt to sort the pointers in \p VL and return the sorted indices
/// in \p SortedIndices, if reordering is required.
///
/// Returns 'true' if sorting is legal, otherwise returns 'false'.
ScalarEvolution &SE,
SmallVectorImpl<unsigned> &SortedIndices);
-/// \brief Returns true if the memory operations \p A and \p B are consecutive.
+/// Returns true if the memory operations \p A and \p B are consecutive.
/// This is a simple API that does not depend on the analysis pass.
bool isConsecutiveAccess(Value *A, Value *B, const DataLayout &DL,
ScalarEvolution &SE, bool CheckType = true);
-/// \brief This analysis provides dependence information for the memory accesses
+/// This analysis provides dependence information for the memory accesses
/// of a loop.
///
/// It runs the analysis for a loop on demand. This can be initiated by
void getAnalysisUsage(AnalysisUsage &AU) const override;
- /// \brief Query the result of the loop access information for the loop \p L.
+ /// Query the result of the loop access information for the loop \p L.
///
/// If there is no cached result available run the analysis.
const LoopAccessInfo &getInfo(Loop *L);
LoopAccessInfoMap.clear();
}
- /// \brief Print the result of the analysis when invoked with -analyze.
+ /// Print the result of the analysis when invoked with -analyze.
void print(raw_ostream &OS, const Module *M = nullptr) const override;
private:
- /// \brief The cache.
+ /// The cache.
DenseMap<Loop *, std::unique_ptr<LoopAccessInfo>> LoopAccessInfoMap;
// The used analysis passes.
LoopInfo *LI;
};
-/// \brief This analysis provides dependence information for the memory
+/// This analysis provides dependence information for the memory
/// accesses of a loop.
///
/// It runs the analysis for a loop on demand. This can be initiated by
extern template class AllAnalysesOn<Loop>;
extern template class AnalysisManager<Loop, LoopStandardAnalysisResults &>;
-/// \brief The loop analysis manager.
+/// The loop analysis manager.
///
/// See the documentation for the AnalysisManager template for detail
/// documentation. This typedef serves as a convenient way to refer to this
/// in the CFG are necessarily loops.
class Loop : public LoopBase<BasicBlock, Loop> {
public:
- /// \brief A range representing the start and end location of a loop.
+ /// A range representing the start and end location of a loop.
class LocRange {
DebugLoc Start;
DebugLoc End;
const DebugLoc &getStart() const { return Start; }
const DebugLoc &getEnd() const { return End; }
- /// \brief Check for null.
+ /// Check for null.
///
explicit operator bool() const { return Start && End; }
};
static ChildIteratorType child_end(NodeRef N) { return N->end(); }
};
-/// \brief Analysis pass that exposes the \c LoopInfo for a function.
+/// Analysis pass that exposes the \c LoopInfo for a function.
class LoopAnalysis : public AnalysisInfoMixin<LoopAnalysis> {
friend AnalysisInfoMixin<LoopAnalysis>;
static AnalysisKey Key;
LoopInfo run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Printer pass for the \c LoopAnalysis results.
+/// Printer pass for the \c LoopAnalysis results.
class LoopPrinterPass : public PassInfoMixin<LoopPrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Verifier pass for the \c LoopAnalysis results.
+/// Verifier pass for the \c LoopAnalysis results.
struct LoopVerifierPass : public PassInfoMixin<LoopVerifierPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief The legacy pass manager's analysis pass to compute loop information.
+/// The legacy pass manager's analysis pass to compute loop information.
class LoopInfoWrapperPass : public FunctionPass {
LoopInfo LI;
LoopInfo &getLoopInfo() { return LI; }
const LoopInfo &getLoopInfo() const { return LI; }
- /// \brief Calculate the natural loop information for a given function.
+ /// Calculate the natural loop information for a given function.
bool runOnFunction(Function &F) override;
void verifyAnalysis() const override;
using Base::visit;
private:
- /// \brief A cache of pointer bases and constant-folded offsets corresponding
+ /// A cache of pointer bases and constant-folded offsets corresponding
/// to GEP (or derived from GEP) instructions.
///
/// In order to find the base pointer one needs to perform non-trivial
/// results saved.
DenseMap<Value *, SimplifiedAddress> SimplifiedAddresses;
- /// \brief SCEV expression corresponding to number of currently simulated
+ /// SCEV expression corresponding to number of currently simulated
/// iteration.
const SCEV *IterationNumber;
- /// \brief A Value->Constant map for keeping values that we managed to
+ /// A Value->Constant map for keeping values that we managed to
/// constant-fold on the given iteration.
///
/// While we walk the loop instructions, we build up and maintain a mapping
class UndefValue;
class Value;
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates or reallocates memory (either malloc, calloc, realloc, or strdup
/// like).
bool isAllocationFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast = false);
-/// \brief Tests if a value is a call or invoke to a function that returns a
+/// Tests if a value is a call or invoke to a function that returns a
/// NoAlias pointer (including malloc/calloc/realloc/strdup-like functions).
bool isNoAliasFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast = false);
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates uninitialized memory (such as malloc).
bool isMallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast = false);
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates zero-filled memory (such as calloc).
bool isCallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast = false);
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates memory similar to malloc or calloc.
bool isMallocOrCallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast = false);
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates memory (either malloc, calloc, or strdup like).
bool isAllocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast = false);
bool NullIsUnknownSize = false;
};
-/// \brief Compute the size of the object pointed by Ptr. Returns true and the
+/// Compute the size of the object pointed by Ptr. Returns true and the
/// object size in Size if successful, and false otherwise. In this context, by
/// object we mean the region of memory starting at Ptr to the end of the
/// underlying object pointed to by Ptr.
using SizeOffsetType = std::pair<APInt, APInt>;
-/// \brief Evaluate the size and offset of an object pointed to by a Value*
+/// Evaluate the size and offset of an object pointed to by a Value*
/// statically. Fails if size or offset are not known at compile time.
class ObjectSizeOffsetVisitor
: public InstVisitor<ObjectSizeOffsetVisitor, SizeOffsetType> {
using SizeOffsetEvalType = std::pair<Value *, Value *>;
-/// \brief Evaluate the size and offset of an object pointed to by a Value*.
+/// Evaluate the size and offset of an object pointed to by a Value*.
/// May create code to compute the result at run-time.
class ObjectSizeOffsetEvaluator
: public InstVisitor<ObjectSizeOffsetEvaluator, SizeOffsetEvalType> {
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This file exposes an interface to building/using memory SSA to
+/// This file exposes an interface to building/using memory SSA to
/// walk memory instructions using a use/def graph.
///
/// Memory SSA class builds an SSA form that links together memory access
using const_memoryaccess_def_iterator =
memoryaccess_def_iterator_base<const MemoryAccess>;
-// \brief The base for all memory accesses. All memory accesses in a block are
+// The base for all memory accesses. All memory accesses in a block are
// linked together using an intrusive list.
class MemoryAccess
: public DerivedUser,
void print(raw_ostream &OS) const;
void dump() const;
- /// \brief The user iterators for a memory access
+ /// The user iterators for a memory access
using iterator = user_iterator;
using const_iterator = const_user_iterator;
- /// \brief This iterator walks over all of the defs in a given
+ /// This iterator walks over all of the defs in a given
/// MemoryAccess. For MemoryPhi nodes, this walks arguments. For
/// MemoryUse/MemoryDef, this walks the defining access.
memoryaccess_def_iterator defs_begin();
memoryaccess_def_iterator defs_end();
const_memoryaccess_def_iterator defs_end() const;
- /// \brief Get the iterators for the all access list and the defs only list
+ /// Get the iterators for the all access list and the defs only list
/// We default to the all access list.
AllAccessType::self_iterator getIterator() {
return this->AllAccessType::getIterator();
friend class MemoryUse;
friend class MemoryUseOrDef;
- /// \brief Used by MemorySSA to change the block of a MemoryAccess when it is
+ /// Used by MemorySSA to change the block of a MemoryAccess when it is
/// moved.
void setBlock(BasicBlock *BB) { Block = BB; }
- /// \brief Used for debugging and tracking things about MemoryAccesses.
+ /// Used for debugging and tracking things about MemoryAccesses.
/// Guaranteed unique among MemoryAccesses, no guarantees otherwise.
inline unsigned getID() const;
return OS;
}
-/// \brief Class that has the common methods + fields of memory uses/defs. It's
+/// Class that has the common methods + fields of memory uses/defs. It's
/// a little awkward to have, but there are many cases where we want either a
/// use or def, and there are many cases where uses are needed (defs aren't
/// acceptable), and vice-versa.
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(MemoryAccess);
- /// \brief Get the instruction that this MemoryUse represents.
+ /// Get the instruction that this MemoryUse represents.
Instruction *getMemoryInst() const { return MemoryInstruction; }
- /// \brief Get the access that produces the memory state used by this Use.
+ /// Get the access that produces the memory state used by this Use.
MemoryAccess *getDefiningAccess() const { return getOperand(0); }
static bool classof(const Value *MA) {
return OptimizedAccessAlias;
}
- /// \brief Reset the ID of what this MemoryUse was optimized to, causing it to
+ /// Reset the ID of what this MemoryUse was optimized to, causing it to
/// be rewalked by the walker if necessary.
/// This really should only be called by tests.
inline void resetOptimized();
: public FixedNumOperandTraits<MemoryUseOrDef, 1> {};
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(MemoryUseOrDef, MemoryAccess)
-/// \brief Represents read-only accesses to memory
+/// Represents read-only accesses to memory
///
/// In particular, the set of Instructions that will be represented by
/// MemoryUse's is exactly the set of Instructions for which
struct OperandTraits<MemoryUse> : public FixedNumOperandTraits<MemoryUse, 1> {};
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(MemoryUse, MemoryAccess)
-/// \brief Represents a read-write access to memory, whether it is a must-alias,
+/// Represents a read-write access to memory, whether it is a must-alias,
/// or a may-alias.
///
/// In particular, the set of Instructions that will be represented by
struct OperandTraits<MemoryDef> : public FixedNumOperandTraits<MemoryDef, 1> {};
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(MemoryDef, MemoryAccess)
-/// \brief Represents phi nodes for memory accesses.
+/// Represents phi nodes for memory accesses.
///
/// These have the same semantic as regular phi nodes, with the exception that
/// only one phi will ever exist in a given basic block.
const_op_range incoming_values() const { return operands(); }
- /// \brief Return the number of incoming edges
+ /// Return the number of incoming edges
unsigned getNumIncomingValues() const { return getNumOperands(); }
- /// \brief Return incoming value number x
+ /// Return incoming value number x
MemoryAccess *getIncomingValue(unsigned I) const { return getOperand(I); }
void setIncomingValue(unsigned I, MemoryAccess *V) {
assert(V && "PHI node got a null value!");
static unsigned getOperandNumForIncomingValue(unsigned I) { return I; }
static unsigned getIncomingValueNumForOperand(unsigned I) { return I; }
- /// \brief Return incoming basic block number @p i.
+ /// Return incoming basic block number @p i.
BasicBlock *getIncomingBlock(unsigned I) const { return block_begin()[I]; }
- /// \brief Return incoming basic block corresponding
+ /// Return incoming basic block corresponding
/// to an operand of the PHI.
BasicBlock *getIncomingBlock(const Use &U) const {
assert(this == U.getUser() && "Iterator doesn't point to PHI's Uses?");
return getIncomingBlock(unsigned(&U - op_begin()));
}
- /// \brief Return incoming basic block corresponding
+ /// Return incoming basic block corresponding
/// to value use iterator.
BasicBlock *getIncomingBlock(MemoryAccess::const_user_iterator I) const {
return getIncomingBlock(I.getUse());
block_begin()[I] = BB;
}
- /// \brief Add an incoming value to the end of the PHI list
+ /// Add an incoming value to the end of the PHI list
void addIncoming(MemoryAccess *V, BasicBlock *BB) {
if (getNumOperands() == ReservedSpace)
growOperands(); // Get more space!
setIncomingBlock(getNumOperands() - 1, BB);
}
- /// \brief Return the first index of the specified basic
+ /// Return the first index of the specified basic
/// block in the value list for this PHI. Returns -1 if no instance.
int getBasicBlockIndex(const BasicBlock *BB) const {
for (unsigned I = 0, E = getNumOperands(); I != E; ++I)
protected:
friend class MemorySSA;
- /// \brief this is more complicated than the generic
+ /// this is more complicated than the generic
/// User::allocHungoffUses, because we have to allocate Uses for the incoming
/// values and pointers to the incoming blocks, all in one allocation.
void allocHungoffUses(unsigned N) {
const unsigned ID;
unsigned ReservedSpace;
- /// \brief This grows the operand list in response to a push_back style of
+ /// This grows the operand list in response to a push_back style of
/// operation. This grows the number of ops by 1.5 times.
void growOperands() {
unsigned E = getNumOperands();
template <> struct OperandTraits<MemoryPhi> : public HungoffOperandTraits<2> {};
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(MemoryPhi, MemoryAccess)
-/// \brief Encapsulates MemorySSA, including all data associated with memory
+/// Encapsulates MemorySSA, including all data associated with memory
/// accesses.
class MemorySSA {
public:
MemorySSAWalker *getWalker();
- /// \brief Given a memory Mod/Ref'ing instruction, get the MemorySSA
+ /// Given a memory Mod/Ref'ing instruction, get the MemorySSA
/// access associated with it. If passed a basic block gets the memory phi
/// node that exists for that block, if there is one. Otherwise, this will get
/// a MemoryUseOrDef.
void dump() const;
void print(raw_ostream &) const;
- /// \brief Return true if \p MA represents the live on entry value
+ /// Return true if \p MA represents the live on entry value
///
/// Loads and stores from pointer arguments and other global values may be
/// defined by memory operations that do not occur in the current function, so
using DefsList =
simple_ilist<MemoryAccess, ilist_tag<MSSAHelpers::DefsOnlyTag>>;
- /// \brief Return the list of MemoryAccess's for a given basic block.
+ /// Return the list of MemoryAccess's for a given basic block.
///
/// This list is not modifiable by the user.
const AccessList *getBlockAccesses(const BasicBlock *BB) const {
return getWritableBlockAccesses(BB);
}
- /// \brief Return the list of MemoryDef's and MemoryPhi's for a given basic
+ /// Return the list of MemoryDef's and MemoryPhi's for a given basic
/// block.
///
/// This list is not modifiable by the user.
return getWritableBlockDefs(BB);
}
- /// \brief Given two memory accesses in the same basic block, determine
+ /// Given two memory accesses in the same basic block, determine
/// whether MemoryAccess \p A dominates MemoryAccess \p B.
bool locallyDominates(const MemoryAccess *A, const MemoryAccess *B) const;
- /// \brief Given two memory accesses in potentially different blocks,
+ /// Given two memory accesses in potentially different blocks,
/// determine whether MemoryAccess \p A dominates MemoryAccess \p B.
bool dominates(const MemoryAccess *A, const MemoryAccess *B) const;
- /// \brief Given a MemoryAccess and a Use, determine whether MemoryAccess \p A
+ /// Given a MemoryAccess and a Use, determine whether MemoryAccess \p A
/// dominates Use \p B.
bool dominates(const MemoryAccess *A, const Use &B) const;
- /// \brief Verify that MemorySSA is self consistent (IE definitions dominate
+ /// Verify that MemorySSA is self consistent (IE definitions dominate
/// all uses, uses appear in the right places). This is used by unit tests.
void verifyMemorySSA() const;
Result run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Printer pass for \c MemorySSA.
+/// Printer pass for \c MemorySSA.
class MemorySSAPrinterPass : public PassInfoMixin<MemorySSAPrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Verifier pass for \c MemorySSA.
+/// Verifier pass for \c MemorySSA.
struct MemorySSAVerifierPass : PassInfoMixin<MemorySSAVerifierPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Legacy analysis pass which computes \c MemorySSA.
+/// Legacy analysis pass which computes \c MemorySSA.
class MemorySSAWrapperPass : public FunctionPass {
public:
MemorySSAWrapperPass();
std::unique_ptr<MemorySSA> MSSA;
};
-/// \brief This is the generic walker interface for walkers of MemorySSA.
+/// This is the generic walker interface for walkers of MemorySSA.
/// Walkers are used to be able to further disambiguate the def-use chains
/// MemorySSA gives you, or otherwise produce better info than MemorySSA gives
/// you.
using MemoryAccessSet = SmallVector<MemoryAccess *, 8>;
- /// \brief Given a memory Mod/Ref/ModRef'ing instruction, calling this
+ /// Given a memory Mod/Ref/ModRef'ing instruction, calling this
/// will give you the nearest dominating MemoryAccess that Mod's the location
/// the instruction accesses (by skipping any def which AA can prove does not
/// alias the location(s) accessed by the instruction given).
/// but takes a MemoryAccess instead of an Instruction.
virtual MemoryAccess *getClobberingMemoryAccess(MemoryAccess *) = 0;
- /// \brief Given a potentially clobbering memory access and a new location,
+ /// Given a potentially clobbering memory access and a new location,
/// calling this will give you the nearest dominating clobbering MemoryAccess
/// (by skipping non-aliasing def links).
///
virtual MemoryAccess *getClobberingMemoryAccess(MemoryAccess *,
const MemoryLocation &) = 0;
- /// \brief Given a memory access, invalidate anything this walker knows about
+ /// Given a memory access, invalidate anything this walker knows about
/// that access.
/// This API is used by walkers that store information to perform basic cache
/// invalidation. This will be called by MemorySSA at appropriate times for
MemorySSA *MSSA;
};
-/// \brief A MemorySSAWalker that does no alias queries, or anything else. It
+/// A MemorySSAWalker that does no alias queries, or anything else. It
/// simply returns the links as they were constructed by the builder.
class DoNothingMemorySSAWalker final : public MemorySSAWalker {
public:
using MemoryAccessPair = std::pair<MemoryAccess *, MemoryLocation>;
using ConstMemoryAccessPair = std::pair<const MemoryAccess *, MemoryLocation>;
-/// \brief Iterator base class used to implement const and non-const iterators
+/// Iterator base class used to implement const and non-const iterators
/// over the defining accesses of a MemoryAccess.
template <class T>
class memoryaccess_def_iterator_base
return const_memoryaccess_def_iterator();
}
-/// \brief GraphTraits for a MemoryAccess, which walks defs in the normal case,
+/// GraphTraits for a MemoryAccess, which walks defs in the normal case,
/// and uses in the inverse case.
template <> struct GraphTraits<MemoryAccess *> {
using NodeRef = MemoryAccess *;
static ChildIteratorType child_end(NodeRef N) { return N->user_end(); }
};
-/// \brief Provide an iterator that walks defs, giving both the memory access,
+/// Provide an iterator that walks defs, giving both the memory access,
/// and the current pointer location, updating the pointer location as it
/// changes due to phi node translation.
///
//===----------------------------------------------------------------------===//
//
// \file
-// \brief An automatic updater for MemorySSA that handles arbitrary insertion,
+// An automatic updater for MemorySSA that handles arbitrary insertion,
// deletion, and moves. It performs phi insertion where necessary, and
// automatically updates the MemorySSA IR to be correct.
// While updating loads or removing instructions is often easy enough to not
// the edge cases right, and the above calls already operate in near-optimal
// time bounds.
- /// \brief Create a MemoryAccess in MemorySSA at a specified point in a block,
+ /// Create a MemoryAccess in MemorySSA at a specified point in a block,
/// with a specified clobbering definition.
///
/// Returns the new MemoryAccess.
const BasicBlock *BB,
MemorySSA::InsertionPlace Point);
- /// \brief Create a MemoryAccess in MemorySSA before or after an existing
+ /// Create a MemoryAccess in MemorySSA before or after an existing
/// MemoryAccess.
///
/// Returns the new MemoryAccess.
MemoryAccess *Definition,
MemoryAccess *InsertPt);
- /// \brief Remove a MemoryAccess from MemorySSA, including updating all
+ /// Remove a MemoryAccess from MemorySSA, including updating all
/// definitions and uses.
/// This should be called when a memory instruction that has a MemoryAccess
/// associated with it is erased from the program. For example, if a store or
class DominatorTree;
class Loop;
-/// \brief Captures loop safety information.
+/// Captures loop safety information.
/// It keep information for loop & its header may throw exception or otherwise
/// exit abnormaly on any iteration of the loop which might actually execute
/// at runtime. The primary way to consume this infromation is via
LoopSafetyInfo() = default;
};
-/// \brief Computes safety information for a loop checks loop body & header for
+/// Computes safety information for a loop checks loop body & header for
/// the possibility of may throw exception, it takes LoopSafetyInfo and loop as
/// argument. Updates safety information in LoopSafetyInfo argument.
/// Note: This is defined to clear and reinitialize an already initialized
namespace llvm {
namespace objcarc {
-/// \brief This is a simple alias analysis implementation that uses knowledge
+/// This is a simple alias analysis implementation that uses knowledge
/// of ARC constructs to answer queries.
///
/// TODO: This class could be generalized to know about other ObjC-specific
namespace llvm {
namespace objcarc {
-/// \brief A handy option to enable/disable all ARC Optimizations.
+/// A handy option to enable/disable all ARC Optimizations.
extern bool EnableARCOpts;
-/// \brief Test if the given module looks interesting to run ARC optimization
+/// Test if the given module looks interesting to run ARC optimization
/// on.
inline bool ModuleHasARC(const Module &M) {
return
M.getNamedValue("clang.arc.use");
}
-/// \brief This is a wrapper around getUnderlyingObject which also knows how to
+/// This is a wrapper around getUnderlyingObject which also knows how to
/// look through objc_retain and objc_autorelease calls, which we know to return
/// their argument verbatim.
inline const Value *GetUnderlyingObjCPtr(const Value *V,
return const_cast<Value *>(GetRCIdentityRoot((const Value *)V));
}
-/// \brief Assuming the given instruction is one of the special calls such as
+/// Assuming the given instruction is one of the special calls such as
/// objc_retain or objc_release, return the RCIdentity root of the argument of
/// the call.
inline Value *GetArgRCIdentityRoot(Value *Inst) {
cast<GetElementPtrInst>(I)->hasAllZeroIndices());
}
-/// \brief Test whether the given value is possible a retainable object pointer.
+/// Test whether the given value is possible a retainable object pointer.
inline bool IsPotentialRetainableObjPtr(const Value *Op) {
// Pointers to static or stack storage are not valid retainable object
// pointers.
return true;
}
-/// \brief Helper for GetARCInstKind. Determines what kind of construct CS
+/// Helper for GetARCInstKind. Determines what kind of construct CS
/// is.
inline ARCInstKind GetCallSiteClass(ImmutableCallSite CS) {
for (ImmutableCallSite::arg_iterator I = CS.arg_begin(), E = CS.arg_end();
return CS.onlyReadsMemory() ? ARCInstKind::None : ARCInstKind::Call;
}
-/// \brief Return true if this value refers to a distinct and identifiable
+/// Return true if this value refers to a distinct and identifiable
/// object.
///
/// This is similar to AliasAnalysis's isIdentifiedObject, except that it uses
/// \enum ARCInstKind
///
-/// \brief Equivalence classes of instructions in the ARC Model.
+/// Equivalence classes of instructions in the ARC Model.
///
/// Since we do not have "instructions" to represent ARC concepts in LLVM IR,
/// we instead operate on equivalence classes of instructions.
raw_ostream &operator<<(raw_ostream &OS, const ARCInstKind Class);
-/// \brief Test if the given class is a kind of user.
+/// Test if the given class is a kind of user.
bool IsUser(ARCInstKind Class);
-/// \brief Test if the given class is objc_retain or equivalent.
+/// Test if the given class is objc_retain or equivalent.
bool IsRetain(ARCInstKind Class);
-/// \brief Test if the given class is objc_autorelease or equivalent.
+/// Test if the given class is objc_autorelease or equivalent.
bool IsAutorelease(ARCInstKind Class);
-/// \brief Test if the given class represents instructions which return their
+/// Test if the given class represents instructions which return their
/// argument verbatim.
bool IsForwarding(ARCInstKind Class);
-/// \brief Test if the given class represents instructions which do nothing if
+/// Test if the given class represents instructions which do nothing if
/// passed a null pointer.
bool IsNoopOnNull(ARCInstKind Class);
-/// \brief Test if the given class represents instructions which are always safe
+/// Test if the given class represents instructions which are always safe
/// to mark with the "tail" keyword.
bool IsAlwaysTail(ARCInstKind Class);
-/// \brief Test if the given class represents instructions which are never safe
+/// Test if the given class represents instructions which are never safe
/// to mark with the "tail" keyword.
bool IsNeverTail(ARCInstKind Class);
-/// \brief Test if the given class represents instructions which are always safe
+/// Test if the given class represents instructions which are always safe
/// to mark with the nounwind attribute.
bool IsNoThrow(ARCInstKind Class);
/// autoreleasepool pop.
bool CanInterruptRV(ARCInstKind Class);
-/// \brief Determine if F is one of the special known Functions. If it isn't,
+/// Determine if F is one of the special known Functions. If it isn't,
/// return ARCInstKind::CallOrUser.
ARCInstKind GetFunctionClass(const Function *F);
-/// \brief Determine which objc runtime call instruction class V belongs to.
+/// Determine which objc runtime call instruction class V belongs to.
///
/// This is similar to GetARCInstKind except that it only detects objc
/// runtime calls. This allows it to be faster.
OptimizationRemarkEmitter(const Function *F, BlockFrequencyInfo *BFI)
: F(F), BFI(BFI) {}
- /// \brief This variant can be used to generate ORE on demand (without the
+ /// This variant can be used to generate ORE on demand (without the
/// analysis pass).
///
/// Note that this ctor has a very different cost depending on whether
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
- /// \brief Output the remark via the diagnostic handler and to the
+ /// Output the remark via the diagnostic handler and to the
/// optimization record file.
void emit(DiagnosticInfoOptimizationBase &OptDiag);
- /// \brief Take a lambda that returns a remark which will be emitted. Second
+ /// Take a lambda that returns a remark which will be emitted. Second
/// argument is only used to restrict this to functions.
template <typename T>
void emit(T RemarkBuilder, decltype(RemarkBuilder()) * = nullptr) {
}
}
- /// \brief Whether we allow for extra compile-time budget to perform more
+ /// Whether we allow for extra compile-time budget to perform more
/// analysis to produce fewer false positives.
///
/// This is useful when reporting missed optimizations. In this case we can
/// Similar but use value from \p OptDiag and update hotness there.
void computeHotness(DiagnosticInfoIROptimization &OptDiag);
- /// \brief Only allow verbose messages if we know we're filtering by hotness
+ /// Only allow verbose messages if we know we're filtering by hotness
/// (BFI is only set in this case).
bool shouldEmitVerbose() { return BFI != nullptr; }
void operator=(const OptimizationRemarkEmitter &) = delete;
};
-/// \brief Add a small namespace to avoid name clashes with the classes used in
+/// Add a small namespace to avoid name clashes with the classes used in
/// the streaming interface. We want these to be short for better
/// write/readability.
namespace ore {
static AnalysisKey Key;
public:
- /// \brief Provide the result typedef for this analysis pass.
+ /// Provide the result typedef for this analysis pass.
typedef OptimizationRemarkEmitter Result;
- /// \brief Run the analysis pass over a function and produce BFI.
+ /// Run the analysis pass over a function and produce BFI.
Result run(Function &F, FunctionAnalysisManager &AM);
};
}
class OrderedBasicBlock {
private:
- /// \brief Map a instruction to its position in a BasicBlock.
+ /// Map a instruction to its position in a BasicBlock.
SmallDenseMap<const Instruction *, unsigned, 32> NumberedInsts;
- /// \brief Keep track of last instruction inserted into \p NumberedInsts.
+ /// Keep track of last instruction inserted into \p NumberedInsts.
/// It speeds up queries for uncached instructions by providing a start point
/// for new queries in OrderedBasicBlock::comesBefore.
BasicBlock::const_iterator LastInstFound;
- /// \brief The position/number to tag the next instruction to be found.
+ /// The position/number to tag the next instruction to be found.
unsigned NextInstPos;
- /// \brief The source BasicBlock to map.
+ /// The source BasicBlock to map.
const BasicBlock *BB;
- /// \brief Given no cached results, find if \p A comes before \p B in \p BB.
+ /// Given no cached results, find if \p A comes before \p B in \p BB.
/// Cache and number out instruction while walking \p BB.
bool comesBefore(const Instruction *A, const Instruction *B);
public:
OrderedBasicBlock(const BasicBlock *BasicB);
- /// \brief Find out whether \p A dominates \p B, meaning whether \p A
+ /// Find out whether \p A dominates \p B, meaning whether \p A
/// comes before \p B in \p BB. This is a simplification that considers
/// cached instruction positions and ignores other basic blocks, being
/// only relevant to compare relative instructions positions inside \p BB.
FunctionAnalysisManager::Invalidator &);
};
-/// \brief Analysis pass which computes a \c PostDominatorTree.
+/// Analysis pass which computes a \c PostDominatorTree.
class PostDominatorTreeAnalysis
: public AnalysisInfoMixin<PostDominatorTreeAnalysis> {
friend AnalysisInfoMixin<PostDominatorTreeAnalysis>;
static AnalysisKey Key;
public:
- /// \brief Provide the result type for this analysis pass.
+ /// Provide the result type for this analysis pass.
using Result = PostDominatorTree;
- /// \brief Run the analysis pass over a function and produce a post dominator
+ /// Run the analysis pass over a function and produce a post dominator
/// tree.
PostDominatorTree run(Function &F, FunctionAnalysisManager &);
};
-/// \brief Printer pass for the \c PostDominatorTree.
+/// Printer pass for the \c PostDominatorTree.
class PostDominatorTreePrinterPass
: public PassInfoMixin<PostDominatorTreePrinterPass> {
raw_ostream &OS;
class BlockFrequencyInfo;
class CallSite;
class ProfileSummary;
-/// \brief Analysis providing profile information.
+/// Analysis providing profile information.
///
/// This is an immutable analysis pass that provides ability to query global
/// (program-level) profile information. The main APIs are isHotCount and
ProfileSummaryInfo(ProfileSummaryInfo &&Arg)
: M(Arg.M), Summary(std::move(Arg.Summary)) {}
- /// \brief Returns true if profile summary is available.
+ /// Returns true if profile summary is available.
bool hasProfileSummary() { return computeSummary(); }
- /// \brief Returns true if module \c M has sample profile.
+ /// Returns true if module \c M has sample profile.
bool hasSampleProfile() {
return hasProfileSummary() &&
Summary->getKind() == ProfileSummary::PSK_Sample;
}
- /// \brief Returns true if module \c M has instrumentation profile.
+ /// Returns true if module \c M has instrumentation profile.
bool hasInstrumentationProfile() {
return hasProfileSummary() &&
Summary->getKind() == ProfileSummary::PSK_Instr;
BlockFrequencyInfo *BFI);
/// Returns true if the working set size of the code is considered huge.
bool hasHugeWorkingSetSize();
- /// \brief Returns true if \p F has hot function entry.
+ /// Returns true if \p F has hot function entry.
bool isFunctionEntryHot(const Function *F);
/// Returns true if \p F contains hot code.
bool isFunctionHotInCallGraph(const Function *F, BlockFrequencyInfo &BFI);
- /// \brief Returns true if \p F has cold function entry.
+ /// Returns true if \p F has cold function entry.
bool isFunctionEntryCold(const Function *F);
/// Returns true if \p F contains only cold code.
bool isFunctionColdInCallGraph(const Function *F, BlockFrequencyInfo &BFI);
- /// \brief Returns true if \p F is a hot function.
+ /// Returns true if \p F is a hot function.
bool isHotCount(uint64_t C);
- /// \brief Returns true if count \p C is considered cold.
+ /// Returns true if count \p C is considered cold.
bool isColdCount(uint64_t C);
- /// \brief Returns true if BasicBlock \p B is considered hot.
+ /// Returns true if BasicBlock \p B is considered hot.
bool isHotBB(const BasicBlock *B, BlockFrequencyInfo *BFI);
- /// \brief Returns true if BasicBlock \p B is considered cold.
+ /// Returns true if BasicBlock \p B is considered cold.
bool isColdBB(const BasicBlock *B, BlockFrequencyInfo *BFI);
- /// \brief Returns true if CallSite \p CS is considered hot.
+ /// Returns true if CallSite \p CS is considered hot.
bool isHotCallSite(const CallSite &CS, BlockFrequencyInfo *BFI);
- /// \brief Returns true if Callsite \p CS is considered cold.
+ /// Returns true if Callsite \p CS is considered cold.
bool isColdCallSite(const CallSite &CS, BlockFrequencyInfo *BFI);
- /// \brief Returns HotCountThreshold if set.
+ /// Returns HotCountThreshold if set.
uint64_t getHotCountThreshold() {
return HotCountThreshold ? HotCountThreshold.getValue() : 0;
}
- /// \brief Returns ColdCountThreshold if set.
+ /// Returns ColdCountThreshold if set.
uint64_t getColdCountThreshold() {
return ColdCountThreshold ? ColdCountThreshold.getValue() : 0;
}
static AnalysisKey Key;
};
-/// \brief Printer pass that uses \c ProfileSummaryAnalysis.
+/// Printer pass that uses \c ProfileSummaryAnalysis.
class ProfileSummaryPrinterPass
: public PassInfoMixin<ProfileSummaryPrinterPass> {
raw_ostream &OS;
namespace detail {
-/// \brief Implementation of non-dependent functionality for \c PtrUseVisitor.
+/// Implementation of non-dependent functionality for \c PtrUseVisitor.
///
/// See \c PtrUseVisitor for the public interface and detailed comments about
/// usage. This class is just a helper base class which is not templated and
/// PtrUseVisitor.
class PtrUseVisitorBase {
public:
- /// \brief This class provides information about the result of a visit.
+ /// This class provides information about the result of a visit.
///
/// After walking all the users (recursively) of a pointer, the basic
/// infrastructure records some commonly useful information such as escape
public:
PtrInfo() : AbortedInfo(nullptr, false), EscapedInfo(nullptr, false) {}
- /// \brief Reset the pointer info, clearing all state.
+ /// Reset the pointer info, clearing all state.
void reset() {
AbortedInfo.setPointer(nullptr);
AbortedInfo.setInt(false);
EscapedInfo.setInt(false);
}
- /// \brief Did we abort the visit early?
+ /// Did we abort the visit early?
bool isAborted() const { return AbortedInfo.getInt(); }
- /// \brief Is the pointer escaped at some point?
+ /// Is the pointer escaped at some point?
bool isEscaped() const { return EscapedInfo.getInt(); }
- /// \brief Get the instruction causing the visit to abort.
+ /// Get the instruction causing the visit to abort.
/// \returns a pointer to the instruction causing the abort if one is
/// available; otherwise returns null.
Instruction *getAbortingInst() const { return AbortedInfo.getPointer(); }
- /// \brief Get the instruction causing the pointer to escape.
+ /// Get the instruction causing the pointer to escape.
/// \returns a pointer to the instruction which escapes the pointer if one
/// is available; otherwise returns null.
Instruction *getEscapingInst() const { return EscapedInfo.getPointer(); }
- /// \brief Mark the visit as aborted. Intended for use in a void return.
+ /// Mark the visit as aborted. Intended for use in a void return.
/// \param I The instruction which caused the visit to abort, if available.
void setAborted(Instruction *I = nullptr) {
AbortedInfo.setInt(true);
AbortedInfo.setPointer(I);
}
- /// \brief Mark the pointer as escaped. Intended for use in a void return.
+ /// Mark the pointer as escaped. Intended for use in a void return.
/// \param I The instruction which escapes the pointer, if available.
void setEscaped(Instruction *I = nullptr) {
EscapedInfo.setInt(true);
EscapedInfo.setPointer(I);
}
- /// \brief Mark the pointer as escaped, and the visit as aborted. Intended
+ /// Mark the pointer as escaped, and the visit as aborted. Intended
/// for use in a void return.
/// \param I The instruction which both escapes the pointer and aborts the
/// visit, if available.
/// \name Visitation infrastructure
/// @{
- /// \brief The info collected about the pointer being visited thus far.
+ /// The info collected about the pointer being visited thus far.
PtrInfo PI;
- /// \brief A struct of the data needed to visit a particular use.
+ /// A struct of the data needed to visit a particular use.
///
/// This is used to maintain a worklist fo to-visit uses. This is used to
/// make the visit be iterative rather than recursive.
APInt Offset;
};
- /// \brief The worklist of to-visit uses.
+ /// The worklist of to-visit uses.
SmallVector<UseToVisit, 8> Worklist;
- /// \brief A set of visited uses to break cycles in unreachable code.
+ /// A set of visited uses to break cycles in unreachable code.
SmallPtrSet<Use *, 8> VisitedUses;
/// @}
/// This state is reset for each instruction visited.
/// @{
- /// \brief The use currently being visited.
+ /// The use currently being visited.
Use *U;
- /// \brief True if we have a known constant offset for the use currently
+ /// True if we have a known constant offset for the use currently
/// being visited.
bool IsOffsetKnown;
- /// \brief The constant offset of the use if that is known.
+ /// The constant offset of the use if that is known.
APInt Offset;
/// @}
/// class, we can't create instances directly of this class.
PtrUseVisitorBase(const DataLayout &DL) : DL(DL) {}
- /// \brief Enqueue the users of this instruction in the visit worklist.
+ /// Enqueue the users of this instruction in the visit worklist.
///
/// This will visit the users with the same offset of the current visit
/// (including an unknown offset if that is the current state).
void enqueueUsers(Instruction &I);
- /// \brief Walk the operands of a GEP and adjust the offset as appropriate.
+ /// Walk the operands of a GEP and adjust the offset as appropriate.
///
/// This routine does the heavy lifting of the pointer walk by computing
/// offsets and looking through GEPs.
} // end namespace detail
-/// \brief A base class for visitors over the uses of a pointer value.
+/// A base class for visitors over the uses of a pointer value.
///
/// Once constructed, a user can call \c visit on a pointer value, and this
/// will walk its uses and visit each instruction using an InstVisitor. It also
"Must pass the derived type to this template!");
}
- /// \brief Recursively visit the uses of the given pointer.
+ /// Recursively visit the uses of the given pointer.
/// \returns An info struct about the pointer. See \c PtrInfo for details.
PtrInfo visitPtr(Instruction &I) {
// This must be a pointer type. Get an integer type suitable to hold
BBtoRegionMap BBtoRegion;
protected:
- /// \brief Update refences to a RegionInfoT held by the RegionT managed here
+ /// Update refences to a RegionInfoT held by the RegionT managed here
///
/// This is a post-move helper. Regions hold references to the owning
/// RegionInfo object. After a move these need to be fixed.
}
private:
- /// \brief Wipe this region tree's state without releasing any resources.
+ /// Wipe this region tree's state without releasing any resources.
///
/// This is essentially a post-move helper only. It leaves the object in an
/// assignable and destroyable state, but otherwise invalid.
//@}
};
-/// \brief Analysis pass that exposes the \c RegionInfo for a function.
+/// Analysis pass that exposes the \c RegionInfo for a function.
class RegionInfoAnalysis : public AnalysisInfoMixin<RegionInfoAnalysis> {
friend AnalysisInfoMixin<RegionInfoAnalysis>;
RegionInfo run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Printer pass for the \c RegionInfo.
+/// Printer pass for the \c RegionInfo.
class RegionInfoPrinterPass : public PassInfoMixin<RegionInfoPrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Verifier pass for the \c RegionInfo.
+/// Verifier pass for the \c RegionInfo.
struct RegionInfoVerifierPass : PassInfoMixin<RegionInfoVerifierPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
class User;
class Value;
-/// \brief Information about a load/store intrinsic defined by the target.
+/// Information about a load/store intrinsic defined by the target.
struct MemIntrinsicInfo {
/// This is the pointer that the intrinsic is loading from or storing to.
/// If this is non-null, then analysis/optimization passes can assume that
}
};
-/// \brief This pass provides access to the codegen interfaces that are needed
+/// This pass provides access to the codegen interfaces that are needed
/// for IR-level transformations.
class TargetTransformInfo {
public:
- /// \brief Construct a TTI object using a type implementing the \c Concept
+ /// Construct a TTI object using a type implementing the \c Concept
/// API below.
///
/// This is used by targets to construct a TTI wrapping their target-specific
/// implementaion that encodes appropriate costs for their target.
template <typename T> TargetTransformInfo(T Impl);
- /// \brief Construct a baseline TTI object using a minimal implementation of
+ /// Construct a baseline TTI object using a minimal implementation of
/// the \c Concept API below.
///
/// The TTI implementation will reflect the information in the DataLayout
// out-of-line.
~TargetTransformInfo();
- /// \brief Handle the invalidation of this information.
+ /// Handle the invalidation of this information.
///
/// When used as a result of \c TargetIRAnalysis this method will be called
/// when the function this was computed for changes. When it returns false,
/// \name Generic Target Information
/// @{
- /// \brief The kind of cost model.
+ /// The kind of cost model.
///
/// There are several different cost models that can be customized by the
/// target. The normalization of each cost model may be target specific.
TCK_CodeSize ///< Instruction code size.
};
- /// \brief Query the cost of a specified instruction.
+ /// Query the cost of a specified instruction.
///
/// Clients should use this interface to query the cost of an existing
/// instruction. The instruction must have a valid parent (basic block).
llvm_unreachable("Unknown instruction cost kind");
}
- /// \brief Underlying constants for 'cost' values in this interface.
+ /// Underlying constants for 'cost' values in this interface.
///
/// Many APIs in this interface return a cost. This enum defines the
/// fundamental values that should be used to interpret (and produce) those
TCC_Expensive = 4 ///< The cost of a 'div' instruction on x86.
};
- /// \brief Estimate the cost of a specific operation when lowered.
+ /// Estimate the cost of a specific operation when lowered.
///
/// Note that this is designed to work on an arbitrary synthetic opcode, and
/// thus work for hypothetical queries before an instruction has even been
/// comments for a detailed explanation of the cost values.
int getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy = nullptr) const;
- /// \brief Estimate the cost of a GEP operation when lowered.
+ /// Estimate the cost of a GEP operation when lowered.
///
/// The contract for this function is the same as \c getOperationCost except
/// that it supports an interface that provides extra information specific to
int getGEPCost(Type *PointeeType, const Value *Ptr,
ArrayRef<const Value *> Operands) const;
- /// \brief Estimate the cost of a EXT operation when lowered.
+ /// Estimate the cost of a EXT operation when lowered.
///
/// The contract for this function is the same as \c getOperationCost except
/// that it supports an interface that provides extra information specific to
/// the EXT operation.
int getExtCost(const Instruction *I, const Value *Src) const;
- /// \brief Estimate the cost of a function call when lowered.
+ /// Estimate the cost of a function call when lowered.
///
/// The contract for this is the same as \c getOperationCost except that it
/// supports an interface that provides extra information specific to call
/// The latter is only interesting for varargs function types.
int getCallCost(FunctionType *FTy, int NumArgs = -1) const;
- /// \brief Estimate the cost of calling a specific function when lowered.
+ /// Estimate the cost of calling a specific function when lowered.
///
/// This overload adds the ability to reason about the particular function
/// being called in the event it is a library call with special lowering.
int getCallCost(const Function *F, int NumArgs = -1) const;
- /// \brief Estimate the cost of calling a specific function when lowered.
+ /// Estimate the cost of calling a specific function when lowered.
///
/// This overload allows specifying a set of candidate argument values.
int getCallCost(const Function *F, ArrayRef<const Value *> Arguments) const;
/// individual classes of instructions would be better.
unsigned getInliningThresholdMultiplier() const;
- /// \brief Estimate the cost of an intrinsic when lowered.
+ /// Estimate the cost of an intrinsic when lowered.
///
/// Mirrors the \c getCallCost method but uses an intrinsic identifier.
int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
ArrayRef<Type *> ParamTys) const;
- /// \brief Estimate the cost of an intrinsic when lowered.
+ /// Estimate the cost of an intrinsic when lowered.
///
/// Mirrors the \c getCallCost method but uses an intrinsic identifier.
int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
unsigned &JTSize) const;
- /// \brief Estimate the cost of a given IR user when lowered.
+ /// Estimate the cost of a given IR user when lowered.
///
/// This can estimate the cost of either a ConstantExpr or Instruction when
/// lowered. It has two primary advantages over the \c getOperationCost and
/// comments for a detailed explanation of the cost values.
int getUserCost(const User *U, ArrayRef<const Value *> Operands) const;
- /// \brief This is a helper function which calls the two-argument getUserCost
+ /// This is a helper function which calls the two-argument getUserCost
/// with \p Operands which are the current operands U has.
int getUserCost(const User *U) const {
SmallVector<const Value *, 4> Operands(U->value_op_begin(),
return getUserCost(U, Operands);
}
- /// \brief Return true if branch divergence exists.
+ /// Return true if branch divergence exists.
///
/// Branch divergence has a significantly negative impact on GPU performance
/// when threads in the same wavefront take different paths due to conditional
/// branches.
bool hasBranchDivergence() const;
- /// \brief Returns whether V is a source of divergence.
+ /// Returns whether V is a source of divergence.
///
/// This function provides the target-dependent information for
/// the target-independent DivergenceAnalysis. DivergenceAnalysis first
/// starting with the sources of divergence.
bool isSourceOfDivergence(const Value *V) const;
- // \brief Returns true for the target specific
+ // Returns true for the target specific
// set of operations which produce uniform result
// even taking non-unform arguments
bool isAlwaysUniform(const Value *V) const;
/// optimize away.
unsigned getFlatAddressSpace() const;
- /// \brief Test whether calls to a function lower to actual program function
+ /// Test whether calls to a function lower to actual program function
/// calls.
///
/// The idea is to test whether the program is likely to require a 'call'
bool UnrollRemainder;
};
- /// \brief Get target-customized preferences for the generic loop unrolling
+ /// Get target-customized preferences for the generic loop unrolling
/// transformation. The caller will initialize UP with the current
/// target-independent defaults.
void getUnrollingPreferences(Loop *L, ScalarEvolution &,
/// \name Scalar Target Information
/// @{
- /// \brief Flags indicating the kind of support for population count.
+ /// Flags indicating the kind of support for population count.
///
/// Compared to the SW implementation, HW support is supposed to
/// significantly boost the performance when the population is dense, and it
/// considered as "Slow".
enum PopcntSupportKind { PSK_Software, PSK_SlowHardware, PSK_FastHardware };
- /// \brief Return true if the specified immediate is legal add immediate, that
+ /// Return true if the specified immediate is legal add immediate, that
/// is the target has add instructions which can add a register with the
/// immediate without having to materialize the immediate into a register.
bool isLegalAddImmediate(int64_t Imm) const;
- /// \brief Return true if the specified immediate is legal icmp immediate,
+ /// Return true if the specified immediate is legal icmp immediate,
/// that is the target has icmp instructions which can compare a register
/// against the immediate without having to materialize the immediate into a
/// register.
bool isLegalICmpImmediate(int64_t Imm) const;
- /// \brief Return true if the addressing mode represented by AM is legal for
+ /// Return true if the addressing mode represented by AM is legal for
/// this target, for a load/store of the specified type.
/// The type may be VoidTy, in which case only return true if the addressing
/// mode is legal for a load/store of any legal type.
unsigned AddrSpace = 0,
Instruction *I = nullptr) const;
- /// \brief Return true if LSR cost of C1 is lower than C1.
+ /// Return true if LSR cost of C1 is lower than C1.
bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
TargetTransformInfo::LSRCost &C2) const;
/// addressing mode expressions.
bool shouldFavorPostInc() const;
- /// \brief Return true if the target supports masked load/store
+ /// Return true if the target supports masked load/store
/// AVX2 and AVX-512 targets allow masks for consecutive load and store
bool isLegalMaskedStore(Type *DataType) const;
bool isLegalMaskedLoad(Type *DataType) const;
- /// \brief Return true if the target supports masked gather/scatter
+ /// Return true if the target supports masked gather/scatter
/// AVX-512 fully supports gather and scatter for vectors with 32 and 64
/// bits scalar type.
bool isLegalMaskedScatter(Type *DataType) const;
/// Return true if target doesn't mind addresses in vectors.
bool prefersVectorizedAddressing() const;
- /// \brief Return the cost of the scaling factor used in the addressing
+ /// Return the cost of the scaling factor used in the addressing
/// mode represented by AM for this target, for a load/store
/// of the specified type.
/// If the AM is supported, the return value must be >= 0.
bool HasBaseReg, int64_t Scale,
unsigned AddrSpace = 0) const;
- /// \brief Return true if the loop strength reduce pass should make
+ /// Return true if the loop strength reduce pass should make
/// Instruction* based TTI queries to isLegalAddressingMode(). This is
/// needed on SystemZ, where e.g. a memcpy can only have a 12 bit unsigned
/// immediate offset and no index register.
bool LSRWithInstrQueries() const;
- /// \brief Return true if it's free to truncate a value of type Ty1 to type
+ /// Return true if it's free to truncate a value of type Ty1 to type
/// Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
/// by referencing its sub-register AX.
bool isTruncateFree(Type *Ty1, Type *Ty2) const;
- /// \brief Return true if it is profitable to hoist instruction in the
+ /// Return true if it is profitable to hoist instruction in the
/// then/else to before if.
bool isProfitableToHoist(Instruction *I) const;
bool useAA() const;
- /// \brief Return true if this type is legal.
+ /// Return true if this type is legal.
bool isTypeLegal(Type *Ty) const;
- /// \brief Returns the target's jmp_buf alignment in bytes.
+ /// Returns the target's jmp_buf alignment in bytes.
unsigned getJumpBufAlignment() const;
- /// \brief Returns the target's jmp_buf size in bytes.
+ /// Returns the target's jmp_buf size in bytes.
unsigned getJumpBufSize() const;
- /// \brief Return true if switches should be turned into lookup tables for the
+ /// Return true if switches should be turned into lookup tables for the
/// target.
bool shouldBuildLookupTables() const;
- /// \brief Return true if switches should be turned into lookup tables
+ /// Return true if switches should be turned into lookup tables
/// containing this constant value for the target.
bool shouldBuildLookupTablesForConstant(Constant *C) const;
- /// \brief Return true if the input function which is cold at all call sites,
+ /// Return true if the input function which is cold at all call sites,
/// should use coldcc calling convention.
bool useColdCCForColdCall(Function &F) const;
/// the scalarization cost of a load/store.
bool supportsEfficientVectorElementLoadStore() const;
- /// \brief Don't restrict interleaved unrolling to small loops.
+ /// Don't restrict interleaved unrolling to small loops.
bool enableAggressiveInterleaving(bool LoopHasReductions) const;
- /// \brief If not nullptr, enable inline expansion of memcmp. IsZeroCmp is
+ /// If not nullptr, enable inline expansion of memcmp. IsZeroCmp is
/// true if this is the expansion of memcmp(p1, p2, s) == 0.
struct MemCmpExpansionOptions {
// The list of available load sizes (in bytes), sorted in decreasing order.
};
const MemCmpExpansionOptions *enableMemCmpExpansion(bool IsZeroCmp) const;
- /// \brief Enable matching of interleaved access groups.
+ /// Enable matching of interleaved access groups.
bool enableInterleavedAccessVectorization() const;
- /// \brief Indicate that it is potentially unsafe to automatically vectorize
+ /// Indicate that it is potentially unsafe to automatically vectorize
/// floating-point operations because the semantics of vector and scalar
/// floating-point semantics may differ. For example, ARM NEON v7 SIMD math
/// does not support IEEE-754 denormal numbers, while depending on the
/// operations, shuffles, or casts.
bool isFPVectorizationPotentiallyUnsafe() const;
- /// \brief Determine if the target supports unaligned memory accesses.
+ /// Determine if the target supports unaligned memory accesses.
bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
unsigned BitWidth, unsigned AddressSpace = 0,
unsigned Alignment = 1,
bool *Fast = nullptr) const;
- /// \brief Return hardware support for population count.
+ /// Return hardware support for population count.
PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const;
- /// \brief Return true if the hardware has a fast square-root instruction.
+ /// Return true if the hardware has a fast square-root instruction.
bool haveFastSqrt(Type *Ty) const;
/// Return true if it is faster to check if a floating-point value is NaN
/// generally as cheap as checking for ordered/unordered.
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const;
- /// \brief Return the expected cost of supporting the floating point operation
+ /// Return the expected cost of supporting the floating point operation
/// of the specified type.
int getFPOpCost(Type *Ty) const;
- /// \brief Return the expected cost of materializing for the given integer
+ /// Return the expected cost of materializing for the given integer
/// immediate of the specified type.
int getIntImmCost(const APInt &Imm, Type *Ty) const;
- /// \brief Return the expected cost of materialization for the given integer
+ /// Return the expected cost of materialization for the given integer
/// immediate of the specified type for a given instruction. The cost can be
/// zero if the immediate can be folded into the specified instruction.
int getIntImmCost(unsigned Opc, unsigned Idx, const APInt &Imm,
int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
Type *Ty) const;
- /// \brief Return the expected cost for the given integer when optimising
+ /// Return the expected cost for the given integer when optimising
/// for size. This is different than the other integer immediate cost
/// functions in that it is subtarget agnostic. This is useful when you e.g.
/// target one ISA such as Aarch32 but smaller encodings could be possible
/// \name Vector Target Information
/// @{
- /// \brief The various kinds of shuffle patterns for vector queries.
+ /// The various kinds of shuffle patterns for vector queries.
enum ShuffleKind {
SK_Broadcast, ///< Broadcast element 0 to all other elements.
SK_Reverse, ///< Reverse the order of the vector.
///< shuffle mask.
};
- /// \brief Additional information about an operand's possible values.
+ /// Additional information about an operand's possible values.
enum OperandValueKind {
OK_AnyValue, // Operand can have any value.
OK_UniformValue, // Operand is uniform (splat of a value).
OK_NonUniformConstantValue // Operand is a non uniform constant value.
};
- /// \brief Additional properties of an operand's values.
+ /// Additional properties of an operand's values.
enum OperandValueProperties { OP_None = 0, OP_PowerOf2 = 1 };
/// \return The number of scalar or vector registers that the target has.
ArrayRef<unsigned> Indices, unsigned Alignment,
unsigned AddressSpace) const;
- /// \brief Calculate the cost of performing a vector reduction.
+ /// Calculate the cost of performing a vector reduction.
///
/// This is the cost of reducing the vector value of type \p Ty to a scalar
/// value using the operation denoted by \p Opcode. The form of the reduction
bool areInlineCompatible(const Function *Caller,
const Function *Callee) const;
- /// \brief The type of load/store indexing.
+ /// The type of load/store indexing.
enum MemIndexedMode {
MIM_Unindexed, ///< No indexing.
MIM_PreInc, ///< Pre-incrementing.
/// @}
private:
- /// \brief Estimate the latency of specified instruction.
+ /// Estimate the latency of specified instruction.
/// Returns 1 as the default value.
int getInstructionLatency(const Instruction *I) const;
- /// \brief Returns the expected throughput cost of the instruction.
+ /// Returns the expected throughput cost of the instruction.
/// Returns -1 if the cost is unknown.
int getInstructionThroughput(const Instruction *I) const;
- /// \brief The abstract base class used to type erase specific TTI
+ /// The abstract base class used to type erase specific TTI
/// implementations.
class Concept;
- /// \brief The template model for the base class which wraps a concrete
+ /// The template model for the base class which wraps a concrete
/// implementation in a type erased interface.
template <typename T> class Model;
TargetTransformInfo::TargetTransformInfo(T Impl)
: TTIImpl(new Model<T>(Impl)) {}
-/// \brief Analysis pass providing the \c TargetTransformInfo.
+/// Analysis pass providing the \c TargetTransformInfo.
///
/// The core idea of the TargetIRAnalysis is to expose an interface through
/// which LLVM targets can analyze and provide information about the middle
public:
typedef TargetTransformInfo Result;
- /// \brief Default construct a target IR analysis.
+ /// Default construct a target IR analysis.
///
/// This will use the module's datalayout to construct a baseline
/// conservative TTI result.
TargetIRAnalysis();
- /// \brief Construct an IR analysis pass around a target-provide callback.
+ /// Construct an IR analysis pass around a target-provide callback.
///
/// The callback will be called with a particular function for which the TTI
/// is needed and must return a TTI object for that function.
friend AnalysisInfoMixin<TargetIRAnalysis>;
static AnalysisKey Key;
- /// \brief The callback used to produce a result.
+ /// The callback used to produce a result.
///
/// We use a completely opaque callback so that targets can provide whatever
/// mechanism they desire for constructing the TTI for a given function.
/// the external TargetMachine, and that reference needs to never dangle.
std::function<Result(const Function &)> TTICallback;
- /// \brief Helper function used as the callback in the default constructor.
+ /// Helper function used as the callback in the default constructor.
static Result getDefaultTTI(const Function &F);
};
-/// \brief Wrapper pass for TargetTransformInfo.
+/// Wrapper pass for TargetTransformInfo.
///
/// This pass can be constructed from a TTI object which it stores internally
/// and is queried by passes.
public:
static char ID;
- /// \brief We must provide a default constructor for the pass but it should
+ /// We must provide a default constructor for the pass but it should
/// never be used.
///
/// Use the constructor below or call one of the creation routines.
TargetTransformInfo &getTTI(const Function &F);
};
-/// \brief Create an analysis pass wrapper around a TTI object.
+/// Create an analysis pass wrapper around a TTI object.
///
/// This analysis pass just holds the TTI instance and makes it available to
/// clients.
namespace llvm {
-/// \brief Base class for use as a mix-in that aids implementing
+/// Base class for use as a mix-in that aids implementing
/// a TargetTransformInfo-compatible class.
class TargetTransformInfoImplBase {
protected:
}
};
-/// \brief CRTP base class for use as a mix-in that aids implementing
+/// CRTP base class for use as a mix-in that aids implementing
/// a TargetTransformInfo-compatible class.
template <typename T>
class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
return GetUnderlyingObject(const_cast<Value *>(V), DL, MaxLookup);
}
- /// \brief This method is similar to GetUnderlyingObject except that it can
+ /// This method is similar to GetUnderlyingObject except that it can
/// look through phi and select instructions and return multiple objects.
///
/// If LoopInfo is passed, loop phis are further analyzed. If a pointer
/// the parent of I.
bool programUndefinedIfFullPoison(const Instruction *PoisonI);
- /// \brief Specific patterns of select instructions we can match.
+ /// Specific patterns of select instructions we can match.
enum SelectPatternFlavor {
SPF_UNKNOWN = 0,
SPF_SMIN, /// Signed minimum
SPF_NABS /// Negated absolute value
};
- /// \brief Behavior when a floating point min/max is given one NaN and one
+ /// Behavior when a floating point min/max is given one NaN and one
/// non-NaN as input.
enum SelectPatternNaNBehavior {
SPNB_NA = 0, /// NaN behavior not applicable.
enum ID : unsigned;
}
-/// \brief Identify if the intrinsic is trivially vectorizable.
+/// Identify if the intrinsic is trivially vectorizable.
/// This method returns true if the intrinsic's argument types are all
/// scalars for the scalar form of the intrinsic and all vectors for
/// the vector form of the intrinsic.
bool isTriviallyVectorizable(Intrinsic::ID ID);
-/// \brief Identifies if the intrinsic has a scalar operand. It checks for
+/// Identifies if the intrinsic has a scalar operand. It checks for
/// ctlz,cttz and powi special intrinsics whose argument is scalar.
bool hasVectorInstrinsicScalarOpd(Intrinsic::ID ID, unsigned ScalarOpdIdx);
-/// \brief Returns intrinsic ID for call.
+/// Returns intrinsic ID for call.
/// For the input call instruction it finds mapping intrinsic and returns
/// its intrinsic ID, in case it does not found it return not_intrinsic.
Intrinsic::ID getVectorIntrinsicIDForCall(const CallInst *CI,
const TargetLibraryInfo *TLI);
-/// \brief Find the operand of the GEP that should be checked for consecutive
+/// Find the operand of the GEP that should be checked for consecutive
/// stores. This ignores trailing indices that have no effect on the final
/// pointer.
unsigned getGEPInductionOperand(const GetElementPtrInst *Gep);
-/// \brief If the argument is a GEP, then returns the operand identified by
+/// If the argument is a GEP, then returns the operand identified by
/// getGEPInductionOperand. However, if there is some other non-loop-invariant
/// operand, it returns that instead.
Value *stripGetElementPtr(Value *Ptr, ScalarEvolution *SE, Loop *Lp);
-/// \brief If a value has only one user that is a CastInst, return it.
+/// If a value has only one user that is a CastInst, return it.
Value *getUniqueCastUse(Value *Ptr, Loop *Lp, Type *Ty);
-/// \brief Get the stride of a pointer access in a loop. Looks for symbolic
+/// Get the stride of a pointer access in a loop. Looks for symbolic
/// strides "a[i*stride]". Returns the symbolic stride, or null otherwise.
Value *getStrideFromPointer(Value *Ptr, ScalarEvolution *SE, Loop *Lp);
-/// \brief Given a vector and an element number, see if the scalar value is
+/// Given a vector and an element number, see if the scalar value is
/// already around as a register, for example if it were inserted then extracted
/// from the vector.
Value *findScalarElement(Value *V, unsigned EltNo);
-/// \brief Get splat value if the input is a splat vector or return nullptr.
+/// Get splat value if the input is a splat vector or return nullptr.
/// The value may be extracted from a splat constants vector or from
/// a sequence of instructions that broadcast a single value into a vector.
const Value *getSplatValue(const Value *V);
-/// \brief Compute a map of integer instructions to their minimum legal type
+/// Compute a map of integer instructions to their minimum legal type
/// size.
///
/// C semantics force sub-int-sized values (e.g. i8, i16) to be promoted to int
/// This function always sets a (possibly null) value for each K in Kinds.
Instruction *propagateMetadata(Instruction *I, ArrayRef<Value *> VL);
-/// \brief Create an interleave shuffle mask.
+/// Create an interleave shuffle mask.
///
/// This function creates a shuffle mask for interleaving \p NumVecs vectors of
/// vectorization factor \p VF into a single wide vector. The mask is of the
Constant *createInterleaveMask(IRBuilder<> &Builder, unsigned VF,
unsigned NumVecs);
-/// \brief Create a stride shuffle mask.
+/// Create a stride shuffle mask.
///
/// This function creates a shuffle mask whose elements begin at \p Start and
/// are incremented by \p Stride. The mask can be used to deinterleave an
Constant *createStrideMask(IRBuilder<> &Builder, unsigned Start,
unsigned Stride, unsigned VF);
-/// \brief Create a sequential shuffle mask.
+/// Create a sequential shuffle mask.
///
/// This function creates shuffle mask whose elements are sequential and begin
/// at \p Start. The mask contains \p NumInts integers and is padded with \p
Constant *createSequentialMask(IRBuilder<> &Builder, unsigned Start,
unsigned NumInts, unsigned NumUndefs);
-/// \brief Concatenate a list of vectors.
+/// Concatenate a list of vectors.
///
/// This function generates code that concatenate the vectors in \p Vecs into a
/// single large vector. The number of vectors should be greater than one, and
/// Module (intermediate representation) with the corresponding features. Note
/// that this does not verify that the generated Module is valid, so you should
/// run the verifier after parsing the file to check that it is okay.
-/// \brief Parse LLVM Assembly from a file
+/// Parse LLVM Assembly from a file
/// \param Filename The name of the file to parse
/// \param Error Error result info.
/// \param Context Context in which to allocate globals info.
/// Module (intermediate representation) with the corresponding features. Note
/// that this does not verify that the generated Module is valid, so you should
/// run the verifier after parsing the file to check that it is okay.
-/// \brief Parse LLVM Assembly from a string
+/// Parse LLVM Assembly from a string
/// \param AsmString The string containing assembly
/// \param Error Error result info.
/// \param Context Context in which to allocate globals info.
StringRef DataLayoutString = "");
/// parseAssemblyFile and parseAssemblyString are wrappers around this function.
-/// \brief Parse LLVM Assembly from a MemoryBuffer.
+/// Parse LLVM Assembly from a MemoryBuffer.
/// \param F The MemoryBuffer containing assembly
/// \param Err Error result info.
/// \param Slots The optional slot mapping that will be initialized during
const std::map<std::string, GVSummaryMapTy> *ModuleToSummariesForIndex);
};
- /// \brief Write the specified module to the specified raw output stream.
+ /// Write the specified module to the specified raw output stream.
///
/// For streams where it matters, the given stream should be in "binary"
/// mode.
class ModulePass;
class raw_ostream;
-/// \brief Create and return a pass that writes the module to the specified
+/// Create and return a pass that writes the module to the specified
/// ostream. Note that this pass is designed for use with the legacy pass
/// manager.
///
bool EmitSummaryIndex = false,
bool EmitModuleHash = false);
-/// \brief Pass for writing a module of IR out to a bitcode file.
+/// Pass for writing a module of IR out to a bitcode file.
///
/// Note that this is intended for use with the new pass manager. To construct
/// a pass for the legacy pass manager, use the function above.
bool EmitModuleHash;
public:
- /// \brief Construct a bitcode writer pass around a particular output stream.
+ /// Construct a bitcode writer pass around a particular output stream.
///
/// If \c ShouldPreserveUseListOrder, encode use-list order so it can be
/// reproduced when deserialized.
: OS(OS), ShouldPreserveUseListOrder(ShouldPreserveUseListOrder),
EmitSummaryIndex(EmitSummaryIndex), EmitModuleHash(EmitModuleHash) {}
- /// \brief Run the bitcode writer pass, and output the module to the selected
+ /// Run the bitcode writer pass, and output the module to the selected
/// output stream.
PreservedAnalyses run(Module &M, ModuleAnalysisManager &);
};
assert(BlockScope.empty() && CurAbbrevs.empty() && "Block imbalance");
}
- /// \brief Retrieve the current position in the stream, in bits.
+ /// Retrieve the current position in the stream, in bits.
uint64_t GetCurrentBitNo() const { return GetBufferOffset() * 8 + CurBit; }
- /// \brief Retrieve the number of bits currently used to encode an abbrev ID.
+ /// Retrieve the number of bits currently used to encode an abbrev ID.
unsigned GetAbbrevIDWidth() const { return CurCodeSize; }
//===--------------------------------------------------------------------===//
class SelectionDAG;
struct EVT;
-/// \brief Compute the linearized index of a member in a nested
+/// Compute the linearized index of a member in a nested
/// aggregate/struct/array.
///
/// Given an LLVM IR aggregate type and a sequence of insertvalue or
/// Lower the specified LLVM Constant to an MCExpr.
virtual const MCExpr *lowerConstant(const Constant *CV);
- /// \brief Print a general LLVM constant to the .s file.
+ /// Print a general LLVM constant to the .s file.
void EmitGlobalConstant(const DataLayout &DL, const Constant *CV);
- /// \brief Unnamed constant global variables solely contaning a pointer to
+ /// Unnamed constant global variables solely contaning a pointer to
/// another globals variable act like a global variable "proxy", or GOT
/// equivalents, i.e., it's only used to hold the address of the latter. One
/// optimization is to replace accesses to these proxies by using the GOT
/// accesses to GOT entries.
void computeGlobalGOTEquivs(Module &M);
- /// \brief Constant expressions using GOT equivalent globals may not be
+ /// Constant expressions using GOT equivalent globals may not be
/// eligible for PC relative GOT entry conversion, in such cases we need to
/// emit the proxies we previously omitted in EmitGlobalVariable.
void emitGlobalGOTEquivs();
// Dwarf Lowering Routines
//===------------------------------------------------------------------===//
- /// \brief Emit frame instruction to describe the layout of the frame.
+ /// Emit frame instruction to describe the layout of the frame.
void emitCFIInstruction(const MCCFIInstruction &Inst) const;
- /// \brief Emit Dwarf abbreviation table.
+ /// Emit Dwarf abbreviation table.
template <typename T> void emitDwarfAbbrevs(const T &Abbrevs) const {
// For each abbreviation.
for (const auto &Abbrev : Abbrevs)
void emitDwarfAbbrev(const DIEAbbrev &Abbrev) const;
- /// \brief Recursively emit Dwarf DIE tree.
+ /// Recursively emit Dwarf DIE tree.
void emitDwarfDIE(const DIE &Die) const;
//===------------------------------------------------------------------===//
function_ref<void(IRBuilder<> &, Value *, Value *, Value *, AtomicOrdering,
Value *&, Value *&)>;
-/// \brief Expand an atomic RMW instruction into a loop utilizing
+/// Expand an atomic RMW instruction into a loop utilizing
/// cmpxchg. You'll want to make sure your target machine likes cmpxchg
/// instructions in the first place and that there isn't another, better,
/// transformation available (for example AArch32/AArch64 have linked loads).
extern cl::opt<unsigned> PartialUnrollingThreshold;
-/// \brief Base class which can be used to help build a TTI implementation.
+/// Base class which can be used to help build a TTI implementation.
///
/// This class provides as much implementation of the TTI interface as is
/// possible using the target independent parts of the code generator.
return Cost;
}
- /// \brief Local query method delegates up to T which *must* implement this!
+ /// Local query method delegates up to T which *must* implement this!
const TargetSubtargetInfo *getST() const {
return static_cast<const T *>(this)->getST();
}
- /// \brief Local query method delegates up to T which *must* implement this!
+ /// Local query method delegates up to T which *must* implement this!
const TargetLoweringBase *getTLI() const {
return static_cast<const T *>(this)->getTLI();
}
return SingleCallCost;
}
- /// \brief Compute a cost of the given call instruction.
+ /// Compute a cost of the given call instruction.
///
/// Compute the cost of calling function F with return type RetTy and
/// argument types Tys. F might be nullptr, in this case the cost of an
/// @}
};
-/// \brief Concrete BasicTTIImpl that can be used if no further customization
+/// Concrete BasicTTIImpl that can be used if no further customization
/// is needed.
class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
using BaseT = BasicTTIImplBase<BasicTTIImpl>;
class MachineLoopInfo;
class VirtRegMap;
- /// \brief Normalize the spill weight of a live interval
+ /// Normalize the spill weight of a live interval
///
/// The spill weight of a live interval is computed as:
///
return UseDefFreq / (Size + 25*SlotIndex::InstrDist);
}
- /// \brief Calculate auxiliary information for a virtual register such as its
+ /// Calculate auxiliary information for a virtual register such as its
/// spill weight and allocation hint.
class VirtRegAuxInfo {
public:
NormalizingFn norm = normalizeSpillWeight)
: MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {}
- /// \brief (re)compute li's spill weight and allocation hint.
+ /// (re)compute li's spill weight and allocation hint.
void calculateSpillWeightAndHint(LiveInterval &li);
- /// \brief Compute future expected spill weight of a split artifact of li
+ /// Compute future expected spill weight of a split artifact of li
/// that will span between start and end slot indexes.
/// \param li The live interval to be split.
/// \param start The expected begining of the split artifact. Instructions
/// negative weight for unspillable li.
float futureWeight(LiveInterval &li, SlotIndex start, SlotIndex end);
- /// \brief Helper function for weight calculations.
+ /// Helper function for weight calculations.
/// (Re)compute li's spill weight and allocation hint, or, for non null
/// start and end - compute future expected spill weight of a split
/// artifact of li that will span between start and end slot indexes.
SlotIndex *end = nullptr);
};
- /// \brief Compute spill weights and allocation hints for all virtual register
+ /// Compute spill weights and allocation hints for all virtual register
/// live intervals.
void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
VirtRegMap *VRM,
return Features.getFeatures();
}
-/// \brief Set function attributes of functions in Module M based on CPU,
+/// Set function attributes of functions in Module M based on CPU,
/// Features, and command line flags.
LLVM_ATTRIBUTE_UNUSED static void
setFunctionAttributes(StringRef CPU, StringRef Features, Module &M) {
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Cost tables and simple lookup functions
+/// Cost tables and simple lookup functions
///
//===----------------------------------------------------------------------===//
/// The bump allocator to use when creating DIEAbbrev objects in the uniqued
/// storage container.
BumpPtrAllocator &Alloc;
- /// \brief FoldingSet that uniques the abbreviations.
+ /// FoldingSet that uniques the abbreviations.
FoldingSet<DIEAbbrev> AbbreviationsSet;
/// A list of all the unique abbreviations in use.
std::vector<DIEAbbrev *> Abbreviations;
class User;
class Value;
-/// \brief This is a fast-path instruction selection class that generates poor
+/// This is a fast-path instruction selection class that generates poor
/// code and doesn't support illegal types or non-trivial lowering, but runs
/// quickly.
class FastISel {
bool IsReturnValueUsed : 1;
bool IsPatchPoint : 1;
- // \brief IsTailCall Should be modified by implementations of FastLowerCall
+ // IsTailCall Should be modified by implementations of FastLowerCall
// that perform tail call conversions.
bool IsTailCall = false;
const TargetLibraryInfo *LibInfo;
bool SkipTargetIndependentISel;
- /// \brief The position of the last instruction for materializing constants
+ /// The position of the last instruction for materializing constants
/// for use in the current block. It resets to EmitStartPt when it makes sense
/// (for example, it's usually profitable to avoid function calls between the
/// definition and the use)
MachineInstr *LastLocalValue;
- /// \brief The top most instruction in the current block that is allowed for
+ /// The top most instruction in the current block that is allowed for
/// emitting local variables. LastLocalValue resets to EmitStartPt when it
/// makes sense (for example, on function calls)
MachineInstr *EmitStartPt;
public:
virtual ~FastISel();
- /// \brief Return the position of the last instruction emitted for
+ /// Return the position of the last instruction emitted for
/// materializing constants for use in the current block.
MachineInstr *getLastLocalValue() { return LastLocalValue; }
- /// \brief Update the position of the last instruction emitted for
+ /// Update the position of the last instruction emitted for
/// materializing constants for use in the current block.
void setLastLocalValue(MachineInstr *I) {
EmitStartPt = I;
LastLocalValue = I;
}
- /// \brief Set the current block to which generated machine instructions will
+ /// Set the current block to which generated machine instructions will
/// be appended.
void startNewBlock();
/// Flush the local value map and sink local values if possible.
void finishBasicBlock();
- /// \brief Return current debug location information.
+ /// Return current debug location information.
DebugLoc getCurDebugLoc() const { return DbgLoc; }
- /// \brief Do "fast" instruction selection for function arguments and append
+ /// Do "fast" instruction selection for function arguments and append
/// the machine instructions to the current block. Returns true when
/// successful.
bool lowerArguments();
- /// \brief Do "fast" instruction selection for the given LLVM IR instruction
+ /// Do "fast" instruction selection for the given LLVM IR instruction
/// and append the generated machine instructions to the current block.
/// Returns true if selection was successful.
bool selectInstruction(const Instruction *I);
- /// \brief Do "fast" instruction selection for the given LLVM IR operator
+ /// Do "fast" instruction selection for the given LLVM IR operator
/// (Instruction or ConstantExpr), and append generated machine instructions
/// to the current block. Return true if selection was successful.
bool selectOperator(const User *I, unsigned Opcode);
- /// \brief Create a virtual register and arrange for it to be assigned the
+ /// Create a virtual register and arrange for it to be assigned the
/// value for the given LLVM value.
unsigned getRegForValue(const Value *V);
- /// \brief Look up the value to see if its value is already cached in a
+ /// Look up the value to see if its value is already cached in a
/// register. It may be defined by instructions across blocks or defined
/// locally.
unsigned lookUpRegForValue(const Value *V);
- /// \brief This is a wrapper around getRegForValue that also takes care of
+ /// This is a wrapper around getRegForValue that also takes care of
/// truncating or sign-extending the given getelementptr index value.
std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
- /// \brief We're checking to see if we can fold \p LI into \p FoldInst. Note
+ /// We're checking to see if we can fold \p LI into \p FoldInst. Note
/// that we could have a sequence where multiple LLVM IR instructions are
/// folded into the same machineinstr. For example we could have:
///
/// If we succeed folding, return true.
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
- /// \brief The specified machine instr operand is a vreg, and that vreg is
+ /// The specified machine instr operand is a vreg, and that vreg is
/// being provided by the specified load instruction. If possible, try to
/// fold the load as an operand to the instruction, returning true if
/// possible.
return false;
}
- /// \brief Reset InsertPt to prepare for inserting instructions into the
+ /// Reset InsertPt to prepare for inserting instructions into the
/// current block.
void recomputeInsertPt();
- /// \brief Remove all dead instructions between the I and E.
+ /// Remove all dead instructions between the I and E.
void removeDeadCode(MachineBasicBlock::iterator I,
MachineBasicBlock::iterator E);
DebugLoc DL;
};
- /// \brief Prepare InsertPt to begin inserting instructions into the local
+ /// Prepare InsertPt to begin inserting instructions into the local
/// value area and return the old insert position.
SavePoint enterLocalValueArea();
- /// \brief Reset InsertPt to the given old insert position.
+ /// Reset InsertPt to the given old insert position.
void leaveLocalValueArea(SavePoint Old);
protected:
const TargetLibraryInfo *LibInfo,
bool SkipTargetIndependentISel = false);
- /// \brief This method is called by target-independent code when the normal
+ /// This method is called by target-independent code when the normal
/// FastISel process fails to select an instruction. This gives targets a
/// chance to emit code for anything that doesn't fit into FastISel's
/// framework. It returns true if it was successful.
virtual bool fastSelectInstruction(const Instruction *I) = 0;
- /// \brief This method is called by target-independent code to do target-
+ /// This method is called by target-independent code to do target-
/// specific argument lowering. It returns true if it was successful.
virtual bool fastLowerArguments();
- /// \brief This method is called by target-independent code to do target-
+ /// This method is called by target-independent code to do target-
/// specific call lowering. It returns true if it was successful.
virtual bool fastLowerCall(CallLoweringInfo &CLI);
- /// \brief This method is called by target-independent code to do target-
+ /// This method is called by target-independent code to do target-
/// specific intrinsic lowering. It returns true if it was successful.
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
- /// \brief This method is called by target-independent code to request that an
+ /// This method is called by target-independent code to request that an
/// instruction with the given type and opcode be emitted.
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
- /// \brief This method is called by target-independent code to request that an
+ /// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and register operand be emitted.
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
bool Op0IsKill);
- /// \brief This method is called by target-independent code to request that an
+ /// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and register operands be emitted.
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
bool Op0IsKill, unsigned Op1, bool Op1IsKill);
- /// \brief This method is called by target-independent code to request that an
+ /// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and register and immediate
/// operands be emitted.
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
bool Op0IsKill, uint64_t Imm);
- /// \brief This method is a wrapper of fastEmit_ri.
+ /// This method is a wrapper of fastEmit_ri.
///
/// It first tries to emit an instruction with an immediate operand using
/// fastEmit_ri. If that fails, it materializes the immediate into a register
unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
uint64_t Imm, MVT ImmType);
- /// \brief This method is called by target-independent code to request that an
+ /// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and immediate operand be emitted.
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
- /// \brief This method is called by target-independent code to request that an
+ /// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and floating-point immediate
/// operand be emitted.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
const ConstantFP *FPImm);
- /// \brief Emit a MachineInstr with no operands and a result register in the
+ /// Emit a MachineInstr with no operands and a result register in the
/// given register class.
unsigned fastEmitInst_(unsigned MachineInstOpcode,
const TargetRegisterClass *RC);
- /// \brief Emit a MachineInstr with one register operand and a result register
+ /// Emit a MachineInstr with one register operand and a result register
/// in the given register class.
unsigned fastEmitInst_r(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
bool Op0IsKill);
- /// \brief Emit a MachineInstr with two register operands and a result
+ /// Emit a MachineInstr with two register operands and a result
/// register in the given register class.
unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
bool Op0IsKill, unsigned Op1, bool Op1IsKill);
- /// \brief Emit a MachineInstr with three register operands and a result
+ /// Emit a MachineInstr with three register operands and a result
/// register in the given register class.
unsigned fastEmitInst_rrr(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
bool Op0IsKill, unsigned Op1, bool Op1IsKill,
unsigned Op2, bool Op2IsKill);
- /// \brief Emit a MachineInstr with a register operand, an immediate, and a
+ /// Emit a MachineInstr with a register operand, an immediate, and a
/// result register in the given register class.
unsigned fastEmitInst_ri(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
bool Op0IsKill, uint64_t Imm);
- /// \brief Emit a MachineInstr with one register operand and two immediate
+ /// Emit a MachineInstr with one register operand and two immediate
/// operands.
unsigned fastEmitInst_rii(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
- /// \brief Emit a MachineInstr with a floating point immediate, and a result
+ /// Emit a MachineInstr with a floating point immediate, and a result
/// register in the given register class.
unsigned fastEmitInst_f(unsigned MachineInstOpcode,
const TargetRegisterClass *RC,
const ConstantFP *FPImm);
- /// \brief Emit a MachineInstr with two register operands, an immediate, and a
+ /// Emit a MachineInstr with two register operands, an immediate, and a
/// result register in the given register class.
unsigned fastEmitInst_rri(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
bool Op0IsKill, unsigned Op1, bool Op1IsKill,
uint64_t Imm);
- /// \brief Emit a MachineInstr with a single immediate operand, and a result
+ /// Emit a MachineInstr with a single immediate operand, and a result
/// register in the given register class.
unsigned fastEmitInst_i(unsigned MachineInstrOpcode,
const TargetRegisterClass *RC, uint64_t Imm);
- /// \brief Emit a MachineInstr for an extract_subreg from a specified index of
+ /// Emit a MachineInstr for an extract_subreg from a specified index of
/// a superregister to a specified type.
unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill,
uint32_t Idx);
- /// \brief Emit MachineInstrs to compute the value of Op with all but the
+ /// Emit MachineInstrs to compute the value of Op with all but the
/// least significant bit set to zero.
unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill);
- /// \brief Emit an unconditional branch to the given block, unless it is the
+ /// Emit an unconditional branch to the given block, unless it is the
/// immediate (fall-through) successor, and update the CFG.
void fastEmitBranch(MachineBasicBlock *MBB, const DebugLoc &DL);
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB,
MachineBasicBlock *FalseMBB);
- /// \brief Update the value map to include the new mapping for this
+ /// Update the value map to include the new mapping for this
/// instruction, or insert an extra copy to get the result in a previous
/// determined register.
///
unsigned createResultReg(const TargetRegisterClass *RC);
- /// \brief Try to constrain Op so that it is usable by argument OpNum of the
+ /// Try to constrain Op so that it is usable by argument OpNum of the
/// provided MCInstrDesc. If this fails, create a new virtual register in the
/// correct class and COPY the value there.
unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op,
unsigned OpNum);
- /// \brief Emit a constant in a register using target-specific logic, such as
+ /// Emit a constant in a register using target-specific logic, such as
/// constant pool loads.
virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
- /// \brief Emit an alloca address in a register using target-specific logic.
+ /// Emit an alloca address in a register using target-specific logic.
virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
- /// \brief Emit the floating-point constant +0.0 in a register using target-
+ /// Emit the floating-point constant +0.0 in a register using target-
/// specific logic.
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
return 0;
}
- /// \brief Check if \c Add is an add that can be safely folded into \c GEP.
+ /// Check if \c Add is an add that can be safely folded into \c GEP.
///
/// \c Add can be folded into \c GEP if:
/// - \c Add is an add,
/// - \c Add has a constant operand.
bool canFoldAddIntoGEP(const User *GEP, const Value *Add);
- /// \brief Test whether the given value has exactly one use.
+ /// Test whether the given value has exactly one use.
bool hasTrivialKill(const Value *V);
- /// \brief Create a machine mem operand from the given instruction.
+ /// Create a machine mem operand from the given instruction.
MachineMemOperand *createMachineMemOperandFor(const Instruction *I) const;
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const;
}
bool lowerCall(const CallInst *I);
- /// \brief Select and emit code for a binary operator instruction, which has
+ /// Select and emit code for a binary operator instruction, which has
/// an opcode which directly corresponds to the given ISD opcode.
bool selectBinaryOp(const User *I, unsigned ISDOpcode);
bool selectFNeg(const User *I);
bool selectXRayTypedEvent(const CallInst *II);
private:
- /// \brief Handle PHI nodes in successor blocks.
+ /// Handle PHI nodes in successor blocks.
///
/// Emit code to ensure constants are copied into registers when needed.
/// Remember the virtual registers that need to be added to the Machine PHI
/// correspond to a different MBB than the end.
bool handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
- /// \brief Helper for materializeRegForValue to materialize a constant in a
+ /// Helper for materializeRegForValue to materialize a constant in a
/// target-independent way.
unsigned materializeConstant(const Value *V, MVT VT);
- /// \brief Helper for getRegForVale. This function is called when the value
+ /// Helper for getRegForVale. This function is called when the value
/// isn't already available in a register and must be materialized with new
/// instructions.
unsigned materializeRegForValue(const Value *V, MVT VT);
- /// \brief Clears LocalValueMap and moves the area for the new local variables
+ /// Clears LocalValueMap and moves the area for the new local variables
/// to the beginning of the block. It helps to avoid spilling cached variables
/// across heavy instructions like calls.
void flushLocalValueMap();
- /// \brief Removes dead local value instructions after SavedLastLocalvalue.
+ /// Removes dead local value instructions after SavedLastLocalvalue.
void removeDeadLocalValueCode(MachineInstr *SavedLastLocalValue);
struct InstOrderMap {
void sinkLocalValueMaterialization(MachineInstr &LocalMI, unsigned DefReg,
InstOrderMap &OrderMap);
- /// \brief Insertion point before trying to select the current instruction.
+ /// Insertion point before trying to select the current instruction.
MachineBasicBlock::iterator SavedInsertPt;
- /// \brief Add a stackmap or patchpoint intrinsic call's live variable
+ /// Add a stackmap or patchpoint intrinsic call's live variable
/// operands to a stackmap or patchpoint machine instruction.
bool addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
const CallInst *CI, unsigned StartIdx);
#include "llvm/CodeGen/MachineLoopInfo.h"
namespace llvm {
-/// \brief This is an alternative analysis pass to MachineBlockFrequencyInfo.
+/// This is an alternative analysis pass to MachineBlockFrequencyInfo.
/// The difference is that with this pass, the block frequencies are not
/// computed when the analysis pass is executed but rather when the BFI result
/// is explicitly requested by the analysis client.
/// The function.
MachineFunction *MF = nullptr;
- /// \brief Calculate MBFI and all other analyses that's not available and
+ /// Calculate MBFI and all other analyses that's not available and
/// required by BFI.
MachineBlockFrequencyInfo &calculateIfNotAvailable() const;
LazyMachineBlockFrequencyInfoPass();
- /// \brief Compute and return the block frequencies.
+ /// Compute and return the block frequencies.
MachineBlockFrequencyInfo &getBFI() { return calculateIfNotAvailable(); }
- /// \brief Compute and return the block frequencies.
+ /// Compute and return the block frequencies.
const MachineBlockFrequencyInfo &getBFI() const {
return calculateIfNotAvailable();
}
void print(raw_ostream &OS) const;
void dump() const;
- /// \brief Walk the range and assert if any invariants fail to hold.
+ /// Walk the range and assert if any invariants fail to hold.
///
/// Note that this is a no-op when asserts are disabled.
#ifdef NDEBUG
void print(raw_ostream &OS) const;
void dump() const;
- /// \brief Walks the interval and assert if any invariants fail to hold.
+ /// Walks the interval and assert if any invariants fail to hold.
///
/// Note that this is a no-op when asserts are disabled.
#ifdef NDEBUG
class MachineRegisterInfo;
class raw_ostream;
-/// \brief A set of physical registers with utility functions to track liveness
+/// A set of physical registers with utility functions to track liveness
/// when walking backward/forward through a basic block.
class LivePhysRegs {
const TargetRegisterInfo *TRI = nullptr;
LiveRegs.insert(*SubRegs);
}
- /// \brief Removes a physical register, all its sub-registers, and all its
+ /// Removes a physical register, all its sub-registers, and all its
/// super-registers from the set.
void removeReg(unsigned Reg) {
assert(TRI && "LivePhysRegs is not initialized.");
SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers =
nullptr);
- /// \brief Returns true if register \p Reg is contained in the set. This also
+ /// Returns true if register \p Reg is contained in the set. This also
/// works if only the super register of \p Reg has been defined, because
/// addReg() always adds all sub-registers to the set as well.
/// Note: Returns false if just some sub registers are live, use available()
void dump() const;
private:
- /// \brief Adds live-in registers from basic block \p MBB, taking associated
+ /// Adds live-in registers from basic block \p MBB, taking associated
/// lane masks into consideration.
void addBlockLiveIns(const MachineBasicBlock &MBB);
return OS;
}
-/// \brief Computes registers live-in to \p MBB assuming all of its successors
+/// Computes registers live-in to \p MBB assuming all of its successors
/// live-in lists are up-to-date. Puts the result into the given LivePhysReg
/// instance \p LiveRegs.
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB);
/// registers are created.
void MRI_NoteNewVirtualRegister(unsigned VReg) override;
- /// \brief Check if MachineOperand \p MO is a last use/kill either in the
+ /// Check if MachineOperand \p MO is a last use/kill either in the
/// main live range of \p LI or in one of the matching subregister ranges.
bool useIsKill(const LiveInterval &LI, const MachineOperand &MO) const;
Units.set(*Unit);
}
- /// \brief Adds register units covered by physical register \p Reg that are
+ /// Adds register units covered by physical register \p Reg that are
/// part of the lanemask \p Mask.
void addRegMasked(unsigned Reg, LaneBitmask Mask) {
for (MCRegUnitMaskIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
};
LoopTraversal() {}
- /// \brief Identifies basic blocks that are part of loops and should to be
+ /// Identifies basic blocks that are part of loops and should to be
/// visited twice and returns efficient traversal order for all the blocks.
typedef SmallVector<TraversedMBBInfo, 4> TraversalOrder;
TraversalOrder traverse(MachineFunction &MF);
/// \returns nullptr if a parsing error occurred.
std::unique_ptr<Module> parseIRModule();
- /// \brief Parses MachineFunctions in the MIR file and add them to the given
+ /// Parses MachineFunctions in the MIR file and add them to the given
/// MachineModuleInfo \p MMI.
///
/// \returns true if an error occurred.
/// Indicate that this basic block is the entry block of a cleanup funclet.
bool IsCleanupFuncletEntry = false;
- /// \brief since getSymbol is a relatively heavy-weight operation, the symbol
+ /// since getSymbol is a relatively heavy-weight operation, the symbol
/// is only computed once and is cached.
mutable MCSymbol *CachedMCSymbol = nullptr;
/// compute a normal dominator tree.
///
class MachineDominatorTree : public MachineFunctionPass {
- /// \brief Helper structure used to hold all the basic blocks
+ /// Helper structure used to hold all the basic blocks
/// involved in the split of a critical edge.
struct CriticalEdge {
MachineBasicBlock *FromBB;
MachineBasicBlock *NewBB;
};
- /// \brief Pile up all the critical edges to be split.
+ /// Pile up all the critical edges to be split.
/// The splitting of a critical edge is local and thus, it is possible
/// to apply several of those changes at the same time.
mutable SmallVector<CriticalEdge, 32> CriticalEdgesToSplit;
- /// \brief Remember all the basic blocks that are inserted during
+ /// Remember all the basic blocks that are inserted during
/// edge splitting.
/// Invariant: NewBBs == all the basic blocks contained in the NewBB
/// field of all the elements of CriticalEdgesToSplit.
/// The DominatorTreeBase that is used to compute a normal dominator tree
std::unique_ptr<DomTreeBase<MachineBasicBlock>> DT;
- /// \brief Apply all the recorded critical edges to the DT.
+ /// Apply all the recorded critical edges to the DT.
/// This updates the underlying DT information in a way that uses
/// the fast query path of DT as much as possible.
///
void print(raw_ostream &OS, const Module*) const override;
- /// \brief Record that the critical edge (FromBB, ToBB) has been
+ /// Record that the critical edge (FromBB, ToBB) has been
/// split with NewBB.
/// This is best to use this method instead of directly update the
/// underlying information, because this helps mitigating the
struct MachineFunctionInfo {
virtual ~MachineFunctionInfo();
- /// \brief Factory function: default behavior is to call new using the
+ /// Factory function: default behavior is to call new using the
/// supplied allocator.
///
/// This function can be overridden in a derive class.
//===--------------------------------------------------------------------===//
// Internal functions used to automatically number MachineBasicBlocks
- /// \brief Adds the MBB to the internal numbering. Returns the unique number
+ /// Adds the MBB to the internal numbering. Returns the unique number
/// assigned to the MBB.
unsigned addToMBBNumbering(MachineBasicBlock *MBB) {
MBBNumbering.push_back(MBB);
OperandRecycler.deallocate(Cap, Array);
}
- /// \brief Allocate and initialize a register mask with @p NumRegister bits.
+ /// Allocate and initialize a register mask with @p NumRegister bits.
uint32_t *allocateRegisterMask(unsigned NumRegister) {
unsigned Size = (NumRegister + 31) / 32;
uint32_t *Mask = Allocator.Allocate<uint32_t>(Size);
return hasProperty(MCID::FoldableAsLoad, Type);
}
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic REG_SEQUENCE instructions.
/// E.g., on ARM,
/// dX VMOVDRR rY, rZ
return hasProperty(MCID::RegSequence, Type);
}
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic EXTRACT_SUBREG instructions.
/// E.g., on ARM,
/// rX, rY VMOVRRD dZ
return hasProperty(MCID::ExtractSubreg, Type);
}
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic INSERT_SUBREG instructions.
/// E.g., on ARM,
/// dX = VSETLNi32 dY, rZ, Imm
const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI) const;
- /// \brief Applies the constraints (def/use) implied by this MI on \p Reg to
+ /// Applies the constraints (def/use) implied by this MI on \p Reg to
/// the given \p CurRC.
/// If \p ExploreBundle is set and MI is part of a bundle, all the
/// instructions inside the bundle will be taken into account. In other words,
const TargetInstrInfo *TII, const TargetRegisterInfo *TRI,
bool ExploreBundle = false) const;
- /// \brief Applies the constraints (def/use) implied by the \p OpIdx operand
+ /// Applies the constraints (def/use) implied by the \p OpIdx operand
/// to the given \p CurRC.
///
/// Returns the register class that satisfies both \p CurRC and the
/// Slow path for hasProperty when we're dealing with a bundle.
bool hasPropertyInBundle(unsigned Mask, QueryType Type) const;
- /// \brief Implements the logic of getRegClassConstraintEffectForVReg for the
+ /// Implements the logic of getRegClassConstraintEffectForVReg for the
/// this MI and the given operand index \p OpIdx.
/// If the related operand does not constrained Reg, this returns CurRC.
const TargetRegisterClass *getRegClassConstraintEffectForVRegImpl(
/// that contains the header.
MachineBasicBlock *getBottomBlock();
- /// \brief Find the block that contains the loop control variable and the
+ /// Find the block that contains the loop control variable and the
/// loop test. This will return the latch block if it's one of the exiting
/// blocks. Otherwise, return the exiting block. Return 'null' when
/// multiple exiting blocks are present.
LoopInfoBase<MachineBasicBlock, MachineLoop>& getBase() { return LI; }
- /// \brief Find the block that either is the loop preheader, or could
+ /// Find the block that either is the loop preheader, or could
/// speculatively be used as the preheader. This is e.g. useful to place
/// loop setup code. Code that cannot be speculated should not be placed
/// here. SpeculativePreheader is controlling whether it also tries to
/// should stay in sync with the hash_value overload below.
bool isIdenticalTo(const MachineOperand &Other) const;
- /// \brief MachineOperand hash_value overload.
+ /// MachineOperand hash_value overload.
///
/// Note that this includes the same information in the hash that
/// isIdenticalTo uses for comparison. It is thus suited for use in hash
class MachineBlockFrequencyInfo;
class MachineInstr;
-/// \brief Common features for diagnostics dealing with optimization remarks
+/// Common features for diagnostics dealing with optimization remarks
/// that are used by machine passes.
class DiagnosticInfoMIROptimization : public DiagnosticInfoOptimizationBase {
public:
/// Emit an optimization remark.
void emit(DiagnosticInfoOptimizationBase &OptDiag);
- /// \brief Whether we allow for extra compile-time budget to perform more
+ /// Whether we allow for extra compile-time budget to perform more
/// analysis to be more informative.
///
/// This is useful to enable additional missed optimizations to be reported
.getDiagHandlerPtr()->isAnyRemarkEnabled(PassName));
}
- /// \brief Take a lambda that returns a remark which will be emitted. Second
+ /// Take a lambda that returns a remark which will be emitted. Second
/// argument is only used to restrict this to functions.
template <typename T>
void emit(T RemarkBuilder, decltype(RemarkBuilder()) * = nullptr) {
/// Similar but use value from \p OptDiag and update hotness there.
void computeHotness(DiagnosticInfoMIROptimization &Remark);
- /// \brief Only allow verbose messages if we know we're filtering by hotness
+ /// Only allow verbose messages if we know we're filtering by hotness
/// (BFI is only set in this case).
bool shouldEmitVerbose() { return MBFI != nullptr; }
};
/// be scheduled at the bottom.
virtual SUnit *pickNode(bool &IsTopNode) = 0;
- /// \brief Scheduler callback to notify that a new subtree is scheduled.
+ /// Scheduler callback to notify that a new subtree is scheduled.
virtual void scheduleTree(unsigned SubtreeID) {}
/// Notify MachineSchedStrategy that ScheduleDAGMI has scheduled an
Mutations.push_back(std::move(Mutation));
}
- /// \brief True if an edge can be added from PredSU to SuccSU without creating
+ /// True if an edge can be added from PredSU to SuccSU without creating
/// a cycle.
bool canAddEdge(SUnit *SuccSU, SUnit *PredSU);
- /// \brief Add a DAG edge to the given SU with the given predecessor
+ /// Add a DAG edge to the given SU with the given predecessor
/// dependence data.
///
/// \returns true if the edge may be added without creating a cycle OR if an
/// Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues.
void placeDebugValues();
- /// \brief dump the scheduled Sequence.
+ /// dump the scheduled Sequence.
void dumpSchedule() const;
// Lesser helpers...
/// Return true if this DAG supports VReg liveness and RegPressure.
bool hasVRegLiveness() const override { return true; }
- /// \brief Return true if register pressure tracking is enabled.
+ /// Return true if register pressure tracking is enabled.
bool isTrackingPressure() const { return ShouldTrackPressure; }
/// Get current register pressure for the top scheduled instructions.
class TargetInstrInfo;
class TargetSubtargetInfo;
-/// \brief Check if the instr pair, FirstMI and SecondMI, should be fused
+/// Check if the instr pair, FirstMI and SecondMI, should be fused
/// together. Given SecondMI, when FirstMI is unspecified, then check if
/// SecondMI may be part of a fused pair at all.
using ShouldSchedulePredTy = std::function<bool(const TargetInstrInfo &TII,
const MachineInstr *FirstMI,
const MachineInstr &SecondMI)>;
-/// \brief Create a DAG scheduling mutation to pair instructions back to back
+/// Create a DAG scheduling mutation to pair instructions back to back
/// for instructions that benefit according to the target-specific
/// shouldScheduleAdjacent predicate function.
std::unique_ptr<ScheduleDAGMutation>
createMacroFusionDAGMutation(ShouldSchedulePredTy shouldScheduleAdjacent);
-/// \brief Create a DAG scheduling mutation to pair branch instructions with one
+/// Create a DAG scheduling mutation to pair branch instructions with one
/// of their predecessors back to back for instructions that benefit according
/// to the target-specific shouldScheduleAdjacent predicate function.
std::unique_ptr<ScheduleDAGMutation>
using PBQPNum = float;
-/// \brief PBQP Vector class.
+/// PBQP Vector class.
class Vector {
friend hash_code hash_value(const Vector &);
public:
- /// \brief Construct a PBQP vector of the given size.
+ /// Construct a PBQP vector of the given size.
explicit Vector(unsigned Length)
: Length(Length), Data(llvm::make_unique<PBQPNum []>(Length)) {}
- /// \brief Construct a PBQP vector with initializer.
+ /// Construct a PBQP vector with initializer.
Vector(unsigned Length, PBQPNum InitVal)
: Length(Length), Data(llvm::make_unique<PBQPNum []>(Length)) {
std::fill(Data.get(), Data.get() + Length, InitVal);
}
- /// \brief Copy construct a PBQP vector.
+ /// Copy construct a PBQP vector.
Vector(const Vector &V)
: Length(V.Length), Data(llvm::make_unique<PBQPNum []>(Length)) {
std::copy(V.Data.get(), V.Data.get() + Length, Data.get());
}
- /// \brief Move construct a PBQP vector.
+ /// Move construct a PBQP vector.
Vector(Vector &&V)
: Length(V.Length), Data(std::move(V.Data)) {
V.Length = 0;
}
- /// \brief Comparison operator.
+ /// Comparison operator.
bool operator==(const Vector &V) const {
assert(Length != 0 && Data && "Invalid vector");
if (Length != V.Length)
return std::equal(Data.get(), Data.get() + Length, V.Data.get());
}
- /// \brief Return the length of the vector
+ /// Return the length of the vector
unsigned getLength() const {
assert(Length != 0 && Data && "Invalid vector");
return Length;
}
- /// \brief Element access.
+ /// Element access.
PBQPNum& operator[](unsigned Index) {
assert(Length != 0 && Data && "Invalid vector");
assert(Index < Length && "Vector element access out of bounds.");
return Data[Index];
}
- /// \brief Const element access.
+ /// Const element access.
const PBQPNum& operator[](unsigned Index) const {
assert(Length != 0 && Data && "Invalid vector");
assert(Index < Length && "Vector element access out of bounds.");
return Data[Index];
}
- /// \brief Add another vector to this one.
+ /// Add another vector to this one.
Vector& operator+=(const Vector &V) {
assert(Length != 0 && Data && "Invalid vector");
assert(Length == V.Length && "Vector length mismatch.");
return *this;
}
- /// \brief Returns the index of the minimum value in this vector
+ /// Returns the index of the minimum value in this vector
unsigned minIndex() const {
assert(Length != 0 && Data && "Invalid vector");
return std::min_element(Data.get(), Data.get() + Length) - Data.get();
std::unique_ptr<PBQPNum []> Data;
};
-/// \brief Return a hash_value for the given vector.
+/// Return a hash_value for the given vector.
inline hash_code hash_value(const Vector &V) {
unsigned *VBegin = reinterpret_cast<unsigned*>(V.Data.get());
unsigned *VEnd = reinterpret_cast<unsigned*>(V.Data.get() + V.Length);
return hash_combine(V.Length, hash_combine_range(VBegin, VEnd));
}
-/// \brief Output a textual representation of the given vector on the given
+/// Output a textual representation of the given vector on the given
/// output stream.
template <typename OStream>
OStream& operator<<(OStream &OS, const Vector &V) {
return OS;
}
-/// \brief PBQP Matrix class
+/// PBQP Matrix class
class Matrix {
private:
friend hash_code hash_value(const Matrix &);
public:
- /// \brief Construct a PBQP Matrix with the given dimensions.
+ /// Construct a PBQP Matrix with the given dimensions.
Matrix(unsigned Rows, unsigned Cols) :
Rows(Rows), Cols(Cols), Data(llvm::make_unique<PBQPNum []>(Rows * Cols)) {
}
- /// \brief Construct a PBQP Matrix with the given dimensions and initial
+ /// Construct a PBQP Matrix with the given dimensions and initial
/// value.
Matrix(unsigned Rows, unsigned Cols, PBQPNum InitVal)
: Rows(Rows), Cols(Cols),
std::fill(Data.get(), Data.get() + (Rows * Cols), InitVal);
}
- /// \brief Copy construct a PBQP matrix.
+ /// Copy construct a PBQP matrix.
Matrix(const Matrix &M)
: Rows(M.Rows), Cols(M.Cols),
Data(llvm::make_unique<PBQPNum []>(Rows * Cols)) {
std::copy(M.Data.get(), M.Data.get() + (Rows * Cols), Data.get());
}
- /// \brief Move construct a PBQP matrix.
+ /// Move construct a PBQP matrix.
Matrix(Matrix &&M)
: Rows(M.Rows), Cols(M.Cols), Data(std::move(M.Data)) {
M.Rows = M.Cols = 0;
}
- /// \brief Comparison operator.
+ /// Comparison operator.
bool operator==(const Matrix &M) const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
if (Rows != M.Rows || Cols != M.Cols)
return std::equal(Data.get(), Data.get() + (Rows * Cols), M.Data.get());
}
- /// \brief Return the number of rows in this matrix.
+ /// Return the number of rows in this matrix.
unsigned getRows() const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
return Rows;
}
- /// \brief Return the number of cols in this matrix.
+ /// Return the number of cols in this matrix.
unsigned getCols() const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
return Cols;
}
- /// \brief Matrix element access.
+ /// Matrix element access.
PBQPNum* operator[](unsigned R) {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
assert(R < Rows && "Row out of bounds.");
return Data.get() + (R * Cols);
}
- /// \brief Matrix element access.
+ /// Matrix element access.
const PBQPNum* operator[](unsigned R) const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
assert(R < Rows && "Row out of bounds.");
return Data.get() + (R * Cols);
}
- /// \brief Returns the given row as a vector.
+ /// Returns the given row as a vector.
Vector getRowAsVector(unsigned R) const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
Vector V(Cols);
return V;
}
- /// \brief Returns the given column as a vector.
+ /// Returns the given column as a vector.
Vector getColAsVector(unsigned C) const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
Vector V(Rows);
return V;
}
- /// \brief Matrix transpose.
+ /// Matrix transpose.
Matrix transpose() const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
Matrix M(Cols, Rows);
return M;
}
- /// \brief Add the given matrix to this one.
+ /// Add the given matrix to this one.
Matrix& operator+=(const Matrix &M) {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
assert(Rows == M.Rows && Cols == M.Cols &&
std::unique_ptr<PBQPNum []> Data;
};
-/// \brief Return a hash_code for the given matrix.
+/// Return a hash_code for the given matrix.
inline hash_code hash_value(const Matrix &M) {
unsigned *MBegin = reinterpret_cast<unsigned*>(M.Data.get());
unsigned *MEnd =
return hash_combine(M.Rows, M.Cols, hash_combine_range(MBegin, MEnd));
}
-/// \brief Output a textual representation of the given matrix on the given
+/// Output a textual representation of the given matrix on the given
/// output stream.
template <typename OStream>
OStream& operator<<(OStream &OS, const Matrix &M) {
namespace llvm {
namespace PBQP {
- /// \brief Reduce a node of degree one.
+ /// Reduce a node of degree one.
///
/// Propagate costs from the given node, which must be of degree one, to its
/// neighbor. Notify the problem domain.
}
#endif
- // \brief Find a solution to a fully reduced graph by backpropagation.
+ // Find a solution to a fully reduced graph by backpropagation.
//
// Given a graph and a reduction order, pop each node from the reduction
// order and greedily compute a minimum solution based on the node costs, and
namespace llvm {
namespace PBQP {
- /// \brief Represents a solution to a PBQP problem.
+ /// Represents a solution to a PBQP problem.
///
/// To get the selection for each node in the problem use the getSelection method.
class Solution {
SelectionsMap selections;
public:
- /// \brief Initialise an empty solution.
+ /// Initialise an empty solution.
Solution() = default;
- /// \brief Set the selection for a given node.
+ /// Set the selection for a given node.
/// @param nodeId Node id.
/// @param selection Selection for nodeId.
void setSelection(GraphBase::NodeId nodeId, unsigned selection) {
selections[nodeId] = selection;
}
- /// \brief Get a node's selection.
+ /// Get a node's selection.
/// @param nodeId Node id.
/// @return The selection for nodeId;
unsigned getSelection(GraphBase::NodeId nodeId) const {
/// StackSlotColoring - This pass performs stack slot coloring.
extern char &StackSlotColoringID;
- /// \brief This pass lays out funclets contiguously.
+ /// This pass lays out funclets contiguously.
extern char &FuncletLayoutID;
/// This pass inserts the XRay instrumentation sleds if they are supported by
/// This pass inserts FEntry calls
extern char &FEntryInserterID;
- /// \brief This pass implements the "patchable-function" attribute.
+ /// This pass implements the "patchable-function" attribute.
extern char &PatchableFunctionID;
/// createStackProtectorPass - This pass adds stack protectors to functions.
/// @brief Spill option index.
inline unsigned getSpillOptionIdx() { return 0; }
-/// \brief Metadata to speed allocatability test.
+/// Metadata to speed allocatability test.
///
/// Keeps track of the number of infinities in each row and column.
class MatrixMetadata {
std::unique_ptr<bool[]> UnsafeCols;
};
-/// \brief Holds a vector of the allowed physical regs for a vreg.
+/// Holds a vector of the allowed physical regs for a vreg.
class AllowedRegVector {
friend hash_code hash_value(const AllowedRegVector &);
hash_combine_range(OStart, OEnd));
}
-/// \brief Holds graph-level metadata relevant to PBQP RA problems.
+/// Holds graph-level metadata relevant to PBQP RA problems.
class GraphMetadata {
private:
using AllowedRegVecPool = ValuePool<AllowedRegVector>;
AllowedRegVecPool AllowedRegVecs;
};
-/// \brief Holds solver state and other metadata relevant to each PBQP RA node.
+/// Holds solver state and other metadata relevant to each PBQP RA node.
class NodeMetadata {
public:
using AllowedRegVector = RegAlloc::AllowedRegVector;
public:
/// List of virtual registers and register units read by the instruction.
SmallVector<RegisterMaskPair, 8> Uses;
- /// \brief List of virtual registers and register units defined by the
+ /// List of virtual registers and register units defined by the
/// instruction which are not dead.
SmallVector<RegisterMaskPair, 8> Defs;
- /// \brief List of virtual registers and register units defined by the
+ /// List of virtual registers and register units defined by the
/// instruction but dead.
SmallVector<RegisterMaskPair, 8> DeadDefs;
return const_cast<PressureDiffs*>(this)->operator[](Idx);
}
- /// \brief Record pressure difference induced by the given operand list to
+ /// Record pressure difference induced by the given operand list to
/// node with index \p Idx.
void addInstruction(unsigned Idx, const RegisterOperands &RegOpers,
const MachineRegisterInfo &MRI);
/// Add Reg to the live in set and increase max pressure.
void discoverLiveIn(RegisterMaskPair Pair);
- /// \brief Get the SlotIndex for the first nondebug instruction including or
+ /// Get the SlotIndex for the first nondebug instruction including or
/// after the current position.
SlotIndex getCurrSlot() const;
};
private:
- /// \brief A pointer to the depending/depended-on SUnit, and an enum
+ /// A pointer to the depending/depended-on SUnit, and an enum
/// indicating the kind of the dependency.
PointerIntPair<SUnit *, 2, Kind> Dep;
return !operator==(Other);
}
- /// \brief Returns the latency value for this edge, which roughly means the
+ /// Returns the latency value for this edge, which roughly means the
/// minimum number of cycles that must elapse between the predecessor and
/// the successor, given that they have this edge between them.
unsigned getLatency() const {
return getKind() != Data;
}
- /// \brief Tests if this is an Order dependence between two memory accesses
+ /// Tests if this is an Order dependence between two memory accesses
/// where both sides of the dependence access memory in non-volatile and
/// fully modeled ways.
bool isNormalMemory() const {
return (isNormalMemory() || isBarrier());
}
- /// \brief Tests if this is an Order dependence that is marked as
+ /// Tests if this is an Order dependence that is marked as
/// "must alias", meaning that the SUnits at either end of the edge have a
/// memory dependence on a known memory location.
bool isMustAlias() const {
return getKind() == Order && Contents.OrdKind >= Weak;
}
- /// \brief Tests if this is an Order dependence that is marked as
+ /// Tests if this is an Order dependence that is marked as
/// "artificial", meaning it isn't necessary for correctness.
bool isArtificial() const {
return getKind() == Order && Contents.OrdKind == Artificial;
}
- /// \brief Tests if this is an Order dependence that is marked as "cluster",
+ /// Tests if this is an Order dependence that is marked as "cluster",
/// meaning it is artificial and wants to be adjacent.
bool isCluster() const {
return getKind() == Order && Contents.OrdKind == Cluster;
nullptr; ///< Is a special copy node if != nullptr.
const TargetRegisterClass *CopySrcRC = nullptr;
- /// \brief Constructs an SUnit for pre-regalloc scheduling to represent an
+ /// Constructs an SUnit for pre-regalloc scheduling to represent an
/// SDNode and any nodes flagged to it.
SUnit(SDNode *node, unsigned nodenum)
: Node(node), NodeNum(nodenum), isVRegCycle(false), isCall(false),
isUnbuffered(false), hasReservedResource(false), isDepthCurrent(false),
isHeightCurrent(false) {}
- /// \brief Constructs an SUnit for post-regalloc scheduling to represent a
+ /// Constructs an SUnit for post-regalloc scheduling to represent a
/// MachineInstr.
SUnit(MachineInstr *instr, unsigned nodenum)
: Instr(instr), NodeNum(nodenum), isVRegCycle(false), isCall(false),
isUnbuffered(false), hasReservedResource(false), isDepthCurrent(false),
isHeightCurrent(false) {}
- /// \brief Constructs a placeholder SUnit.
+ /// Constructs a placeholder SUnit.
SUnit()
: isVRegCycle(false), isCall(false), isCallOp(false), isTwoAddress(false),
isCommutable(false), hasPhysRegUses(false), hasPhysRegDefs(false),
isCloned(false), isUnbuffered(false), hasReservedResource(false),
isDepthCurrent(false), isHeightCurrent(false) {}
- /// \brief Boundary nodes are placeholders for the boundary of the
+ /// Boundary nodes are placeholders for the boundary of the
/// scheduling region.
///
/// BoundaryNodes can have DAG edges, including Data edges, but they do not
return Node;
}
- /// \brief Returns true if this SUnit refers to a machine instruction as
+ /// Returns true if this SUnit refers to a machine instruction as
/// opposed to an SDNode.
bool isInstr() const { return Instr; }
/// It also adds the current node as a successor of the specified node.
bool addPred(const SDep &D, bool Required = true);
- /// \brief Adds a barrier edge to SU by calling addPred(), with latency 0
+ /// Adds a barrier edge to SU by calling addPred(), with latency 0
/// generally or latency 1 for a store followed by a load.
bool addPredBarrier(SUnit *SU) {
SDep Dep(SU, SDep::Barrier);
return Depth;
}
- /// \brief Returns the height of this node, which is the length of the
+ /// Returns the height of this node, which is the length of the
/// maximum path down to any node which has no successors.
unsigned getHeight() const {
if (!isHeightCurrent)
return Height;
}
- /// \brief If NewDepth is greater than this node's depth value, sets it to
+ /// If NewDepth is greater than this node's depth value, sets it to
/// be the new depth value. This also recursively marks successor nodes
/// dirty.
void setDepthToAtLeast(unsigned NewDepth);
- /// \brief If NewDepth is greater than this node's depth value, set it to be
+ /// If NewDepth is greater than this node's depth value, set it to be
/// the new height value. This also recursively marks predecessor nodes
/// dirty.
void setHeightToAtLeast(unsigned NewHeight);
- /// \brief Sets a flag in this node to indicate that its stored Depth value
+ /// Sets a flag in this node to indicate that its stored Depth value
/// will require recomputation the next time getDepth() is called.
void setDepthDirty();
- /// \brief Sets a flag in this node to indicate that its stored Height value
+ /// Sets a flag in this node to indicate that its stored Height value
/// will require recomputation the next time getHeight() is called.
void setHeightDirty();
return NumSuccsLeft == 0;
}
- /// \brief Orders this node's predecessor edges such that the critical path
+ /// Orders this node's predecessor edges such that the critical path
/// edge occurs first.
void biasCriticalPath();
//===--------------------------------------------------------------------===//
- /// \brief This interface is used to plug different priorities computation
+ /// This interface is used to plug different priorities computation
/// algorithms into the list scheduler. It implements the interface of a
/// standard priority queue, where nodes are inserted in arbitrary order and
/// returned in priority order. The computation of the priority and the
virtual void addCustomGraphFeatures(GraphWriter<ScheduleDAG*> &) const {}
#ifndef NDEBUG
- /// \brief Verifies that all SUnits were scheduled and that their state is
+ /// Verifies that all SUnits were scheduled and that their state is
/// consistent. Returns the number of scheduled SUnits.
unsigned VerifyScheduledDAG(bool isBottomUp);
#endif
/// method.
void DFS(const SUnit *SU, int UpperBound, bool& HasLoop);
- /// \brief Reassigns topological indexes for the nodes in the DAG to
+ /// Reassigns topological indexes for the nodes in the DAG to
/// preserve the topological ordering.
void Shift(BitVector& Visited, int LowerBound, int UpperBound);
/// Returns true if addPred(TargetSU, SU) creates a cycle.
bool WillCreateCycle(SUnit *TargetSU, SUnit *SU);
- /// \brief Updates the topological ordering to accommodate an edge to be
+ /// Updates the topological ordering to accommodate an edge to be
/// added from SUnit \p X to SUnit \p Y.
void AddPred(SUnit *Y, SUnit *X);
- /// \brief Updates the topological ordering to accommodate an an edge to be
+ /// Updates the topological ordering to accommodate an an edge to be
/// removed from the specified node \p N from the predecessors of the
/// current node \p M.
void RemovePred(SUnit *M, SUnit *N);
using SUList = std::list<SUnit *>;
protected:
- /// \brief A map from ValueType to SUList, used during DAG construction, as
+ /// A map from ValueType to SUList, used during DAG construction, as
/// a means of remembering which SUs depend on which memory locations.
class Value2SUsMap;
void reduceHugeMemNodeMaps(Value2SUsMap &stores,
Value2SUsMap &loads, unsigned N);
- /// \brief Adds a chain edge between SUa and SUb, but only if both
+ /// Adds a chain edge between SUa and SUb, but only if both
/// AliasAnalysis and Target fail to deny the dependency.
void addChainDependency(SUnit *SUa, SUnit *SUb,
unsigned Latency = 0);
/// Cleans up after scheduling in the given block.
virtual void finishBlock();
- /// \brief Initialize the DAG and common scheduler state for a new
+ /// Initialize the DAG and common scheduler state for a new
/// scheduling region. This does not actually create the DAG, only clears
/// it. The scheduling driver may call BuildSchedGraph multiple times per
/// scheduling region.
LiveIntervals *LIS = nullptr,
bool TrackLaneMasks = false);
- /// \brief Adds dependencies from instructions in the current list of
+ /// Adds dependencies from instructions in the current list of
/// instructions being scheduled to scheduling barrier. We want to make sure
/// instructions which define registers that are either used by the
/// terminator or are live-out are properly scheduled. This is especially
class raw_ostream;
-/// \brief Represent the ILP of the subDAG rooted at a DAG node.
+/// Represent the ILP of the subDAG rooted at a DAG node.
///
/// ILPValues summarize the DAG subtree rooted at each node. ILPValues are
/// valid for all nodes regardless of their subtree membership.
void dump() const;
};
-/// \brief Compute the values of each DAG node for various metrics during DFS.
+/// Compute the values of each DAG node for various metrics during DFS.
class SchedDFSResult {
friend class SchedDFSImpl;
static const unsigned InvalidSubtreeID = ~0u;
- /// \brief Per-SUnit data computed during DFS for various metrics.
+ /// Per-SUnit data computed during DFS for various metrics.
///
/// A node's SubtreeID is set to itself when it is visited to indicate that it
/// is the root of a subtree. Later it is set to its parent to indicate an
NodeData() = default;
};
- /// \brief Per-Subtree data computed during DFS.
+ /// Per-Subtree data computed during DFS.
struct TreeData {
unsigned ParentTreeID = InvalidSubtreeID;
unsigned SubInstrCount = 0;
TreeData() = default;
};
- /// \brief Record a connection between subtrees and the connection level.
+ /// Record a connection between subtrees and the connection level.
struct Connection {
unsigned TreeID;
unsigned Level;
SchedDFSResult(bool IsBU, unsigned lim)
: IsBottomUp(IsBU), SubtreeLimit(lim) {}
- /// \brief Get the node cutoff before subtrees are considered significant.
+ /// Get the node cutoff before subtrees are considered significant.
unsigned getSubtreeLimit() const { return SubtreeLimit; }
- /// \brief Return true if this DFSResult is uninitialized.
+ /// Return true if this DFSResult is uninitialized.
///
/// resize() initializes DFSResult, while compute() populates it.
bool empty() const { return DFSNodeData.empty(); }
- /// \brief Clear the results.
+ /// Clear the results.
void clear() {
DFSNodeData.clear();
DFSTreeData.clear();
SubtreeConnectLevels.clear();
}
- /// \brief Initialize the result data with the size of the DAG.
+ /// Initialize the result data with the size of the DAG.
void resize(unsigned NumSUnits) {
DFSNodeData.resize(NumSUnits);
}
- /// \brief Compute various metrics for the DAG with given roots.
+ /// Compute various metrics for the DAG with given roots.
void compute(ArrayRef<SUnit> SUnits);
- /// \brief Get the number of instructions in the given subtree and its
+ /// Get the number of instructions in the given subtree and its
/// children.
unsigned getNumInstrs(const SUnit *SU) const {
return DFSNodeData[SU->NodeNum].InstrCount;
}
- /// \brief Get the number of instructions in the given subtree not including
+ /// Get the number of instructions in the given subtree not including
/// children.
unsigned getNumSubInstrs(unsigned SubtreeID) const {
return DFSTreeData[SubtreeID].SubInstrCount;
}
- /// \brief Get the ILP value for a DAG node.
+ /// Get the ILP value for a DAG node.
///
/// A leaf node has an ILP of 1/1.
ILPValue getILP(const SUnit *SU) const {
return ILPValue(DFSNodeData[SU->NodeNum].InstrCount, 1 + SU->getDepth());
}
- /// \brief The number of subtrees detected in this DAG.
+ /// The number of subtrees detected in this DAG.
unsigned getNumSubtrees() const { return SubtreeConnectLevels.size(); }
- /// \brief Get the ID of the subtree the given DAG node belongs to.
+ /// Get the ID of the subtree the given DAG node belongs to.
///
/// For convenience, if DFSResults have not been computed yet, give everything
/// tree ID 0.
return DFSNodeData[SU->NodeNum].SubtreeID;
}
- /// \brief Get the connection level of a subtree.
+ /// Get the connection level of a subtree.
///
/// For bottom-up trees, the connection level is the latency depth (in cycles)
/// of the deepest connection to another subtree.
return SubtreeConnectLevels[SubtreeID];
}
- /// \brief Scheduler callback to update SubtreeConnectLevels when a tree is
+ /// Scheduler callback to update SubtreeConnectLevels when a tree is
/// initially scheduled.
void scheduleTree(unsigned SubtreeID);
};
DbgValMap[Node].push_back(V);
}
- /// \brief Invalidate all DbgValues attached to the node and remove
+ /// Invalidate all DbgValues attached to the node and remove
/// it from the Node-to-DbgValues map.
void erase(const SDNode *Node);
/// the graph.
void Legalize();
- /// \brief Transforms a SelectionDAG node and any operands to it into a node
+ /// Transforms a SelectionDAG node and any operands to it into a node
/// that is compatible with the target instruction selector, as indicated by
/// the TargetLowering object.
///
//===--------------------------------------------------------------------===//
// Node creation methods.
- /// \brief Create a ConstantSDNode wrapping a constant value.
+ /// Create a ConstantSDNode wrapping a constant value.
/// If VT is a vector type, the constant is splatted into a BUILD_VECTOR.
///
/// If only legal types can be produced, this does the necessary
return getConstant(Val, DL, VT, true, isOpaque);
}
- /// \brief Create a true or false constant of type \p VT using the target's
+ /// Create a true or false constant of type \p VT using the target's
/// BooleanContent for type \p OpVT.
SDValue getBoolConstant(bool V, const SDLoc &DL, EVT VT, EVT OpVT);
/// @}
- /// \brief Create a ConstantFPSDNode wrapping a constant value.
+ /// Create a ConstantFPSDNode wrapping a constant value.
/// If VT is a vector type, the constant is splatted into a BUILD_VECTOR.
///
/// If only legal types can be produced, this does the necessary
return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
}
- /// \brief Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to
+ /// Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to
/// the shuffle node in input but with swapped operands.
///
/// Example: shuffle A, B, <0,5,2,7> -> shuffle B, A, <4,1,6,3>
/// Create a bitwise NOT operation as (XOR Val, -1).
SDValue getNOT(const SDLoc &DL, SDValue Val, EVT VT);
- /// \brief Create a logical NOT operation as (XOR Val, BooleanOne).
+ /// Create a logical NOT operation as (XOR Val, BooleanOne).
SDValue getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT);
- /// \brief Create an add instruction with appropriate flags when used for
+ /// Create an add instruction with appropriate flags when used for
/// addressing some offset of an object. i.e. if a load is split into multiple
/// components, create an add nuw from the base pointer to the offset.
SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Op, int64_t Offset) {
void SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
unsigned TableSize);
- /// \brief Return true if complex patterns for this target can mutate the
+ /// Return true if complex patterns for this target can mutate the
/// DAG.
virtual bool ComplexPatternFuncMutatesDAG() const {
return false;
/// instruction selected, false if no code should be emitted for it.
bool PrepareEHLandingPad();
- /// \brief Perform instruction selection on all basic blocks in the function.
+ /// Perform instruction selection on all basic blocks in the function.
void SelectAllBasicBlocks(const Function &Fn);
- /// \brief Perform instruction selection on a single basic block, for
+ /// Perform instruction selection on a single basic block, for
/// instructions between \p Begin and \p End. \p HadTailCall will be set
/// to true if a call in the block was translated as a tail call.
void SelectBasicBlock(BasicBlock::const_iterator Begin,
void CodeGenAndEmitDAG();
- /// \brief Generate instructions for lowering the incoming arguments of the
+ /// Generate instructions for lowering the incoming arguments of the
/// given function.
void LowerArguments(const Function &F);
unsigned MinSplatBits = 0,
bool isBigEndian = false) const;
- /// \brief Returns the splatted value or a null value if this is not a splat.
+ /// Returns the splatted value or a null value if this is not a splat.
///
/// If passed a non-null UndefElements bitvector, it will resize it to match
/// the vector width and set the bits where elements are undef.
SDValue getSplatValue(BitVector *UndefElements = nullptr) const;
- /// \brief Returns the splatted constant or null if this is not a constant
+ /// Returns the splatted constant or null if this is not a constant
/// splat.
///
/// If passed a non-null UndefElements bitvector, it will resize it to match
ConstantSDNode *
getConstantSplatNode(BitVector *UndefElements = nullptr) const;
- /// \brief Returns the splatted constant FP or null if this is not a constant
+ /// Returns the splatted constant FP or null if this is not a constant
/// FP splat.
///
/// If passed a non-null UndefElements bitvector, it will resize it to match
ConstantFPSDNode *
getConstantFPSplatNode(BitVector *UndefElements = nullptr) const;
- /// \brief If this is a constant FP splat and the splatted constant FP is an
+ /// If this is a constant FP splat and the splatted constant FP is an
/// exact power or 2, return the log base 2 integer value. Otherwise,
/// return -1.
///
llvm::sort(idx2MBBMap.begin(), idx2MBBMap.end(), Idx2MBBCompare());
}
- /// \brief Free the resources that were required to maintain a SlotIndex.
+ /// Free the resources that were required to maintain a SlotIndex.
///
/// Once an index is no longer needed (for instance because the instruction
/// at that index has been moved), the resources required to maintain the
class raw_ostream;
class TargetRegisterInfo;
-/// \brief MI-level stackmap operands.
+/// MI-level stackmap operands.
///
/// MI stackmap operations take the form:
/// <id>, <numBytes>, live args...
}
};
-/// \brief MI-level patchpoint operands.
+/// MI-level patchpoint operands.
///
/// MI patchpoint operations take the form:
/// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
return getVarIdx();
}
- /// \brief Get the next scratch register operand index.
+ /// Get the next scratch register operand index.
unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
};
FnInfos.clear();
}
- /// \brief Generate a stackmap record for a stackmap instruction.
+ /// Generate a stackmap record for a stackmap instruction.
///
/// MI must be a raw STACKMAP, not a PATCHPOINT.
void recordStackMap(const MachineInstr &MI);
- /// \brief Generate a stackmap record for a patchpoint instruction.
+ /// Generate a stackmap record for a patchpoint instruction.
void recordPatchPoint(const MachineInstr &MI);
- /// \brief Generate a stackmap record for a statepoint instruction.
+ /// Generate a stackmap record for a statepoint instruction.
void recordStatepoint(const MachineInstr &MI);
/// If there is any stack map data, create a stack map section and serialize
MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
LiveOutVec &LiveOuts) const;
- /// \brief Create a live-out register record for the given register @p Reg.
+ /// Create a live-out register record for the given register @p Reg.
LiveOutReg createLiveOutReg(unsigned Reg,
const TargetRegisterInfo *TRI) const;
- /// \brief Parse the register live-out mask and return a vector of live-out
+ /// Parse the register live-out mask and return a vector of live-out
/// registers that need to be recorded in the stackmap.
LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
MachineInstr::const_mop_iterator MOE,
bool recordResult = false);
- /// \brief Emit the stackmap header.
+ /// Emit the stackmap header.
void emitStackmapHeader(MCStreamer &OS);
- /// \brief Emit the function frame record for each function.
+ /// Emit the function frame record for each function.
void emitFunctionFrameRecords(MCStreamer &OS);
- /// \brief Emit the constant pool.
+ /// Emit the constant pool.
void emitConstantPoolEntries(MCStreamer &OS);
- /// \brief Emit the callsite info for each stackmap/patchpoint intrinsic call.
+ /// Emit the callsite info for each stackmap/patchpoint intrinsic call.
void emitCallsiteEntries(MCStreamer &OS);
void print(raw_ostream &OS);
/// AllocaInst triggers a stack protector.
SSPLayoutMap Layout;
- /// \brief The minimum size of buffers that will receive stack smashing
+ /// The minimum size of buffers that will receive stack smashing
/// protection when -fstack-protection is used.
unsigned SSPBufferSize = 0;
bool ContainsProtectableArray(Type *Ty, bool &IsLarge, bool Strong = false,
bool InStruct = false) const;
- /// \brief Check whether a stack allocation has its address taken.
+ /// Check whether a stack allocation has its address taken.
bool HasAddressTaken(const Instruction *AI);
/// RequiresStackProtector - Check whether or not this function needs a
unsigned SubIdx, const MachineInstr &Orig,
const TargetRegisterInfo &TRI) const;
- /// \brief Clones instruction or the whole instruction bundle \p Orig and
+ /// Clones instruction or the whole instruction bundle \p Orig and
/// insert into \p MBB before \p InsertBefore. The target may update operands
/// that are required to be unique.
///
return nullptr;
}
- /// \brief Target-dependent implementation of getRegSequenceInputs.
+ /// Target-dependent implementation of getRegSequenceInputs.
///
/// \returns true if it is possible to build the equivalent
/// REG_SEQUENCE inputs with the pair \p MI, \p DefIdx. False otherwise.
return false;
}
- /// \brief Target-dependent implementation of getExtractSubregInputs.
+ /// Target-dependent implementation of getExtractSubregInputs.
///
/// \returns true if it is possible to build the equivalent
/// EXTRACT_SUBREG inputs with the pair \p MI, \p DefIdx. False otherwise.
return false;
}
- /// \brief Target-dependent implementation of getInsertSubregInputs.
+ /// Target-dependent implementation of getInsertSubregInputs.
///
/// \returns true if it is possible to build the equivalent
/// INSERT_SUBREG inputs with the pair \p MI, \p DefIdx. False otherwise.
return 0;
}
- /// \brief Return the minimum clearance before an instruction that reads an
+ /// Return the minimum clearance before an instruction that reads an
/// unused register.
///
/// For example, AVX instructions may copy part of a register operand into
return false;
}
- /// \brief Return the value to use for the MachineCSE's LookAheadLimit,
+ /// Return the value to use for the MachineCSE's LookAheadLimit,
/// which is a heuristic used for CSE'ing phys reg defs.
virtual unsigned getMachineCSELookAheadLimit() const {
// The default lookahead is small to prevent unprofitable quadratic
/// Returns true if the target implements the MachineOutliner.
virtual bool useMachineOutliner() const { return false; }
- /// \brief Describes the number of instructions that it will take to call and
+ /// Describes the number of instructions that it will take to call and
/// construct a frame for a given outlining candidate.
struct MachineOutlinerInfo {
/// Number of instructions to call an outlined function for this candidate.
unsigned CallOverhead;
- /// \brief Number of instructions to construct an outlined function frame
+ /// Number of instructions to construct an outlined function frame
/// for this candidate.
unsigned FrameOverhead;
- /// \brief Represents the specific instructions that must be emitted to
+ /// Represents the specific instructions that must be emitted to
/// construct a call to this candidate.
unsigned CallConstructionID;
- /// \brief Represents the specific instructions that must be emitted to
+ /// Represents the specific instructions that must be emitted to
/// construct a frame for this candidate's outlined function.
unsigned FrameConstructionID;
FrameConstructionID(FrameConstructionID) {}
};
- /// \brief Returns a \p MachineOutlinerInfo struct containing target-specific
+ /// Returns a \p MachineOutlinerInfo struct containing target-specific
/// information for a set of outlining candidates.
virtual MachineOutlinerInfo getOutlininingCandidateInfo(
std::vector<
"Target didn't implement TargetInstrInfo::getOutliningType!");
}
- /// \brief Returns target-defined flags defining properties of the MBB for
+ /// Returns target-defined flags defining properties of the MBB for
/// the outliner.
virtual unsigned getMachineOutlinerMBBFlags(MachineBasicBlock &MBB) const {
return 0x0;
unsigned ReturnOpcode;
};
-/// \brief Provide DenseMapInfo for TargetInstrInfo::RegSubRegPair.
+/// Provide DenseMapInfo for TargetInstrInfo::RegSubRegPair.
template <> struct DenseMapInfo<TargetInstrInfo::RegSubRegPair> {
using RegInfo = DenseMapInfo<unsigned>;
RegInfo::getTombstoneKey());
}
- /// \brief Reuse getHashValue implementation from
+ /// Reuse getHashValue implementation from
/// std::pair<unsigned, unsigned>.
static unsigned getHashValue(const TargetInstrInfo::RegSubRegPair &Val) {
std::pair<unsigned, unsigned> PairVal = std::make_pair(Val.Reg, Val.SubReg);
virtual ~TargetLoweringBase() = default;
protected:
- /// \brief Initialize all of the actions to default values.
+ /// Initialize all of the actions to default values.
void initActions();
public:
return true;
}
- /// \brief Return true if it is cheap to speculate a call to intrinsic cttz.
+ /// Return true if it is cheap to speculate a call to intrinsic cttz.
virtual bool isCheapToSpeculateCttz() const {
return false;
}
- /// \brief Return true if it is cheap to speculate a call to intrinsic ctlz.
+ /// Return true if it is cheap to speculate a call to intrinsic ctlz.
virtual bool isCheapToSpeculateCtlz() const {
return false;
}
- /// \brief Return true if ctlz instruction is fast.
+ /// Return true if ctlz instruction is fast.
virtual bool isCtlzFast() const {
return false;
}
return false;
}
- /// \brief Return true if it is cheaper to split the store of a merged int val
+ /// Return true if it is cheaper to split the store of a merged int val
/// from a pair of smaller values into multiple stores.
virtual bool isMultiStoresCheaperThanBitsMerge(EVT LTy, EVT HTy) const {
return false;
}
- /// \brief Return if the target supports combining a
+ /// Return if the target supports combining a
/// chain like:
/// \code
/// %andResult = and %val1, #mask
return hasAndNotCompare(X);
}
- /// \brief Return true if the target wants to use the optimization that
+ /// Return true if the target wants to use the optimization that
/// turns ext(promotableInst1(...(promotableInstN(load)))) into
/// promotedInst1(...(promotedInstN(ext(load)))).
bool enableExtLdPromotion() const { return EnableExtLdPromotion; }
return getPointerTy(DL).getSizeInBits();
}
- /// \brief Get maximum # of store operations permitted for llvm.memset
+ /// Get maximum # of store operations permitted for llvm.memset
///
/// This function returns the maximum number of store operations permitted
/// to replace a call to llvm.memset. The value is set by the target at the
return OptSize ? MaxStoresPerMemsetOptSize : MaxStoresPerMemset;
}
- /// \brief Get maximum # of store operations permitted for llvm.memcpy
+ /// Get maximum # of store operations permitted for llvm.memcpy
///
/// This function returns the maximum number of store operations permitted
/// to replace a call to llvm.memcpy. The value is set by the target at the
return 1;
}
- /// \brief Get maximum # of store operations permitted for llvm.memmove
+ /// Get maximum # of store operations permitted for llvm.memmove
///
/// This function returns the maximum number of store operations permitted
/// to replace a call to llvm.memmove. The value is set by the target at the
return OptSize ? MaxStoresPerMemmoveOptSize : MaxStoresPerMemmove;
}
- /// \brief Determine if the target supports unaligned memory accesses.
+ /// Determine if the target supports unaligned memory accesses.
///
/// This function returns true if the target allows unaligned memory accesses
/// of the specified type in the given address space. If true, it also returns
Type *Ty, unsigned AddrSpace,
Instruction *I = nullptr) const;
- /// \brief Return the cost of the scaling factor used in the addressing mode
+ /// Return the cost of the scaling factor used in the addressing mode
/// represented by AM for this target, for a load/store of the specified type.
///
/// If the AM is supported, the return value must be >= 0.
/// Return true if the target has a vector blend instruction.
virtual bool hasVectorBlend() const { return false; }
- /// \brief Get the maximum supported factor for interleaved memory accesses.
+ /// Get the maximum supported factor for interleaved memory accesses.
/// Default to be the minimum interleave factor: 2.
virtual unsigned getMaxSupportedInterleaveFactor() const { return 2; }
- /// \brief Lower an interleaved load to target specific intrinsics. Return
+ /// Lower an interleaved load to target specific intrinsics. Return
/// true on success.
///
/// \p LI is the vector load instruction.
return false;
}
- /// \brief Lower an interleaved store to target specific intrinsics. Return
+ /// Lower an interleaved store to target specific intrinsics. Return
/// true on success.
///
/// \p SI is the vector store instruction.
return false;
}
- /// \brief Return true if it is beneficial to convert a load of a constant to
+ /// Return true if it is beneficial to convert a load of a constant to
/// just the constant itself.
/// On some targets it might be more efficient to use a combination of
/// arithmetic instructions to materialize the constant instead of loading it
/// expected to be merged.
unsigned GatherAllAliasesMaxDepth;
- /// \brief Specify maximum number of store instructions per memset call.
+ /// Specify maximum number of store instructions per memset call.
///
/// When lowering \@llvm.memset this field specifies the maximum number of
/// store operations that may be substituted for the call to memset. Targets
/// to memset, used for functions with OptSize attribute.
unsigned MaxStoresPerMemsetOptSize;
- /// \brief Specify maximum bytes of store instructions per memcpy call.
+ /// Specify maximum bytes of store instructions per memcpy call.
///
/// When lowering \@llvm.memcpy this field specifies the maximum number of
/// store operations that may be substituted for a call to memcpy. Targets
unsigned MaxLoadsPerMemcmp;
unsigned MaxLoadsPerMemcmpOptSize;
- /// \brief Specify maximum bytes of store instructions per memmove call.
+ /// Specify maximum bytes of store instructions per memmove call.
///
/// When lowering \@llvm.memmove this field specifies the maximum number of
/// store instructions that may be substituted for a call to memmove. Targets
//===--------------------------------------------------------------------===//
/// Subtarget Hooks
- /// \brief SrcRC and DstRC will be morphed into NewRC if this returns true.
+ /// SrcRC and DstRC will be morphed into NewRC if this returns true.
virtual bool shouldCoalesce(MachineInstr *MI,
const TargetRegisterClass *SrcRC,
unsigned SubReg,
/// Usage: OS << printRegUnit(Unit, TRI) << '\n';
Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI);
-/// \brief Create Printable object to print virtual registers and physical
+/// Create Printable object to print virtual registers and physical
/// registers on a \ref raw_ostream.
Printable printVRegOrUnit(unsigned VRegOrUnit, const TargetRegisterInfo *TRI);
-/// \brief Create Printable object to print register classes or register banks
+/// Create Printable object to print register classes or register banks
/// on a \ref raw_ostream.
Printable printRegClassOrBank(unsigned Reg, const MachineRegisterInfo &RegInfo,
const TargetRegisterInfo *TRI);
public:
TargetSchedModel() : SchedModel(MCSchedModel::GetDefaultSchedModel()) {}
- /// \brief Initialize the machine model for instruction scheduling.
+ /// Initialize the machine model for instruction scheduling.
///
/// The machine model API keeps a copy of the top-level MCSchedModel table
/// indices and may query TargetSubtargetInfo and TargetInstrInfo to resolve
/// Return the MCSchedClassDesc for this instruction.
const MCSchedClassDesc *resolveSchedClass(const MachineInstr *MI) const;
- /// \brief TargetSubtargetInfo getter.
+ /// TargetSubtargetInfo getter.
const TargetSubtargetInfo *getSubtargetInfo() const { return STI; }
- /// \brief TargetInstrInfo getter.
+ /// TargetInstrInfo getter.
const TargetInstrInfo *getInstrInfo() const { return TII; }
- /// \brief Return true if this machine model includes an instruction-level
+ /// Return true if this machine model includes an instruction-level
/// scheduling model.
///
/// This is more detailed than the course grain IssueWidth and default
const MCSchedModel *getMCSchedModel() const { return &SchedModel; }
- /// \brief Return true if this machine model includes cycle-to-cycle itinerary
+ /// Return true if this machine model includes cycle-to-cycle itinerary
/// data.
///
/// This models scheduling at each stage in the processor pipeline.
return nullptr;
}
- /// \brief Return true if this machine model includes an instruction-level
+ /// Return true if this machine model includes an instruction-level
/// scheduling model or cycle-to-cycle itinerary data.
bool hasInstrSchedModelOrItineraries() const {
return hasInstrSchedModel() || hasInstrItineraries();
}
- /// \brief Identify the processor corresponding to the current subtarget.
+ /// Identify the processor corresponding to the current subtarget.
unsigned getProcessorID() const { return SchedModel.getProcessorID(); }
- /// \brief Maximum number of micro-ops that may be scheduled per cycle.
+ /// Maximum number of micro-ops that may be scheduled per cycle.
unsigned getIssueWidth() const { return SchedModel.IssueWidth; }
- /// \brief Return true if new group must begin.
+ /// Return true if new group must begin.
bool mustBeginGroup(const MachineInstr *MI,
const MCSchedClassDesc *SC = nullptr) const;
- /// \brief Return true if current group must end.
+ /// Return true if current group must end.
bool mustEndGroup(const MachineInstr *MI,
const MCSchedClassDesc *SC = nullptr) const;
- /// \brief Return the number of issue slots required for this MI.
+ /// Return the number of issue slots required for this MI.
unsigned getNumMicroOps(const MachineInstr *MI,
const MCSchedClassDesc *SC = nullptr) const;
- /// \brief Get the number of kinds of resources for this target.
+ /// Get the number of kinds of resources for this target.
unsigned getNumProcResourceKinds() const {
return SchedModel.getNumProcResourceKinds();
}
- /// \brief Get a processor resource by ID for convenience.
+ /// Get a processor resource by ID for convenience.
const MCProcResourceDesc *getProcResource(unsigned PIdx) const {
return SchedModel.getProcResource(PIdx);
}
using ProcResIter = const MCWriteProcResEntry *;
- // \brief Get an iterator into the processor resources consumed by this
+ // Get an iterator into the processor resources consumed by this
// scheduling class.
ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const {
// The subtarget holds a single resource table for all processors.
return STI->getWriteProcResEnd(SC);
}
- /// \brief Multiply the number of units consumed for a resource by this factor
+ /// Multiply the number of units consumed for a resource by this factor
/// to normalize it relative to other resources.
unsigned getResourceFactor(unsigned ResIdx) const {
return ResourceFactors[ResIdx];
}
- /// \brief Multiply number of micro-ops by this factor to normalize it
+ /// Multiply number of micro-ops by this factor to normalize it
/// relative to other resources.
unsigned getMicroOpFactor() const {
return MicroOpFactor;
}
- /// \brief Multiply cycle count by this factor to normalize it relative to
+ /// Multiply cycle count by this factor to normalize it relative to
/// other resources. This is the number of resource units per cycle.
unsigned getLatencyFactor() const {
return ResourceLCM;
}
- /// \brief Number of micro-ops that may be buffered for OOO execution.
+ /// Number of micro-ops that may be buffered for OOO execution.
unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; }
- /// \brief Number of resource units that may be buffered for OOO execution.
+ /// Number of resource units that may be buffered for OOO execution.
/// \return The buffer size in resource units or -1 for unlimited.
int getResourceBufferSize(unsigned PIdx) const {
return SchedModel.getProcResource(PIdx)->BufferSize;
}
- /// \brief Compute operand latency based on the available machine model.
+ /// Compute operand latency based on the available machine model.
///
/// Compute and return the latency of the given data dependent def and use
/// when the operand indices are already known. UseMI may be NULL for an
const MachineInstr *UseMI, unsigned UseOperIdx)
const;
- /// \brief Compute the instruction latency based on the available machine
+ /// Compute the instruction latency based on the available machine
/// model.
///
/// Compute and return the expected latency of this instruction independent of
unsigned computeInstrLatency(unsigned Opcode) const;
- /// \brief Output dependency latency of a pair of defs of the same register.
+ /// Output dependency latency of a pair of defs of the same register.
///
/// This is typically one cycle.
unsigned computeOutputLatency(const MachineInstr *DefMI, unsigned DefIdx,
const MachineInstr *DepMI) const;
- /// \brief Compute the reciprocal throughput of the given instruction.
+ /// Compute the reciprocal throughput of the given instruction.
Optional<double> computeReciprocalThroughput(const MachineInstr *MI) const;
Optional<double> computeReciprocalThroughput(unsigned Opcode) const;
};
return 0;
}
- /// \brief True if the subtarget should run MachineScheduler after aggressive
+ /// True if the subtarget should run MachineScheduler after aggressive
/// coalescing.
///
/// This currently replaces the SelectionDAG scheduler with the "source" order
/// TargetLowering preference). It does not yet disable the postRA scheduler.
virtual bool enableMachineScheduler() const;
- /// \brief Support printing of [latency:throughput] comment in output .S file.
+ /// Support printing of [latency:throughput] comment in output .S file.
virtual bool supportPrintSchedInfo() const { return false; }
- /// \brief True if the machine scheduler should disable the TLI preference
+ /// True if the machine scheduler should disable the TLI preference
/// for preRA scheduling with the source level scheduler.
virtual bool enableMachineSchedDefaultSched() const { return true; }
- /// \brief True if the subtarget should enable joining global copies.
+ /// True if the subtarget should enable joining global copies.
///
/// By default this is enabled if the machine scheduler is enabled, but
/// can be overridden.
/// which is the preferred way to influence this.
virtual bool enablePostRAScheduler() const;
- /// \brief True if the subtarget should run the atomic expansion pass.
+ /// True if the subtarget should run the atomic expansion pass.
virtual bool enableAtomicExpand() const;
/// True if the subtarget should run the indirectbr expansion pass.
virtual bool enableIndirectBrExpand() const;
- /// \brief Override generic scheduling policy within a region.
+ /// Override generic scheduling policy within a region.
///
/// This is a convenient way for targets that don't provide any custom
/// scheduling heuristics (no custom MachineSchedStrategy) to make
virtual void overrideSchedPolicy(MachineSchedPolicy &Policy,
unsigned NumRegionInstrs) const {}
- // \brief Perform target specific adjustments to the latency of a schedule
+ // Perform target specific adjustments to the latency of a schedule
// dependency.
virtual void adjustSchedDependency(SUnit *def, SUnit *use, SDep &dep) const {}
return CriticalPathRCs.clear();
}
- // \brief Provide an ordered list of schedule DAG mutations for the post-RA
+ // Provide an ordered list of schedule DAG mutations for the post-RA
// scheduler.
virtual void getPostRAMutations(
std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
}
- // \brief Provide an ordered list of schedule DAG mutations for the machine
+ // Provide an ordered list of schedule DAG mutations for the machine
// pipeliner.
virtual void getSMSMutations(
std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
return CodeGenOpt::Default;
}
- /// \brief True if the subtarget should run the local reassignment
+ /// True if the subtarget should run the local reassignment
/// heuristic of the register allocator.
/// This heuristic may be compile time intensive, \p OptLevel provides
/// a finer grain to tune the register allocator.
virtual bool enableRALocalReassignment(CodeGenOpt::Level OptLevel) const;
- /// \brief True if the subtarget should consider the cost of local intervals
+ /// True if the subtarget should consider the cost of local intervals
/// created by a split candidate when choosing the best split candidate. This
/// heuristic may be compile time intensive.
virtual bool enableAdvancedRASplitCost() const;
- /// \brief Enable use of alias analysis during code generation (during MI
+ /// Enable use of alias analysis during code generation (during MI
/// scheduling, DAGCombine, etc.).
virtual bool useAA() const;
- /// \brief Enable the use of the early if conversion pass.
+ /// Enable the use of the early if conversion pass.
virtual bool enableEarlyIfConversion() const { return false; }
- /// \brief Return PBQPConstraint(s) for the target.
+ /// Return PBQPConstraint(s) for the target.
///
/// Override to provide custom PBQP constraints.
virtual std::unique_ptr<PBQPRAConstraint> getCustomPBQPConstraints() const {
namespace llvm {
namespace codeview {
-/// \brief Provides amortized O(1) random access to a CodeView type stream.
+/// Provides amortized O(1) random access to a CodeView type stream.
/// Normally to access a type from a type stream, you must know its byte
/// offset into the type stream, because type records are variable-lengthed.
/// However, this is not the way we prefer to access them. For example, given
class GlobalTypeTableBuilder;
class MergingTypeTableBuilder;
-/// \brief Merge one set of type records into another. This method assumes
+/// Merge one set of type records into another. This method assumes
/// that all records are type records, and there are no Id records present.
///
/// \param Dest The table to store the re-written type records into.
SmallVectorImpl<TypeIndex> &SourceToDest,
const CVTypeArray &Types);
-/// \brief Merge one set of id records into another. This method assumes
+/// Merge one set of id records into another. This method assumes
/// that all records are id records, and there are no Type records present.
/// However, since Id records can refer back to Type records, this method
/// assumes that the referenced type records have also been merged into
SmallVectorImpl<TypeIndex> &SourceToDest,
const CVTypeArray &Ids);
-/// \brief Merge a unified set of type and id records, splitting them into
+/// Merge a unified set of type and id records, splitting them into
/// separate output streams.
///
/// \param DestIds The table to store the re-written id records into.
return false;
}
- /// \brief Return the number of bytes for the header of a unit of
+ /// Return the number of bytes for the header of a unit of
/// UnitType type.
///
/// This function must be called with a valid unit type which in
/// getUnitSection - Return the DWARFUnitSection containing this unit.
const DWARFUnitSectionBase &getUnitSection() const { return UnitSection; }
- /// \brief Returns the number of DIEs in the unit. Parses the unit
+ /// Returns the number of DIEs in the unit. Parses the unit
/// if necessary.
unsigned getNumDIEs() {
extractDIEsIfNeeded(false);
return DieArray.size();
}
- /// \brief Return the index of a DIE inside the unit's DIE vector.
+ /// Return the index of a DIE inside the unit's DIE vector.
///
/// It is illegal to call this method with a DIE that hasn't be
/// created by this unit. In other word, it's illegal to call this
return getDIEIndex(D.getDebugInfoEntry());
}
- /// \brief Return the DIE object at the given index.
+ /// Return the DIE object at the given index.
DWARFDie getDIEAtIndex(unsigned Index) {
assert(Index < DieArray.size());
return DWARFDie(this, &DieArray[Index]);
DWARFDie getSibling(const DWARFDebugInfoEntry *Die);
DWARFDie getFirstChild(const DWARFDebugInfoEntry *Die);
- /// \brief Return the DIE object for a given offset inside the
+ /// Return the DIE object for a given offset inside the
/// unit's DIE vector.
///
/// The unit needs to have its DIEs extracted for this method to work.
class MSFBuilder {
public:
- /// \brief Create a new `MSFBuilder`.
+ /// Create a new `MSFBuilder`.
///
/// \param BlockSize The internal block size used by the PDB file. See
/// isValidBlockSize() for a list of valid block sizes.
std::vector<ArrayRef<support::ulittle32_t>> StreamMap;
};
-/// \brief Describes the layout of a stream in an MSF layout. A "stream" here
+/// Describes the layout of a stream in an MSF layout. A "stream" here
/// is defined as any logical unit of data which may be arranged inside the MSF
/// file as a sequence of (possibly discontiguous) blocks. When we want to read
/// from a particular MSF Stream, we fill out a stream layout structure and the
std::vector<support::ulittle32_t> Blocks;
};
-/// \brief Determine the layout of the FPM stream, given the MSF layout. An FPM
+/// Determine the layout of the FPM stream, given the MSF layout. An FPM
/// stream spans 1 or more blocks, each at equally spaced intervals throughout
/// the file.
MSFStreamLayout getFpmStreamLayout(const MSFLayout &Msf,
const ObjectFile *Obj,
const std::string &ArchName);
- /// \brief Returns pair of pointers to object and debug object.
+ /// Returns pair of pointers to object and debug object.
Expected<ObjectPair> getOrCreateObjectPair(const std::string &Path,
const std::string &ArchName);
- /// \brief Return a pointer to object file at specified path, for a specified
+ /// Return a pointer to object file at specified path, for a specified
/// architecture (e.g. if path refers to a Mach-O universal binary, only one
/// object file from it will be returned).
Expected<ObjectFile *> getOrCreateObject(const std::string &Path,
std::map<std::string, std::unique_ptr<SymbolizableModule>> Modules;
- /// \brief Contains cached results of getOrCreateObjectPair().
+ /// Contains cached results of getOrCreateObjectPair().
std::map<std::pair<std::string, std::string>, ObjectPair>
ObjectPairForPathArch;
- /// \brief Contains parsed binary for each path, or parsing error.
+ /// Contains parsed binary for each path, or parsing error.
std::map<std::string, OwningBinary<Binary>> BinaryForPath;
- /// \brief Parsed object file for path/architecture pair, where "path" refers
+ /// Parsed object file for path/architecture pair, where "path" refers
/// to Mach-O universal binary.
std::map<std::pair<std::string, std::string>, std::unique_ptr<ObjectFile>>
ObjectForUBPathAndArch;
#endif
/// \macro LLVM_GNUC_PREREQ
-/// \brief Extend the default __GNUC_PREREQ even if glibc's features.h isn't
+/// Extend the default __GNUC_PREREQ even if glibc's features.h isn't
/// available.
#ifndef LLVM_GNUC_PREREQ
# if defined(__GNUC__) && defined(__GNUC_MINOR__) && defined(__GNUC_PATCHLEVEL__)
#endif
/// \macro LLVM_MSC_PREREQ
-/// \brief Is the compiler MSVC of at least the specified version?
+/// Is the compiler MSVC of at least the specified version?
/// The common \param version values to check for are:
/// * 1900: Microsoft Visual Studio 2015 / 14.0
#ifdef _MSC_VER
#define LLVM_MSC_PREREQ(version) 0
#endif
-/// \brief Does the compiler support ref-qualifiers for *this?
+/// Does the compiler support ref-qualifiers for *this?
///
/// Sadly, this is separate from just rvalue reference support because GCC
/// and MSVC implemented this later than everything else.
#endif
/// \macro LLVM_ASSUME_ALIGNED
-/// \brief Returns a pointer with an assumed alignment.
+/// Returns a pointer with an assumed alignment.
#if __has_builtin(__builtin_assume_aligned) || LLVM_GNUC_PREREQ(4, 7, 0)
# define LLVM_ASSUME_ALIGNED(p, a) __builtin_assume_aligned(p, a)
#elif defined(LLVM_BUILTIN_UNREACHABLE)
#endif
/// \macro LLVM_ALIGNAS
-/// \brief Used to specify a minimum alignment for a structure or variable.
+/// Used to specify a minimum alignment for a structure or variable.
#if __GNUC__ && !__has_feature(cxx_alignas) && !LLVM_GNUC_PREREQ(4, 8, 1)
# define LLVM_ALIGNAS(x) __attribute__((aligned(x)))
#else
#endif
/// \macro LLVM_PACKED
-/// \brief Used to specify a packed structure.
+/// Used to specify a packed structure.
/// LLVM_PACKED(
/// struct A {
/// int i;
#endif
/// \macro LLVM_PTR_SIZE
-/// \brief A constant integer equivalent to the value of sizeof(void*).
+/// A constant integer equivalent to the value of sizeof(void*).
/// Generally used in combination with LLVM_ALIGNAS or when doing computation in
/// the preprocessor.
#ifdef __SIZEOF_POINTER__
#endif
/// \macro LLVM_MEMORY_SANITIZER_BUILD
-/// \brief Whether LLVM itself is built with MemorySanitizer instrumentation.
+/// Whether LLVM itself is built with MemorySanitizer instrumentation.
#if __has_feature(memory_sanitizer)
# define LLVM_MEMORY_SANITIZER_BUILD 1
# include <sanitizer/msan_interface.h>
#endif
/// \macro LLVM_ADDRESS_SANITIZER_BUILD
-/// \brief Whether LLVM itself is built with AddressSanitizer instrumentation.
+/// Whether LLVM itself is built with AddressSanitizer instrumentation.
#if __has_feature(address_sanitizer) || defined(__SANITIZE_ADDRESS__)
# define LLVM_ADDRESS_SANITIZER_BUILD 1
# include <sanitizer/asan_interface.h>
#endif
/// \macro LLVM_THREAD_SANITIZER_BUILD
-/// \brief Whether LLVM itself is built with ThreadSanitizer instrumentation.
+/// Whether LLVM itself is built with ThreadSanitizer instrumentation.
#if __has_feature(thread_sanitizer) || defined(__SANITIZE_THREAD__)
# define LLVM_THREAD_SANITIZER_BUILD 1
#else
#endif
/// \macro LLVM_NO_SANITIZE
-/// \brief Disable a particular sanitizer for a function.
+/// Disable a particular sanitizer for a function.
#if __has_attribute(no_sanitize)
#define LLVM_NO_SANITIZE(KIND) __attribute__((no_sanitize(KIND)))
#else
#define LLVM_NO_SANITIZE(KIND)
#endif
-/// \brief Mark debug helper function definitions like dump() that should not be
+/// Mark debug helper function definitions like dump() that should not be
/// stripped from debug builds.
/// Note that you should also surround dump() functions with
/// `#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)` so they do always
#endif
/// \macro LLVM_PRETTY_FUNCTION
-/// \brief Gets a user-friendly looking function signature for the current scope
+/// Gets a user-friendly looking function signature for the current scope
/// using the best available method on each platform. The exact format of the
/// resulting string is implementation specific and non-portable, so this should
/// only be used, for example, for logging or diagnostics.
#endif
/// \macro LLVM_THREAD_LOCAL
-/// \brief A thread-local storage specifier which can be used with globals,
+/// A thread-local storage specifier which can be used with globals,
/// extern globals, and static globals.
///
/// This is essentially an extremely restricted analog to C++11's thread_local
#endif
/// \macro LLVM_ENABLE_EXCEPTIONS
-/// \brief Whether LLVM is built with exception support.
+/// Whether LLVM is built with exception support.
#if __has_feature(cxx_exceptions)
#define LLVM_ENABLE_EXCEPTIONS 1
#elif defined(__GNUC__) && defined(__EXCEPTIONS)
#endif
/// \macro LLVM_PLUGIN_IMPORT
-/// \brief Used to import the well-known entry point for registering loaded pass
+/// Used to import the well-known entry point for registering loaded pass
/// plugins
#ifdef WIN32
#define LLVM_PLUGIN_IMPORT __declspec(dllimport)
#endif
/// \macro LLVM_PLUGIN_EXPORT
-/// \brief Used to export the well-known entry point for registering loaded pass
+/// Used to export the well-known entry point for registering loaded pass
/// plugins
#ifdef WIN32
#define LLVM_PLUGIN_EXPORT __declspec(dllexport)
} // end namespace object
-/// \brief Helper class for helping synchronize access to the global address map
+/// Helper class for helping synchronize access to the global address map
/// table. Access to this class should be serialized under a mutex.
class ExecutionEngineState {
public:
return GlobalAddressReverseMap;
}
- /// \brief Erase an entry from the mapping table.
+ /// Erase an entry from the mapping table.
///
/// \returns The address that \p ToUnmap was happed to.
uint64_t RemoveMapping(StringRef Name);
using FunctionCreator = std::function<void *(const std::string &)>;
-/// \brief Abstract interface for implementation execution of LLVM modules,
+/// Abstract interface for implementation execution of LLVM modules,
/// designed to support both interpreter and just-in-time (JIT) compiler
/// implementations.
class ExecutionEngine {
return *this;
}
- // \brief Use OrcMCJITReplacement instead of MCJIT. Off by default.
+ // Use OrcMCJITReplacement instead of MCJIT. Off by default.
void setUseOrcMCJITReplacement(bool UseOrcMCJITReplacement) {
this->UseOrcMCJITReplacement = UseOrcMCJITReplacement;
}
virtual void anchor();
};
-/// \brief Legacy symbol resolution interface.
+/// Legacy symbol resolution interface.
class LegacyJITSymbolResolver : public JITSymbolResolver {
public:
/// @brief Performs lookup by, for each symbol, first calling
return RPCAsyncDispatch<RPCEndpointT, Func>(Endpoint);
}
-/// \brief Allows a set of asynchrounous calls to be dispatched, and then
+/// Allows a set of asynchrounous calls to be dispatched, and then
/// waited on as a group.
class ParallelCallGroup {
public:
ParallelCallGroup(const ParallelCallGroup &) = delete;
ParallelCallGroup &operator=(const ParallelCallGroup &) = delete;
- /// \brief Make as asynchronous call.
+ /// Make as asynchronous call.
template <typename AsyncDispatcher, typename HandlerT, typename... ArgTs>
Error call(const AsyncDispatcher &AsyncDispatch, HandlerT Handler,
const ArgTs &... Args) {
return AsyncDispatch(std::move(WrappedHandler), Args...);
}
- /// \brief Blocks until all calls have been completed and their return value
+ /// Blocks until all calls have been completed and their return value
/// handlers run.
void wait() {
std::unique_lock<std::mutex> Lock(M);
void reassignSectionAddress(unsigned SectionID, uint64_t Addr);
public:
- /// \brief Information about the loaded object.
+ /// Information about the loaded object.
class LoadedObjectInfo : public llvm::LoadedObjectInfo {
friend class RuntimeDyldImpl;
ObjSectionToIDMap ObjSecToIDMap;
};
- /// \brief Memory Management.
+ /// Memory Management.
class MemoryManager {
friend class RuntimeDyld;
bool FinalizationLocked = false;
};
- /// \brief Construct a RuntimeDyld instance.
+ /// Construct a RuntimeDyld instance.
RuntimeDyld(MemoryManager &MemMgr, JITSymbolResolver &Resolver);
RuntimeDyld(const RuntimeDyld &) = delete;
RuntimeDyld &operator=(const RuntimeDyld &) = delete;
class RuntimeDyldCheckerImpl;
class raw_ostream;
-/// \brief RuntimeDyld invariant checker for verifying that RuntimeDyld has
+/// RuntimeDyld invariant checker for verifying that RuntimeDyld has
/// correctly applied relocations.
///
/// The RuntimeDyldChecker class evaluates expressions against an attached
MCInstPrinter *InstPrinter, raw_ostream &ErrStream);
~RuntimeDyldChecker();
- // \brief Get the associated RTDyld instance.
+ // Get the associated RTDyld instance.
RuntimeDyld& getRTDyld();
- // \brief Get the associated RTDyld instance.
+ // Get the associated RTDyld instance.
const RuntimeDyld& getRTDyld() const;
- /// \brief Check a single expression against the attached RuntimeDyld
+ /// Check a single expression against the attached RuntimeDyld
/// instance.
bool check(StringRef CheckExpr) const;
- /// \brief Scan the given memory buffer for lines beginning with the string
+ /// Scan the given memory buffer for lines beginning with the string
/// in RulePrefix. The remainder of the line is passed to the check
/// method to be evaluated as an expression.
bool checkAllRulesInBuffer(StringRef RulePrefix, MemoryBuffer *MemBuf) const;
- /// \brief Returns the address of the requested section (or an error message
+ /// Returns the address of the requested section (or an error message
/// in the second element of the pair if the address cannot be found).
///
/// if 'LocalAddress' is true, this returns the address of the section
StringRef SectionName,
bool LocalAddress);
- /// \brief If there is a section at the given local address, return its load
+ /// If there is a section at the given local address, return its load
/// address, otherwise return none.
Optional<uint64_t> getSectionLoadAddress(void *LocalAddress) const;
void operator=(const SectionMemoryManager &) = delete;
~SectionMemoryManager() override;
- /// \brief Allocates a memory block of (at least) the given size suitable for
+ /// Allocates a memory block of (at least) the given size suitable for
/// executable code.
///
/// The value of \p Alignment must be a power of two. If \p Alignment is zero
unsigned SectionID,
StringRef SectionName) override;
- /// \brief Allocates a memory block of (at least) the given size suitable for
+ /// Allocates a memory block of (at least) the given size suitable for
/// executable code.
///
/// The value of \p Alignment must be a power of two. If \p Alignment is zero
unsigned SectionID, StringRef SectionName,
bool isReadOnly) override;
- /// \brief Update section-specific memory permissions and other attributes.
+ /// Update section-specific memory permissions and other attributes.
///
/// This method is called when object loading is complete and section page
/// permissions can be applied. It is up to the memory manager implementation
/// \returns true if an error occurred, false otherwise.
bool finalizeMemory(std::string *ErrMsg = nullptr) override;
- /// \brief Invalidate instruction cache for code sections.
+ /// Invalidate instruction cache for code sections.
///
/// Some platforms with separate data cache and instruction cache require
/// explicit cache flush, otherwise JIT code manipulations (like resolved
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This file contains the simple types necessary to represent the
+/// This file contains the simple types necessary to represent the
/// attributes associated with functions and their calls.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
/// \class
-/// \brief Functions, function parameters, and return types can have attributes
+/// Functions, function parameters, and return types can have attributes
/// to indicate how they should be treated by optimizations and code
/// generation. This class represents one of those attributes. It's light-weight
/// and should be passed around by-value.
// Attribute Construction
//===--------------------------------------------------------------------===//
- /// \brief Return a uniquified Attribute object.
+ /// Return a uniquified Attribute object.
static Attribute get(LLVMContext &Context, AttrKind Kind, uint64_t Val = 0);
static Attribute get(LLVMContext &Context, StringRef Kind,
StringRef Val = StringRef());
- /// \brief Return a uniquified Attribute object that has the specific
+ /// Return a uniquified Attribute object that has the specific
/// alignment set.
static Attribute getWithAlignment(LLVMContext &Context, uint64_t Align);
static Attribute getWithStackAlignment(LLVMContext &Context, uint64_t Align);
// Attribute Accessors
//===--------------------------------------------------------------------===//
- /// \brief Return true if the attribute is an Attribute::AttrKind type.
+ /// Return true if the attribute is an Attribute::AttrKind type.
bool isEnumAttribute() const;
- /// \brief Return true if the attribute is an integer attribute.
+ /// Return true if the attribute is an integer attribute.
bool isIntAttribute() const;
- /// \brief Return true if the attribute is a string (target-dependent)
+ /// Return true if the attribute is a string (target-dependent)
/// attribute.
bool isStringAttribute() const;
- /// \brief Return true if the attribute is present.
+ /// Return true if the attribute is present.
bool hasAttribute(AttrKind Val) const;
- /// \brief Return true if the target-dependent attribute is present.
+ /// Return true if the target-dependent attribute is present.
bool hasAttribute(StringRef Val) const;
- /// \brief Return the attribute's kind as an enum (Attribute::AttrKind). This
+ /// Return the attribute's kind as an enum (Attribute::AttrKind). This
/// requires the attribute to be an enum or integer attribute.
Attribute::AttrKind getKindAsEnum() const;
- /// \brief Return the attribute's value as an integer. This requires that the
+ /// Return the attribute's value as an integer. This requires that the
/// attribute be an integer attribute.
uint64_t getValueAsInt() const;
- /// \brief Return the attribute's kind as a string. This requires the
+ /// Return the attribute's kind as a string. This requires the
/// attribute to be a string attribute.
StringRef getKindAsString() const;
- /// \brief Return the attribute's value as a string. This requires the
+ /// Return the attribute's value as a string. This requires the
/// attribute to be a string attribute.
StringRef getValueAsString() const;
- /// \brief Returns the alignment field of an attribute as a byte alignment
+ /// Returns the alignment field of an attribute as a byte alignment
/// value.
unsigned getAlignment() const;
- /// \brief Returns the stack alignment field of an attribute as a byte
+ /// Returns the stack alignment field of an attribute as a byte
/// alignment value.
unsigned getStackAlignment() const;
- /// \brief Returns the number of dereferenceable bytes from the
+ /// Returns the number of dereferenceable bytes from the
/// dereferenceable attribute.
uint64_t getDereferenceableBytes() const;
- /// \brief Returns the number of dereferenceable_or_null bytes from the
+ /// Returns the number of dereferenceable_or_null bytes from the
/// dereferenceable_or_null attribute.
uint64_t getDereferenceableOrNullBytes() const;
/// if not known).
std::pair<unsigned, Optional<unsigned>> getAllocSizeArgs() const;
- /// \brief The Attribute is converted to a string of equivalent mnemonic. This
+ /// The Attribute is converted to a string of equivalent mnemonic. This
/// is, presumably, for writing out the mnemonics for the assembly writer.
std::string getAsString(bool InAttrGrp = false) const;
- /// \brief Equality and non-equality operators.
+ /// Equality and non-equality operators.
bool operator==(Attribute A) const { return pImpl == A.pImpl; }
bool operator!=(Attribute A) const { return pImpl != A.pImpl; }
- /// \brief Less-than operator. Useful for sorting the attributes list.
+ /// Less-than operator. Useful for sorting the attributes list.
bool operator<(Attribute A) const;
void Profile(FoldingSetNodeID &ID) const {
ID.AddPointer(pImpl);
}
- /// \brief Return a raw pointer that uniquely identifies this attribute.
+ /// Return a raw pointer that uniquely identifies this attribute.
void *getRawPointer() const {
return pImpl;
}
- /// \brief Get an attribute from a raw pointer created by getRawPointer.
+ /// Get an attribute from a raw pointer created by getRawPointer.
static Attribute fromRawPointer(void *RawPtr) {
return Attribute(reinterpret_cast<AttributeImpl*>(RawPtr));
}
//===----------------------------------------------------------------------===//
/// \class
-/// \brief Provide DenseMapInfo for AttributeSet.
+/// Provide DenseMapInfo for AttributeSet.
template <> struct DenseMapInfo<AttributeSet> {
static AttributeSet getEmptyKey() {
auto Val = static_cast<uintptr_t>(-1);
//===----------------------------------------------------------------------===//
/// \class
-/// \brief This class holds the attributes for a function, its return value, and
+/// This class holds the attributes for a function, its return value, and
/// its parameters. You access the attributes for each of them via an index into
/// the AttributeList object. The function attributes are at index
/// `AttributeList::FunctionIndex', the return value is at index
friend class AttributeSetNode;
template <typename Ty> friend struct DenseMapInfo;
- /// \brief The attributes that we are managing. This can be null to represent
+ /// The attributes that we are managing. This can be null to represent
/// the empty attributes list.
AttributeListImpl *pImpl = nullptr;
public:
- /// \brief Create an AttributeList with the specified parameters in it.
+ /// Create an AttributeList with the specified parameters in it.
static AttributeList get(LLVMContext &C,
ArrayRef<std::pair<unsigned, Attribute>> Attrs);
static AttributeList get(LLVMContext &C,
ArrayRef<std::pair<unsigned, AttributeSet>> Attrs);
- /// \brief Create an AttributeList from attribute sets for a function, its
+ /// Create an AttributeList from attribute sets for a function, its
/// return value, and all of its arguments.
static AttributeList get(LLVMContext &C, AttributeSet FnAttrs,
AttributeSet RetAttrs,
// AttributeList Construction and Mutation
//===--------------------------------------------------------------------===//
- /// \brief Return an AttributeList with the specified parameters in it.
+ /// Return an AttributeList with the specified parameters in it.
static AttributeList get(LLVMContext &C, ArrayRef<AttributeList> Attrs);
static AttributeList get(LLVMContext &C, unsigned Index,
ArrayRef<Attribute::AttrKind> Kinds);
static AttributeList get(LLVMContext &C, unsigned Index,
const AttrBuilder &B);
- /// \brief Add an attribute to the attribute set at the given index.
+ /// Add an attribute to the attribute set at the given index.
/// Returns a new list because attribute lists are immutable.
AttributeList addAttribute(LLVMContext &C, unsigned Index,
Attribute::AttrKind Kind) const;
- /// \brief Add an attribute to the attribute set at the given index.
+ /// Add an attribute to the attribute set at the given index.
/// Returns a new list because attribute lists are immutable.
AttributeList addAttribute(LLVMContext &C, unsigned Index, StringRef Kind,
StringRef Value = StringRef()) const;
/// Returns a new list because attribute lists are immutable.
AttributeList addAttribute(LLVMContext &C, unsigned Index, Attribute A) const;
- /// \brief Add attributes to the attribute set at the given index.
+ /// Add attributes to the attribute set at the given index.
/// Returns a new list because attribute lists are immutable.
AttributeList addAttributes(LLVMContext &C, unsigned Index,
const AttrBuilder &B) const;
return addAttributes(C, ArgNo + FirstArgIndex, B);
}
- /// \brief Remove the specified attribute at the specified index from this
+ /// Remove the specified attribute at the specified index from this
/// attribute list. Returns a new list because attribute lists are immutable.
AttributeList removeAttribute(LLVMContext &C, unsigned Index,
Attribute::AttrKind Kind) const;
- /// \brief Remove the specified attribute at the specified index from this
+ /// Remove the specified attribute at the specified index from this
/// attribute list. Returns a new list because attribute lists are immutable.
AttributeList removeAttribute(LLVMContext &C, unsigned Index,
StringRef Kind) const;
- /// \brief Remove the specified attributes at the specified index from this
+ /// Remove the specified attributes at the specified index from this
/// attribute list. Returns a new list because attribute lists are immutable.
AttributeList removeAttributes(LLVMContext &C, unsigned Index,
const AttrBuilder &AttrsToRemove) const;
- /// \brief Remove all attributes at the specified index from this
+ /// Remove all attributes at the specified index from this
/// attribute list. Returns a new list because attribute lists are immutable.
AttributeList removeAttributes(LLVMContext &C, unsigned Index) const;
- /// \brief Remove the specified attribute at the specified arg index from this
+ /// Remove the specified attribute at the specified arg index from this
/// attribute list. Returns a new list because attribute lists are immutable.
AttributeList removeParamAttribute(LLVMContext &C, unsigned ArgNo,
Attribute::AttrKind Kind) const {
return removeAttribute(C, ArgNo + FirstArgIndex, Kind);
}
- /// \brief Remove the specified attribute at the specified arg index from this
+ /// Remove the specified attribute at the specified arg index from this
/// attribute list. Returns a new list because attribute lists are immutable.
AttributeList removeParamAttribute(LLVMContext &C, unsigned ArgNo,
StringRef Kind) const {
return removeAttribute(C, ArgNo + FirstArgIndex, Kind);
}
- /// \brief Remove the specified attribute at the specified arg index from this
+ /// Remove the specified attribute at the specified arg index from this
/// attribute list. Returns a new list because attribute lists are immutable.
AttributeList removeParamAttributes(LLVMContext &C, unsigned ArgNo,
const AttrBuilder &AttrsToRemove) const {
return removeAttributes(C, ArgNo + FirstArgIndex, AttrsToRemove);
}
- /// \brief Remove all attributes at the specified arg index from this
+ /// Remove all attributes at the specified arg index from this
/// attribute list. Returns a new list because attribute lists are immutable.
AttributeList removeParamAttributes(LLVMContext &C, unsigned ArgNo) const {
return removeAttributes(C, ArgNo + FirstArgIndex);
return addDereferenceableAttr(C, ArgNo + FirstArgIndex, Bytes);
}
- /// \brief Add the dereferenceable_or_null attribute to the attribute set at
+ /// Add the dereferenceable_or_null attribute to the attribute set at
/// the given index. Returns a new list because attribute lists are immutable.
AttributeList addDereferenceableOrNullAttr(LLVMContext &C, unsigned Index,
uint64_t Bytes) const;
- /// \brief Add the dereferenceable_or_null attribute to the attribute set at
+ /// Add the dereferenceable_or_null attribute to the attribute set at
/// the given arg index. Returns a new list because attribute lists are
/// immutable.
AttributeList addDereferenceableOrNullParamAttr(LLVMContext &C,
// AttributeList Accessors
//===--------------------------------------------------------------------===//
- /// \brief Retrieve the LLVM context.
+ /// Retrieve the LLVM context.
LLVMContext &getContext() const;
- /// \brief The attributes for the specified index are returned.
+ /// The attributes for the specified index are returned.
AttributeSet getAttributes(unsigned Index) const;
- /// \brief The attributes for the argument or parameter at the given index are
+ /// The attributes for the argument or parameter at the given index are
/// returned.
AttributeSet getParamAttributes(unsigned ArgNo) const;
- /// \brief The attributes for the ret value are returned.
+ /// The attributes for the ret value are returned.
AttributeSet getRetAttributes() const;
- /// \brief The function attributes are returned.
+ /// The function attributes are returned.
AttributeSet getFnAttributes() const;
- /// \brief Return true if the attribute exists at the given index.
+ /// Return true if the attribute exists at the given index.
bool hasAttribute(unsigned Index, Attribute::AttrKind Kind) const;
- /// \brief Return true if the attribute exists at the given index.
+ /// Return true if the attribute exists at the given index.
bool hasAttribute(unsigned Index, StringRef Kind) const;
- /// \brief Return true if attribute exists at the given index.
+ /// Return true if attribute exists at the given index.
bool hasAttributes(unsigned Index) const;
- /// \brief Return true if the attribute exists for the given argument
+ /// Return true if the attribute exists for the given argument
bool hasParamAttr(unsigned ArgNo, Attribute::AttrKind Kind) const {
return hasAttribute(ArgNo + FirstArgIndex, Kind);
}
- /// \brief Return true if the attribute exists for the given argument
+ /// Return true if the attribute exists for the given argument
bool hasParamAttr(unsigned ArgNo, StringRef Kind) const {
return hasAttribute(ArgNo + FirstArgIndex, Kind);
}
- /// \brief Return true if attributes exists for the given argument
+ /// Return true if attributes exists for the given argument
bool hasParamAttrs(unsigned ArgNo) const {
return hasAttributes(ArgNo + FirstArgIndex);
}
- /// \brief Equivalent to hasAttribute(AttributeList::FunctionIndex, Kind) but
+ /// Equivalent to hasAttribute(AttributeList::FunctionIndex, Kind) but
/// may be faster.
bool hasFnAttribute(Attribute::AttrKind Kind) const;
- /// \brief Equivalent to hasAttribute(AttributeList::FunctionIndex, Kind) but
+ /// Equivalent to hasAttribute(AttributeList::FunctionIndex, Kind) but
/// may be faster.
bool hasFnAttribute(StringRef Kind) const;
- /// \brief Equivalent to hasAttribute(ArgNo + FirstArgIndex, Kind).
+ /// Equivalent to hasAttribute(ArgNo + FirstArgIndex, Kind).
bool hasParamAttribute(unsigned ArgNo, Attribute::AttrKind Kind) const;
- /// \brief Return true if the specified attribute is set for at least one
+ /// Return true if the specified attribute is set for at least one
/// parameter or for the return value. If Index is not nullptr, the index
/// of a parameter with the specified attribute is provided.
bool hasAttrSomewhere(Attribute::AttrKind Kind,
unsigned *Index = nullptr) const;
- /// \brief Return the attribute object that exists at the given index.
+ /// Return the attribute object that exists at the given index.
Attribute getAttribute(unsigned Index, Attribute::AttrKind Kind) const;
- /// \brief Return the attribute object that exists at the given index.
+ /// Return the attribute object that exists at the given index.
Attribute getAttribute(unsigned Index, StringRef Kind) const;
- /// \brief Return the attribute object that exists at the arg index.
+ /// Return the attribute object that exists at the arg index.
Attribute getParamAttr(unsigned ArgNo, Attribute::AttrKind Kind) const {
return getAttribute(ArgNo + FirstArgIndex, Kind);
}
- /// \brief Return the attribute object that exists at the given index.
+ /// Return the attribute object that exists at the given index.
Attribute getParamAttr(unsigned ArgNo, StringRef Kind) const {
return getAttribute(ArgNo + FirstArgIndex, Kind);
}
- /// \brief Return the alignment of the return value.
+ /// Return the alignment of the return value.
unsigned getRetAlignment() const;
- /// \brief Return the alignment for the specified function parameter.
+ /// Return the alignment for the specified function parameter.
unsigned getParamAlignment(unsigned ArgNo) const;
- /// \brief Get the stack alignment.
+ /// Get the stack alignment.
unsigned getStackAlignment(unsigned Index) const;
- /// \brief Get the number of dereferenceable bytes (or zero if unknown).
+ /// Get the number of dereferenceable bytes (or zero if unknown).
uint64_t getDereferenceableBytes(unsigned Index) const;
- /// \brief Get the number of dereferenceable bytes (or zero if unknown) of an
+ /// Get the number of dereferenceable bytes (or zero if unknown) of an
/// arg.
uint64_t getParamDereferenceableBytes(unsigned ArgNo) const {
return getDereferenceableBytes(ArgNo + FirstArgIndex);
}
- /// \brief Get the number of dereferenceable_or_null bytes (or zero if
+ /// Get the number of dereferenceable_or_null bytes (or zero if
/// unknown).
uint64_t getDereferenceableOrNullBytes(unsigned Index) const;
- /// \brief Get the number of dereferenceable_or_null bytes (or zero if
+ /// Get the number of dereferenceable_or_null bytes (or zero if
/// unknown) of an arg.
uint64_t getParamDereferenceableOrNullBytes(unsigned ArgNo) const {
return getDereferenceableOrNullBytes(ArgNo + FirstArgIndex);
std::pair<unsigned, Optional<unsigned>>
getAllocSizeArgs(unsigned Index) const;
- /// \brief Return the attributes at the index as a string.
+ /// Return the attributes at the index as a string.
std::string getAsString(unsigned Index, bool InAttrGrp = false) const;
//===--------------------------------------------------------------------===//
bool operator==(const AttributeList &RHS) const { return pImpl == RHS.pImpl; }
bool operator!=(const AttributeList &RHS) const { return pImpl != RHS.pImpl; }
- /// \brief Return a raw pointer that uniquely identifies this attribute list.
+ /// Return a raw pointer that uniquely identifies this attribute list.
void *getRawPointer() const {
return pImpl;
}
- /// \brief Return true if there are no attributes.
+ /// Return true if there are no attributes.
bool isEmpty() const { return pImpl == nullptr; }
void dump() const;
//===----------------------------------------------------------------------===//
/// \class
-/// \brief Provide DenseMapInfo for AttributeList.
+/// Provide DenseMapInfo for AttributeList.
template <> struct DenseMapInfo<AttributeList> {
static AttributeList getEmptyKey() {
auto Val = static_cast<uintptr_t>(-1);
//===----------------------------------------------------------------------===//
/// \class
-/// \brief This class is used in conjunction with the Attribute::get method to
+/// This class is used in conjunction with the Attribute::get method to
/// create an Attribute object. The object itself is uniquified. The Builder's
/// value, however, is not. So this can be used as a quick way to test for
/// equality, presence of attributes, etc.
void clear();
- /// \brief Add an attribute to the builder.
+ /// Add an attribute to the builder.
AttrBuilder &addAttribute(Attribute::AttrKind Val);
- /// \brief Add the Attribute object to the builder.
+ /// Add the Attribute object to the builder.
AttrBuilder &addAttribute(Attribute A);
- /// \brief Add the target-dependent attribute to the builder.
+ /// Add the target-dependent attribute to the builder.
AttrBuilder &addAttribute(StringRef A, StringRef V = StringRef());
- /// \brief Remove an attribute from the builder.
+ /// Remove an attribute from the builder.
AttrBuilder &removeAttribute(Attribute::AttrKind Val);
- /// \brief Remove the attributes from the builder.
+ /// Remove the attributes from the builder.
AttrBuilder &removeAttributes(AttributeList A, uint64_t WithoutIndex);
- /// \brief Remove the target-dependent attribute to the builder.
+ /// Remove the target-dependent attribute to the builder.
AttrBuilder &removeAttribute(StringRef A);
- /// \brief Add the attributes from the builder.
+ /// Add the attributes from the builder.
AttrBuilder &merge(const AttrBuilder &B);
- /// \brief Remove the attributes from the builder.
+ /// Remove the attributes from the builder.
AttrBuilder &remove(const AttrBuilder &B);
- /// \brief Return true if the builder has any attribute that's in the
+ /// Return true if the builder has any attribute that's in the
/// specified builder.
bool overlaps(const AttrBuilder &B) const;
- /// \brief Return true if the builder has the specified attribute.
+ /// Return true if the builder has the specified attribute.
bool contains(Attribute::AttrKind A) const {
assert((unsigned)A < Attribute::EndAttrKinds && "Attribute out of range!");
return Attrs[A];
}
- /// \brief Return true if the builder has the specified target-dependent
+ /// Return true if the builder has the specified target-dependent
/// attribute.
bool contains(StringRef A) const;
- /// \brief Return true if the builder has IR-level attributes.
+ /// Return true if the builder has IR-level attributes.
bool hasAttributes() const;
- /// \brief Return true if the builder has any attribute that's in the
+ /// Return true if the builder has any attribute that's in the
/// specified attribute.
bool hasAttributes(AttributeList A, uint64_t Index) const;
- /// \brief Return true if the builder has an alignment attribute.
+ /// Return true if the builder has an alignment attribute.
bool hasAlignmentAttr() const;
- /// \brief Retrieve the alignment attribute, if it exists.
+ /// Retrieve the alignment attribute, if it exists.
uint64_t getAlignment() const { return Alignment; }
- /// \brief Retrieve the stack alignment attribute, if it exists.
+ /// Retrieve the stack alignment attribute, if it exists.
uint64_t getStackAlignment() const { return StackAlignment; }
- /// \brief Retrieve the number of dereferenceable bytes, if the
+ /// Retrieve the number of dereferenceable bytes, if the
/// dereferenceable attribute exists (zero is returned otherwise).
uint64_t getDereferenceableBytes() const { return DerefBytes; }
- /// \brief Retrieve the number of dereferenceable_or_null bytes, if the
+ /// Retrieve the number of dereferenceable_or_null bytes, if the
/// dereferenceable_or_null attribute exists (zero is returned otherwise).
uint64_t getDereferenceableOrNullBytes() const { return DerefOrNullBytes; }
/// doesn't exist, pair(0, 0) is returned.
std::pair<unsigned, Optional<unsigned>> getAllocSizeArgs() const;
- /// \brief This turns an int alignment (which must be a power of 2) into the
+ /// This turns an int alignment (which must be a power of 2) into the
/// form used internally in Attribute.
AttrBuilder &addAlignmentAttr(unsigned Align);
- /// \brief This turns an int stack alignment (which must be a power of 2) into
+ /// This turns an int stack alignment (which must be a power of 2) into
/// the form used internally in Attribute.
AttrBuilder &addStackAlignmentAttr(unsigned Align);
- /// \brief This turns the number of dereferenceable bytes into the form used
+ /// This turns the number of dereferenceable bytes into the form used
/// internally in Attribute.
AttrBuilder &addDereferenceableAttr(uint64_t Bytes);
- /// \brief This turns the number of dereferenceable_or_null bytes into the
+ /// This turns the number of dereferenceable_or_null bytes into the
/// form used internally in Attribute.
AttrBuilder &addDereferenceableOrNullAttr(uint64_t Bytes);
/// Attribute.getIntValue().
AttrBuilder &addAllocSizeAttrFromRawRepr(uint64_t RawAllocSizeRepr);
- /// \brief Return true if the builder contains no target-independent
+ /// Return true if the builder contains no target-independent
/// attributes.
bool empty() const { return Attrs.none(); }
namespace AttributeFuncs {
-/// \brief Which attributes cannot be applied to a type.
+/// Which attributes cannot be applied to a type.
AttrBuilder typeIncompatible(Type *Ty);
/// \returns Return true if the two functions have compatible target-independent
/// attributes for inlining purposes.
bool areInlineCompatible(const Function &Caller, const Function &Callee);
-/// \brief Merge caller's and callee's attributes.
+/// Merge caller's and callee's attributes.
void mergeAttributesForInlining(Function &Caller, const Function &Callee);
} // end namespace AttributeFuncs
/// Intel_OCL_BI - Calling conventions for Intel OpenCL built-ins
Intel_OCL_BI = 77,
- /// \brief The C convention as specified in the x86-64 supplement to the
+ /// The C convention as specified in the x86-64 supplement to the
/// System V ABI, used on most non-Windows systems.
X86_64_SysV = 78,
- /// \brief The C convention as implemented on Windows/x86-64 and
+ /// The C convention as implemented on Windows/x86-64 and
/// AArch64. This convention differs from the more common
/// \c X86_64_SysV convention in a number of ways, most notably in
/// that XMM registers used to pass arguments are shadowed by GPRs,
/// registers to variadic functions.
Win64 = 79,
- /// \brief MSVC calling convention that passes vectors and vector aggregates
+ /// MSVC calling convention that passes vectors and vector aggregates
/// in SSE registers.
X86_VectorCall = 80,
- /// \brief Calling convention used by HipHop Virtual Machine (HHVM) to
+ /// Calling convention used by HipHop Virtual Machine (HHVM) to
/// perform calls to and from translation cache, and for calling PHP
/// functions.
/// HHVM calling convention supports tail/sibling call elimination.
HHVM = 81,
- /// \brief HHVM calling convention for invoking C/C++ helpers.
+ /// HHVM calling convention for invoking C/C++ helpers.
HHVM_C = 82,
/// X86_INTR - x86 hardware interrupt context. Callee may take one or two
/// Transparently provide more efficient getOperand methods.
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Constant);
- /// \brief Convenience function for getting a Cast operation.
+ /// Convenience function for getting a Cast operation.
///
/// \param ops The opcode for the conversion
/// \param C The constant to be converted
static Constant *get(unsigned Opcode, Constant *C1, Constant *C2,
unsigned Flags = 0, Type *OnlyIfReducedTy = nullptr);
- /// \brief Return an ICmp or FCmp comparison operator constant expression.
+ /// Return an ICmp or FCmp comparison operator constant expression.
///
/// \param OnlyIfReduced see \a getWithOperands() docs.
static Constant *getCompare(unsigned short pred, Constant *C1, Constant *C2,
// sunk down to an FTTI element that is queried rather than a global
// preference.
-/// \brief Layout alignment element.
+/// Layout alignment element.
///
/// Stores the alignment data associated with a given alignment type (integer,
/// vector, float) and type bit width.
/// \note The unusual order of elements in the structure attempts to reduce
/// padding and make the structure slightly more cache friendly.
struct LayoutAlignElem {
- /// \brief Alignment type from \c AlignTypeEnum
+ /// Alignment type from \c AlignTypeEnum
unsigned AlignType : 8;
unsigned TypeBitWidth : 24;
unsigned ABIAlign : 16;
bool operator==(const LayoutAlignElem &rhs) const;
};
-/// \brief Layout pointer alignment element.
+/// Layout pointer alignment element.
///
/// Stores the alignment data associated with a given pointer and address space.
///
bool operator==(const PointerAlignElem &rhs) const;
};
-/// \brief A parsed version of the target data layout string in and methods for
+/// A parsed version of the target data layout string in and methods for
/// querying it.
///
/// The target data layout string is specified *by the target* - a frontend
SmallVector<unsigned char, 8> LegalIntWidths;
- /// \brief Primitive type alignment data. This is sorted by type and bit
+ /// Primitive type alignment data. This is sorted by type and bit
/// width during construction.
using AlignmentsTy = SmallVector<LayoutAlignElem, 16>;
AlignmentsTy Alignments;
AlignmentsTy::iterator
findAlignmentLowerBound(AlignTypeEnum AlignType, uint32_t BitWidth);
- /// \brief The string representation used to create this DataLayout
+ /// The string representation used to create this DataLayout
std::string StringRepresentation;
using PointersTy = SmallVector<PointerAlignElem, 8>;
bool isLittleEndian() const { return !BigEndian; }
bool isBigEndian() const { return BigEndian; }
- /// \brief Returns the string representation of the DataLayout.
+ /// Returns the string representation of the DataLayout.
///
/// This representation is in the same format accepted by the string
/// constructor above. This should not be used to compare two DataLayout as
return StringRepresentation;
}
- /// \brief Test if the DataLayout was constructed from an empty string.
+ /// Test if the DataLayout was constructed from an empty string.
bool isDefault() const { return StringRepresentation.empty(); }
- /// \brief Returns true if the specified type is known to be a native integer
+ /// Returns true if the specified type is known to be a native integer
/// type supported by the CPU.
///
/// For example, i64 is not native on most 32-bit CPUs and i37 is not native
static const char *getManglingComponent(const Triple &T);
- /// \brief Returns true if the specified type fits in a native integer type
+ /// Returns true if the specified type fits in a native integer type
/// supported by the CPU.
///
/// For example, if the CPU only supports i32 as a native integer type, then
/// [*] The alloc size depends on the alignment, and thus on the target.
/// These values are for x86-32 linux.
- /// \brief Returns the number of bits necessary to hold the specified type.
+ /// Returns the number of bits necessary to hold the specified type.
///
/// For example, returns 36 for i36 and 80 for x86_fp80. The type passed must
/// have a size (Type::isSized() must return true).
uint64_t getTypeSizeInBits(Type *Ty) const;
- /// \brief Returns the maximum number of bytes that may be overwritten by
+ /// Returns the maximum number of bytes that may be overwritten by
/// storing the specified type.
///
/// For example, returns 5 for i36 and 10 for x86_fp80.
return (getTypeSizeInBits(Ty) + 7) / 8;
}
- /// \brief Returns the maximum number of bits that may be overwritten by
+ /// Returns the maximum number of bits that may be overwritten by
/// storing the specified type; always a multiple of 8.
///
/// For example, returns 40 for i36 and 80 for x86_fp80.
return 8 * getTypeStoreSize(Ty);
}
- /// \brief Returns the offset in bytes between successive objects of the
+ /// Returns the offset in bytes between successive objects of the
/// specified type, including alignment padding.
///
/// This is the amount that alloca reserves for this type. For example,
return alignTo(getTypeStoreSize(Ty), getABITypeAlignment(Ty));
}
- /// \brief Returns the offset in bits between successive objects of the
+ /// Returns the offset in bits between successive objects of the
/// specified type, including alignment padding; always a multiple of 8.
///
/// This is the amount that alloca reserves for this type. For example,
return 8 * getTypeAllocSize(Ty);
}
- /// \brief Returns the minimum ABI-required alignment for the specified type.
+ /// Returns the minimum ABI-required alignment for the specified type.
unsigned getABITypeAlignment(Type *Ty) const;
- /// \brief Returns the minimum ABI-required alignment for an integer type of
+ /// Returns the minimum ABI-required alignment for an integer type of
/// the specified bitwidth.
unsigned getABIIntegerTypeAlignment(unsigned BitWidth) const;
- /// \brief Returns the preferred stack/global alignment for the specified
+ /// Returns the preferred stack/global alignment for the specified
/// type.
///
/// This is always at least as good as the ABI alignment.
unsigned getPrefTypeAlignment(Type *Ty) const;
- /// \brief Returns the preferred alignment for the specified type, returned as
+ /// Returns the preferred alignment for the specified type, returned as
/// log2 of the value (a shift amount).
unsigned getPreferredTypeAlignmentShift(Type *Ty) const;
- /// \brief Returns an integer type with size at least as big as that of a
+ /// Returns an integer type with size at least as big as that of a
/// pointer in the given address space.
IntegerType *getIntPtrType(LLVMContext &C, unsigned AddressSpace = 0) const;
- /// \brief Returns an integer (vector of integer) type with size at least as
+ /// Returns an integer (vector of integer) type with size at least as
/// big as that of a pointer of the given pointer (vector of pointer) type.
Type *getIntPtrType(Type *) const;
- /// \brief Returns the smallest integer type with size at least as big as
+ /// Returns the smallest integer type with size at least as big as
/// Width bits.
Type *getSmallestLegalIntType(LLVMContext &C, unsigned Width = 0) const;
- /// \brief Returns the largest legal integer type, or null if none are set.
+ /// Returns the largest legal integer type, or null if none are set.
Type *getLargestLegalIntType(LLVMContext &C) const {
unsigned LargestSize = getLargestLegalIntTypeSizeInBits();
return (LargestSize == 0) ? nullptr : Type::getIntNTy(C, LargestSize);
}
- /// \brief Returns the size of largest legal integer type size, or 0 if none
+ /// Returns the size of largest legal integer type size, or 0 if none
/// are set.
unsigned getLargestLegalIntTypeSizeInBits() const;
- /// \brief Returns the type of a GEP index.
+ /// Returns the type of a GEP index.
/// If it was not specified explicitly, it will be the integer type of the
/// pointer width - IntPtrType.
Type *getIndexType(Type *PtrTy) const;
- /// \brief Returns the offset from the beginning of the type for the specified
+ /// Returns the offset from the beginning of the type for the specified
/// indices.
///
/// Note that this takes the element type, not the pointer type.
/// This is used to implement getelementptr.
int64_t getIndexedOffsetInType(Type *ElemTy, ArrayRef<Value *> Indices) const;
- /// \brief Returns a StructLayout object, indicating the alignment of the
+ /// Returns a StructLayout object, indicating the alignment of the
/// struct, its size, and the offsets of its fields.
///
/// Note that this information is lazily cached.
const StructLayout *getStructLayout(StructType *Ty) const;
- /// \brief Returns the preferred alignment of the specified global.
+ /// Returns the preferred alignment of the specified global.
///
/// This includes an explicitly requested alignment (if the global has one).
unsigned getPreferredAlignment(const GlobalVariable *GV) const;
- /// \brief Returns the preferred alignment of the specified global, returned
+ /// Returns the preferred alignment of the specified global, returned
/// in log form.
///
/// This includes an explicitly requested alignment (if the global has one).
/// NB: Padding in nested element is not taken into account.
bool hasPadding() const { return IsPadded; }
- /// \brief Given a valid byte offset into the structure, returns the structure
+ /// Given a valid byte offset into the structure, returns the structure
/// index that contains it.
unsigned getElementContainingOffset(uint64_t Offset) const;
friend class LLVMContextImpl;
friend class MDNode;
- /// \brief The DWARF address space of the memory pointed to or referenced by a
+ /// The DWARF address space of the memory pointed to or referenced by a
/// pointer or reference type respectively.
Optional<unsigned> DWARFAddressSpace;
class raw_ostream;
class DILocation;
- /// \brief A debug info location.
+ /// A debug info location.
///
/// This class is a wrapper around a tracking reference to an \a DILocation
/// pointer.
public:
DebugLoc() = default;
- /// \brief Construct from an \a DILocation.
+ /// Construct from an \a DILocation.
DebugLoc(const DILocation *L);
- /// \brief Construct from an \a MDNode.
+ /// Construct from an \a MDNode.
///
/// Note: if \c N is not an \a DILocation, a verifier check will fail, and
/// accessors will crash. However, construction from other nodes is
/// IR.
explicit DebugLoc(const MDNode *N);
- /// \brief Get the underlying \a DILocation.
+ /// Get the underlying \a DILocation.
///
/// \pre !*this or \c isa<DILocation>(getAsMDNode()).
/// @{
DILocation &operator*() const { return *get(); }
/// @}
- /// \brief Check for null.
+ /// Check for null.
///
/// Check for null in a way that is safe with broken debug info. Unlike
/// the conversion to \c DILocation, this doesn't require that \c Loc is of
/// \a Instruction::hasMetadata().
explicit operator bool() const { return Loc; }
- /// \brief Check whether this has a trivial destructor.
+ /// Check whether this has a trivial destructor.
bool hasTrivialDestructor() const { return Loc.hasTrivialDestructor(); }
- /// \brief Create a new DebugLoc.
+ /// Create a new DebugLoc.
///
/// Create a new DebugLoc at the specified line/col and scope/inline. This
/// forwards to \a DILocation::get().
MDNode *getScope() const;
DILocation *getInlinedAt() const;
- /// \brief Get the fully inlined-at scope for a DebugLoc.
+ /// Get the fully inlined-at scope for a DebugLoc.
///
/// Gets the inlined-at scope for a DebugLoc.
MDNode *getInlinedAtScope() const;
- /// \brief Find the debug info location for the start of the function.
+ /// Find the debug info location for the start of the function.
///
/// Walk up the scope chain of given debug loc and find line number info
/// for the function.
/// find the subprogram, and then DILocation::get().
DebugLoc getFnDebugLoc() const;
- /// \brief Return \c this as a bar \a MDNode.
+ /// Return \c this as a bar \a MDNode.
MDNode *getAsMDNode() const { return Loc; }
bool operator==(const DebugLoc &DL) const { return Loc == DL.Loc; }
void dump() const;
- /// \brief prints source location /path/to/file.exe:line:col @[inlined at]
+ /// prints source location /path/to/file.exe:line:col @[inlined at]
void print(raw_ostream &OS) const;
};
namespace llvm {
class DiagnosticInfo;
-/// \brief This is the base class for diagnostic handling in LLVM.
+/// This is the base class for diagnostic handling in LLVM.
/// The handleDiagnostics method must be overriden by the subclasses to handle
/// diagnostic. The *RemarkEnabled methods can be overriden to control
/// which remarks are enabled.
class Module;
class SMDiagnostic;
-/// \brief Defines the different supported severity of a diagnostic.
+/// Defines the different supported severity of a diagnostic.
enum DiagnosticSeverity : char {
DS_Error,
DS_Warning,
DS_Note
};
-/// \brief Defines the different supported kind of a diagnostic.
+/// Defines the different supported kind of a diagnostic.
/// This enum should be extended with a new ID for each added concrete subclass.
enum DiagnosticKind {
DK_InlineAsm,
DK_FirstPluginKind
};
-/// \brief Get the next available kind ID for a plugin diagnostic.
+/// Get the next available kind ID for a plugin diagnostic.
/// Each time this function is called, it returns a different number.
/// Therefore, a plugin that wants to "identify" its own classes
/// with a dynamic identifier, just have to use this method to get a new ID
/// DiagnosticKind values.
int getNextAvailablePluginDiagnosticKind();
-/// \brief This is the base abstract class for diagnostic reporting in
+/// This is the base abstract class for diagnostic reporting in
/// the backend.
/// The print method must be overloaded by the subclasses to print a
/// user-friendly message in the client of the backend (let us call it a
DiagnosticLocation Loc;
};
-/// \brief Common features for diagnostics dealing with optimization remarks
+/// Common features for diagnostics dealing with optimization remarks
/// that are used by both IR and MIR passes.
class DiagnosticInfoOptimizationBase : public DiagnosticInfoWithLocationBase {
public:
- /// \brief Used to set IsVerbose via the stream interface.
+ /// Used to set IsVerbose via the stream interface.
struct setIsVerbose {};
- /// \brief When an instance of this is inserted into the stream, the arguments
+ /// When an instance of this is inserted into the stream, the arguments
/// following will not appear in the remark printed in the compiler output
/// (-Rpass) but only in the optimization record file
/// (-fsave-optimization-record).
struct setExtraArgs {};
- /// \brief Used in the streaming interface as the general argument type. It
+ /// Used in the streaming interface as the general argument type. It
/// internally converts everything into a key-value pair.
struct Argument {
std::string Key;
/// The remark is expected to be noisy.
bool IsVerbose = false;
- /// \brief If positive, the index of the first argument that only appear in
+ /// If positive, the index of the first argument that only appear in
/// the optimization records and not in the remark printed in the compiler
/// output.
int FirstExtraArgIndex = -1;
return R;
}
-/// \brief Common features for diagnostics dealing with optimization remarks
+/// Common features for diagnostics dealing with optimization remarks
/// that are used by IR passes.
class DiagnosticInfoIROptimization : public DiagnosticInfoOptimizationBase {
public:
Loc),
CodeRegion(CodeRegion) {}
- /// \brief This is ctor variant allows a pass to build an optimization remark
+ /// This is ctor variant allows a pass to build an optimization remark
/// from an existing remark.
///
/// This is useful when a transformation pass (e.g LV) wants to emit a remark
const DiagnosticLocation &Loc,
const Value *CodeRegion);
- /// \brief Same as above but \p Inst is used to derive code region and debug
+ /// Same as above but \p Inst is used to derive code region and debug
/// location.
OptimizationRemarkMissed(const char *PassName, StringRef RemarkName,
const Instruction *Inst);
const DiagnosticLocation &Loc,
const Value *CodeRegion);
- /// \brief This is ctor variant allows a pass to build an optimization remark
+ /// This is ctor variant allows a pass to build an optimization remark
/// from an existing remark.
///
/// This is useful when a transformation pass (e.g LV) wants to emit a remark
const OptimizationRemarkAnalysis &Orig)
: DiagnosticInfoIROptimization(PassName, Prepend, Orig) {}
- /// \brief Same as above but \p Inst is used to derive code region and debug
+ /// Same as above but \p Inst is used to derive code region and debug
/// location.
OptimizationRemarkAnalysis(const char *PassName, StringRef RemarkName,
const Instruction *Inst);
class Twine;
class Value;
-/// \brief Interface for custom diagnostic printing.
+/// Interface for custom diagnostic printing.
class DiagnosticPrinter {
public:
virtual ~DiagnosticPrinter() = default;
virtual DiagnosticPrinter &operator<<(const SMDiagnostic &Diag) = 0;
};
-/// \brief Basic diagnostic printer that uses an underlying raw_ostream.
+/// Basic diagnostic printer that uses an underlying raw_ostream.
class DiagnosticPrinterRawOStream : public DiagnosticPrinter {
protected:
raw_ostream &Stream;
}
};
-/// \brief Concrete subclass of DominatorTreeBase that is used to compute a
+/// Concrete subclass of DominatorTreeBase that is used to compute a
/// normal dominator tree.
///
/// Definition: A block is said to be forward statically reachable if there is
// Ensure base-class overloads are visible.
using Base::dominates;
- /// \brief Return true if Def dominates a use in User.
+ /// Return true if Def dominates a use in User.
///
/// This performs the special checks necessary if Def and User are in the same
/// basic block. Note that Def doesn't dominate a use in Def itself!
// Ensure base class overloads are visible.
using Base::isReachableFromEntry;
- /// \brief Provide an overload for a Use.
+ /// Provide an overload for a Use.
bool isReachableFromEntry(const Use &U) const;
// Pop up a GraphViz/gv window with the Dominator Tree rendered using `dot`.
}
};
-/// \brief Analysis pass which computes a \c DominatorTree.
+/// Analysis pass which computes a \c DominatorTree.
class DominatorTreeAnalysis : public AnalysisInfoMixin<DominatorTreeAnalysis> {
friend AnalysisInfoMixin<DominatorTreeAnalysis>;
static AnalysisKey Key;
public:
- /// \brief Provide the result typedef for this analysis pass.
+ /// Provide the result typedef for this analysis pass.
using Result = DominatorTree;
- /// \brief Run the analysis pass over a function and produce a dominator tree.
+ /// Run the analysis pass over a function and produce a dominator tree.
DominatorTree run(Function &F, FunctionAnalysisManager &);
};
-/// \brief Printer pass for the \c DominatorTree.
+/// Printer pass for the \c DominatorTree.
class DominatorTreePrinterPass
: public PassInfoMixin<DominatorTreePrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Verifier pass for the \c DominatorTree.
+/// Verifier pass for the \c DominatorTree.
struct DominatorTreeVerifierPass : PassInfoMixin<DominatorTreeVerifierPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Legacy analysis pass which computes a \c DominatorTree.
+/// Legacy analysis pass which computes a \c DominatorTree.
class DominatorTreeWrapperPass : public FunctionPass {
DominatorTree DT;
};
//===-------------------------------------
-/// \brief Class to defer updates to a DominatorTree.
+/// Class to defer updates to a DominatorTree.
///
/// Definition: Applying updates to every edge insertion and deletion is
/// expensive and not necessary. When one needs the DominatorTree for analysis
public:
DeferredDominance(DominatorTree &DT_) : DT(DT_) {}
- /// \brief Queues multiple updates and discards duplicates.
+ /// Queues multiple updates and discards duplicates.
void applyUpdates(ArrayRef<DominatorTree::UpdateType> Updates);
- /// \brief Helper method for a single edge insertion. It's almost always
+ /// Helper method for a single edge insertion. It's almost always
/// better to batch updates and call applyUpdates to quickly remove duplicate
/// edges. This is best used when there is only a single insertion needed to
/// update Dominators.
void insertEdge(BasicBlock *From, BasicBlock *To);
- /// \brief Helper method for a single edge deletion. It's almost always better
+ /// Helper method for a single edge deletion. It's almost always better
/// to batch updates and call applyUpdates to quickly remove duplicate edges.
/// This is best used when there is only a single deletion needed to update
/// Dominators.
void deleteEdge(BasicBlock *From, BasicBlock *To);
- /// \brief Delays the deletion of a basic block until a flush() event.
+ /// Delays the deletion of a basic block until a flush() event.
void deleteBB(BasicBlock *DelBB);
- /// \brief Returns true if DelBB is awaiting deletion at a flush() event.
+ /// Returns true if DelBB is awaiting deletion at a flush() event.
bool pendingDeletedBB(BasicBlock *DelBB);
- /// \brief Returns true if pending DT updates are queued for a flush() event.
+ /// Returns true if pending DT updates are queued for a flush() event.
bool pending();
- /// \brief Flushes all pending updates and block deletions. Returns a
+ /// Flushes all pending updates and block deletions. Returns a
/// correct DominatorTree reference to be used by the caller for analysis.
DominatorTree &flush();
- /// \brief Drops all internal state and forces a (slow) recalculation of the
+ /// Drops all internal state and forces a (slow) recalculation of the
/// DominatorTree based on the current state of the LLVM IR in F. This should
/// only be used in corner cases such as the Entry block of F being deleted.
void recalculate(Function &F);
- /// \brief Debug method to help view the state of pending updates.
+ /// Debug method to help view the state of pending updates.
LLVM_DUMP_METHOD void dump() const;
private:
static Intrinsic::ID lookupIntrinsicID(StringRef Name);
- /// \brief Recalculate the ID for this function if it is an Intrinsic defined
+ /// Recalculate the ID for this function if it is an Intrinsic defined
/// in llvm/Intrinsics.h. Sets the intrinsic ID to Intrinsic::not_intrinsic
/// if the name of this function does not match an intrinsic in that header.
/// Note, this method does not need to be called directly, as it is called
static ProfileCount getInvalid() { return ProfileCount(-1, PCT_Invalid); }
};
- /// \brief Set the entry count for this function.
+ /// Set the entry count for this function.
///
/// Entry count is the number of times this function was executed based on
/// pgo data. \p Imports points to a set of GUIDs that needs to
void setEntryCount(uint64_t Count, ProfileCountType Type = PCT_Real,
const DenseSet<GlobalValue::GUID> *Imports = nullptr);
- /// \brief Get the entry count for this function.
+ /// Get the entry count for this function.
///
/// Entry count is the number of times the function was executed based on
/// pgo data.
return getAttribute(AttributeList::FunctionIndex, Kind);
}
- /// \brief Return the stack alignment for the function.
+ /// Return the stack alignment for the function.
unsigned getFnStackAlignment() const {
if (!hasFnAttribute(Attribute::StackAlignment))
return 0;
size_t arg_size() const { return NumArgs; }
bool arg_empty() const { return arg_size() == 0; }
- /// \brief Check whether this function has a personality function.
+ /// Check whether this function has a personality function.
bool hasPersonalityFn() const {
return getSubclassDataFromValue() & (1<<3);
}
- /// \brief Get the personality function associated with this function.
+ /// Get the personality function associated with this function.
Constant *getPersonalityFn() const;
void setPersonalityFn(Constant *Fn);
- /// \brief Check whether this function has prefix data.
+ /// Check whether this function has prefix data.
bool hasPrefixData() const {
return getSubclassDataFromValue() & (1<<1);
}
- /// \brief Get the prefix data associated with this function.
+ /// Get the prefix data associated with this function.
Constant *getPrefixData() const;
void setPrefixData(Constant *PrefixData);
- /// \brief Check whether this function has prologue data.
+ /// Check whether this function has prologue data.
bool hasPrologueData() const {
return getSubclassDataFromValue() & (1<<2);
}
- /// \brief Get the prologue data associated with this function.
+ /// Get the prologue data associated with this function.
Constant *getPrologueData() const;
void setPrologueData(Constant *PrologueData);
/// setjmp or other function that gcc recognizes as "returning twice".
bool callsFunctionThatReturnsTwice() const;
- /// \brief Set the attached subprogram.
+ /// Set the attached subprogram.
///
/// Calls \a setMetadata() with \a LLVMContext::MD_dbg.
void setSubprogram(DISubprogram *SP);
- /// \brief Get the attached subprogram.
+ /// Get the attached subprogram.
///
/// Calls \a getMetadata() with \a LLVMContext::MD_dbg and casts the result
/// to \a DISubprogram.
}
protected:
- /// \brief The intrinsic ID for this subclass (which must be a Function).
+ /// The intrinsic ID for this subclass (which must be a Function).
///
/// This member is defined by this class, but not used for anything.
/// Subclasses can use it to store their intrinsic ID, if they have one.
class MDNode;
class Use;
-/// \brief This provides the default implementation of the IRBuilder
+/// This provides the default implementation of the IRBuilder
/// 'InsertHelper' method that is called whenever an instruction is created by
/// IRBuilder and needs to be inserted.
///
}
};
-/// \brief Common base class shared among various IRBuilders.
+/// Common base class shared among various IRBuilders.
class IRBuilderBase {
DebugLoc CurDbgLocation;
// Builder configuration methods
//===--------------------------------------------------------------------===//
- /// \brief Clear the insertion point: created instructions will not be
+ /// Clear the insertion point: created instructions will not be
/// inserted into a block.
void ClearInsertionPoint() {
BB = nullptr;
BasicBlock::iterator GetInsertPoint() const { return InsertPt; }
LLVMContext &getContext() const { return Context; }
- /// \brief This specifies that created instructions should be appended to the
+ /// This specifies that created instructions should be appended to the
/// end of the specified block.
void SetInsertPoint(BasicBlock *TheBB) {
BB = TheBB;
InsertPt = BB->end();
}
- /// \brief This specifies that created instructions should be inserted before
+ /// This specifies that created instructions should be inserted before
/// the specified instruction.
void SetInsertPoint(Instruction *I) {
BB = I->getParent();
SetCurrentDebugLocation(I->getDebugLoc());
}
- /// \brief This specifies that created instructions should be inserted at the
+ /// This specifies that created instructions should be inserted at the
/// specified point.
void SetInsertPoint(BasicBlock *TheBB, BasicBlock::iterator IP) {
BB = TheBB;
SetCurrentDebugLocation(IP->getDebugLoc());
}
- /// \brief Set location information used by debugging information.
+ /// Set location information used by debugging information.
void SetCurrentDebugLocation(DebugLoc L) { CurDbgLocation = std::move(L); }
- /// \brief Get location information used by debugging information.
+ /// Get location information used by debugging information.
const DebugLoc &getCurrentDebugLocation() const { return CurDbgLocation; }
- /// \brief If this builder has a current debug location, set it on the
+ /// If this builder has a current debug location, set it on the
/// specified instruction.
void SetInstDebugLocation(Instruction *I) const {
if (CurDbgLocation)
I->setDebugLoc(CurDbgLocation);
}
- /// \brief Get the return type of the current function that we're emitting
+ /// Get the return type of the current function that we're emitting
/// into.
Type *getCurrentFunctionReturnType() const;
BasicBlock::iterator Point;
public:
- /// \brief Creates a new insertion point which doesn't point to anything.
+ /// Creates a new insertion point which doesn't point to anything.
InsertPoint() = default;
- /// \brief Creates a new insertion point at the given location.
+ /// Creates a new insertion point at the given location.
InsertPoint(BasicBlock *InsertBlock, BasicBlock::iterator InsertPoint)
: Block(InsertBlock), Point(InsertPoint) {}
- /// \brief Returns true if this insert point is set.
+ /// Returns true if this insert point is set.
bool isSet() const { return (Block != nullptr); }
BasicBlock *getBlock() const { return Block; }
BasicBlock::iterator getPoint() const { return Point; }
};
- /// \brief Returns the current insert point.
+ /// Returns the current insert point.
InsertPoint saveIP() const {
return InsertPoint(GetInsertBlock(), GetInsertPoint());
}
- /// \brief Returns the current insert point, clearing it in the process.
+ /// Returns the current insert point, clearing it in the process.
InsertPoint saveAndClearIP() {
InsertPoint IP(GetInsertBlock(), GetInsertPoint());
ClearInsertionPoint();
return IP;
}
- /// \brief Sets the current insert point to a previously-saved location.
+ /// Sets the current insert point to a previously-saved location.
void restoreIP(InsertPoint IP) {
if (IP.isSet())
SetInsertPoint(IP.getBlock(), IP.getPoint());
ClearInsertionPoint();
}
- /// \brief Get the floating point math metadata being used.
+ /// Get the floating point math metadata being used.
MDNode *getDefaultFPMathTag() const { return DefaultFPMathTag; }
- /// \brief Get the flags to be applied to created floating point ops
+ /// Get the flags to be applied to created floating point ops
FastMathFlags getFastMathFlags() const { return FMF; }
- /// \brief Clear the fast-math flags.
+ /// Clear the fast-math flags.
void clearFastMathFlags() { FMF.clear(); }
- /// \brief Set the floating point math metadata to be used.
+ /// Set the floating point math metadata to be used.
void setDefaultFPMathTag(MDNode *FPMathTag) { DefaultFPMathTag = FPMathTag; }
- /// \brief Set the fast-math flags to be used with generated fp-math operators
+ /// Set the fast-math flags to be used with generated fp-math operators
void setFastMathFlags(FastMathFlags NewFMF) { FMF = NewFMF; }
//===--------------------------------------------------------------------===//
// RAII helpers.
//===--------------------------------------------------------------------===//
- // \brief RAII object that stores the current insertion point and restores it
+ // RAII object that stores the current insertion point and restores it
// when the object is destroyed. This includes the debug location.
class InsertPointGuard {
IRBuilderBase &Builder;
}
};
- // \brief RAII object that stores the current fast math settings and restores
+ // RAII object that stores the current fast math settings and restores
// them when the object is destroyed.
class FastMathFlagGuard {
IRBuilderBase &Builder;
// Miscellaneous creation methods.
//===--------------------------------------------------------------------===//
- /// \brief Make a new global variable with initializer type i8*
+ /// Make a new global variable with initializer type i8*
///
/// Make a new global variable with an initializer that has array of i8 type
/// filled in with the null terminated string value specified. The new global
GlobalVariable *CreateGlobalString(StringRef Str, const Twine &Name = "",
unsigned AddressSpace = 0);
- /// \brief Get a constant value representing either true or false.
+ /// Get a constant value representing either true or false.
ConstantInt *getInt1(bool V) {
return ConstantInt::get(getInt1Ty(), V);
}
- /// \brief Get the constant value for i1 true.
+ /// Get the constant value for i1 true.
ConstantInt *getTrue() {
return ConstantInt::getTrue(Context);
}
- /// \brief Get the constant value for i1 false.
+ /// Get the constant value for i1 false.
ConstantInt *getFalse() {
return ConstantInt::getFalse(Context);
}
- /// \brief Get a constant 8-bit value.
+ /// Get a constant 8-bit value.
ConstantInt *getInt8(uint8_t C) {
return ConstantInt::get(getInt8Ty(), C);
}
- /// \brief Get a constant 16-bit value.
+ /// Get a constant 16-bit value.
ConstantInt *getInt16(uint16_t C) {
return ConstantInt::get(getInt16Ty(), C);
}
- /// \brief Get a constant 32-bit value.
+ /// Get a constant 32-bit value.
ConstantInt *getInt32(uint32_t C) {
return ConstantInt::get(getInt32Ty(), C);
}
- /// \brief Get a constant 64-bit value.
+ /// Get a constant 64-bit value.
ConstantInt *getInt64(uint64_t C) {
return ConstantInt::get(getInt64Ty(), C);
}
- /// \brief Get a constant N-bit value, zero extended or truncated from
+ /// Get a constant N-bit value, zero extended or truncated from
/// a 64-bit value.
ConstantInt *getIntN(unsigned N, uint64_t C) {
return ConstantInt::get(getIntNTy(N), C);
}
- /// \brief Get a constant integer value.
+ /// Get a constant integer value.
ConstantInt *getInt(const APInt &AI) {
return ConstantInt::get(Context, AI);
}
// Type creation methods
//===--------------------------------------------------------------------===//
- /// \brief Fetch the type representing a single bit
+ /// Fetch the type representing a single bit
IntegerType *getInt1Ty() {
return Type::getInt1Ty(Context);
}
- /// \brief Fetch the type representing an 8-bit integer.
+ /// Fetch the type representing an 8-bit integer.
IntegerType *getInt8Ty() {
return Type::getInt8Ty(Context);
}
- /// \brief Fetch the type representing a 16-bit integer.
+ /// Fetch the type representing a 16-bit integer.
IntegerType *getInt16Ty() {
return Type::getInt16Ty(Context);
}
- /// \brief Fetch the type representing a 32-bit integer.
+ /// Fetch the type representing a 32-bit integer.
IntegerType *getInt32Ty() {
return Type::getInt32Ty(Context);
}
- /// \brief Fetch the type representing a 64-bit integer.
+ /// Fetch the type representing a 64-bit integer.
IntegerType *getInt64Ty() {
return Type::getInt64Ty(Context);
}
- /// \brief Fetch the type representing a 128-bit integer.
+ /// Fetch the type representing a 128-bit integer.
IntegerType *getInt128Ty() { return Type::getInt128Ty(Context); }
- /// \brief Fetch the type representing an N-bit integer.
+ /// Fetch the type representing an N-bit integer.
IntegerType *getIntNTy(unsigned N) {
return Type::getIntNTy(Context, N);
}
- /// \brief Fetch the type representing a 16-bit floating point value.
+ /// Fetch the type representing a 16-bit floating point value.
Type *getHalfTy() {
return Type::getHalfTy(Context);
}
- /// \brief Fetch the type representing a 32-bit floating point value.
+ /// Fetch the type representing a 32-bit floating point value.
Type *getFloatTy() {
return Type::getFloatTy(Context);
}
- /// \brief Fetch the type representing a 64-bit floating point value.
+ /// Fetch the type representing a 64-bit floating point value.
Type *getDoubleTy() {
return Type::getDoubleTy(Context);
}
- /// \brief Fetch the type representing void.
+ /// Fetch the type representing void.
Type *getVoidTy() {
return Type::getVoidTy(Context);
}
- /// \brief Fetch the type representing a pointer to an 8-bit integer value.
+ /// Fetch the type representing a pointer to an 8-bit integer value.
PointerType *getInt8PtrTy(unsigned AddrSpace = 0) {
return Type::getInt8PtrTy(Context, AddrSpace);
}
- /// \brief Fetch the type representing a pointer to an integer value.
+ /// Fetch the type representing a pointer to an integer value.
IntegerType *getIntPtrTy(const DataLayout &DL, unsigned AddrSpace = 0) {
return DL.getIntPtrType(Context, AddrSpace);
}
// Intrinsic creation methods
//===--------------------------------------------------------------------===//
- /// \brief Create and insert a memset to the specified pointer and the
+ /// Create and insert a memset to the specified pointer and the
/// specified value.
///
/// If the pointer isn't an i8*, it will be converted. If a TBAA tag is
MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr);
- /// \brief Create and insert a memcpy between the specified pointers.
+ /// Create and insert a memcpy between the specified pointers.
///
/// If the pointers aren't i8*, they will be converted. If a TBAA tag is
/// specified, it will be added to the instruction. Likewise with alias.scope
MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr);
- /// \brief Create and insert an element unordered-atomic memcpy between the
+ /// Create and insert an element unordered-atomic memcpy between the
/// specified pointers.
///
/// DstAlign/SrcAlign are the alignments of the Dst/Src pointers, respectively.
MDNode *TBAAStructTag = nullptr, MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr);
- /// \brief Create and insert a memmove between the specified
+ /// Create and insert a memmove between the specified
/// pointers.
///
/// If the pointers aren't i8*, they will be converted. If a TBAA tag is
MDNode *ScopeTag = nullptr,
MDNode *NoAliasTag = nullptr);
- /// \brief Create a vector fadd reduction intrinsic of the source vector.
+ /// Create a vector fadd reduction intrinsic of the source vector.
/// The first parameter is a scalar accumulator value for ordered reductions.
CallInst *CreateFAddReduce(Value *Acc, Value *Src);
- /// \brief Create a vector fmul reduction intrinsic of the source vector.
+ /// Create a vector fmul reduction intrinsic of the source vector.
/// The first parameter is a scalar accumulator value for ordered reductions.
CallInst *CreateFMulReduce(Value *Acc, Value *Src);
- /// \brief Create a vector int add reduction intrinsic of the source vector.
+ /// Create a vector int add reduction intrinsic of the source vector.
CallInst *CreateAddReduce(Value *Src);
- /// \brief Create a vector int mul reduction intrinsic of the source vector.
+ /// Create a vector int mul reduction intrinsic of the source vector.
CallInst *CreateMulReduce(Value *Src);
- /// \brief Create a vector int AND reduction intrinsic of the source vector.
+ /// Create a vector int AND reduction intrinsic of the source vector.
CallInst *CreateAndReduce(Value *Src);
- /// \brief Create a vector int OR reduction intrinsic of the source vector.
+ /// Create a vector int OR reduction intrinsic of the source vector.
CallInst *CreateOrReduce(Value *Src);
- /// \brief Create a vector int XOR reduction intrinsic of the source vector.
+ /// Create a vector int XOR reduction intrinsic of the source vector.
CallInst *CreateXorReduce(Value *Src);
- /// \brief Create a vector integer max reduction intrinsic of the source
+ /// Create a vector integer max reduction intrinsic of the source
/// vector.
CallInst *CreateIntMaxReduce(Value *Src, bool IsSigned = false);
- /// \brief Create a vector integer min reduction intrinsic of the source
+ /// Create a vector integer min reduction intrinsic of the source
/// vector.
CallInst *CreateIntMinReduce(Value *Src, bool IsSigned = false);
- /// \brief Create a vector float max reduction intrinsic of the source
+ /// Create a vector float max reduction intrinsic of the source
/// vector.
CallInst *CreateFPMaxReduce(Value *Src, bool NoNaN = false);
- /// \brief Create a vector float min reduction intrinsic of the source
+ /// Create a vector float min reduction intrinsic of the source
/// vector.
CallInst *CreateFPMinReduce(Value *Src, bool NoNaN = false);
- /// \brief Create a lifetime.start intrinsic.
+ /// Create a lifetime.start intrinsic.
///
/// If the pointer isn't i8* it will be converted.
CallInst *CreateLifetimeStart(Value *Ptr, ConstantInt *Size = nullptr);
- /// \brief Create a lifetime.end intrinsic.
+ /// Create a lifetime.end intrinsic.
///
/// If the pointer isn't i8* it will be converted.
CallInst *CreateLifetimeEnd(Value *Ptr, ConstantInt *Size = nullptr);
/// If the pointer isn't i8* it will be converted.
CallInst *CreateInvariantStart(Value *Ptr, ConstantInt *Size = nullptr);
- /// \brief Create a call to Masked Load intrinsic
+ /// Create a call to Masked Load intrinsic
CallInst *CreateMaskedLoad(Value *Ptr, unsigned Align, Value *Mask,
Value *PassThru = nullptr, const Twine &Name = "");
- /// \brief Create a call to Masked Store intrinsic
+ /// Create a call to Masked Store intrinsic
CallInst *CreateMaskedStore(Value *Val, Value *Ptr, unsigned Align,
Value *Mask);
- /// \brief Create a call to Masked Gather intrinsic
+ /// Create a call to Masked Gather intrinsic
CallInst *CreateMaskedGather(Value *Ptrs, unsigned Align,
Value *Mask = nullptr,
Value *PassThru = nullptr,
const Twine& Name = "");
- /// \brief Create a call to Masked Scatter intrinsic
+ /// Create a call to Masked Scatter intrinsic
CallInst *CreateMaskedScatter(Value *Val, Value *Ptrs, unsigned Align,
Value *Mask = nullptr);
- /// \brief Create an assume intrinsic call that allows the optimizer to
+ /// Create an assume intrinsic call that allows the optimizer to
/// assume that the provided condition will be true.
CallInst *CreateAssumption(Value *Cond);
- /// \brief Create a call to the experimental.gc.statepoint intrinsic to
+ /// Create a call to the experimental.gc.statepoint intrinsic to
/// start a new statepoint sequence.
CallInst *CreateGCStatepointCall(uint64_t ID, uint32_t NumPatchBytes,
Value *ActualCallee,
ArrayRef<Value *> GCArgs,
const Twine &Name = "");
- /// \brief Create a call to the experimental.gc.statepoint intrinsic to
+ /// Create a call to the experimental.gc.statepoint intrinsic to
/// start a new statepoint sequence.
CallInst *CreateGCStatepointCall(uint64_t ID, uint32_t NumPatchBytes,
Value *ActualCallee, uint32_t Flags,
ArrayRef<Value *> GCArgs,
const Twine &Name = "");
- /// \brief Conveninence function for the common case when CallArgs are filled
+ /// Conveninence function for the common case when CallArgs are filled
/// in using makeArrayRef(CS.arg_begin(), CS.arg_end()); Use needs to be
/// .get()'ed to get the Value pointer.
CallInst *CreateGCStatepointCall(uint64_t ID, uint32_t NumPatchBytes,
ArrayRef<Value *> GCArgs,
const Twine &Name = "");
- /// \brief Create an invoke to the experimental.gc.statepoint intrinsic to
+ /// Create an invoke to the experimental.gc.statepoint intrinsic to
/// start a new statepoint sequence.
InvokeInst *
CreateGCStatepointInvoke(uint64_t ID, uint32_t NumPatchBytes,
ArrayRef<Value *> DeoptArgs,
ArrayRef<Value *> GCArgs, const Twine &Name = "");
- /// \brief Create an invoke to the experimental.gc.statepoint intrinsic to
+ /// Create an invoke to the experimental.gc.statepoint intrinsic to
/// start a new statepoint sequence.
InvokeInst *CreateGCStatepointInvoke(
uint64_t ID, uint32_t NumPatchBytes, Value *ActualInvokee,
ArrayRef<Value *> DeoptArgs,
ArrayRef<Value *> GCArgs, const Twine &Name = "");
- /// \brief Create a call to the experimental.gc.result intrinsic to extract
+ /// Create a call to the experimental.gc.result intrinsic to extract
/// the result from a call wrapped in a statepoint.
CallInst *CreateGCResult(Instruction *Statepoint,
Type *ResultType,
const Twine &Name = "");
- /// \brief Create a call to the experimental.gc.relocate intrinsics to
+ /// Create a call to the experimental.gc.relocate intrinsics to
/// project the relocated value of one pointer from the statepoint.
CallInst *CreateGCRelocate(Instruction *Statepoint,
int BaseOffset,
}
private:
- /// \brief Create a call to a masked intrinsic with given Id.
+ /// Create a call to a masked intrinsic with given Id.
CallInst *CreateMaskedIntrinsic(Intrinsic::ID Id, ArrayRef<Value *> Ops,
ArrayRef<Type *> OverloadedTypes,
const Twine &Name = "");
Value *getCastedInt8PtrValue(Value *Ptr);
};
-/// \brief This provides a uniform API for creating instructions and inserting
+/// This provides a uniform API for creating instructions and inserting
/// them into a basic block: either at the end of a BasicBlock, or at a specific
/// iterator location in a block.
///
SetInsertPoint(TheBB, IP);
}
- /// \brief Get the constant folder being used.
+ /// Get the constant folder being used.
const T &getFolder() { return Folder; }
- /// \brief Insert and return the specified instruction.
+ /// Insert and return the specified instruction.
template<typename InstTy>
InstTy *Insert(InstTy *I, const Twine &Name = "") const {
this->InsertHelper(I, Name, BB, InsertPt);
return I;
}
- /// \brief No-op overload to handle constants.
+ /// No-op overload to handle constants.
Constant *Insert(Constant *C, const Twine& = "") const {
return C;
}
//===--------------------------------------------------------------------===//
private:
- /// \brief Helper to add branch weight and unpredictable metadata onto an
+ /// Helper to add branch weight and unpredictable metadata onto an
/// instruction.
/// \returns The annotated instruction.
template <typename InstTy>
}
public:
- /// \brief Create a 'ret void' instruction.
+ /// Create a 'ret void' instruction.
ReturnInst *CreateRetVoid() {
return Insert(ReturnInst::Create(Context));
}
- /// \brief Create a 'ret <val>' instruction.
+ /// Create a 'ret <val>' instruction.
ReturnInst *CreateRet(Value *V) {
return Insert(ReturnInst::Create(Context, V));
}
- /// \brief Create a sequence of N insertvalue instructions,
+ /// Create a sequence of N insertvalue instructions,
/// with one Value from the retVals array each, that build a aggregate
/// return value one value at a time, and a ret instruction to return
/// the resulting aggregate value.
return Insert(ReturnInst::Create(Context, V));
}
- /// \brief Create an unconditional 'br label X' instruction.
+ /// Create an unconditional 'br label X' instruction.
BranchInst *CreateBr(BasicBlock *Dest) {
return Insert(BranchInst::Create(Dest));
}
- /// \brief Create a conditional 'br Cond, TrueDest, FalseDest'
+ /// Create a conditional 'br Cond, TrueDest, FalseDest'
/// instruction.
BranchInst *CreateCondBr(Value *Cond, BasicBlock *True, BasicBlock *False,
MDNode *BranchWeights = nullptr,
BranchWeights, Unpredictable));
}
- /// \brief Create a conditional 'br Cond, TrueDest, FalseDest'
+ /// Create a conditional 'br Cond, TrueDest, FalseDest'
/// instruction. Copy branch meta data if available.
BranchInst *CreateCondBr(Value *Cond, BasicBlock *True, BasicBlock *False,
Instruction *MDSrc) {
return Insert(Br);
}
- /// \brief Create a switch instruction with the specified value, default dest,
+ /// Create a switch instruction with the specified value, default dest,
/// and with a hint for the number of cases that will be added (for efficient
/// allocation).
SwitchInst *CreateSwitch(Value *V, BasicBlock *Dest, unsigned NumCases = 10,
BranchWeights, Unpredictable));
}
- /// \brief Create an indirect branch instruction with the specified address
+ /// Create an indirect branch instruction with the specified address
/// operand, with an optional hint for the number of destinations that will be
/// added (for efficient allocation).
IndirectBrInst *CreateIndirectBr(Value *Addr, unsigned NumDests = 10) {
return Insert(IndirectBrInst::Create(Addr, NumDests));
}
- /// \brief Create an invoke instruction.
+ /// Create an invoke instruction.
InvokeInst *CreateInvoke(Value *Callee, BasicBlock *NormalDest,
BasicBlock *UnwindDest,
ArrayRef<Value *> Args = None,
return Insert(new AllocaInst(Ty, DL.getAllocaAddrSpace(), ArraySize), Name);
}
- /// \brief Provided to resolve 'CreateLoad(Ptr, "...")' correctly, instead of
+ /// Provided to resolve 'CreateLoad(Ptr, "...")' correctly, instead of
/// converting the string to 'bool' for the isVolatile parameter.
LoadInst *CreateLoad(Value *Ptr, const char *Name) {
return Insert(new LoadInst(Ptr), Name);
return Insert(new StoreInst(Val, Ptr, isVolatile));
}
- /// \brief Provided to resolve 'CreateAlignedLoad(Ptr, Align, "...")'
+ /// Provided to resolve 'CreateAlignedLoad(Ptr, Align, "...")'
/// correctly, instead of converting the string to 'bool' for the isVolatile
/// parameter.
LoadInst *CreateAlignedLoad(Value *Ptr, unsigned Align, const char *Name) {
return CreateConstInBoundsGEP2_32(Ty, Ptr, 0, Idx, Name);
}
- /// \brief Same as CreateGlobalString, but return a pointer with "i8*" type
+ /// Same as CreateGlobalString, but return a pointer with "i8*" type
/// instead of a pointer to array of i8.
Value *CreateGlobalStringPtr(StringRef Str, const Twine &Name = "",
unsigned AddressSpace = 0) {
return CreateCast(Instruction::SExt, V, DestTy, Name);
}
- /// \brief Create a ZExt or Trunc from the integer value V to DestTy. Return
+ /// Create a ZExt or Trunc from the integer value V to DestTy. Return
/// the value untouched if the type of V is already DestTy.
Value *CreateZExtOrTrunc(Value *V, Type *DestTy,
const Twine &Name = "") {
return V;
}
- /// \brief Create a SExt or Trunc from the integer value V to DestTy. Return
+ /// Create a SExt or Trunc from the integer value V to DestTy. Return
/// the value untouched if the type of V is already DestTy.
Value *CreateSExtOrTrunc(Value *V, Type *DestTy,
const Twine &Name = "") {
return Insert(CastInst::CreateFPCast(V, DestTy), Name);
}
- // \brief Provided to resolve 'CreateIntCast(Ptr, Ptr, "...")', giving a
+ // Provided to resolve 'CreateIntCast(Ptr, Ptr, "...")', giving a
// compile time error, instead of converting the string to bool for the
// isSigned parameter.
Value *CreateIntCast(Value *, Type *, const char *) = delete;
// Utility creation methods
//===--------------------------------------------------------------------===//
- /// \brief Return an i1 value testing if \p Arg is null.
+ /// Return an i1 value testing if \p Arg is null.
Value *CreateIsNull(Value *Arg, const Twine &Name = "") {
return CreateICmpEQ(Arg, Constant::getNullValue(Arg->getType()),
Name);
}
- /// \brief Return an i1 value testing if \p Arg is not null.
+ /// Return an i1 value testing if \p Arg is not null.
Value *CreateIsNotNull(Value *Arg, const Twine &Name = "") {
return CreateICmpNE(Arg, Constant::getNullValue(Arg->getType()),
Name);
}
- /// \brief Return the i64 difference between two pointer values, dividing out
+ /// Return the i64 difference between two pointer values, dividing out
/// the size of the pointed-to objects.
///
/// This is intended to implement C-style pointer subtraction. As such, the
Name);
}
- /// \brief Create an invariant.group.barrier intrinsic call, that stops
+ /// Create an invariant.group.barrier intrinsic call, that stops
/// optimizer to propagate equality using invariant.group metadata.
/// If Ptr type is different from pointer to i8, it's casted to pointer to i8
/// in the same address space before call and casted back to Ptr type after
return Fn;
}
- /// \brief Return a vector value that contains \arg V broadcasted to \p
+ /// Return a vector value that contains \arg V broadcasted to \p
/// NumElts elements.
Value *CreateVectorSplat(unsigned NumElts, Value *V, const Twine &Name = "") {
assert(NumElts > 0 && "Cannot splat to an empty vector!");
return CreateShuffleVector(V, Undef, Zeros, Name + ".splat");
}
- /// \brief Return a value that has been extracted from a larger integer type.
+ /// Return a value that has been extracted from a larger integer type.
Value *CreateExtractInteger(const DataLayout &DL, Value *From,
IntegerType *ExtractedTy, uint64_t Offset,
const Twine &Name) {
}
private:
- /// \brief Helper function that creates an assume intrinsic call that
+ /// Helper function that creates an assume intrinsic call that
/// represents an alignment assumption on the provided Ptr, Mask, Type
/// and Offset.
CallInst *CreateAlignmentAssumptionHelper(const DataLayout &DL,
}
public:
- /// \brief Create an assume intrinsic call that represents an alignment
+ /// Create an assume intrinsic call that represents an alignment
/// assumption on the provided pointer.
///
/// An optional offset can be provided, and if it is provided, the offset
OffsetValue);
}
- /// \brief Create an assume intrinsic call that represents an alignment
+ /// Create an assume intrinsic call that represents an alignment
/// assumption on the provided pointer.
///
/// An optional offset can be provided, and if it is provided, the offset
class raw_ostream;
template <typename IRUnitT, typename... ExtraArgTs> class AnalysisManager;
-/// \brief Create and return a pass that writes the module to the specified
+/// Create and return a pass that writes the module to the specified
/// \c raw_ostream.
ModulePass *createPrintModulePass(raw_ostream &OS,
const std::string &Banner = "",
bool ShouldPreserveUseListOrder = false);
-/// \brief Create and return a pass that prints functions to the specified
+/// Create and return a pass that prints functions to the specified
/// \c raw_ostream as they are processed.
FunctionPass *createPrintFunctionPass(raw_ostream &OS,
const std::string &Banner = "");
-/// \brief Create and return a pass that writes the BB to the specified
+/// Create and return a pass that writes the BB to the specified
/// \c raw_ostream.
BasicBlockPass *createPrintBasicBlockPass(raw_ostream &OS,
const std::string &Banner = "");
/// non-printable characters in it.
void printLLVMNameWithoutPrefix(raw_ostream &OS, StringRef Name);
-/// \brief Pass for printing a Module as LLVM's text IR assembly.
+/// Pass for printing a Module as LLVM's text IR assembly.
///
/// Note: This pass is for use with the new pass manager. Use the create...Pass
/// functions above to create passes for use with the legacy pass manager.
static StringRef name() { return "PrintModulePass"; }
};
-/// \brief Pass for printing a Function as LLVM's text IR assembly.
+/// Pass for printing a Function as LLVM's text IR assembly.
///
/// Note: This pass is for use with the new pass manager. Use the create...Pass
/// functions above to create passes for use with the legacy pass manager.
return isa<Instruction>(V) && classof(cast<Instruction>(V));
}
- // \brief Returns true if this terminator relates to exception handling.
+ // Returns true if this terminator relates to exception handling.
bool isExceptional() const {
switch (getOpcode()) {
case Instruction::CatchSwitch:
return idx < TermInst->getNumSuccessors();
}
- /// \brief Proxy object to allow write access in operator[]
+ /// Proxy object to allow write access in operator[]
class SuccessorProxy {
Self it;
/// Convenience accessors
- /// \brief Return the outer EH-pad this funclet is nested within.
+ /// Return the outer EH-pad this funclet is nested within.
///
/// Note: This returns the associated CatchSwitchInst if this FuncletPadInst
/// is a CatchPadInst.
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(FuncletPadInst, Value)
-/// \brief A lightweight accessor for an operand bundle meant to be passed
+/// A lightweight accessor for an operand bundle meant to be passed
/// around by value.
struct OperandBundleUse {
ArrayRef<Use> Inputs;
explicit OperandBundleUse(StringMapEntry<uint32_t> *Tag, ArrayRef<Use> Inputs)
: Inputs(Inputs), Tag(Tag) {}
- /// \brief Return true if the operand at index \p Idx in this operand bundle
+ /// Return true if the operand at index \p Idx in this operand bundle
/// has the attribute A.
bool operandHasAttr(unsigned Idx, Attribute::AttrKind A) const {
if (isDeoptOperandBundle())
return false;
}
- /// \brief Return the tag of this operand bundle as a string.
+ /// Return the tag of this operand bundle as a string.
StringRef getTagName() const {
return Tag->getKey();
}
- /// \brief Return the tag of this operand bundle as an integer.
+ /// Return the tag of this operand bundle as an integer.
///
/// Operand bundle tags are interned by LLVMContextImpl::getOrInsertBundleTag,
/// and this function returns the unique integer getOrInsertBundleTag
return Tag->getValue();
}
- /// \brief Return true if this is a "deopt" operand bundle.
+ /// Return true if this is a "deopt" operand bundle.
bool isDeoptOperandBundle() const {
return getTagID() == LLVMContext::OB_deopt;
}
- /// \brief Return true if this is a "funclet" operand bundle.
+ /// Return true if this is a "funclet" operand bundle.
bool isFuncletOperandBundle() const {
return getTagID() == LLVMContext::OB_funclet;
}
private:
- /// \brief Pointer to an entry in LLVMContextImpl::getOrInsertBundleTag.
+ /// Pointer to an entry in LLVMContextImpl::getOrInsertBundleTag.
StringMapEntry<uint32_t> *Tag;
};
-/// \brief A container for an operand bundle being viewed as a set of values
+/// A container for an operand bundle being viewed as a set of values
/// rather than a set of uses.
///
/// Unlike OperandBundleUse, OperandBundleDefT owns the memory it carries, and
using OperandBundleDef = OperandBundleDefT<Value *>;
using ConstOperandBundleDef = OperandBundleDefT<const Value *>;
-/// \brief A mixin to add operand bundle functionality to llvm instruction
+/// A mixin to add operand bundle functionality to llvm instruction
/// classes.
///
/// OperandBundleUser uses the descriptor area co-allocated with the host User
/// Currently operand bundle users with hung-off operands are not supported.
template <typename InstrTy, typename OpIteratorTy> class OperandBundleUser {
public:
- /// \brief Return the number of operand bundles associated with this User.
+ /// Return the number of operand bundles associated with this User.
unsigned getNumOperandBundles() const {
return std::distance(bundle_op_info_begin(), bundle_op_info_end());
}
- /// \brief Return true if this User has any operand bundles.
+ /// Return true if this User has any operand bundles.
bool hasOperandBundles() const { return getNumOperandBundles() != 0; }
- /// \brief Return the index of the first bundle operand in the Use array.
+ /// Return the index of the first bundle operand in the Use array.
unsigned getBundleOperandsStartIndex() const {
assert(hasOperandBundles() && "Don't call otherwise!");
return bundle_op_info_begin()->Begin;
}
- /// \brief Return the index of the last bundle operand in the Use array.
+ /// Return the index of the last bundle operand in the Use array.
unsigned getBundleOperandsEndIndex() const {
assert(hasOperandBundles() && "Don't call otherwise!");
return bundle_op_info_end()[-1].End;
Idx < getBundleOperandsEndIndex();
}
- /// \brief Return the total number operands (not operand bundles) used by
+ /// Return the total number operands (not operand bundles) used by
/// every operand bundle in this OperandBundleUser.
unsigned getNumTotalBundleOperands() const {
if (!hasOperandBundles())
return End - Begin;
}
- /// \brief Return the operand bundle at a specific index.
+ /// Return the operand bundle at a specific index.
OperandBundleUse getOperandBundleAt(unsigned Index) const {
assert(Index < getNumOperandBundles() && "Index out of bounds!");
return operandBundleFromBundleOpInfo(*(bundle_op_info_begin() + Index));
}
- /// \brief Return the number of operand bundles with the tag Name attached to
+ /// Return the number of operand bundles with the tag Name attached to
/// this instruction.
unsigned countOperandBundlesOfType(StringRef Name) const {
unsigned Count = 0;
return Count;
}
- /// \brief Return the number of operand bundles with the tag ID attached to
+ /// Return the number of operand bundles with the tag ID attached to
/// this instruction.
unsigned countOperandBundlesOfType(uint32_t ID) const {
unsigned Count = 0;
return Count;
}
- /// \brief Return an operand bundle by name, if present.
+ /// Return an operand bundle by name, if present.
///
/// It is an error to call this for operand bundle types that may have
/// multiple instances of them on the same instruction.
return None;
}
- /// \brief Return an operand bundle by tag ID, if present.
+ /// Return an operand bundle by tag ID, if present.
///
/// It is an error to call this for operand bundle types that may have
/// multiple instances of them on the same instruction.
return None;
}
- /// \brief Return the list of operand bundles attached to this instruction as
+ /// Return the list of operand bundles attached to this instruction as
/// a vector of OperandBundleDefs.
///
/// This function copies the OperandBundeUse instances associated with this
Defs.emplace_back(getOperandBundleAt(i));
}
- /// \brief Return the operand bundle for the operand at index OpIdx.
+ /// Return the operand bundle for the operand at index OpIdx.
///
/// It is an error to call this with an OpIdx that does not correspond to an
/// bundle operand.
return operandBundleFromBundleOpInfo(getBundleOpInfoForOperand(OpIdx));
}
- /// \brief Return true if this operand bundle user has operand bundles that
+ /// Return true if this operand bundle user has operand bundles that
/// may read from the heap.
bool hasReadingOperandBundles() const {
// Implementation note: this is a conservative implementation of operand
return hasOperandBundles();
}
- /// \brief Return true if this operand bundle user has operand bundles that
+ /// Return true if this operand bundle user has operand bundles that
/// may write to the heap.
bool hasClobberingOperandBundles() const {
for (auto &BOI : bundle_op_infos()) {
return false;
}
- /// \brief Return true if the bundle operand at index \p OpIdx has the
+ /// Return true if the bundle operand at index \p OpIdx has the
/// attribute \p A.
bool bundleOperandHasAttr(unsigned OpIdx, Attribute::AttrKind A) const {
auto &BOI = getBundleOpInfoForOperand(OpIdx);
return OBU.operandHasAttr(OpIdx - BOI.Begin, A);
}
- /// \brief Return true if \p Other has the same sequence of operand bundle
+ /// Return true if \p Other has the same sequence of operand bundle
/// tags with the same number of operands on each one of them as this
/// OperandBundleUser.
bool hasIdenticalOperandBundleSchema(
Other.bundle_op_info_begin());
}
- /// \brief Return true if this operand bundle user contains operand bundles
+ /// Return true if this operand bundle user contains operand bundles
/// with tags other than those specified in \p IDs.
bool hasOperandBundlesOtherThan(ArrayRef<uint32_t> IDs) const {
for (unsigned i = 0, e = getNumOperandBundles(); i != e; ++i) {
}
protected:
- /// \brief Is the function attribute S disallowed by some operand bundle on
+ /// Is the function attribute S disallowed by some operand bundle on
/// this operand bundle user?
bool isFnAttrDisallowedByOpBundle(StringRef S) const {
// Operand bundles only possibly disallow readnone, readonly and argmenonly
return false;
}
- /// \brief Is the function attribute A disallowed by some operand bundle on
+ /// Is the function attribute A disallowed by some operand bundle on
/// this operand bundle user?
bool isFnAttrDisallowedByOpBundle(Attribute::AttrKind A) const {
switch (A) {
llvm_unreachable("switch has a default case!");
}
- /// \brief Used to keep track of an operand bundle. See the main comment on
+ /// Used to keep track of an operand bundle. See the main comment on
/// OperandBundleUser above.
struct BundleOpInfo {
- /// \brief The operand bundle tag, interned by
+ /// The operand bundle tag, interned by
/// LLVMContextImpl::getOrInsertBundleTag.
StringMapEntry<uint32_t> *Tag;
- /// \brief The index in the Use& vector where operands for this operand
+ /// The index in the Use& vector where operands for this operand
/// bundle starts.
uint32_t Begin;
- /// \brief The index in the Use& vector where operands for this operand
+ /// The index in the Use& vector where operands for this operand
/// bundle ends.
uint32_t End;
}
};
- /// \brief Simple helper function to map a BundleOpInfo to an
+ /// Simple helper function to map a BundleOpInfo to an
/// OperandBundleUse.
OperandBundleUse
operandBundleFromBundleOpInfo(const BundleOpInfo &BOI) const {
using bundle_op_iterator = BundleOpInfo *;
using const_bundle_op_iterator = const BundleOpInfo *;
- /// \brief Return the start of the list of BundleOpInfo instances associated
+ /// Return the start of the list of BundleOpInfo instances associated
/// with this OperandBundleUser.
bundle_op_iterator bundle_op_info_begin() {
if (!static_cast<InstrTy *>(this)->hasDescriptor())
return reinterpret_cast<bundle_op_iterator>(BytesBegin);
}
- /// \brief Return the start of the list of BundleOpInfo instances associated
+ /// Return the start of the list of BundleOpInfo instances associated
/// with this OperandBundleUser.
const_bundle_op_iterator bundle_op_info_begin() const {
auto *NonConstThis =
return NonConstThis->bundle_op_info_begin();
}
- /// \brief Return the end of the list of BundleOpInfo instances associated
+ /// Return the end of the list of BundleOpInfo instances associated
/// with this OperandBundleUser.
bundle_op_iterator bundle_op_info_end() {
if (!static_cast<InstrTy *>(this)->hasDescriptor())
return reinterpret_cast<bundle_op_iterator>(BytesEnd);
}
- /// \brief Return the end of the list of BundleOpInfo instances associated
+ /// Return the end of the list of BundleOpInfo instances associated
/// with this OperandBundleUser.
const_bundle_op_iterator bundle_op_info_end() const {
auto *NonConstThis =
return NonConstThis->bundle_op_info_end();
}
- /// \brief Return the range [\p bundle_op_info_begin, \p bundle_op_info_end).
+ /// Return the range [\p bundle_op_info_begin, \p bundle_op_info_end).
iterator_range<bundle_op_iterator> bundle_op_infos() {
return make_range(bundle_op_info_begin(), bundle_op_info_end());
}
- /// \brief Return the range [\p bundle_op_info_begin, \p bundle_op_info_end).
+ /// Return the range [\p bundle_op_info_begin, \p bundle_op_info_end).
iterator_range<const_bundle_op_iterator> bundle_op_infos() const {
return make_range(bundle_op_info_begin(), bundle_op_info_end());
}
- /// \brief Populate the BundleOpInfo instances and the Use& vector from \p
+ /// Populate the BundleOpInfo instances and the Use& vector from \p
/// Bundles. Return the op_iterator pointing to the Use& one past the last
/// last bundle operand use.
///
return It;
}
- /// \brief Return the BundleOpInfo for the operand at index OpIdx.
+ /// Return the BundleOpInfo for the operand at index OpIdx.
///
/// It is an error to call this with an OpIdx that does not correspond to an
/// bundle operand.
llvm_unreachable("Did not find operand bundle for operand!");
}
- /// \brief Return the total number of values used in \p Bundles.
+ /// Return the total number of values used in \p Bundles.
static unsigned CountBundleInputs(ArrayRef<OperandBundleDef> Bundles) {
unsigned Total = 0;
for (auto &B : Bundles)
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines all of the WebAssembly-specific intrinsics.
+/// This file defines all of the WebAssembly-specific intrinsics.
///
//===----------------------------------------------------------------------===//
/// to caller.
std::unique_ptr<DiagnosticHandler> getDiagnosticHandler();
- /// \brief Return if a code hotness metric should be included in optimization
+ /// Return if a code hotness metric should be included in optimization
/// diagnostics.
bool getDiagnosticsHotnessRequested() const;
- /// \brief Set if a code hotness metric should be included in optimization
+ /// Set if a code hotness metric should be included in optimization
/// diagnostics.
void setDiagnosticsHotnessRequested(bool Requested);
- /// \brief Return the minimum hotness value a diagnostic would need in order
+ /// Return the minimum hotness value a diagnostic would need in order
/// to be included in optimization diagnostics. If there is no minimum, this
/// returns None.
uint64_t getDiagnosticsHotnessThreshold() const;
- /// \brief Set the minimum hotness value a diagnostic needs in order to be
+ /// Set the minimum hotness value a diagnostic needs in order to be
/// included in optimization diagnostics.
void setDiagnosticsHotnessThreshold(uint64_t Threshold);
- /// \brief Return the YAML file used by the backend to save optimization
+ /// Return the YAML file used by the backend to save optimization
/// diagnostics. If null, diagnostics are not saved in a file but only
/// emitted via the diagnostic handler.
yaml::Output *getDiagnosticsOutputFile();
/// set, the handler is invoked for each diagnostic message.
void setDiagnosticsOutputFile(std::unique_ptr<yaml::Output> F);
- /// \brief Get the prefix that should be printed in front of a diagnostic of
+ /// Get the prefix that should be printed in front of a diagnostic of
/// the given \p Severity
static const char *getDiagnosticMessagePrefix(DiagnosticSeverity Severity);
- /// \brief Report a message to the currently installed diagnostic handler.
+ /// Report a message to the currently installed diagnostic handler.
///
/// This function returns, in particular in the case of error reporting
/// (DI.Severity == \a DS_Error), so the caller should leave the compilation
/// "warning: " for \a DS_Warning, and "note: " for \a DS_Note.
void diagnose(const DiagnosticInfo &DI);
- /// \brief Registers a yield callback with the given context.
+ /// Registers a yield callback with the given context.
///
/// The yield callback function may be called by LLVM to transfer control back
/// to the client that invoked the LLVM compilation. This can be used to yield
/// control to LLVM. Other LLVM contexts are unaffected by this restriction.
void setYieldCallback(YieldCallbackTy Callback, void *OpaqueHandle);
- /// \brief Calls the yield callback (if applicable).
+ /// Calls the yield callback (if applicable).
///
/// This transfers control of the current thread back to the client, which may
/// suspend the current thread. Only call this method when LLVM doesn't hold
void emitError(const Instruction *I, const Twine &ErrorStr);
void emitError(const Twine &ErrorStr);
- /// \brief Query for a debug option's value.
+ /// Query for a debug option's value.
///
/// This function returns typed data populated from command line parsing.
template <typename ValT, typename Base, ValT(Base::*Mem)>
return OptionRegistry::instance().template get<ValT, Base, Mem>();
}
- /// \brief Access the object which can disable optional passes and individual
+ /// Access the object which can disable optional passes and individual
/// optimizations at compile time.
OptPassGate &getOptPassGate() const;
- /// \brief Set the object which can disable optional passes and individual
+ /// Set the object which can disable optional passes and individual
/// optimizations at compile time.
///
/// The lifetime of the object must be guaranteed to extend as long as the
public:
MDBuilder(LLVMContext &context) : Context(context) {}
- /// \brief Return the given string as metadata.
+ /// Return the given string as metadata.
MDString *createString(StringRef Str);
- /// \brief Return the given constant as metadata.
+ /// Return the given constant as metadata.
ConstantAsMetadata *createConstant(Constant *C);
//===------------------------------------------------------------------===//
// FPMath metadata.
//===------------------------------------------------------------------===//
- /// \brief Return metadata with the given settings. The special value 0.0
+ /// Return metadata with the given settings. The special value 0.0
/// for the Accuracy parameter indicates the default (maximal precision)
/// setting.
MDNode *createFPMath(float Accuracy);
// Prof metadata.
//===------------------------------------------------------------------===//
- /// \brief Return metadata containing two branch weights.
+ /// Return metadata containing two branch weights.
MDNode *createBranchWeights(uint32_t TrueWeight, uint32_t FalseWeight);
- /// \brief Return metadata containing a number of branch weights.
+ /// Return metadata containing a number of branch weights.
MDNode *createBranchWeights(ArrayRef<uint32_t> Weights);
/// Return metadata specifying that a branch or switch is unpredictable.
// Range metadata.
//===------------------------------------------------------------------===//
- /// \brief Return metadata describing the range [Lo, Hi).
+ /// Return metadata describing the range [Lo, Hi).
MDNode *createRange(const APInt &Lo, const APInt &Hi);
- /// \brief Return metadata describing the range [Lo, Hi).
+ /// Return metadata describing the range [Lo, Hi).
MDNode *createRange(Constant *Lo, Constant *Hi);
//===------------------------------------------------------------------===//
// Callees metadata.
//===------------------------------------------------------------------===//
- /// \brief Return metadata indicating the possible callees of indirect
+ /// Return metadata indicating the possible callees of indirect
/// calls.
MDNode *createCallees(ArrayRef<Function *> Callees);
//===------------------------------------------------------------------===//
protected:
- /// \brief Return metadata appropriate for a AA root node (scope or TBAA).
+ /// Return metadata appropriate for a AA root node (scope or TBAA).
/// Each returned node is distinct from all other metadata and will never
/// be identified (uniqued) with anything else.
MDNode *createAnonymousAARoot(StringRef Name = StringRef(),
MDNode *Extra = nullptr);
public:
- /// \brief Return metadata appropriate for a TBAA root node. Each returned
+ /// Return metadata appropriate for a TBAA root node. Each returned
/// node is distinct from all other metadata and will never be identified
/// (uniqued) with anything else.
MDNode *createAnonymousTBAARoot() {
return createAnonymousAARoot();
}
- /// \brief Return metadata appropriate for an alias scope domain node.
+ /// Return metadata appropriate for an alias scope domain node.
/// Each returned node is distinct from all other metadata and will never
/// be identified (uniqued) with anything else.
MDNode *createAnonymousAliasScopeDomain(StringRef Name = StringRef()) {
return createAnonymousAARoot(Name);
}
- /// \brief Return metadata appropriate for an alias scope root node.
+ /// Return metadata appropriate for an alias scope root node.
/// Each returned node is distinct from all other metadata and will never
/// be identified (uniqued) with anything else.
MDNode *createAnonymousAliasScope(MDNode *Domain,
return createAnonymousAARoot(Name, Domain);
}
- /// \brief Return metadata appropriate for a TBAA root node with the given
+ /// Return metadata appropriate for a TBAA root node with the given
/// name. This may be identified (uniqued) with other roots with the same
/// name.
MDNode *createTBAARoot(StringRef Name);
- /// \brief Return metadata appropriate for an alias scope domain node with
+ /// Return metadata appropriate for an alias scope domain node with
/// the given name. This may be identified (uniqued) with other roots with
/// the same name.
MDNode *createAliasScopeDomain(StringRef Name);
- /// \brief Return metadata appropriate for an alias scope node with
+ /// Return metadata appropriate for an alias scope node with
/// the given name. This may be identified (uniqued) with other scopes with
/// the same name and domain.
MDNode *createAliasScope(StringRef Name, MDNode *Domain);
- /// \brief Return metadata for a non-root TBAA node with the given name,
+ /// Return metadata for a non-root TBAA node with the given name,
/// parent in the TBAA tree, and value for 'pointsToConstantMemory'.
MDNode *createTBAANode(StringRef Name, MDNode *Parent,
bool isConstant = false);
Offset(Offset), Size(Size), Type(Type) {}
};
- /// \brief Return metadata for a tbaa.struct node with the given
+ /// Return metadata for a tbaa.struct node with the given
/// struct field descriptions.
MDNode *createTBAAStructNode(ArrayRef<TBAAStructField> Fields);
- /// \brief Return metadata for a TBAA struct node in the type DAG
+ /// Return metadata for a TBAA struct node in the type DAG
/// with the given name, a list of pairs (offset, field type in the type DAG).
MDNode *
createTBAAStructTypeNode(StringRef Name,
ArrayRef<std::pair<MDNode *, uint64_t>> Fields);
- /// \brief Return metadata for a TBAA scalar type node with the
+ /// Return metadata for a TBAA scalar type node with the
/// given name, an offset and a parent in the TBAA type DAG.
MDNode *createTBAAScalarTypeNode(StringRef Name, MDNode *Parent,
uint64_t Offset = 0);
- /// \brief Return metadata for a TBAA tag node with the given
+ /// Return metadata for a TBAA tag node with the given
/// base type, access type and offset relative to the base type.
MDNode *createTBAAStructTagNode(MDNode *BaseType, MDNode *AccessType,
uint64_t Offset, bool IsConstant = false);
- /// \brief Return metadata for a TBAA type node in the TBAA type DAG with the
+ /// Return metadata for a TBAA type node in the TBAA type DAG with the
/// given parent type, size in bytes, type identifier and a list of fields.
MDNode *createTBAATypeNode(MDNode *Parent, uint64_t Size, Metadata *Id,
ArrayRef<TBAAStructField> Fields =
ArrayRef<TBAAStructField>());
- /// \brief Return metadata for a TBAA access tag with the given base type,
+ /// Return metadata for a TBAA access tag with the given base type,
/// final access type, offset of the access relative to the base type, size of
/// the access and flag indicating whether the accessed object can be
/// considered immutable for the purposes of the TBAA analysis.
uint64_t Offset, uint64_t Size,
bool IsImmutable = false);
- /// \brief Return mutable version of the given mutable or immutable TBAA
+ /// Return mutable version of the given mutable or immutable TBAA
/// access tag.
MDNode *createMutableTBAAAccessTag(MDNode *Tag);
- /// \brief Return metadata containing an irreducible loop header weight.
+ /// Return metadata containing an irreducible loop header weight.
MDNode *createIrrLoopHeaderWeight(uint64_t Weight);
};
DEBUG_METADATA_VERSION = 3 // Current debug info version number.
};
-/// \brief Root of the metadata hierarchy.
+/// Root of the metadata hierarchy.
///
/// This is a root class for typeless data in the IR.
class Metadata {
friend class ReplaceableMetadataImpl;
- /// \brief RTTI.
+ /// RTTI.
const unsigned char SubclassID;
protected:
- /// \brief Active type of storage.
+ /// Active type of storage.
enum StorageType { Uniqued, Distinct, Temporary };
- /// \brief Storage flag for non-uniqued, otherwise unowned, metadata.
+ /// Storage flag for non-uniqued, otherwise unowned, metadata.
unsigned char Storage;
// TODO: expose remaining bits to subclasses.
~Metadata() = default;
- /// \brief Default handling of a changed operand, which asserts.
+ /// Default handling of a changed operand, which asserts.
///
/// If subclasses pass themselves in as owners to a tracking node reference,
/// they must provide an implementation of this method.
public:
unsigned getMetadataID() const { return SubclassID; }
- /// \brief User-friendly dump.
+ /// User-friendly dump.
///
/// If \c M is provided, metadata nodes will be numbered canonically;
/// otherwise, pointer addresses are substituted.
void dump(const Module *M) const;
/// @}
- /// \brief Print.
+ /// Print.
///
/// Prints definition of \c this.
///
bool IsForDebug = false) const;
/// @}
- /// \brief Print as operand.
+ /// Print as operand.
///
/// Prints reference of \c this.
///
return OS;
}
-/// \brief Metadata wrapper in the Value hierarchy.
+/// Metadata wrapper in the Value hierarchy.
///
/// A member of the \a Value hierarchy to represent a reference to metadata.
/// This allows, e.g., instrinsics to have metadata as operands.
MetadataAsValue(Type *Ty, Metadata *MD);
- /// \brief Drop use of metadata (during teardown).
+ /// Drop use of metadata (during teardown).
void dropUse() { MD = nullptr; }
public:
void untrack();
};
-/// \brief API for tracking metadata references through RAUW and deletion.
+/// API for tracking metadata references through RAUW and deletion.
///
/// Shared API for updating \a Metadata pointers in subclasses that support
/// RAUW.
/// user-friendly tracking reference.
class MetadataTracking {
public:
- /// \brief Track the reference to metadata.
+ /// Track the reference to metadata.
///
/// Register \c MD with \c *MD, if the subclass supports tracking. If \c *MD
/// gets RAUW'ed, \c MD will be updated to the new address. If \c *MD gets
return track(&MD, *MD, static_cast<Metadata *>(nullptr));
}
- /// \brief Track the reference to metadata for \a Metadata.
+ /// Track the reference to metadata for \a Metadata.
///
/// As \a track(Metadata*&), but with support for calling back to \c Owner to
/// tell it that its operand changed. This could trigger \c Owner being
return track(Ref, MD, &Owner);
}
- /// \brief Track the reference to metadata for \a MetadataAsValue.
+ /// Track the reference to metadata for \a MetadataAsValue.
///
/// As \a track(Metadata*&), but with support for calling back to \c Owner to
/// tell it that its operand changed. This could trigger \c Owner being
return track(Ref, MD, &Owner);
}
- /// \brief Stop tracking a reference to metadata.
+ /// Stop tracking a reference to metadata.
///
/// Stops \c *MD from tracking \c MD.
static void untrack(Metadata *&MD) { untrack(&MD, *MD); }
static void untrack(void *Ref, Metadata &MD);
- /// \brief Move tracking from one reference to another.
+ /// Move tracking from one reference to another.
///
/// Semantically equivalent to \c untrack(MD) followed by \c track(New),
/// except that ownership callbacks are maintained.
}
static bool retrack(void *Ref, Metadata &MD, void *New);
- /// \brief Check whether metadata is replaceable.
+ /// Check whether metadata is replaceable.
static bool isReplaceable(const Metadata &MD);
using OwnerTy = PointerUnion<MetadataAsValue *, Metadata *>;
private:
- /// \brief Track a reference to metadata for an owner.
+ /// Track a reference to metadata for an owner.
///
/// Generalized version of tracking.
static bool track(void *Ref, Metadata &MD, OwnerTy Owner);
};
-/// \brief Shared implementation of use-lists for replaceable metadata.
+/// Shared implementation of use-lists for replaceable metadata.
///
/// Most metadata cannot be RAUW'ed. This is a shared implementation of
/// use-lists and associated API for the two that support it (\a ValueAsMetadata
LLVMContext &getContext() const { return Context; }
- /// \brief Replace all uses of this with MD.
+ /// Replace all uses of this with MD.
///
/// Replace all uses of this with \c MD, which is allowed to be null.
void replaceAllUsesWith(Metadata *MD);
- /// \brief Resolve all uses of this.
+ /// Resolve all uses of this.
///
/// Resolve all uses of this, turning off RAUW permanently. If \c
/// ResolveUsers, call \a MDNode::resolve() on any users whose last operand
static bool isReplaceable(const Metadata &MD);
};
-/// \brief Value wrapper in the Metadata hierarchy.
+/// Value wrapper in the Metadata hierarchy.
///
/// This is a custom value handle that allows other metadata to refer to
/// classes in the Value hierarchy.
Value *V;
- /// \brief Drop users without RAUW (during teardown).
+ /// Drop users without RAUW (during teardown).
void dropUsers() {
ReplaceableMetadataImpl::resolveAllUses(/* ResolveUsers */ false);
}
static void handleRAUW(Value *From, Value *To);
protected:
- /// \brief Handle collisions after \a Value::replaceAllUsesWith().
+ /// Handle collisions after \a Value::replaceAllUsesWith().
///
/// RAUW isn't supported directly for \a ValueAsMetadata, but if the wrapped
/// \a Value gets RAUW'ed and the target already exists, this is used to
}
};
-/// \brief Transitional API for extracting constants from Metadata.
+/// Transitional API for extracting constants from Metadata.
///
/// This namespace contains transitional functions for metadata that points to
/// \a Constants.
} // end namespace detail
-/// \brief Check whether Metadata has a Value.
+/// Check whether Metadata has a Value.
///
/// As an analogue to \a isa(), check whether \c MD has an \a Value inside of
/// type \c X.
return hasa(&MD);
}
-/// \brief Extract a Value from Metadata.
+/// Extract a Value from Metadata.
///
/// As an analogue to \a cast(), extract the \a Value subclass \c X from \c MD.
template <class X, class Y>
return extract(&MD);
}
-/// \brief Extract a Value from Metadata, allowing null.
+/// Extract a Value from Metadata, allowing null.
///
/// As an analogue to \a cast_or_null(), extract the \a Value subclass \c X
/// from \c MD, allowing \c MD to be null.
return nullptr;
}
-/// \brief Extract a Value from Metadata, if any.
+/// Extract a Value from Metadata, if any.
///
/// As an analogue to \a dyn_cast_or_null(), extract the \a Value subclass \c X
/// from \c MD, return null if \c MD doesn't contain a \a Value or if the \a
return nullptr;
}
-/// \brief Extract a Value from Metadata, if any, allowing null.
+/// Extract a Value from Metadata, if any, allowing null.
///
/// As an analogue to \a dyn_cast_or_null(), extract the \a Value subclass \c X
/// from \c MD, return null if \c MD doesn't contain a \a Value or if the \a
} // end namespace mdconst
//===----------------------------------------------------------------------===//
-/// \brief A single uniqued string.
+/// A single uniqued string.
///
/// These are used to efficiently contain a byte sequence for metadata.
/// MDString is always unnamed.
using iterator = StringRef::iterator;
- /// \brief Pointer to the first byte of the string.
+ /// Pointer to the first byte of the string.
iterator begin() const { return getString().begin(); }
- /// \brief Pointer to one byte past the end of the string.
+ /// Pointer to one byte past the end of the string.
iterator end() const { return getString().end(); }
const unsigned char *bytes_begin() const { return getString().bytes_begin(); }
const unsigned char *bytes_end() const { return getString().bytes_end(); }
- /// \brief Methods for support type inquiry through isa, cast, and dyn_cast.
+ /// Methods for support type inquiry through isa, cast, and dyn_cast.
static bool classof(const Metadata *MD) {
return MD->getMetadataID() == MDStringKind;
}
};
-/// \brief A collection of metadata nodes that might be associated with a
+/// A collection of metadata nodes that might be associated with a
/// memory access used by the alias-analysis infrastructure.
struct AAMDNodes {
explicit AAMDNodes(MDNode *T = nullptr, MDNode *S = nullptr,
explicit operator bool() const { return TBAA || Scope || NoAlias; }
- /// \brief The tag for type-based alias analysis.
+ /// The tag for type-based alias analysis.
MDNode *TBAA;
- /// \brief The tag for alias scope specification (used with noalias).
+ /// The tag for alias scope specification (used with noalias).
MDNode *Scope;
- /// \brief The tag specifying the noalias scope.
+ /// The tag specifying the noalias scope.
MDNode *NoAlias;
- /// \brief Given two sets of AAMDNodes that apply to the same pointer,
+ /// Given two sets of AAMDNodes that apply to the same pointer,
/// give the best AAMDNodes that are compatible with both (i.e. a set of
/// nodes whose allowable aliasing conclusions are a subset of those
/// allowable by both of the inputs). However, for efficiency
}
};
-/// \brief Tracking metadata reference owned by Metadata.
+/// Tracking metadata reference owned by Metadata.
///
/// Similar to \a TrackingMDRef, but it's expected to be owned by an instance
/// of \a Metadata, which has the option of registering itself for callbacks to
static SimpleType getSimplifiedValue(const MDOperand &MD) { return MD.get(); }
};
-/// \brief Pointer to the context, with optional RAUW support.
+/// Pointer to the context, with optional RAUW support.
///
/// Either a raw (non-null) pointer to the \a LLVMContext, or an owned pointer
/// to \a ReplaceableMetadataImpl (which has a reference to \a LLVMContext).
operator LLVMContext &() { return getContext(); }
- /// \brief Whether this contains RAUW support.
+ /// Whether this contains RAUW support.
bool hasReplaceableUses() const {
return Ptr.is<ReplaceableMetadataImpl *>();
}
return getReplaceableUses();
}
- /// \brief Assign RAUW support to this.
+ /// Assign RAUW support to this.
///
/// Make this replaceable, taking ownership of \c ReplaceableUses (which must
/// not be null).
Ptr = ReplaceableUses.release();
}
- /// \brief Drop RAUW support.
+ /// Drop RAUW support.
///
/// Cede ownership of RAUW support, returning it.
std::unique_ptr<ReplaceableMetadataImpl> takeReplaceableUses() {
#define HANDLE_MDNODE_BRANCH(CLASS) HANDLE_MDNODE_LEAF(CLASS)
#include "llvm/IR/Metadata.def"
-/// \brief Metadata node.
+/// Metadata node.
///
/// Metadata nodes can be uniqued, like constants, or distinct. Temporary
/// metadata nodes (with full support for RAUW) can be used to delay uniquing
void *operator new(size_t Size, unsigned NumOps);
void operator delete(void *Mem);
- /// \brief Required by std, but never called.
+ /// Required by std, but never called.
void operator delete(void *, unsigned) {
llvm_unreachable("Constructor throws?");
}
- /// \brief Required by std, but never called.
+ /// Required by std, but never called.
void operator delete(void *, unsigned, bool) {
llvm_unreachable("Constructor throws?");
}
static inline TempMDTuple getTemporary(LLVMContext &Context,
ArrayRef<Metadata *> MDs);
- /// \brief Create a (temporary) clone of this.
+ /// Create a (temporary) clone of this.
TempMDNode clone() const;
- /// \brief Deallocate a node created by getTemporary.
+ /// Deallocate a node created by getTemporary.
///
/// Calls \c replaceAllUsesWith(nullptr) before deleting, so any remaining
/// references will be reset.
LLVMContext &getContext() const { return Context.getContext(); }
- /// \brief Replace a specific operand.
+ /// Replace a specific operand.
void replaceOperandWith(unsigned I, Metadata *New);
- /// \brief Check if node is fully resolved.
+ /// Check if node is fully resolved.
///
/// If \a isTemporary(), this always returns \c false; if \a isDistinct(),
/// this always returns \c true.
bool isDistinct() const { return Storage == Distinct; }
bool isTemporary() const { return Storage == Temporary; }
- /// \brief RAUW a temporary.
+ /// RAUW a temporary.
///
/// \pre \a isTemporary() must be \c true.
void replaceAllUsesWith(Metadata *MD) {
Context.getReplaceableUses()->replaceAllUsesWith(MD);
}
- /// \brief Resolve cycles.
+ /// Resolve cycles.
///
/// Once all forward declarations have been resolved, force cycles to be
/// resolved.
/// Resolve a unique, unresolved node.
void resolve();
- /// \brief Replace a temporary node with a permanent one.
+ /// Replace a temporary node with a permanent one.
///
/// Try to create a uniqued version of \c N -- in place, if possible -- and
/// return it. If \c N cannot be uniqued, return a distinct node instead.
return cast<T>(N.release()->replaceWithPermanentImpl());
}
- /// \brief Replace a temporary node with a uniqued one.
+ /// Replace a temporary node with a uniqued one.
///
/// Create a uniqued version of \c N -- in place, if possible -- and return
/// it. Takes ownership of the temporary node.
return cast<T>(N.release()->replaceWithUniquedImpl());
}
- /// \brief Replace a temporary node with a distinct one.
+ /// Replace a temporary node with a distinct one.
///
/// Create a distinct version of \c N -- in place, if possible -- and return
/// it. Takes ownership of the temporary node.
MDNode *replaceWithDistinctImpl();
protected:
- /// \brief Set an operand.
+ /// Set an operand.
///
/// Sets the operand directly, without worrying about uniquing.
void setOperand(unsigned I, Metadata *New);
void decrementUnresolvedOperandCount();
void countUnresolvedOperands();
- /// \brief Mutate this to be "uniqued".
+ /// Mutate this to be "uniqued".
///
/// Mutate this so that \a isUniqued().
/// \pre \a isTemporary().
/// \pre already added to uniquing set.
void makeUniqued();
- /// \brief Mutate this to be "distinct".
+ /// Mutate this to be "distinct".
///
/// Mutate this so that \a isDistinct().
/// \pre \a isTemporary().
return op_begin()[I];
}
- /// \brief Return number of MDNode operands.
+ /// Return number of MDNode operands.
unsigned getNumOperands() const { return NumOperands; }
- /// \brief Methods for support type inquiry through isa, cast, and dyn_cast:
+ /// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const Metadata *MD) {
switch (MD->getMetadataID()) {
default:
}
}
- /// \brief Check whether MDNode is a vtable access.
+ /// Check whether MDNode is a vtable access.
bool isTBAAVtableAccess() const;
- /// \brief Methods for metadata merging.
+ /// Methods for metadata merging.
static MDNode *concatenate(MDNode *A, MDNode *B);
static MDNode *intersect(MDNode *A, MDNode *B);
static MDNode *getMostGenericTBAA(MDNode *A, MDNode *B);
static MDNode *getMostGenericAlignmentOrDereferenceable(MDNode *A, MDNode *B);
};
-/// \brief Tuple of metadata.
+/// Tuple of metadata.
///
/// This is the simple \a MDNode arbitrary tuple. Nodes are uniqued by
/// default based on their operands.
}
public:
- /// \brief Get the hash, if any.
+ /// Get the hash, if any.
unsigned getHash() const { return SubclassData32; }
static MDTuple *get(LLVMContext &Context, ArrayRef<Metadata *> MDs) {
return getImpl(Context, MDs, Uniqued, /* ShouldCreate */ false);
}
- /// \brief Return a distinct node.
+ /// Return a distinct node.
///
/// Return a distinct node -- i.e., a node that is not uniqued.
static MDTuple *getDistinct(LLVMContext &Context, ArrayRef<Metadata *> MDs) {
return getImpl(Context, MDs, Distinct);
}
- /// \brief Return a temporary node.
+ /// Return a temporary node.
///
/// For use in constructing cyclic MDNode structures. A temporary MDNode is
/// not uniqued, may be RAUW'd, and must be manually deleted with
return TempMDTuple(getImpl(Context, MDs, Temporary));
}
- /// \brief Return a (temporary) clone of this.
+ /// Return a (temporary) clone of this.
TempMDTuple clone() const { return cloneImpl(); }
static bool classof(const Metadata *MD) {
MDNode::deleteTemporary(Node);
}
-/// \brief Typed iterator through MDNode operands.
+/// Typed iterator through MDNode operands.
///
/// An iterator that transforms an \a MDNode::iterator into an iterator over a
/// particular Metadata subclass.
bool operator!=(const TypedMDOperandIterator &X) const { return I != X.I; }
};
-/// \brief Typed, array-like tuple of metadata.
+/// Typed, array-like tuple of metadata.
///
/// This is a wrapper for \a MDTuple that makes it act like an array holding a
/// particular type of metadata.
};
//===----------------------------------------------------------------------===//
-/// \brief A tuple of MDNodes.
+/// A tuple of MDNodes.
///
/// Despite its name, a NamedMDNode isn't itself an MDNode. NamedMDNodes belong
/// to modules, have names, and contain lists of MDNodes.
NamedMDNode(const NamedMDNode &) = delete;
~NamedMDNode();
- /// \brief Drop all references and remove the node from parent module.
+ /// Drop all references and remove the node from parent module.
void eraseFromParent();
/// Remove all uses and clear node vector.
/// Drop all references to this node's operands.
void clearOperands();
- /// \brief Get the module that holds this named metadata collection.
+ /// Get the module that holds this named metadata collection.
inline Module *getParent() { return Parent; }
inline const Module *getParent() const { return Parent; }
/// contain the source file name.
const std::string &getSourceFileName() const { return SourceFileName; }
- /// \brief Get a short "name" for the module.
+ /// Get a short "name" for the module.
///
/// This is useful for debugging or logging. It is essentially a convenience
/// wrapper around getModuleIdentifier().
/// @name Utility functions for querying Debug information.
/// @{
- /// \brief Returns the Number of Register ParametersDwarf Version by checking
+ /// Returns the Number of Register ParametersDwarf Version by checking
/// module flags.
unsigned getNumberRegisterParameters() const;
- /// \brief Returns the Dwarf Version by checking module flags.
+ /// Returns the Dwarf Version by checking module flags.
unsigned getDwarfVersion() const;
- /// \brief Returns the CodeView Version by checking module flags.
+ /// Returns the CodeView Version by checking module flags.
/// Returns zero if not present in module.
unsigned getCodeViewFlag() const;
/// @name Utility functions for querying and setting PIC level
/// @{
- /// \brief Returns the PIC level (small or large model)
+ /// Returns the PIC level (small or large model)
PICLevel::Level getPICLevel() const;
- /// \brief Set the PIC level (small or large model)
+ /// Set the PIC level (small or large model)
void setPICLevel(PICLevel::Level PL);
/// @}
/// @name Utility functions for querying and setting PIE level
/// @{
- /// \brief Returns the PIE level (small or large model)
+ /// Returns the PIE level (small or large model)
PIELevel::Level getPIELevel() const;
- /// \brief Set the PIE level (small or large model)
+ /// Set the PIE level (small or large model)
void setPIELevel(PIELevel::Level PL);
/// @}
/// @name Utility functions for querying and setting PGO summary
/// @{
- /// \brief Attach profile summary metadata to this module.
+ /// Attach profile summary metadata to this module.
void setProfileSummary(Metadata *M);
- /// \brief Returns profile summary metadata
+ /// Returns profile summary metadata
Metadata *getProfileSummary();
/// @}
void setOwnedMemoryBuffer(std::unique_ptr<MemoryBuffer> MB);
};
-/// \brief Given "llvm.used" or "llvm.compiler.used" as a global name, collect
+/// Given "llvm.used" or "llvm.compiler.used" as a global name, collect
/// the initializer elements of that global in Set and return the global itself.
GlobalVariable *collectUsedGlobalVariables(const Module &M,
SmallPtrSetImpl<GlobalValue *> &Set,
} // end namespace yaml
-/// \brief Class to accumulate and hold information about a callee.
+/// Class to accumulate and hold information about a callee.
struct CalleeInfo {
enum class HotnessType : uint8_t {
Unknown = 0,
static unsigned getHashValue(ValueInfo I) { return (uintptr_t)I.getRef(); }
};
-/// \brief Function and variable summary information to aid decisions and
+/// Function and variable summary information to aid decisions and
/// implementation of importing.
class GlobalValueSummary {
public:
- /// \brief Sububclass discriminator (for dyn_cast<> et al.)
+ /// Sububclass discriminator (for dyn_cast<> et al.)
enum SummaryKind : unsigned { AliasKind, FunctionKind, GlobalVarKind };
/// Group flags (Linkage, NotEligibleToImport, etc.) as a bitfield.
struct GVFlags {
- /// \brief The linkage type of the associated global value.
+ /// The linkage type of the associated global value.
///
/// One use is to flag values that have local linkage types and need to
/// have module identifier appended before placing into the combined
/// GUID includes the module level id in the hash.
GlobalValue::GUID OriginalName = 0;
- /// \brief Path of module IR containing value's definition, used to locate
+ /// Path of module IR containing value's definition, used to locate
/// module during importing.
///
/// This is only used during parsing of the combined index, or when
friend class ModuleSummaryIndex;
};
-/// \brief Alias summary information.
+/// Alias summary information.
class AliasSummary : public GlobalValueSummary {
GlobalValueSummary *AliaseeSummary;
// AliaseeGUID is only set and accessed when we are building a combined index
return this;
}
-/// \brief Function summary information to aid decisions and implementation of
+/// Function summary information to aid decisions and implementation of
/// importing.
class FunctionSummary : public GlobalValueSummary {
public:
}
};
-/// \brief Global variable summary information to aid decisions and
+/// Global variable summary information to aid decisions and
/// implementation of importing.
///
/// Currently this doesn't add anything to the base \p GlobalValueSummary,
});
}
- /// \brief Accumulate the constant address offset of this GEP if possible.
+ /// Accumulate the constant address offset of this GEP if possible.
///
/// This routine accepts an APInt into which it will accumulate the constant
/// offset of this GEP if the GEP is in fact constant. If the GEP is not
/// optimization-related problems.
class OptBisect : public OptPassGate {
public:
- /// \brief Default constructor, initializes the OptBisect state based on the
+ /// Default constructor, initializes the OptBisect state based on the
/// -opt-bisect-limit command line argument.
///
/// By default, bisection is disabled.
/// ```
class PreservedAnalyses {
public:
- /// \brief Convenience factory function for the empty preserved set.
+ /// Convenience factory function for the empty preserved set.
static PreservedAnalyses none() { return PreservedAnalyses(); }
- /// \brief Construct a special preserved set that preserves all passes.
+ /// Construct a special preserved set that preserves all passes.
static PreservedAnalyses all() {
PreservedAnalyses PA;
PA.PreservedIDs.insert(&AllAnalysesKey);
return PA;
}
- /// \brief Construct a preserved analyses object with a single preserved set.
+ /// Construct a preserved analyses object with a single preserved set.
template <typename AnalysisSetT>
static PreservedAnalyses allInSet() {
PreservedAnalyses PA;
/// Mark an analysis as preserved.
template <typename AnalysisT> void preserve() { preserve(AnalysisT::ID()); }
- /// \brief Given an analysis's ID, mark the analysis as preserved, adding it
+ /// Given an analysis's ID, mark the analysis as preserved, adding it
/// to the set.
void preserve(AnalysisKey *ID) {
// Clear this ID from the explicit not-preserved set if present.
NotPreservedAnalysisIDs.insert(ID);
}
- /// \brief Intersect this set with another in place.
+ /// Intersect this set with another in place.
///
/// This is a mutating operation on this preserved set, removing all
/// preserved passes which are not also preserved in the argument.
PreservedIDs.erase(ID);
}
- /// \brief Intersect this set with a temporary other set in place.
+ /// Intersect this set with a temporary other set in place.
///
/// This is a mutating operation on this preserved set, removing all
/// preserved passes which are not also preserved in the argument.
}
};
-/// \brief Manages a sequence of passes over a particular unit of IR.
+/// Manages a sequence of passes over a particular unit of IR.
///
/// A pass manager contains a sequence of passes to run over a particular unit
/// of IR (e.g. Functions, Modules). It is itself a valid pass over that unit of
class PassManager : public PassInfoMixin<
PassManager<IRUnitT, AnalysisManagerT, ExtraArgTs...>> {
public:
- /// \brief Construct a pass manager.
+ /// Construct a pass manager.
///
/// If \p DebugLogging is true, we'll log our progress to llvm::dbgs().
explicit PassManager(bool DebugLogging = false) : DebugLogging(DebugLogging) {}
return *this;
}
- /// \brief Run all of the passes in this manager over the given unit of IR.
+ /// Run all of the passes in this manager over the given unit of IR.
/// ExtraArgs are passed to each pass.
PreservedAnalyses run(IRUnitT &IR, AnalysisManagerT &AM,
ExtraArgTs... ExtraArgs) {
std::vector<std::unique_ptr<PassConceptT>> Passes;
- /// \brief Flag indicating whether we should do debug logging.
+ /// Flag indicating whether we should do debug logging.
bool DebugLogging;
};
extern template class PassManager<Module>;
-/// \brief Convenience typedef for a pass manager over modules.
+/// Convenience typedef for a pass manager over modules.
using ModulePassManager = PassManager<Module>;
extern template class PassManager<Function>;
-/// \brief Convenience typedef for a pass manager over functions.
+/// Convenience typedef for a pass manager over functions.
using FunctionPassManager = PassManager<Function>;
-/// \brief A container for analyses that lazily runs them and caches their
+/// A container for analyses that lazily runs them and caches their
/// results.
///
/// This class can manage analyses for any IR unit where the address of the IR
detail::AnalysisPassConcept<IRUnitT, PreservedAnalyses, Invalidator,
ExtraArgTs...>;
- /// \brief List of analysis pass IDs and associated concept pointers.
+ /// List of analysis pass IDs and associated concept pointers.
///
/// Requires iterators to be valid across appending new entries and arbitrary
/// erases. Provides the analysis ID to enable finding iterators to a given
using AnalysisResultListT =
std::list<std::pair<AnalysisKey *, std::unique_ptr<ResultConceptT>>>;
- /// \brief Map type from IRUnitT pointer to our custom list type.
+ /// Map type from IRUnitT pointer to our custom list type.
using AnalysisResultListMapT = DenseMap<IRUnitT *, AnalysisResultListT>;
- /// \brief Map type from a pair of analysis ID and IRUnitT pointer to an
+ /// Map type from a pair of analysis ID and IRUnitT pointer to an
/// iterator into a particular result list (which is where the actual analysis
/// result is stored).
using AnalysisResultMapT =
const AnalysisResultMapT &Results;
};
- /// \brief Construct an empty analysis manager.
+ /// Construct an empty analysis manager.
///
/// If \p DebugLogging is true, we'll log our progress to llvm::dbgs().
AnalysisManager(bool DebugLogging = false) : DebugLogging(DebugLogging) {}
AnalysisManager(AnalysisManager &&) = default;
AnalysisManager &operator=(AnalysisManager &&) = default;
- /// \brief Returns true if the analysis manager has an empty results cache.
+ /// Returns true if the analysis manager has an empty results cache.
bool empty() const {
assert(AnalysisResults.empty() == AnalysisResultLists.empty() &&
"The storage and index of analysis results disagree on how many "
return AnalysisResults.empty();
}
- /// \brief Clear any cached analysis results for a single unit of IR.
+ /// Clear any cached analysis results for a single unit of IR.
///
/// This doesn't invalidate, but instead simply deletes, the relevant results.
/// It is useful when the IR is being removed and we want to clear out all the
AnalysisResultLists.erase(ResultsListI);
}
- /// \brief Clear all analysis results cached by this AnalysisManager.
+ /// Clear all analysis results cached by this AnalysisManager.
///
/// Like \c clear(IRUnitT&), this doesn't invalidate the results; it simply
/// deletes them. This lets you clean up the AnalysisManager when the set of
AnalysisResultLists.clear();
}
- /// \brief Get the result of an analysis pass for a given IR unit.
+ /// Get the result of an analysis pass for a given IR unit.
///
/// Runs the analysis if a cached result is not available.
template <typename PassT>
return static_cast<ResultModelT &>(ResultConcept).Result;
}
- /// \brief Get the cached result of an analysis pass for a given IR unit.
+ /// Get the cached result of an analysis pass for a given IR unit.
///
/// This method never runs the analysis.
///
return &static_cast<ResultModelT *>(ResultConcept)->Result;
}
- /// \brief Register an analysis pass with the manager.
+ /// Register an analysis pass with the manager.
///
/// The parameter is a callable whose result is an analysis pass. This allows
/// passing in a lambda to construct the analysis.
return true;
}
- /// \brief Invalidate a specific analysis pass for an IR module.
+ /// Invalidate a specific analysis pass for an IR module.
///
/// Note that the analysis result can disregard invalidation, if it determines
/// it is in fact still valid.
invalidateImpl(PassT::ID(), IR);
}
- /// \brief Invalidate cached analyses for an IR unit.
+ /// Invalidate cached analyses for an IR unit.
///
/// Walk through all of the analyses pertaining to this unit of IR and
/// invalidate them, unless they are preserved by the PreservedAnalyses set.
}
private:
- /// \brief Look up a registered analysis pass.
+ /// Look up a registered analysis pass.
PassConceptT &lookUpPass(AnalysisKey *ID) {
typename AnalysisPassMapT::iterator PI = AnalysisPasses.find(ID);
assert(PI != AnalysisPasses.end() &&
return *PI->second;
}
- /// \brief Look up a registered analysis pass.
+ /// Look up a registered analysis pass.
const PassConceptT &lookUpPass(AnalysisKey *ID) const {
typename AnalysisPassMapT::const_iterator PI = AnalysisPasses.find(ID);
assert(PI != AnalysisPasses.end() &&
return *PI->second;
}
- /// \brief Get an analysis result, running the pass if necessary.
+ /// Get an analysis result, running the pass if necessary.
ResultConceptT &getResultImpl(AnalysisKey *ID, IRUnitT &IR,
ExtraArgTs... ExtraArgs) {
typename AnalysisResultMapT::iterator RI;
return *RI->second->second;
}
- /// \brief Get a cached analysis result or return null.
+ /// Get a cached analysis result or return null.
ResultConceptT *getCachedResultImpl(AnalysisKey *ID, IRUnitT &IR) const {
typename AnalysisResultMapT::const_iterator RI =
AnalysisResults.find({ID, &IR});
return RI == AnalysisResults.end() ? nullptr : &*RI->second->second;
}
- /// \brief Invalidate a function pass result.
+ /// Invalidate a function pass result.
void invalidateImpl(AnalysisKey *ID, IRUnitT &IR) {
typename AnalysisResultMapT::iterator RI =
AnalysisResults.find({ID, &IR});
AnalysisResults.erase(RI);
}
- /// \brief Map type from module analysis pass ID to pass concept pointer.
+ /// Map type from module analysis pass ID to pass concept pointer.
using AnalysisPassMapT =
DenseMap<AnalysisKey *, std::unique_ptr<PassConceptT>>;
- /// \brief Collection of module analysis passes, indexed by ID.
+ /// Collection of module analysis passes, indexed by ID.
AnalysisPassMapT AnalysisPasses;
- /// \brief Map from function to a list of function analysis results.
+ /// Map from function to a list of function analysis results.
///
/// Provides linear time removal of all analysis results for a function and
/// the ultimate storage for a particular cached analysis result.
AnalysisResultListMapT AnalysisResultLists;
- /// \brief Map from an analysis ID and function to a particular cached
+ /// Map from an analysis ID and function to a particular cached
/// analysis result.
AnalysisResultMapT AnalysisResults;
- /// \brief Indicates whether we log to \c llvm::dbgs().
+ /// Indicates whether we log to \c llvm::dbgs().
bool DebugLogging;
};
extern template class AnalysisManager<Module>;
-/// \brief Convenience typedef for the Module analysis manager.
+/// Convenience typedef for the Module analysis manager.
using ModuleAnalysisManager = AnalysisManager<Module>;
extern template class AnalysisManager<Function>;
-/// \brief Convenience typedef for the Function analysis manager.
+/// Convenience typedef for the Function analysis manager.
using FunctionAnalysisManager = AnalysisManager<Function>;
-/// \brief An analysis over an "outer" IR unit that provides access to an
+/// An analysis over an "outer" IR unit that provides access to an
/// analysis manager over an "inner" IR unit. The inner unit must be contained
/// in the outer unit.
///
return *this;
}
- /// \brief Accessor for the analysis manager.
+ /// Accessor for the analysis manager.
AnalysisManagerT &getManager() { return *InnerAM; }
- /// \brief Handler for invalidation of the outer IR unit, \c IRUnitT.
+ /// Handler for invalidation of the outer IR unit, \c IRUnitT.
///
/// If the proxy analysis itself is not preserved, we assume that the set of
/// inner IR objects contained in IRUnit may have changed. In this case,
explicit InnerAnalysisManagerProxy(AnalysisManagerT &InnerAM)
: InnerAM(&InnerAM) {}
- /// \brief Run the analysis pass and create our proxy result object.
+ /// Run the analysis pass and create our proxy result object.
///
/// This doesn't do any interesting work; it is primarily used to insert our
/// proxy result object into the outer analysis cache so that we can proxy
extern template class InnerAnalysisManagerProxy<FunctionAnalysisManager,
Module>;
-/// \brief An analysis over an "inner" IR unit that provides access to an
+/// An analysis over an "inner" IR unit that provides access to an
/// analysis manager over a "outer" IR unit. The inner unit must be contained
/// in the outer unit.
///
: public AnalysisInfoMixin<
OuterAnalysisManagerProxy<AnalysisManagerT, IRUnitT, ExtraArgTs...>> {
public:
- /// \brief Result proxy object for \c OuterAnalysisManagerProxy.
+ /// Result proxy object for \c OuterAnalysisManagerProxy.
class Result {
public:
explicit Result(const AnalysisManagerT &AM) : AM(&AM) {}
OuterAnalysisManagerProxy(const AnalysisManagerT &AM) : AM(&AM) {}
- /// \brief Run the analysis pass and create our proxy result object.
+ /// Run the analysis pass and create our proxy result object.
/// Nothing to see here, it just forwards the \c AM reference into the
/// result.
Result run(IRUnitT &, AnalysisManager<IRUnitT, ExtraArgTs...> &,
using ModuleAnalysisManagerFunctionProxy =
OuterAnalysisManagerProxy<ModuleAnalysisManager, Function>;
-/// \brief Trivial adaptor that maps from a module to its functions.
+/// Trivial adaptor that maps from a module to its functions.
///
/// Designed to allow composition of a FunctionPass(Manager) and
/// a ModulePassManager, by running the FunctionPass(Manager) over every
explicit ModuleToFunctionPassAdaptor(FunctionPassT Pass)
: Pass(std::move(Pass)) {}
- /// \brief Runs the function pass across every function in the module.
+ /// Runs the function pass across every function in the module.
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM) {
FunctionAnalysisManager &FAM =
AM.getResult<FunctionAnalysisManagerModuleProxy>(M).getManager();
FunctionPassT Pass;
};
-/// \brief A function to deduce a function pass type and wrap it in the
+/// A function to deduce a function pass type and wrap it in the
/// templated adaptor.
template <typename FunctionPassT>
ModuleToFunctionPassAdaptor<FunctionPassT>
return ModuleToFunctionPassAdaptor<FunctionPassT>(std::move(Pass));
}
-/// \brief A utility pass template to force an analysis result to be available.
+/// A utility pass template to force an analysis result to be available.
///
/// If there are extra arguments at the pass's run level there may also be
/// extra arguments to the analysis manager's \c getResult routine. We can't
struct RequireAnalysisPass
: PassInfoMixin<RequireAnalysisPass<AnalysisT, IRUnitT, AnalysisManagerT,
ExtraArgTs...>> {
- /// \brief Run this pass over some unit of IR.
+ /// Run this pass over some unit of IR.
///
/// This pass can be run over any unit of IR and use any analysis manager
/// provided they satisfy the basic API requirements. When this pass is
}
};
-/// \brief A no-op pass template which simply forces a specific analysis result
+/// A no-op pass template which simply forces a specific analysis result
/// to be invalidated.
template <typename AnalysisT>
struct InvalidateAnalysisPass
: PassInfoMixin<InvalidateAnalysisPass<AnalysisT>> {
- /// \brief Run this pass over some unit of IR.
+ /// Run this pass over some unit of IR.
///
/// This pass can be run over any unit of IR and use any analysis manager,
/// provided they satisfy the basic API requirements. When this pass is
}
};
-/// \brief A utility pass that does nothing, but preserves no analyses.
+/// A utility pass that does nothing, but preserves no analyses.
///
/// Because this preserves no analyses, any analysis passes queried after this
/// pass runs will recompute fresh results.
struct InvalidateAllAnalysesPass : PassInfoMixin<InvalidateAllAnalysesPass> {
- /// \brief Run this pass over some unit of IR.
+ /// Run this pass over some unit of IR.
template <typename IRUnitT, typename AnalysisManagerT, typename... ExtraArgTs>
PreservedAnalyses run(IRUnitT &, AnalysisManagerT &, ExtraArgTs &&...) {
return PreservedAnalyses::none();
template <typename IRUnitT, typename... ExtraArgTs> class AnalysisManager;
class PreservedAnalyses;
-/// \brief Implementation details of the pass manager interfaces.
+/// Implementation details of the pass manager interfaces.
namespace detail {
-/// \brief Template for the abstract base class used to dispatch
+/// Template for the abstract base class used to dispatch
/// polymorphically over pass objects.
template <typename IRUnitT, typename AnalysisManagerT, typename... ExtraArgTs>
struct PassConcept {
// Boiler plate necessary for the container of derived classes.
virtual ~PassConcept() = default;
- /// \brief The polymorphic API which runs the pass over a given IR entity.
+ /// The polymorphic API which runs the pass over a given IR entity.
///
/// Note that actual pass object can omit the analysis manager argument if
/// desired. Also that the analysis manager may be null if there is no
virtual PreservedAnalyses run(IRUnitT &IR, AnalysisManagerT &AM,
ExtraArgTs... ExtraArgs) = 0;
- /// \brief Polymorphic method to access the name of a pass.
+ /// Polymorphic method to access the name of a pass.
virtual StringRef name() = 0;
};
-/// \brief A template wrapper used to implement the polymorphic API.
+/// A template wrapper used to implement the polymorphic API.
///
/// Can be instantiated for any object which provides a \c run method accepting
/// an \c IRUnitT& and an \c AnalysisManager<IRUnit>&. It requires the pass to
PassT Pass;
};
-/// \brief Abstract concept of an analysis result.
+/// Abstract concept of an analysis result.
///
/// This concept is parameterized over the IR unit that this result pertains
/// to.
struct AnalysisResultConcept {
virtual ~AnalysisResultConcept() = default;
- /// \brief Method to try and mark a result as invalid.
+ /// Method to try and mark a result as invalid.
///
/// When the outer analysis manager detects a change in some underlying
/// unit of the IR, it will call this method on all of the results cached.
InvalidatorT &Inv) = 0;
};
-/// \brief SFINAE metafunction for computing whether \c ResultT provides an
+/// SFINAE metafunction for computing whether \c ResultT provides an
/// \c invalidate member function.
template <typename IRUnitT, typename ResultT> class ResultHasInvalidateMethod {
using EnabledType = char;
enum { Value = sizeof(check<ResultT>(rank<2>())) == sizeof(EnabledType) };
};
-/// \brief Wrapper to model the analysis result concept.
+/// Wrapper to model the analysis result concept.
///
/// By default, this will implement the invalidate method with a trivial
/// implementation so that the actual analysis result doesn't need to provide
ResultHasInvalidateMethod<IRUnitT, ResultT>::Value>
struct AnalysisResultModel;
-/// \brief Specialization of \c AnalysisResultModel which provides the default
+/// Specialization of \c AnalysisResultModel which provides the default
/// invalidate functionality.
template <typename IRUnitT, typename PassT, typename ResultT,
typename PreservedAnalysesT, typename InvalidatorT>
return *this;
}
- /// \brief The model bases invalidation solely on being in the preserved set.
+ /// The model bases invalidation solely on being in the preserved set.
//
// FIXME: We should actually use two different concepts for analysis results
// rather than two different models, and avoid the indirect function call for
ResultT Result;
};
-/// \brief Specialization of \c AnalysisResultModel which delegates invalidate
+/// Specialization of \c AnalysisResultModel which delegates invalidate
/// handling to \c ResultT.
template <typename IRUnitT, typename PassT, typename ResultT,
typename PreservedAnalysesT, typename InvalidatorT>
return *this;
}
- /// \brief The model delegates to the \c ResultT method.
+ /// The model delegates to the \c ResultT method.
bool invalidate(IRUnitT &IR, const PreservedAnalysesT &PA,
InvalidatorT &Inv) override {
return Result.invalidate(IR, PA, Inv);
ResultT Result;
};
-/// \brief Abstract concept of an analysis pass.
+/// Abstract concept of an analysis pass.
///
/// This concept is parameterized over the IR unit that it can run over and
/// produce an analysis result.
struct AnalysisPassConcept {
virtual ~AnalysisPassConcept() = default;
- /// \brief Method to run this analysis over a unit of IR.
+ /// Method to run this analysis over a unit of IR.
/// \returns A unique_ptr to the analysis result object to be queried by
/// users.
virtual std::unique_ptr<
run(IRUnitT &IR, AnalysisManager<IRUnitT, ExtraArgTs...> &AM,
ExtraArgTs... ExtraArgs) = 0;
- /// \brief Polymorphic method to access the name of a pass.
+ /// Polymorphic method to access the name of a pass.
virtual StringRef name() = 0;
};
-/// \brief Wrapper to model the analysis pass concept.
+/// Wrapper to model the analysis pass concept.
///
/// Can wrap any type which implements a suitable \c run method. The method
/// must accept an \c IRUnitT& and an \c AnalysisManager<IRUnitT>& as arguments
AnalysisResultModel<IRUnitT, PassT, typename PassT::Result,
PreservedAnalysesT, InvalidatorT>;
- /// \brief The model delegates to the \c PassT::run method.
+ /// The model delegates to the \c PassT::run method.
///
/// The return is wrapped in an \c AnalysisResultModel.
std::unique_ptr<
return llvm::make_unique<ResultModelT>(Pass.run(IR, AM, ExtraArgs...));
}
- /// \brief The model delegates to a static \c PassT::name method.
+ /// The model delegates to a static \c PassT::name method.
///
/// The returned string ref must point to constant immutable data!
StringRef name() override { return PassT::name(); }
SummaryEntryVector DetailedSummary;
uint64_t TotalCount, MaxCount, MaxInternalCount, MaxFunctionCount;
uint32_t NumCounts, NumFunctions;
- /// \brief Return detailed summary as metadata.
+ /// Return detailed summary as metadata.
Metadata *getDetailedSummaryMD(LLVMContext &Context);
public:
NumCounts(NumCounts), NumFunctions(NumFunctions) {}
Kind getKind() const { return PSK; }
- /// \brief Return summary information as metadata.
+ /// Return summary information as metadata.
Metadata *getMD(LLVMContext &Context);
- /// \brief Construct profile summary from metdata.
+ /// Construct profile summary from metdata.
static ProfileSummary *getFromMD(Metadata *MD);
SummaryEntryVector &getDetailedSummary() { return DetailedSummary; }
uint32_t getNumFunctions() { return NumFunctions; }
return make_range(arg_begin(), arg_end());
}
- /// \brief Return true if the call or the callee has the given attribute.
+ /// Return true if the call or the callee has the given attribute.
bool paramHasAttr(unsigned i, Attribute::AttrKind A) const {
Function *F = getCalledFunction();
return getCallSite().paramHasAttr(i + CallArgsBeginPos, A) ||
namespace llvm {
-/// \brief Tracking metadata reference.
+/// Tracking metadata reference.
///
/// This class behaves like \a TrackingVH, but for metadata.
class TrackingMDRef {
track();
}
- /// \brief Check whether this has a trivial destructor.
+ /// Check whether this has a trivial destructor.
///
/// If \c MD isn't replaceable, the destructor will be a no-op.
bool hasTrivialDestructor() const {
}
};
-/// \brief Typed tracking ref.
+/// Typed tracking ref.
///
/// Track refererences of a particular type. It's useful to use this for \a
/// MDNode and \a ValueAsMetadata.
void reset() { Ref.reset(); }
void reset(T *MD) { Ref.reset(static_cast<Metadata *>(MD)); }
- /// \brief Check whether this has a trivial destructor.
+ /// Check whether this has a trivial destructor.
bool hasTrivialDestructor() const { return Ref.hasTrivialDestructor(); }
};
class User;
class Value;
-/// \brief A Use represents the edge between a Value definition and its users.
+/// A Use represents the edge between a Value definition and its users.
///
/// This is notionally a two-dimensional linked list. It supports traversing
/// all of the uses for a particular value definition. It also supports jumping
public:
Use(const Use &U) = delete;
- /// \brief Provide a fast substitute to std::swap<Use>
+ /// Provide a fast substitute to std::swap<Use>
/// that also works with less standard-compliant compilers
void swap(Use &RHS);
operator Value *() const { return Val; }
Value *get() const { return Val; }
- /// \brief Returns the User that contains this Use.
+ /// Returns the User that contains this Use.
///
/// For an instruction operand, for example, this will return the
/// instruction.
Use *getNext() const { return Next; }
- /// \brief Return the operand # of this use in its User.
+ /// Return the operand # of this use in its User.
unsigned getOperandNo() const;
- /// \brief Initializes the waymarking tags on an array of Uses.
+ /// Initializes the waymarking tags on an array of Uses.
///
/// This sets up the array of Uses such that getUser() can find the User from
/// any of those Uses.
static Use *initTags(Use *Start, Use *Stop);
- /// \brief Destroys Use operands when the number of operands of
+ /// Destroys Use operands when the number of operands of
/// a User changes.
static void zap(Use *Start, const Use *Stop, bool del = false);
}
};
-/// \brief Allow clients to treat uses just like values when using
+/// Allow clients to treat uses just like values when using
/// casting operators.
template <> struct simplify_type<Use> {
using SimpleType = Value *;
class Function;
class Value;
-/// \brief Structure to hold a use-list order.
+/// Structure to hold a use-list order.
struct UseListOrder {
const Value *V = nullptr;
const Function *F = nullptr;
template <typename T> class ArrayRef;
template <typename T> class MutableArrayRef;
-/// \brief Compile-time customization of User operands.
+/// Compile-time customization of User operands.
///
/// Customizes operand-related allocators and accessors.
template <class>
"Error in initializing hung off uses for User");
}
- /// \brief Allocate the array of Uses, followed by a pointer
+ /// Allocate the array of Uses, followed by a pointer
/// (with bottom bit set) to the User.
/// \param IsPhi identifies callers which are phi nodes and which need
/// N BasicBlock* allocated along with N
void allocHungoffUses(unsigned N, bool IsPhi = false);
- /// \brief Grow the number of hung off uses. Note that allocHungoffUses
+ /// Grow the number of hung off uses. Note that allocHungoffUses
/// should be called if there are no uses.
void growHungoffUses(unsigned N, bool IsPhi = false);
public:
User(const User &) = delete;
- /// \brief Free memory allocated for User and Use objects.
+ /// Free memory allocated for User and Use objects.
void operator delete(void *Usr);
- /// \brief Placement delete - required by std, called if the ctor throws.
+ /// Placement delete - required by std, called if the ctor throws.
void operator delete(void *Usr, unsigned) {
// Note: If a subclass manipulates the information which is required to calculate the
// Usr memory pointer, e.g. NumUserOperands, the operator delete of that subclass has
llvm_unreachable("Constructor throws?");
#endif
}
- /// \brief Placement delete - required by std, called if the ctor throws.
+ /// Placement delete - required by std, called if the ctor throws.
void operator delete(void *Usr, unsigned, bool) {
// Note: If a subclass manipulates the information which is required to calculate the
// Usr memory pointer, e.g. NumUserOperands, the operator delete of that subclass has
NumUserOperands = NumOps;
}
- /// \brief Subclasses with hung off uses need to manage the operand count
+ /// Subclasses with hung off uses need to manage the operand count
/// themselves. In these instances, the operand count isn't used to find the
/// OperandList, so there's no issue in having the operand count change.
void setNumHungOffUseOperands(unsigned NumOps) {
return const_op_range(op_begin(), op_end());
}
- /// \brief Iterator for directly iterating over the operand Values.
+ /// Iterator for directly iterating over the operand Values.
struct value_op_iterator
: iterator_adaptor_base<value_op_iterator, op_iterator,
std::random_access_iterator_tag, Value *,
return make_range(value_op_begin(), value_op_end());
}
- /// \brief Drop all references to operands.
+ /// Drop all references to operands.
///
/// This function is in charge of "letting go" of all objects that this User
/// refers to. This allows one to 'delete' a whole class at a time, even
U.set(nullptr);
}
- /// \brief Replace uses of one Value with another.
+ /// Replace uses of one Value with another.
///
/// Replaces all references to the "From" definition with references to the
/// "To" definition.
// Value Class
//===----------------------------------------------------------------------===//
-/// \brief LLVM Value Representation
+/// LLVM Value Representation
///
/// This is a very important LLVM class. It is the base class of all values
/// computed by a program that may be used as operands to other values. Value is
unsigned char HasValueHandle : 1; // Has a ValueHandle pointing to this?
protected:
- /// \brief Hold subclass data that can be dropped.
+ /// Hold subclass data that can be dropped.
///
/// This member is similar to SubclassData, however it is for holding
/// information which may be used to aid optimization, but which may be
unsigned char SubclassOptionalData : 7;
private:
- /// \brief Hold arbitrary subclass data.
+ /// Hold arbitrary subclass data.
///
/// This member is defined by this class, but is not used for anything.
/// Subclasses can use it to hold whatever state they find useful. This
unsigned short SubclassData;
protected:
- /// \brief The number of operands in the subclass.
+ /// The number of operands in the subclass.
///
/// This member is defined by this class, but not used for anything.
/// Subclasses can use it to store their number of operands, if they have
bool operator==(const user_iterator_impl &x) const { return UI == x.UI; }
bool operator!=(const user_iterator_impl &x) const { return !operator==(x); }
- /// \brief Returns true if this iterator is equal to user_end() on the value.
+ /// Returns true if this iterator is equal to user_end() on the value.
bool atEnd() const { return *this == user_iterator_impl(); }
user_iterator_impl &operator++() { // Preincrement
/// Delete a pointer to a generic Value.
void deleteValue();
- /// \brief Support for debugging, callable in GDB: V->dump()
+ /// Support for debugging, callable in GDB: V->dump()
void dump() const;
- /// \brief Implement operator<< on Value.
+ /// Implement operator<< on Value.
/// @{
void print(raw_ostream &O, bool IsForDebug = false) const;
void print(raw_ostream &O, ModuleSlotTracker &MST,
bool IsForDebug = false) const;
/// @}
- /// \brief Print the name of this Value out to the specified raw_ostream.
+ /// Print the name of this Value out to the specified raw_ostream.
///
/// This is useful when you just want to print 'int %reg126', not the
/// instruction that generated it. If you specify a Module for context, then
ModuleSlotTracker &MST) const;
/// @}
- /// \brief All values are typed, get the type of this value.
+ /// All values are typed, get the type of this value.
Type *getType() const { return VTy; }
- /// \brief All values hold a context through their type.
+ /// All values hold a context through their type.
LLVMContext &getContext() const;
- // \brief All values can potentially be named.
+ // All values can potentially be named.
bool hasName() const { return HasName; }
ValueName *getValueName() const;
void setValueName(ValueName *VN);
void setNameImpl(const Twine &Name);
public:
- /// \brief Return a constant reference to the value's name.
+ /// Return a constant reference to the value's name.
///
/// This guaranteed to return the same reference as long as the value is not
/// modified. If the value has a name, this does a hashtable lookup, so it's
/// not free.
StringRef getName() const;
- /// \brief Change the name of the value.
+ /// Change the name of the value.
///
/// Choose a new unique name if the provided name is taken.
///
/// \param Name The new name; or "" if the value's name should be removed.
void setName(const Twine &Name);
- /// \brief Transfer the name from V to this value.
+ /// Transfer the name from V to this value.
///
/// After taking V's name, sets V's name to empty.
///
/// \note It is an error to call V->takeName(V).
void takeName(Value *V);
- /// \brief Change all uses of this to point to a new Value.
+ /// Change all uses of this to point to a new Value.
///
/// Go through the uses list for this definition and make each use point to
/// "V" instead of "this". After this completes, 'this's use list is
/// guaranteed to be empty.
void replaceAllUsesWith(Value *V);
- /// \brief Change non-metadata uses of this to point to a new Value.
+ /// Change non-metadata uses of this to point to a new Value.
///
/// Go through the uses list for this definition and make each use point to
/// "V" instead of "this". This function skips metadata entries in the list.
return materialized_users();
}
- /// \brief Return true if there is exactly one user of this value.
+ /// Return true if there is exactly one user of this value.
///
/// This is specialized because it is a common request and does not require
/// traversing the whole use list.
return ++I == E;
}
- /// \brief Return true if this Value has exactly N users.
+ /// Return true if this Value has exactly N users.
bool hasNUses(unsigned N) const;
- /// \brief Return true if this value has N users or more.
+ /// Return true if this value has N users or more.
///
/// This is logically equivalent to getNumUses() >= N.
bool hasNUsesOrMore(unsigned N) const;
- /// \brief Check if this value is used in the specified basic block.
+ /// Check if this value is used in the specified basic block.
bool isUsedInBasicBlock(const BasicBlock *BB) const;
- /// \brief This method computes the number of uses of this Value.
+ /// This method computes the number of uses of this Value.
///
/// This is a linear time operation. Use hasOneUse, hasNUses, or
/// hasNUsesOrMore to check for specific values.
unsigned getNumUses() const;
- /// \brief This method should only be used by the Use class.
+ /// This method should only be used by the Use class.
void addUse(Use &U) { U.addToList(&UseList); }
- /// \brief Concrete subclass of this.
+ /// Concrete subclass of this.
///
/// An enumeration for keeping track of the concrete subclass of Value that
/// is actually instantiated. Values of this enumeration are kept in the
#include "llvm/IR/Value.def"
};
- /// \brief Return an ID for the concrete type of this object.
+ /// Return an ID for the concrete type of this object.
///
/// This is used to implement the classof checks. This should not be used
/// for any other purpose, as the values may change as LLVM evolves. Also,
return SubclassID;
}
- /// \brief Return the raw optional flags value contained in this value.
+ /// Return the raw optional flags value contained in this value.
///
/// This should only be used when testing two Values for equivalence.
unsigned getRawSubclassOptionalData() const {
return SubclassOptionalData;
}
- /// \brief Clear the optional flags contained in this value.
+ /// Clear the optional flags contained in this value.
void clearSubclassOptionalData() {
SubclassOptionalData = 0;
}
- /// \brief Check the optional flags for equality.
+ /// Check the optional flags for equality.
bool hasSameSubclassOptionalData(const Value *V) const {
return SubclassOptionalData == V->SubclassOptionalData;
}
- /// \brief Return true if there is a value handle associated with this value.
+ /// Return true if there is a value handle associated with this value.
bool hasValueHandle() const { return HasValueHandle; }
- /// \brief Return true if there is metadata referencing this value.
+ /// Return true if there is metadata referencing this value.
bool isUsedByMetadata() const { return IsUsedByMD; }
- /// \brief Return true if this value is a swifterror value.
+ /// Return true if this value is a swifterror value.
///
/// swifterror values can be either a function argument or an alloca with a
/// swifterror attribute.
bool isSwiftError() const;
- /// \brief Strip off pointer casts, all-zero GEPs, and aliases.
+ /// Strip off pointer casts, all-zero GEPs, and aliases.
///
/// Returns the original uncasted value. If this is called on a non-pointer
/// value, it returns 'this'.
static_cast<const Value *>(this)->stripPointerCasts());
}
- /// \brief Strip off pointer casts, all-zero GEPs, aliases and barriers.
+ /// Strip off pointer casts, all-zero GEPs, aliases and barriers.
///
/// Returns the original uncasted value. If this is called on a non-pointer
/// value, it returns 'this'. This function should be used only in
static_cast<const Value *>(this)->stripPointerCastsAndBarriers());
}
- /// \brief Strip off pointer casts and all-zero GEPs.
+ /// Strip off pointer casts and all-zero GEPs.
///
/// Returns the original uncasted value. If this is called on a non-pointer
/// value, it returns 'this'.
static_cast<const Value *>(this)->stripPointerCastsNoFollowAliases());
}
- /// \brief Strip off pointer casts and all-constant inbounds GEPs.
+ /// Strip off pointer casts and all-constant inbounds GEPs.
///
/// Returns the original pointer value. If this is called on a non-pointer
/// value, it returns 'this'.
static_cast<const Value *>(this)->stripInBoundsConstantOffsets());
}
- /// \brief Accumulate offsets from \a stripInBoundsConstantOffsets().
+ /// Accumulate offsets from \a stripInBoundsConstantOffsets().
///
/// Stores the resulting constant offset stripped into the APInt provided.
/// The provided APInt will be extended or truncated as needed to be the
->stripAndAccumulateInBoundsConstantOffsets(DL, Offset));
}
- /// \brief Strip off pointer casts and inbounds GEPs.
+ /// Strip off pointer casts and inbounds GEPs.
///
/// Returns the original pointer value. If this is called on a non-pointer
/// value, it returns 'this'.
static_cast<const Value *>(this)->stripInBoundsOffsets());
}
- /// \brief Returns the number of bytes known to be dereferenceable for the
+ /// Returns the number of bytes known to be dereferenceable for the
/// pointer value.
///
/// If CanBeNull is set by this function the pointer can either be null or be
uint64_t getPointerDereferenceableBytes(const DataLayout &DL,
bool &CanBeNull) const;
- /// \brief Returns an alignment of the pointer value.
+ /// Returns an alignment of the pointer value.
///
/// Returns an alignment which is either specified explicitly, e.g. via
/// align attribute of a function argument, or guaranteed by DataLayout.
unsigned getPointerAlignment(const DataLayout &DL) const;
- /// \brief Translate PHI node to its predecessor from the given basic block.
+ /// Translate PHI node to its predecessor from the given basic block.
///
/// If this value is a PHI node with CurBB as its parent, return the value in
/// the PHI node corresponding to PredBB. If not, return ourself. This is
static_cast<const Value *>(this)->DoPHITranslation(CurBB, PredBB));
}
- /// \brief The maximum alignment for instructions.
+ /// The maximum alignment for instructions.
///
/// This is the greatest alignment value supported by load, store, and alloca
/// instructions, and global values.
static const unsigned MaxAlignmentExponent = 29;
static const unsigned MaximumAlignment = 1u << MaxAlignmentExponent;
- /// \brief Mutate the type of this Value to be of the specified type.
+ /// Mutate the type of this Value to be of the specified type.
///
/// Note that this is an extremely dangerous operation which can create
/// completely invalid IR very easily. It is strongly recommended that you
VTy = Ty;
}
- /// \brief Sort the use-list.
+ /// Sort the use-list.
///
/// Sorts the Value's use-list by Cmp using a stable mergesort. Cmp is
/// expected to compare two \a Use references.
template <class Compare> void sortUseList(Compare Cmp);
- /// \brief Reverse the use-list.
+ /// Reverse the use-list.
void reverseUseList();
private:
- /// \brief Merge two lists together.
+ /// Merge two lists together.
///
/// Merges \c L and \c R using \c Cmp. To enable stable sorts, always pushes
/// "equal" items from L before items from R.
namespace llvm {
-/// \brief This is the common base class of value handles.
+/// This is the common base class of value handles.
///
/// ValueHandle's are smart pointers to Value's that have special behavior when
/// the value is deleted or ReplaceAllUsesWith'd. See the specific handles
friend class Value;
protected:
- /// \brief This indicates what sub class the handle actually is.
+ /// This indicates what sub class the handle actually is.
///
/// This is to avoid having a vtable for the light-weight handle pointers. The
/// fully general Callback version does have a vtable.
V != DenseMapInfo<Value *>::getTombstoneKey();
}
- /// \brief Remove this ValueHandle from its current use list.
+ /// Remove this ValueHandle from its current use list.
void RemoveFromUseList();
- /// \brief Clear the underlying pointer without clearing the use list.
+ /// Clear the underlying pointer without clearing the use list.
///
/// This should only be used if a derived class has manually removed the
/// handle from the use list.
HandleBaseKind getKind() const { return PrevPair.getInt(); }
void setPrevPtr(ValueHandleBase **Ptr) { PrevPair.setPointer(Ptr); }
- /// \brief Add this ValueHandle to the use list for V.
+ /// Add this ValueHandle to the use list for V.
///
/// List is the address of either the head of the list or a Next node within
/// the existing use list.
void AddToExistingUseList(ValueHandleBase **List);
- /// \brief Add this ValueHandle to the use list after Node.
+ /// Add this ValueHandle to the use list after Node.
void AddToExistingUseListAfter(ValueHandleBase *Node);
- /// \brief Add this ValueHandle to the use list for V.
+ /// Add this ValueHandle to the use list for V.
void AddToUseList();
};
-/// \brief A nullable Value handle that is nullable.
+/// A nullable Value handle that is nullable.
///
/// This is a value handle that points to a value, and nulls itself
/// out if that value is deleted.
static SimpleType getSimplifiedValue(const WeakVH &WVH) { return WVH; }
};
-/// \brief Value handle that is nullable, but tries to track the Value.
+/// Value handle that is nullable, but tries to track the Value.
///
/// This is a value handle that tries hard to point to a Value, even across
/// RAUW operations, but will null itself out if the value is destroyed. this
}
};
-/// \brief Value handle that asserts if the Value is deleted.
+/// Value handle that asserts if the Value is deleted.
///
/// This is a Value Handle that points to a value and asserts out if the value
/// is destroyed while the handle is still live. This is very useful for
#endif
};
-/// \brief Value handle that tracks a Value across RAUW.
+/// Value handle that tracks a Value across RAUW.
///
/// TrackingVH is designed for situations where a client needs to hold a handle
/// to a Value (or subclass) across some operations which may move that value,
ValueTy &operator*() const { return *getValPtr(); }
};
-/// \brief Value handle with callbacks on RAUW and destruction.
+/// Value handle with callbacks on RAUW and destruction.
///
/// This is a value handle that allows subclasses to define callbacks that run
/// when the underlying Value has RAUW called on it or is destroyed. This
return getValPtr();
}
- /// \brief Callback for Value destruction.
+ /// Callback for Value destruction.
///
/// Called when this->getValPtr() is destroyed, inside ~Value(), so you
/// may call any non-virtual Value method on getValPtr(), but no subclass
/// Value that's being destroyed.
virtual void deleted() { setValPtr(nullptr); }
- /// \brief Callback for Value RAUW.
+ /// Callback for Value RAUW.
///
/// Called when this->getValPtr()->replaceAllUsesWith(new_value) is called,
/// _before_ any of the uses have actually been replaced. If WeakTrackingVH
bool visitTBAAMetadata(Instruction &I, const MDNode *MD);
};
-/// \brief Check a function for errors, useful for use when debugging a
+/// Check a function for errors, useful for use when debugging a
/// pass.
///
/// If there are no errors, the function returns false. If an error is found,
/// returned.
bool verifyFunction(const Function &F, raw_ostream *OS = nullptr);
-/// \brief Check a module for errors.
+/// Check a module for errors.
///
/// If there are no errors, the function returns false. If an error is
/// found, a message describing the error is written to OS (if
/// "recovered" from by stripping the debug info.
bool verifyModule(bool &BrokenDebugInfo, const Module &M, raw_ostream *OS);
-/// \brief Create a verifier pass.
+/// Create a verifier pass.
///
/// Check a module or function for validity. This is essentially a pass wrapped
/// around the above verifyFunction and verifyModule routines and
Linker(Module &M);
- /// \brief Link \p Src into the composite.
+ /// Link \p Src into the composite.
///
/// Passing OverrideSymbols as true will have symbols from Src
/// shadow those in the Dest.
/// Handle any target-specific assembler flags. By default, do nothing.
virtual void handleAssemblerFlag(MCAssemblerFlag Flag) {}
- /// \brief Generate the compact unwind encoding for the CFI instructions.
+ /// Generate the compact unwind encoding for the CFI instructions.
virtual uint32_t
generateCompactUnwindEncoding(ArrayRef<MCCFIInstruction>) const {
return 0;
return nullptr;
}
- /// \brief True if the section is atomized using the symbols in it.
+ /// True if the section is atomized using the symbols in it.
/// This is false if the section is not atomized at all (most ELF sections) or
/// if it is atomized based on its contents (MachO' __TEXT,__cstring for
/// example).
/// lower ordinal will be valid.
mutable DenseMap<const MCSection *, MCFragment *> LastValidFragment;
- /// \brief Make sure that the layout for the given fragment is valid, lazily
+ /// Make sure that the layout for the given fragment is valid, lazily
/// computing it if necessary.
void ensureValid(const MCFragment *F) const;
- /// \brief Is the layout for this fragment valid?
+ /// Is the layout for this fragment valid?
bool isFragmentValid(const MCFragment *F) const;
public:
/// Get the assembler object this is a layout for.
MCAssembler &getAssembler() const { return Assembler; }
- /// \brief Invalidate the fragments starting with F because it has been
+ /// Invalidate the fragments starting with F because it has been
/// resized. The fragment's size should have already been updated, but
/// its bundle padding will be recomputed.
void invalidateFragmentsFrom(MCFragment *F);
- /// \brief Perform layout for a single fragment, assuming that the previous
+ /// Perform layout for a single fragment, assuming that the previous
/// fragment has already been laid out correctly, and the parent section has
/// been initialized.
void layoutFragment(MCFragment *Fragment);
/// \name Fragment Layout Data
/// @{
- /// \brief Get the offset of the given fragment inside its containing section.
+ /// Get the offset of the given fragment inside its containing section.
uint64_t getFragmentOffset(const MCFragment *F) const;
/// @}
/// \name Utility Functions
/// @{
- /// \brief Get the address space size of the given section, as it effects
+ /// Get the address space size of the given section, as it effects
/// layout. This may differ from the size reported by \see getSectionSize() by
/// not including section tail padding.
uint64_t getSectionAddressSize(const MCSection *Sec) const;
- /// \brief Get the data size of the given section, as emitted to the object
+ /// Get the data size of the given section, as emitted to the object
/// file. This may include additional padding, or be 0 for virtual sections.
uint64_t getSectionFileSize(const MCSection *Sec) const;
- /// \brief Get the offset of the given symbol, as computed in the current
+ /// Get the offset of the given symbol, as computed in the current
/// layout.
/// \return True on success.
bool getSymbolOffset(const MCSymbol &S, uint64_t &Val) const;
- /// \brief Variant that reports a fatal error if the offset is not computable.
+ /// Variant that reports a fatal error if the offset is not computable.
uint64_t getSymbolOffset(const MCSymbol &S) const;
- /// \brief If this symbol is equivalent to A + Constant, return A.
+ /// If this symbol is equivalent to A + Constant, return A.
const MCSymbol *getBaseSymbol(const MCSymbol &Symbol) const;
/// @}
// refactoring too.
mutable SmallPtrSet<const MCSymbol *, 32> ThumbFuncs;
- /// \brief The bundle alignment size currently set in the assembler.
+ /// The bundle alignment size currently set in the assembler.
///
/// By default it's 0, which means bundling is disabled.
unsigned BundleAlignSize;
bool fragmentNeedsRelaxation(const MCRelaxableFragment *IF,
const MCAsmLayout &Layout) const;
- /// \brief Perform one layout iteration and return true if any offsets
+ /// Perform one layout iteration and return true if any offsets
/// were adjusted.
bool layoutOnce(MCAsmLayout &Layout);
- /// \brief Perform one layout iteration of the given section and return true
+ /// Perform one layout iteration of the given section and return true
/// if any offsets were adjusted.
bool layoutSectionOnce(MCAsmLayout &Layout, MCSection &Sec);
FileNames.push_back(FileName);
}
- /// \brief Write the necessary bundle padding to the given object writer.
+ /// Write the necessary bundle padding to the given object writer.
/// Expects a fragment \p F containing instructions and its size \p FSize.
void writeFragmentPadding(const MCFragment &F, uint64_t FSize,
MCObjectWriter *OW) const;
void dump() const;
};
-/// \brief Compute the amount of padding required before the fragment \p F to
+/// Compute the amount of padding required before the fragment \p F to
/// obey bundling restrictions, where \p FOffset is the fragment's offset in
/// its section and \p FSize is the fragment's size.
uint64_t computeBundlePadding(const MCAssembler &Assembler, const MCFragment *F,
class MCStreamer;
class CodeViewContext;
-/// \brief Instances of this class represent the information from a
+/// Instances of this class represent the information from a
/// .cv_loc directive.
class MCCVLoc {
uint32_t FunctionId;
public:
unsigned getFunctionId() const { return FunctionId; }
- /// \brief Get the FileNum of this MCCVLoc.
+ /// Get the FileNum of this MCCVLoc.
unsigned getFileNum() const { return FileNum; }
- /// \brief Get the Line of this MCCVLoc.
+ /// Get the Line of this MCCVLoc.
unsigned getLine() const { return Line; }
- /// \brief Get the Column of this MCCVLoc.
+ /// Get the Column of this MCCVLoc.
unsigned getColumn() const { return Column; }
bool isPrologueEnd() const { return PrologueEnd; }
void setFunctionId(unsigned FID) { FunctionId = FID; }
- /// \brief Set the FileNum of this MCCVLoc.
+ /// Set the FileNum of this MCCVLoc.
void setFileNum(unsigned fileNum) { FileNum = fileNum; }
- /// \brief Set the Line of this MCCVLoc.
+ /// Set the Line of this MCCVLoc.
void setLine(unsigned line) { Line = line; }
- /// \brief Set the Column of this MCCVLoc.
+ /// Set the Column of this MCCVLoc.
void setColumn(unsigned column) {
assert(column <= UINT16_MAX);
Column = column;
void setIsStmt(bool IS) { IsStmt = IS; }
};
-/// \brief Instances of this class represent the line information for
+/// Instances of this class represent the line information for
/// the CodeView line table entries. Which is created after a machine
/// instruction is assembled and uses an address from a temporary label
/// created at the current address in the current section and the info from
bool isValidCVFileNumber(unsigned FileNumber);
- /// \brief Add a line entry.
+ /// Add a line entry.
void addLineEntry(const MCCVLineEntry &LineEntry);
std::vector<MCCVLineEntry> getFunctionLineEntries(unsigned FuncId);
unsigned UniqueID,
const MCSymbolELF *Associated);
- /// \brief Map of currently defined macros.
+ /// Map of currently defined macros.
StringMap<MCAsmMacro> MacroMap;
public:
/// \name Dwarf Management
/// @{
- /// \brief Get the compilation directory for DW_AT_comp_dir
+ /// Get the compilation directory for DW_AT_comp_dir
/// The compilation directory should be set with \c setCompilationDir before
/// calling this function. If it is unset, an empty string will be returned.
StringRef getCompilationDir() const { return CompilationDir; }
- /// \brief Set the compilation directory for DW_AT_comp_dir
+ /// Set the compilation directory for DW_AT_comp_dir
void setCompilationDir(StringRef S) { CompilationDir = S.str(); }
- /// \brief Get the main file name for use in error messages and debug
+ /// Get the main file name for use in error messages and debug
/// info. This can be set to ensure we've got the correct file name
/// after preprocessing or for -save-temps.
const std::string &getMainFileName() const { return MainFileName; }
- /// \brief Set the main file name and override the default.
+ /// Set the main file name and override the default.
void setMainFileName(StringRef S) { MainFileName = S; }
/// Creates an entry in the dwarf file and directory tables.
// operator new and delete aren't allowed inside namespaces.
// The throw specifications are mandated by the standard.
-/// \brief Placement new for using the MCContext's allocator.
+/// Placement new for using the MCContext's allocator.
///
/// This placement form of operator new uses the MCContext's allocator for
/// obtaining memory. It is a non-throwing new, which means that it returns
size_t Alignment = 8) noexcept {
return C.allocate(Bytes, Alignment);
}
-/// \brief Placement delete companion to the new above.
+/// Placement delete companion to the new above.
///
/// This operator is just a companion to the new above. There is no way of
/// invoking it directly; see the new operator for more details. This operator
return C.allocate(Bytes, Alignment);
}
-/// \brief Placement delete[] companion to the new[] above.
+/// Placement delete[] companion to the new[] above.
///
/// This operator is just a companion to the new[] above. There is no way of
/// invoking it directly; see the new[] operator for more details. This operator
namespace llvm {
-/// \brief Symbolize using user-provided, C API, callbacks.
+/// Symbolize using user-provided, C API, callbacks.
///
/// See llvm-c/Disassembler.h.
class MCExternalSymbolizer : public MCSymbolizer {
class MCContext;
class MCExpr;
-/// \brief Create MCExprs from relocations found in an object file.
+/// Create MCExprs from relocations found in an object file.
class MCRelocationInfo {
protected:
MCContext &Ctx;
MCRelocationInfo &operator=(const MCRelocationInfo &) = delete;
virtual ~MCRelocationInfo();
- /// \brief Create an MCExpr for the target-specific \p VariantKind.
+ /// Create an MCExpr for the target-specific \p VariantKind.
/// The VariantKinds are defined in llvm-c/Disassembler.h.
/// Used by MCExternalSymbolizer.
/// \returns If possible, an MCExpr corresponding to VariantKind, else 0.
class MCInst;
class raw_ostream;
-/// \brief Symbolize and annotate disassembled instructions.
+/// Symbolize and annotate disassembled instructions.
///
/// For now this mimics the old symbolization logic (from both ARM and x86), that
/// relied on user-provided (C API) callbacks to do the actual symbol lookup in
std::unique_ptr<MCRelocationInfo> RelInfo;
public:
- /// \brief Construct an MCSymbolizer, taking ownership of \p RelInfo.
+ /// Construct an MCSymbolizer, taking ownership of \p RelInfo.
MCSymbolizer(MCContext &Ctx, std::unique_ptr<MCRelocationInfo> RelInfo)
: Ctx(Ctx), RelInfo(std::move(RelInfo)) {
}
MCSymbolizer &operator=(const MCSymbolizer &) = delete;
virtual ~MCSymbolizer();
- /// \brief Try to add a symbolic operand instead of \p Value to the MCInst.
+ /// Try to add a symbolic operand instead of \p Value to the MCInst.
///
/// Instead of having a difficult to read immediate, a symbolic operand would
/// represent this immediate in a more understandable way, for instance as a
bool IsBranch, uint64_t Offset,
uint64_t InstSize) = 0;
- /// \brief Try to add a comment on the PC-relative load.
+ /// Try to add a comment on the PC-relative load.
/// For instance, in Mach-O, this is used to add annotations to instructions
/// that use C string literals, as found in __cstring.
virtual void tryAddingPcLoadReferenceComment(raw_ostream &cStream,
class SMLoc;
class SourceMgr;
-/// \brief Instances of this class represent the name of the dwarf
+/// Instances of this class represent the name of the dwarf
/// .file directive and its associated dwarf file number in the MC file,
/// and MCDwarfFile's are created and uniqued by the MCContext class where
/// the file number for each is its index into the vector of DwarfFiles (note
/// index 0 is not used and not a valid dwarf file number).
struct MCDwarfFile {
- // \brief The base name of the file without its directory path.
+ // The base name of the file without its directory path.
std::string Name;
- // \brief The index into the list of directory names for this file name.
+ // The index into the list of directory names for this file name.
unsigned DirIndex;
/// The MD5 checksum, if there is one. Non-owning pointer to data allocated
Optional<StringRef> Source;
};
-/// \brief Instances of this class represent the information from a
+/// Instances of this class represent the information from a
/// dwarf .loc directive.
class MCDwarfLoc {
uint32_t FileNum;
// for an MCDwarfLoc object.
public:
- /// \brief Get the FileNum of this MCDwarfLoc.
+ /// Get the FileNum of this MCDwarfLoc.
unsigned getFileNum() const { return FileNum; }
- /// \brief Get the Line of this MCDwarfLoc.
+ /// Get the Line of this MCDwarfLoc.
unsigned getLine() const { return Line; }
- /// \brief Get the Column of this MCDwarfLoc.
+ /// Get the Column of this MCDwarfLoc.
unsigned getColumn() const { return Column; }
- /// \brief Get the Flags of this MCDwarfLoc.
+ /// Get the Flags of this MCDwarfLoc.
unsigned getFlags() const { return Flags; }
- /// \brief Get the Isa of this MCDwarfLoc.
+ /// Get the Isa of this MCDwarfLoc.
unsigned getIsa() const { return Isa; }
- /// \brief Get the Discriminator of this MCDwarfLoc.
+ /// Get the Discriminator of this MCDwarfLoc.
unsigned getDiscriminator() const { return Discriminator; }
- /// \brief Set the FileNum of this MCDwarfLoc.
+ /// Set the FileNum of this MCDwarfLoc.
void setFileNum(unsigned fileNum) { FileNum = fileNum; }
- /// \brief Set the Line of this MCDwarfLoc.
+ /// Set the Line of this MCDwarfLoc.
void setLine(unsigned line) { Line = line; }
- /// \brief Set the Column of this MCDwarfLoc.
+ /// Set the Column of this MCDwarfLoc.
void setColumn(unsigned column) {
assert(column <= UINT16_MAX);
Column = column;
}
- /// \brief Set the Flags of this MCDwarfLoc.
+ /// Set the Flags of this MCDwarfLoc.
void setFlags(unsigned flags) {
assert(flags <= UINT8_MAX);
Flags = flags;
}
- /// \brief Set the Isa of this MCDwarfLoc.
+ /// Set the Isa of this MCDwarfLoc.
void setIsa(unsigned isa) {
assert(isa <= UINT8_MAX);
Isa = isa;
}
- /// \brief Set the Discriminator of this MCDwarfLoc.
+ /// Set the Discriminator of this MCDwarfLoc.
void setDiscriminator(unsigned discriminator) {
Discriminator = discriminator;
}
};
-/// \brief Instances of this class represent the line information for
+/// Instances of this class represent the line information for
/// the dwarf line table entries. Which is created after a machine
/// instruction is assembled and uses an address from a temporary label
/// created at the current address in the current section and the info from
static void Make(MCObjectStreamer *MCOS, MCSection *Section);
};
-/// \brief Instances of this class represent the line information for a compile
+/// Instances of this class represent the line information for a compile
/// unit where machine instructions have been assembled after seeing .loc
/// directives. This is the information used to build the dwarf line
/// table for a section.
class MCLineSection {
public:
- // \brief Add an entry to this MCLineSection's line entries.
+ // Add an entry to this MCLineSection's line entries.
void addLineEntry(const MCDwarfLineEntry &LineEntry, MCSection *Sec) {
MCLineDivisions[Sec].push_back(LineEntry);
}
}
public:
- /// \brief .cfi_def_cfa defines a rule for computing CFA as: take address from
+ /// .cfi_def_cfa defines a rule for computing CFA as: take address from
/// Register and add Offset to it.
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register,
int Offset) {
return MCCFIInstruction(OpDefCfa, L, Register, -Offset, "");
}
- /// \brief .cfi_def_cfa_register modifies a rule for computing CFA. From now
+ /// .cfi_def_cfa_register modifies a rule for computing CFA. From now
/// on Register will be used instead of the old one. Offset remains the same.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register) {
return MCCFIInstruction(OpDefCfaRegister, L, Register, 0, "");
}
- /// \brief .cfi_def_cfa_offset modifies a rule for computing CFA. Register
+ /// .cfi_def_cfa_offset modifies a rule for computing CFA. Register
/// remains the same, but offset is new. Note that it is the absolute offset
/// that will be added to a defined register to the compute CFA address.
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset) {
return MCCFIInstruction(OpDefCfaOffset, L, 0, -Offset, "");
}
- /// \brief .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but
+ /// .cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but
/// Offset is a relative value that is added/subtracted from the previous
/// offset.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment) {
return MCCFIInstruction(OpAdjustCfaOffset, L, 0, Adjustment, "");
}
- /// \brief .cfi_offset Previous value of Register is saved at offset Offset
+ /// .cfi_offset Previous value of Register is saved at offset Offset
/// from CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register,
int Offset) {
return MCCFIInstruction(OpOffset, L, Register, Offset, "");
}
- /// \brief .cfi_rel_offset Previous value of Register is saved at offset
+ /// .cfi_rel_offset Previous value of Register is saved at offset
/// Offset from the current CFA register. This is transformed to .cfi_offset
/// using the known displacement of the CFA register from the CFA.
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register,
return MCCFIInstruction(OpRelOffset, L, Register, Offset, "");
}
- /// \brief .cfi_register Previous value of Register1 is saved in
+ /// .cfi_register Previous value of Register1 is saved in
/// register Register2.
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1,
unsigned Register2) {
return MCCFIInstruction(OpRegister, L, Register1, Register2);
}
- /// \brief .cfi_window_save SPARC register window is saved.
+ /// .cfi_window_save SPARC register window is saved.
static MCCFIInstruction createWindowSave(MCSymbol *L) {
return MCCFIInstruction(OpWindowSave, L, 0, 0, "");
}
- /// \brief .cfi_restore says that the rule for Register is now the same as it
+ /// .cfi_restore says that the rule for Register is now the same as it
/// was at the beginning of the function, after all initial instructions added
/// by .cfi_startproc were executed.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register) {
return MCCFIInstruction(OpRestore, L, Register, 0, "");
}
- /// \brief .cfi_undefined From now on the previous value of Register can't be
+ /// .cfi_undefined From now on the previous value of Register can't be
/// restored anymore.
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register) {
return MCCFIInstruction(OpUndefined, L, Register, 0, "");
}
- /// \brief .cfi_same_value Current value of Register is the same as in the
+ /// .cfi_same_value Current value of Register is the same as in the
/// previous frame. I.e., no restoration is needed.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register) {
return MCCFIInstruction(OpSameValue, L, Register, 0, "");
}
- /// \brief .cfi_remember_state Save all current rules for all registers.
+ /// .cfi_remember_state Save all current rules for all registers.
static MCCFIInstruction createRememberState(MCSymbol *L) {
return MCCFIInstruction(OpRememberState, L, 0, 0, "");
}
- /// \brief .cfi_restore_state Restore the previously saved state.
+ /// .cfi_restore_state Restore the previously saved state.
static MCCFIInstruction createRestoreState(MCSymbol *L) {
return MCCFIInstruction(OpRestoreState, L, 0, 0, "");
}
- /// \brief .cfi_escape Allows the user to add arbitrary bytes to the unwind
+ /// .cfi_escape Allows the user to add arbitrary bytes to the unwind
/// info.
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals) {
return MCCFIInstruction(OpEscape, L, 0, 0, Vals);
}
- /// \brief A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE
+ /// A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size) {
return MCCFIInstruction(OpGnuArgsSize, L, 0, Size, "");
}
}
};
-/// \brief Construct a new ELF writer instance.
+/// Construct a new ELF writer instance.
///
/// \param MOTW - The target specific ELF writer subclass.
/// \param OS - The stream to write to.
void fixSymbolsInTLSFixups(const MCExpr *expr);
- /// \brief Merge the content of the fragment \p EF into the fragment \p DF.
+ /// Merge the content of the fragment \p EF into the fragment \p DF.
void mergeFragment(MCDataFragment *, MCDataFragment *);
bool SeenIdent = false;
using SectionAddrMap = DenseMap<const MCSection *, uint64_t>;
-/// \brief Base class for the full range of assembler expressions which are
+/// Base class for the full range of assembler expressions which are
/// needed for parsing.
class MCExpr {
public:
/// \name Expression Evaluation
/// @{
- /// \brief Try to evaluate the expression to an absolute value.
+ /// Try to evaluate the expression to an absolute value.
///
/// \param Res - The absolute value, if evaluation succeeds.
/// \param Layout - The assembler layout object to use for evaluating symbol
bool evaluateKnownAbsolute(int64_t &Res, const MCAsmLayout &Layout) const;
- /// \brief Try to evaluate the expression to a relocatable value, i.e. an
+ /// Try to evaluate the expression to a relocatable value, i.e. an
/// expression of the fixed form (a - b + constant).
///
/// \param Res - The relocatable value, if evaluation succeeds.
bool evaluateAsRelocatable(MCValue &Res, const MCAsmLayout *Layout,
const MCFixup *Fixup) const;
- /// \brief Try to evaluate the expression to the form (a - b + constant) where
+ /// Try to evaluate the expression to the form (a - b + constant) where
/// neither a nor b are variables.
///
/// This is a more aggressive variant of evaluateAsRelocatable. The intended
/// use is for when relocations are not available, like the .size directive.
bool evaluateAsValue(MCValue &Res, const MCAsmLayout &Layout) const;
- /// \brief Find the "associated section" for this expression, which is
+ /// Find the "associated section" for this expression, which is
/// currently defined as the absolute section for constants, or
/// otherwise the section associated with the first defined symbol in the
/// expression.
return OS;
}
-//// \brief Represent a constant integer expression.
+//// Represent a constant integer expression.
class MCConstantExpr : public MCExpr {
int64_t Value;
}
};
-/// \brief Represent a reference to a symbol from inside an expression.
+/// Represent a reference to a symbol from inside an expression.
///
/// A symbol reference in an expression may be a use of a label, a use of an
/// assembler variable (defined constant), or constitute an implicit definition
}
};
-/// \brief Unary assembler expressions.
+/// Unary assembler expressions.
class MCUnaryExpr : public MCExpr {
public:
enum Opcode {
/// \name Accessors
/// @{
- /// \brief Get the kind of this unary expression.
+ /// Get the kind of this unary expression.
Opcode getOpcode() const { return Op; }
- /// \brief Get the child of this unary expression.
+ /// Get the child of this unary expression.
const MCExpr *getSubExpr() const { return Expr; }
/// @}
}
};
-/// \brief Binary assembler expressions.
+/// Binary assembler expressions.
class MCBinaryExpr : public MCExpr {
public:
enum Opcode {
/// \name Accessors
/// @{
- /// \brief Get the kind of this binary expression.
+ /// Get the kind of this binary expression.
Opcode getOpcode() const { return Op; }
- /// \brief Get the left-hand side expression of the binary operator.
+ /// Get the left-hand side expression of the binary operator.
const MCExpr *getLHS() const { return LHS; }
- /// \brief Get the right-hand side expression of the binary operator.
+ /// Get the right-hand side expression of the binary operator.
const MCExpr *getRHS() const { return RHS; }
/// @}
}
};
-/// \brief This is an extension point for target-specific MCExpr subclasses to
+/// This is an extension point for target-specific MCExpr subclasses to
/// implement.
///
/// NOTE: All subclasses are required to have trivial destructors because
namespace llvm {
class MCExpr;
-/// \brief Extensible enumeration to represent the type of a fixup.
+/// Extensible enumeration to represent the type of a fixup.
enum MCFixupKind {
FK_Data_1 = 0, ///< A one-byte fixup.
FK_Data_2, ///< A two-byte fixup.
MaxTargetFixupKind = (1 << 8)
};
-/// \brief Encode information on a single operation to perform on a byte
+/// Encode information on a single operation to perform on a byte
/// sequence (e.g., an encoded instruction) which requires assemble- or run-
/// time patching.
///
const MCExpr *getValue() const { return Value; }
- /// \brief Return the generic fixup kind for a value with the given size. It
+ /// Return the generic fixup kind for a value with the given size. It
/// is an error to pass an unsupported size.
static MCFixupKind getKindForSize(unsigned Size, bool isPCRel) {
switch (Size) {
namespace llvm {
-/// \brief Target independent information on a fixup kind.
+/// Target independent information on a fixup kind.
struct MCFixupKindInfo {
enum FixupKindFlags {
/// Is this fixup kind PCrelative? This is used by the assembler backend to
bool HasInstructions;
private:
- /// \brief Should this fragment be aligned to the end of a bundle?
+ /// Should this fragment be aligned to the end of a bundle?
bool AlignToBundleEnd;
uint8_t BundlePadding;
unsigned getLayoutOrder() const { return LayoutOrder; }
void setLayoutOrder(unsigned Value) { LayoutOrder = Value; }
- /// \brief Does this fragment have instructions emitted into it? By default
+ /// Does this fragment have instructions emitted into it? By default
/// this is false, but specific fragment types may set it to true.
bool hasInstructions() const { return HasInstructions; }
- /// \brief Should this fragment be placed at the end of an aligned bundle?
+ /// Should this fragment be placed at the end of an aligned bundle?
bool alignToBundleEnd() const { return AlignToBundleEnd; }
void setAlignToBundleEnd(bool V) { AlignToBundleEnd = V; }
- /// \brief Get the padding size that must be inserted before this fragment.
+ /// Get the padding size that must be inserted before this fragment.
/// Used for bundling. By default, no padding is inserted.
/// Note that padding size is restricted to 8 bits. This is an optimization
/// to reduce the amount of space used for each fragment. In practice, larger
/// padding should never be required.
uint8_t getBundlePadding() const { return BundlePadding; }
- /// \brief Set the padding size for this fragment. By default it's a no-op,
+ /// Set the padding size for this fragment. By default it's a no-op,
/// and only some fragments have a meaningful implementation.
void setBundlePadding(uint8_t N) { BundlePadding = N; }
- /// \brief Return true if given frgment has FT_Dummy type.
+ /// Return true if given frgment has FT_Dummy type.
bool isDummy() const { return Kind == FT_Dummy; }
void dump() const;
class MCInstPrinter;
class raw_ostream;
-/// \brief Instances of this class represent operands of the MCInst class.
+/// Instances of this class represent operands of the MCInst class.
/// This is a simple discriminated union.
class MCOperand {
enum MachineOperandType : unsigned char {
bool isExpr() const { return Kind == kExpr; }
bool isInst() const { return Kind == kInst; }
- /// \brief Returns the register number.
+ /// Returns the register number.
unsigned getReg() const {
assert(isReg() && "This is not a register operand!");
return RegVal;
}
- /// \brief Set the register number.
+ /// Set the register number.
void setReg(unsigned Reg) {
assert(isReg() && "This is not a register operand!");
RegVal = Reg;
template <> struct isPodLike<MCOperand> { static const bool value = true; };
-/// \brief Instances of this class represent a single low-level machine
+/// Instances of this class represent a single low-level machine
/// instruction.
class MCInst {
unsigned Opcode = 0;
void print(raw_ostream &OS) const;
void dump() const;
- /// \brief Dump the MCInst as prettily as possible using the additional MC
+ /// Dump the MCInst as prettily as possible using the additional MC
/// structures, if given. Operators are separated by the \p Separator
/// string.
void dump_pretty(raw_ostream &OS, const MCInstPrinter *Printer = nullptr,
MCInst Inst;
public:
- /// \brief Create a new MCInstBuilder for an MCInst with a specific opcode.
+ /// Create a new MCInstBuilder for an MCInst with a specific opcode.
MCInstBuilder(unsigned Opcode) {
Inst.setOpcode(Opcode);
}
- /// \brief Add a new register operand.
+ /// Add a new register operand.
MCInstBuilder &addReg(unsigned Reg) {
Inst.addOperand(MCOperand::createReg(Reg));
return *this;
}
- /// \brief Add a new integer immediate operand.
+ /// Add a new integer immediate operand.
MCInstBuilder &addImm(int64_t Val) {
Inst.addOperand(MCOperand::createImm(Val));
return *this;
}
- /// \brief Add a new floating point immediate operand.
+ /// Add a new floating point immediate operand.
MCInstBuilder &addFPImm(double Val) {
Inst.addOperand(MCOperand::createFPImm(Val));
return *this;
}
- /// \brief Add a new MCExpr operand.
+ /// Add a new MCExpr operand.
MCInstBuilder &addExpr(const MCExpr *Val) {
Inst.addOperand(MCOperand::createExpr(Val));
return *this;
}
- /// \brief Add a new MCInst operand.
+ /// Add a new MCInst operand.
MCInstBuilder &addInst(const MCInst *Val) {
Inst.addOperand(MCOperand::createInst(Val));
return *this;
}
- /// \brief Add an operand.
+ /// Add an operand.
MCInstBuilder &addOperand(const MCOperand &Op) {
Inst.addOperand(Op);
return *this;
} // end namespace HexStyle
-/// \brief This is an instance of a target assembly language printer that
+/// This is an instance of a target assembly language printer that
/// converts an MCInst to valid target assembly syntax.
class MCInstPrinter {
protected:
- /// \brief A stream that comments can be emitted to if desired. Each comment
+ /// A stream that comments can be emitted to if desired. Each comment
/// must end with a newline. This will be null if verbose assembly emission
/// is disable.
raw_ostream *CommentStream = nullptr;
virtual ~MCInstPrinter();
- /// \brief Specify a stream to emit comments to.
+ /// Specify a stream to emit comments to.
void setCommentStream(raw_ostream &OS) { CommentStream = &OS; }
- /// \brief Print the specified MCInst to the specified raw_ostream.
+ /// Print the specified MCInst to the specified raw_ostream.
virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot,
const MCSubtargetInfo &STI) = 0;
- /// \brief Return the name of the specified opcode enum (e.g. "MOV32ri") or
+ /// Return the name of the specified opcode enum (e.g. "MOV32ri") or
/// empty if we can't resolve it.
StringRef getOpcodeName(unsigned Opcode) const;
- /// \brief Print the assembler register name.
+ /// Print the assembler register name.
virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
bool getUseMarkup() const { return UseMarkup; }
return Info->get(Inst.getOpcode()).isTerminator();
}
- /// \brief Given a branch instruction try to get the address the branch
+ /// Given a branch instruction try to get the address the branch
/// targets. Return true on success, and the address in Target.
virtual bool
evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
EARLY_CLOBBER // Operand is an early clobber register operand
};
-/// \brief These are flags set on operands, but should be considered
+/// These are flags set on operands, but should be considered
/// private, all access should go through the MCOperandInfo accessors.
/// See the accessors for a description of what these are.
enum OperandFlags { LookupPtrRegClass = 0, Predicate, OptionalDef };
-/// \brief Operands are tagged with one of the values of this enum.
+/// Operands are tagged with one of the values of this enum.
enum OperandType {
OPERAND_UNKNOWN = 0,
OPERAND_IMMEDIATE = 1,
}
-/// \brief This holds information about one operand of a machine instruction,
+/// This holds information about one operand of a machine instruction,
/// indicating the register class for register operands, etc.
class MCOperandInfo {
public:
- /// \brief This specifies the register class enumeration of the operand
+ /// This specifies the register class enumeration of the operand
/// if the operand is a register. If isLookupPtrRegClass is set, then this is
/// an index that is passed to TargetRegisterInfo::getPointerRegClass(x) to
/// get a dynamic register class.
int16_t RegClass;
- /// \brief These are flags from the MCOI::OperandFlags enum.
+ /// These are flags from the MCOI::OperandFlags enum.
uint8_t Flags;
- /// \brief Information about the type of the operand.
+ /// Information about the type of the operand.
uint8_t OperandType;
- /// \brief The lower 16 bits are used to specify which constraints are set.
+ /// The lower 16 bits are used to specify which constraints are set.
/// The higher 16 bits are used to specify the value of constraints (4 bits
/// each).
uint32_t Constraints;
- /// \brief Set if this operand is a pointer value and it requires a callback
+ /// Set if this operand is a pointer value and it requires a callback
/// to look up its register class.
bool isLookupPtrRegClass() const {
return Flags & (1 << MCOI::LookupPtrRegClass);
}
- /// \brief Set if this is one of the operands that made up of the predicate
+ /// Set if this is one of the operands that made up of the predicate
/// operand that controls an isPredicable() instruction.
bool isPredicate() const { return Flags & (1 << MCOI::Predicate); }
- /// \brief Set if this operand is a optional def.
+ /// Set if this operand is a optional def.
bool isOptionalDef() const { return Flags & (1 << MCOI::OptionalDef); }
bool isGenericType() const {
//===----------------------------------------------------------------------===//
namespace MCID {
-/// \brief These should be considered private to the implementation of the
+/// These should be considered private to the implementation of the
/// MCInstrDesc class. Clients should use the predicate methods on MCInstrDesc,
/// not use these directly. These all correspond to bitfields in the
/// MCInstrDesc::Flags field.
};
}
-/// \brief Describe properties that are true of each instruction in the target
+/// Describe properties that are true of each instruction in the target
/// description file. This captures information about side effects, register
/// use and many other things. There is one instance of this struct for each
/// target instruction class, and the MachineInstr class points to this struct
bool (*ComplexDeprecationInfo)(MCInst &, const MCSubtargetInfo &,
std::string &);
- /// \brief Returns the value of the specific constraint if
+ /// Returns the value of the specific constraint if
/// it is set. Returns -1 if it is not set.
int getOperandConstraint(unsigned OpNum,
MCOI::OperandConstraint Constraint) const {
return -1;
}
- /// \brief Returns true if a certain instruction is deprecated and if so
+ /// Returns true if a certain instruction is deprecated and if so
/// returns the reason in \p Info.
bool getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI,
std::string &Info) const;
- /// \brief Return the opcode number for this descriptor.
+ /// Return the opcode number for this descriptor.
unsigned getOpcode() const { return Opcode; }
- /// \brief Return the number of declared MachineOperands for this
+ /// Return the number of declared MachineOperands for this
/// MachineInstruction. Note that variadic (isVariadic() returns true)
/// instructions may have additional operands at the end of the list, and note
/// that the machine instruction may include implicit register def/uses as
return make_range(opInfo_begin(), opInfo_end());
}
- /// \brief Return the number of MachineOperands that are register
+ /// Return the number of MachineOperands that are register
/// definitions. Register definitions always occur at the start of the
/// machine operand list. This is the number of "outs" in the .td file,
/// and does not include implicit defs.
unsigned getNumDefs() const { return NumDefs; }
- /// \brief Return flags of this instruction.
+ /// Return flags of this instruction.
uint64_t getFlags() const { return Flags; }
- /// \brief Return true if this instruction can have a variable number of
+ /// Return true if this instruction can have a variable number of
/// operands. In this case, the variable operands will be after the normal
/// operands but before the implicit definitions and uses (if any are
/// present).
bool isVariadic() const { return Flags & (1ULL << MCID::Variadic); }
- /// \brief Set if this instruction has an optional definition, e.g.
+ /// Set if this instruction has an optional definition, e.g.
/// ARM instructions which can set condition code if 's' bit is set.
bool hasOptionalDef() const { return Flags & (1ULL << MCID::HasOptionalDef); }
- /// \brief Return true if this is a pseudo instruction that doesn't
+ /// Return true if this is a pseudo instruction that doesn't
/// correspond to a real machine instruction.
bool isPseudo() const { return Flags & (1ULL << MCID::Pseudo); }
- /// \brief Return true if the instruction is a return.
+ /// Return true if the instruction is a return.
bool isReturn() const { return Flags & (1ULL << MCID::Return); }
- /// \brief Return true if the instruction is an add instruction.
+ /// Return true if the instruction is an add instruction.
bool isAdd() const { return Flags & (1ULL << MCID::Add); }
- /// \brief Return true if the instruction is a call.
+ /// Return true if the instruction is a call.
bool isCall() const { return Flags & (1ULL << MCID::Call); }
- /// \brief Returns true if the specified instruction stops control flow
+ /// Returns true if the specified instruction stops control flow
/// from executing the instruction immediately following it. Examples include
/// unconditional branches and return instructions.
bool isBarrier() const { return Flags & (1ULL << MCID::Barrier); }
- /// \brief Returns true if this instruction part of the terminator for
+ /// Returns true if this instruction part of the terminator for
/// a basic block. Typically this is things like return and branch
/// instructions.
///
/// but before control flow occurs.
bool isTerminator() const { return Flags & (1ULL << MCID::Terminator); }
- /// \brief Returns true if this is a conditional, unconditional, or
+ /// Returns true if this is a conditional, unconditional, or
/// indirect branch. Predicates below can be used to discriminate between
/// these cases, and the TargetInstrInfo::AnalyzeBranch method can be used to
/// get more information.
bool isBranch() const { return Flags & (1ULL << MCID::Branch); }
- /// \brief Return true if this is an indirect branch, such as a
+ /// Return true if this is an indirect branch, such as a
/// branch through a register.
bool isIndirectBranch() const { return Flags & (1ULL << MCID::IndirectBranch); }
- /// \brief Return true if this is a branch which may fall
+ /// Return true if this is a branch which may fall
/// through to the next instruction or may transfer control flow to some other
/// block. The TargetInstrInfo::AnalyzeBranch method can be used to get more
/// information about this branch.
return isBranch() & !isBarrier() & !isIndirectBranch();
}
- /// \brief Return true if this is a branch which always
+ /// Return true if this is a branch which always
/// transfers control flow to some other block. The
/// TargetInstrInfo::AnalyzeBranch method can be used to get more information
/// about this branch.
return isBranch() & isBarrier() & !isIndirectBranch();
}
- /// \brief Return true if this is a branch or an instruction which directly
+ /// Return true if this is a branch or an instruction which directly
/// writes to the program counter. Considered 'may' affect rather than
/// 'does' affect as things like predication are not taken into account.
bool mayAffectControlFlow(const MCInst &MI, const MCRegisterInfo &RI) const;
- /// \brief Return true if this instruction has a predicate operand
+ /// Return true if this instruction has a predicate operand
/// that controls execution. It may be set to 'always', or may be set to other
/// values. There are various methods in TargetInstrInfo that can be used to
/// control and modify the predicate in this instruction.
bool isPredicable() const { return Flags & (1ULL << MCID::Predicable); }
- /// \brief Return true if this instruction is a comparison.
+ /// Return true if this instruction is a comparison.
bool isCompare() const { return Flags & (1ULL << MCID::Compare); }
- /// \brief Return true if this instruction is a move immediate
+ /// Return true if this instruction is a move immediate
/// (including conditional moves) instruction.
bool isMoveImmediate() const { return Flags & (1ULL << MCID::MoveImm); }
- /// \brief Return true if this instruction is a bitcast instruction.
+ /// Return true if this instruction is a bitcast instruction.
bool isBitcast() const { return Flags & (1ULL << MCID::Bitcast); }
- /// \brief Return true if this is a select instruction.
+ /// Return true if this is a select instruction.
bool isSelect() const { return Flags & (1ULL << MCID::Select); }
- /// \brief Return true if this instruction cannot be safely
+ /// Return true if this instruction cannot be safely
/// duplicated. For example, if the instruction has a unique labels attached
/// to it, duplicating it would cause multiple definition errors.
bool isNotDuplicable() const { return Flags & (1ULL << MCID::NotDuplicable); }
- /// \brief Returns true if the specified instruction has a delay slot which
+ /// Returns true if the specified instruction has a delay slot which
/// must be filled by the code generator.
bool hasDelaySlot() const { return Flags & (1ULL << MCID::DelaySlot); }
- /// \brief Return true for instructions that can be folded as memory operands
+ /// Return true for instructions that can be folded as memory operands
/// in other instructions. The most common use for this is instructions that
/// are simple loads from memory that don't modify the loaded value in any
/// way, but it can also be used for instructions that can be expressed as
/// that return a value in their only virtual register definition.
bool canFoldAsLoad() const { return Flags & (1ULL << MCID::FoldableAsLoad); }
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic REG_SEQUENCE instructions.
/// E.g., on ARM,
/// dX VMOVDRR rY, rZ
/// override accordingly.
bool isRegSequenceLike() const { return Flags & (1ULL << MCID::RegSequence); }
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic EXTRACT_SUBREG instructions.
/// E.g., on ARM,
/// rX, rY VMOVRRD dZ
return Flags & (1ULL << MCID::ExtractSubreg);
}
- /// \brief Return true if this instruction behaves
+ /// Return true if this instruction behaves
/// the same way as the generic INSERT_SUBREG instructions.
/// E.g., on ARM,
/// dX = VSETLNi32 dY, rZ, Imm
bool isInsertSubregLike() const { return Flags & (1ULL << MCID::InsertSubreg); }
- /// \brief Return true if this instruction is convergent.
+ /// Return true if this instruction is convergent.
///
/// Convergent instructions may not be made control-dependent on any
/// additional values.
// Side Effect Analysis
//===--------------------------------------------------------------------===//
- /// \brief Return true if this instruction could possibly read memory.
+ /// Return true if this instruction could possibly read memory.
/// Instructions with this flag set are not necessarily simple load
/// instructions, they may load a value and modify it, for example.
bool mayLoad() const { return Flags & (1ULL << MCID::MayLoad); }
- /// \brief Return true if this instruction could possibly modify memory.
+ /// Return true if this instruction could possibly modify memory.
/// Instructions with this flag set are not necessarily simple store
/// instructions, they may store a modified value based on their operands, or
/// may not actually modify anything, for example.
bool mayStore() const { return Flags & (1ULL << MCID::MayStore); }
- /// \brief Return true if this instruction has side
+ /// Return true if this instruction has side
/// effects that are not modeled by other flags. This does not return true
/// for instructions whose effects are captured by:
///
// Flags that indicate whether an instruction can be modified by a method.
//===--------------------------------------------------------------------===//
- /// \brief Return true if this may be a 2- or 3-address instruction (of the
+ /// Return true if this may be a 2- or 3-address instruction (of the
/// form "X = op Y, Z, ..."), which produces the same result if Y and Z are
/// exchanged. If this flag is set, then the
/// TargetInstrInfo::commuteInstruction method may be used to hack on the
/// commute them.
bool isCommutable() const { return Flags & (1ULL << MCID::Commutable); }
- /// \brief Return true if this is a 2-address instruction which can be changed
+ /// Return true if this is a 2-address instruction which can be changed
/// into a 3-address instruction if needed. Doing this transformation can be
/// profitable in the register allocator, because it means that the
/// instruction can use a 2-address form if possible, but degrade into a less
return Flags & (1ULL << MCID::ConvertibleTo3Addr);
}
- /// \brief Return true if this instruction requires custom insertion support
+ /// Return true if this instruction requires custom insertion support
/// when the DAG scheduler is inserting it into a machine basic block. If
/// this is true for the instruction, it basically means that it is a pseudo
/// instruction used at SelectionDAG time that is expanded out into magic code
return Flags & (1ULL << MCID::UsesCustomInserter);
}
- /// \brief Return true if this instruction requires *adjustment* after
+ /// Return true if this instruction requires *adjustment* after
/// instruction selection by calling a target hook. For example, this can be
/// used to fill in ARM 's' optional operand depending on whether the
/// conditional flag register is used.
bool hasPostISelHook() const { return Flags & (1ULL << MCID::HasPostISelHook); }
- /// \brief Returns true if this instruction is a candidate for remat. This
+ /// Returns true if this instruction is a candidate for remat. This
/// flag is only used in TargetInstrInfo method isTriviallyRematerializable.
///
/// If this flag is set, the isReallyTriviallyReMaterializable()
return Flags & (1ULL << MCID::Rematerializable);
}
- /// \brief Returns true if this instruction has the same cost (or less) than a
+ /// Returns true if this instruction has the same cost (or less) than a
/// move instruction. This is useful during certain types of optimizations
/// (e.g., remat during two-address conversion or machine licm) where we would
/// like to remat or hoist the instruction, but not if it costs more than
/// for different subtargets.
bool isAsCheapAsAMove() const { return Flags & (1ULL << MCID::CheapAsAMove); }
- /// \brief Returns true if this instruction source operands have special
+ /// Returns true if this instruction source operands have special
/// register allocation requirements that are not captured by the operand
/// register classes. e.g. ARM::STRD's two source registers must be an even /
/// odd pair, ARM::STM registers have to be in ascending order. Post-register
return Flags & (1ULL << MCID::ExtraSrcRegAllocReq);
}
- /// \brief Returns true if this instruction def operands have special register
+ /// Returns true if this instruction def operands have special register
/// allocation requirements that are not captured by the operand register
/// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
/// ARM::LDM registers have to be in ascending order. Post-register
return Flags & (1ULL << MCID::ExtraDefRegAllocReq);
}
- /// \brief Return a list of registers that are potentially read by any
+ /// Return a list of registers that are potentially read by any
/// instance of this machine instruction. For example, on X86, the "adc"
/// instruction adds two register operands and adds the carry bit in from the
/// flags register. In this case, the instruction is marked as implicitly
/// This method returns null if the instruction has no implicit uses.
const MCPhysReg *getImplicitUses() const { return ImplicitUses; }
- /// \brief Return the number of implicit uses this instruction has.
+ /// Return the number of implicit uses this instruction has.
unsigned getNumImplicitUses() const {
if (!ImplicitUses)
return 0;
return i;
}
- /// \brief Return a list of registers that are potentially written by any
+ /// Return a list of registers that are potentially written by any
/// instance of this machine instruction. For example, on X86, many
/// instructions implicitly set the flags register. In this case, they are
/// marked as setting the FLAGS. Likewise, many instructions always deposit
/// This method returns null if the instruction has no implicit defs.
const MCPhysReg *getImplicitDefs() const { return ImplicitDefs; }
- /// \brief Return the number of implicit defs this instruct has.
+ /// Return the number of implicit defs this instruct has.
unsigned getNumImplicitDefs() const {
if (!ImplicitDefs)
return 0;
return i;
}
- /// \brief Return true if this instruction implicitly
+ /// Return true if this instruction implicitly
/// uses the specified physical register.
bool hasImplicitUseOfPhysReg(unsigned Reg) const {
if (const MCPhysReg *ImpUses = ImplicitUses)
return false;
}
- /// \brief Return true if this instruction implicitly
+ /// Return true if this instruction implicitly
/// defines the specified physical register.
bool hasImplicitDefOfPhysReg(unsigned Reg,
const MCRegisterInfo *MRI = nullptr) const;
- /// \brief Return the scheduling class for this instruction. The
+ /// Return the scheduling class for this instruction. The
/// scheduling class is an index into the InstrItineraryData table. This
/// returns zero if there is no known scheduling information for the
/// instruction.
unsigned getSchedClass() const { return SchedClass; }
- /// \brief Return the number of bytes in the encoding of this instruction,
+ /// Return the number of bytes in the encoding of this instruction,
/// or zero if the encoding size cannot be known from the opcode.
unsigned getSize() const { return Size; }
- /// \brief Find the index of the first operand in the
+ /// Find the index of the first operand in the
/// operand list that is used to represent the predicate. It returns -1 if
/// none is found.
int findFirstPredOperandIdx() const {
return -1;
}
- /// \brief Return true if this instruction defines the specified physical
+ /// Return true if this instruction defines the specified physical
/// register, either explicitly or implicitly.
bool hasDefOfPhysReg(const MCInst &MI, unsigned Reg,
const MCRegisterInfo &RI) const;
namespace llvm {
//---------------------------------------------------------------------------
-/// \brief Interface to description of machine instruction set.
+/// Interface to description of machine instruction set.
class MCInstrInfo {
const MCInstrDesc *Desc; // Raw array to allow static init'n
const unsigned *InstrNameIndices; // Array for name indices in InstrNameData
unsigned NumOpcodes; // Number of entries in the desc array
public:
- /// \brief Initialize MCInstrInfo, called by TableGen auto-generated routines.
+ /// Initialize MCInstrInfo, called by TableGen auto-generated routines.
/// *DO NOT USE*.
void InitMCInstrInfo(const MCInstrDesc *D, const unsigned *NI, const char *ND,
unsigned NO) {
unsigned getNumOpcodes() const { return NumOpcodes; }
- /// \brief Return the machine instruction descriptor that corresponds to the
+ /// Return the machine instruction descriptor that corresponds to the
/// specified instruction opcode.
const MCInstrDesc &get(unsigned Opcode) const {
assert(Opcode < NumOpcodes && "Invalid opcode!");
return Desc[Opcode];
}
- /// \brief Returns the name for the instructions with the given opcode.
+ /// Returns the name for the instructions with the given opcode.
StringRef getName(unsigned Opcode) const {
assert(Opcode < NumOpcodes && "Invalid opcode!");
return StringRef(&InstrNameData[InstrNameIndices[Opcode]]);
int NextCycles_; ///< Number of machine cycles to next stage
ReservationKinds Kind_; ///< Kind of the FU reservation
- /// \brief Returns the number of cycles the stage is occupied.
+ /// Returns the number of cycles the stage is occupied.
unsigned getCycles() const {
return Cycles_;
}
- /// \brief Returns the choice of FUs.
+ /// Returns the choice of FUs.
unsigned getUnits() const {
return Units_;
}
return Kind_;
}
- /// \brief Returns the number of cycles from the start of this stage to the
+ /// Returns the number of cycles from the start of this stage to the
/// start of the next stage in the itinerary
unsigned getNextCycles() const {
return (NextCycles_ >= 0) ? (unsigned)NextCycles_ : Cycles_;
: SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F),
Itineraries(SchedModel.InstrItineraries) {}
- /// \brief Returns true if there are no itineraries.
+ /// Returns true if there are no itineraries.
bool isEmpty() const { return Itineraries == nullptr; }
- /// \brief Returns true if the index is for the end marker itinerary.
+ /// Returns true if the index is for the end marker itinerary.
bool isEndMarker(unsigned ItinClassIndx) const {
return ((Itineraries[ItinClassIndx].FirstStage == UINT16_MAX) &&
(Itineraries[ItinClassIndx].LastStage == UINT16_MAX));
}
- /// \brief Return the first stage of the itinerary.
+ /// Return the first stage of the itinerary.
const InstrStage *beginStage(unsigned ItinClassIndx) const {
unsigned StageIdx = Itineraries[ItinClassIndx].FirstStage;
return Stages + StageIdx;
}
- /// \brief Return the last+1 stage of the itinerary.
+ /// Return the last+1 stage of the itinerary.
const InstrStage *endStage(unsigned ItinClassIndx) const {
unsigned StageIdx = Itineraries[ItinClassIndx].LastStage;
return Stages + StageIdx;
}
- /// \brief Return the total stage latency of the given class. The latency is
+ /// Return the total stage latency of the given class. The latency is
/// the maximum completion time for any stage in the itinerary. If no stages
/// exist, it defaults to one cycle.
unsigned getStageLatency(unsigned ItinClassIndx) const {
return Latency;
}
- /// \brief Return the cycle for the given class and operand. Return -1 if no
+ /// Return the cycle for the given class and operand. Return -1 if no
/// cycle is specified for the operand.
int getOperandCycle(unsigned ItinClassIndx, unsigned OperandIdx) const {
if (isEmpty())
return (int)OperandCycles[FirstIdx + OperandIdx];
}
- /// \brief Return true if there is a pipeline forwarding between instructions
+ /// Return true if there is a pipeline forwarding between instructions
/// of itinerary classes DefClass and UseClasses so that value produced by an
/// instruction of itinerary class DefClass, operand index DefIdx can be
/// bypassed when it's read by an instruction of itinerary class UseClass,
Forwardings[FirstUseIdx + UseIdx];
}
- /// \brief Compute and return the use operand latency of a given itinerary
+ /// Compute and return the use operand latency of a given itinerary
/// class and operand index if the value is produced by an instruction of the
/// specified itinerary class and def operand index.
int getOperandLatency(unsigned DefClass, unsigned DefIdx,
return UseCycle;
}
- /// \brief Return the number of micro-ops that the given class decodes to.
+ /// Return the number of micro-ops that the given class decodes to.
/// Return -1 for classes that require dynamic lookup via TargetInstrInfo.
int getNumMicroOps(unsigned ItinClassIndx) const {
if (isEmpty())
class raw_ostream;
-/// \brief Instances of this class represent a label name in the MC file,
+/// Instances of this class represent a label name in the MC file,
/// and MCLabel are created and uniqued by the MCContext class. MCLabel
/// should only be constructed for valid instances in the object file.
class MCLabel {
- // \brief The instance number of this Directional Local Label.
+ // The instance number of this Directional Local Label.
unsigned Instance;
private: // MCContext creates and uniques these.
MCLabel(const MCLabel &) = delete;
MCLabel &operator=(const MCLabel &) = delete;
- /// \brief Get the current instance of this Directional Local Label.
+ /// Get the current instance of this Directional Local Label.
unsigned getInstance() const { return Instance; }
- /// \brief Increment the current instance of this Directional Local Label.
+ /// Increment the current instance of this Directional Local Label.
unsigned incInstance() { return ++Instance; }
- /// \brief Print the value to the stream \p OS.
+ /// Print the value to the stream \p OS.
void print(raw_ostream &OS) const;
- /// \brief Print the value to stderr.
+ /// Print the value to stderr.
void dump() const;
};
class raw_ostream;
class raw_pwrite_stream;
-/// \brief Streaming object file generation interface.
+/// Streaming object file generation interface.
///
/// This class provides an implementation of the MCStreamer interface which is
/// suitable for use with the assembler backend. Specific object file formats
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
bool = false) override;
- /// \brief Emit an instruction to a special fragment, because this instruction
+ /// Emit an instruction to a special fragment, because this instruction
/// can change its size during relaxation.
virtual void EmitInstToFragment(const MCInst &Inst, const MCSubtargetInfo &);
IdKind Kind;
};
-/// \brief Generic Sema callback for assembly parser.
+/// Generic Sema callback for assembly parser.
class MCAsmParserSemaCallback {
public:
virtual ~MCAsmParserSemaCallback();
unsigned &Offset) = 0;
};
-/// \brief Generic assembler parser interface, for use by target specific
+/// Generic assembler parser interface, for use by target specific
/// assembly parsers.
class MCAsmParser {
public:
virtual MCContext &getContext() = 0;
- /// \brief Return the output streamer for the assembler.
+ /// Return the output streamer for the assembler.
virtual MCStreamer &getStreamer() = 0;
MCTargetAsmParser &getTargetParser() const { return *TargetParser; }
void setEnablePrintSchedInfo(bool Value) { EnablePrintSchedInfo = Value; }
bool shouldPrintSchedInfo() { return EnablePrintSchedInfo; }
- /// \brief Run the parser on the input source buffer.
+ /// Run the parser on the input source buffer.
virtual bool Run(bool NoInitialTextSection, bool NoFinalize = false) = 0;
virtual void setParsingInlineAsm(bool V) = 0;
virtual bool isParsingInlineAsm() = 0;
- /// \brief Parse MS-style inline assembly.
+ /// Parse MS-style inline assembly.
virtual bool parseMSInlineAsm(
void *AsmLoc, std::string &AsmString, unsigned &NumOutputs,
unsigned &NumInputs, SmallVectorImpl<std::pair<void *, bool>> &OpDecls,
SmallVectorImpl<std::string> &Clobbers, const MCInstrInfo *MII,
const MCInstPrinter *IP, MCAsmParserSemaCallback &SI) = 0;
- /// \brief Emit a note at the location \p L, with the message \p Msg.
+ /// Emit a note at the location \p L, with the message \p Msg.
virtual void Note(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
- /// \brief Emit a warning at the location \p L, with the message \p Msg.
+ /// Emit a warning at the location \p L, with the message \p Msg.
///
/// \return The return value is true, if warnings are fatal.
virtual bool Warning(SMLoc L, const Twine &Msg, SMRange Range = None) = 0;
- /// \brief Return an error at the location \p L, with the message \p Msg. This
+ /// Return an error at the location \p L, with the message \p Msg. This
/// may be modified before being emitted.
///
/// \return The return value is always true, as an idiomatic convenience to
/// clients.
bool Error(SMLoc L, const Twine &Msg, SMRange Range = None);
- /// \brief Emit an error at the location \p L, with the message \p Msg.
+ /// Emit an error at the location \p L, with the message \p Msg.
///
/// \return The return value is always true, as an idiomatic convenience to
/// clients.
bool addErrorSuffix(const Twine &Suffix);
- /// \brief Get the next AsmToken in the stream, possibly handling file
+ /// Get the next AsmToken in the stream, possibly handling file
/// inclusion first.
virtual const AsmToken &Lex() = 0;
- /// \brief Get the current AsmToken from the stream.
+ /// Get the current AsmToken from the stream.
const AsmToken &getTok() const;
- /// \brief Report an error at the current lexer location.
+ /// Report an error at the current lexer location.
bool TokError(const Twine &Msg, SMRange Range = None);
bool parseTokenLoc(SMLoc &Loc);
bool parseToken(AsmToken::TokenKind T, const Twine &Msg = "unexpected token");
- /// \brief Attempt to parse and consume token, returning true on
+ /// Attempt to parse and consume token, returning true on
/// success.
bool parseOptionalToken(AsmToken::TokenKind T);
bool check(bool P, const Twine &Msg);
bool check(bool P, SMLoc Loc, const Twine &Msg);
- /// \brief Parse an identifier or string (as a quoted identifier) and set \p
+ /// Parse an identifier or string (as a quoted identifier) and set \p
/// Res to the identifier contents.
virtual bool parseIdentifier(StringRef &Res) = 0;
- /// \brief Parse up to the end of statement and return the contents from the
+ /// Parse up to the end of statement and return the contents from the
/// current token until the end of the statement; the current token on exit
/// will be either the EndOfStatement or EOF.
virtual StringRef parseStringToEndOfStatement() = 0;
- /// \brief Parse the current token as a string which may include escaped
+ /// Parse the current token as a string which may include escaped
/// characters and return the string contents.
virtual bool parseEscapedString(std::string &Data) = 0;
- /// \brief Skip to the end of the current statement, for error recovery.
+ /// Skip to the end of the current statement, for error recovery.
virtual void eatToEndOfStatement() = 0;
- /// \brief Parse an arbitrary expression.
+ /// Parse an arbitrary expression.
///
/// \param Res - The value of the expression. The result is undefined
/// on error.
virtual bool parseExpression(const MCExpr *&Res, SMLoc &EndLoc) = 0;
bool parseExpression(const MCExpr *&Res);
- /// \brief Parse a primary expression.
+ /// Parse a primary expression.
///
/// \param Res - The value of the expression. The result is undefined
/// on error.
/// \return - False on success.
virtual bool parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) = 0;
- /// \brief Parse an arbitrary expression, assuming that an initial '(' has
+ /// Parse an arbitrary expression, assuming that an initial '(' has
/// already been consumed.
///
/// \param Res - The value of the expression. The result is undefined
/// \return - False on success.
virtual bool parseParenExpression(const MCExpr *&Res, SMLoc &EndLoc) = 0;
- /// \brief Parse an expression which must evaluate to an absolute value.
+ /// Parse an expression which must evaluate to an absolute value.
///
/// \param Res - The value of the absolute expression. The result is undefined
/// on error.
/// \return - False on success.
virtual bool parseAbsoluteExpression(int64_t &Res) = 0;
- /// \brief Ensure that we have a valid section set in the streamer. Otherwise,
+ /// Ensure that we have a valid section set in the streamer. Otherwise,
/// report an error and switch to .text.
/// \return - False on success.
virtual bool checkForValidSection() = 0;
- /// \brief Parse an arbitrary expression of a specified parenthesis depth,
+ /// Parse an arbitrary expression of a specified parenthesis depth,
/// assuming that the initial '(' characters have already been consumed.
///
/// \param ParenDepth - Specifies how many trailing expressions outside the
SMLoc &EndLoc) = 0;
};
-/// \brief Create an MCAsmParser instance.
+/// Create an MCAsmParser instance.
MCAsmParser *createMCAsmParser(SourceMgr &, MCContext &, MCStreamer &,
const MCAsmInfo &, unsigned CB = 0);
class Twine;
-/// \brief Generic interface for extending the MCAsmParser,
+/// Generic interface for extending the MCAsmParser,
/// which is implemented by target and object file assembly parser
/// implementations.
class MCAsmParserExtension {
MCAsmParserExtension &operator=(const MCAsmParserExtension &) = delete;
virtual ~MCAsmParserExtension();
- /// \brief Initialize the extension for parsing using the given \p Parser.
+ /// Initialize the extension for parsing using the given \p Parser.
/// The extension should use the AsmParser interfaces to register its
/// parsing routines.
virtual void Initialize(MCAsmParser &Parser);
friend class MCRegUnitMaskIterator;
friend class MCRegUnitRootIterator;
- /// \brief Initialize MCRegisterInfo, called by TableGen
+ /// Initialize MCRegisterInfo, called by TableGen
/// auto-generated routines. *DO NOT USE*.
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA,
unsigned PC,
Dwarf2LRegsSize = 0;
}
- /// \brief Used to initialize LLVM register to Dwarf
+ /// Used to initialize LLVM register to Dwarf
/// register number mapping. Called by TableGen auto-generated routines.
/// *DO NOT USE*.
void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size,
}
}
- /// \brief Used to initialize Dwarf register to LLVM
+ /// Used to initialize Dwarf register to LLVM
/// register number mapping. Called by TableGen auto-generated routines.
/// *DO NOT USE*.
void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size,
L2CVRegs[LLVMReg] = CVReg;
}
- /// \brief This method should return the register where the return
+ /// This method should return the register where the return
/// address can be found.
unsigned getRARegister() const {
return RAReg;
return Desc[RegNo];
}
- /// \brief Provide a get method, equivalent to [], but more useful with a
+ /// Provide a get method, equivalent to [], but more useful with a
/// pointer to this object.
const MCRegisterDesc &get(unsigned RegNo) const {
return operator[](RegNo);
}
- /// \brief Returns the physical register number of sub-register "Index"
+ /// Returns the physical register number of sub-register "Index"
/// for physical register RegNo. Return zero if the sub-register does not
/// exist.
unsigned getSubReg(unsigned Reg, unsigned Idx) const;
- /// \brief Return a super-register of the specified register
+ /// Return a super-register of the specified register
/// Reg so its sub-register of index SubIdx is Reg.
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
const MCRegisterClass *RC) const;
- /// \brief For a given register pair, return the sub-register index
+ /// For a given register pair, return the sub-register index
/// if the second register is a sub-register of the first. Return zero
/// otherwise.
unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
- /// \brief Get the size of the bit range covered by a sub-register index.
+ /// Get the size of the bit range covered by a sub-register index.
/// If the index isn't continuous, return the sum of the sizes of its parts.
/// If the index is used to access subregisters of different sizes, return -1.
unsigned getSubRegIdxSize(unsigned Idx) const;
- /// \brief Get the offset of the bit range covered by a sub-register index.
+ /// Get the offset of the bit range covered by a sub-register index.
/// If an Offset doesn't make sense (the index isn't continuous, or is used to
/// access sub-registers at different offsets), return -1.
unsigned getSubRegIdxOffset(unsigned Idx) const;
- /// \brief Return the human-readable symbolic target-specific name for the
+ /// Return the human-readable symbolic target-specific name for the
/// specified physical register.
const char *getName(unsigned RegNo) const {
return RegStrings + get(RegNo).Name;
}
- /// \brief Return the number of registers this target has (useful for
+ /// Return the number of registers this target has (useful for
/// sizing arrays holding per register information)
unsigned getNumRegs() const {
return NumRegs;
}
- /// \brief Return the number of sub-register indices
+ /// Return the number of sub-register indices
/// understood by the target. Index 0 is reserved for the no-op sub-register,
/// while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
unsigned getNumSubRegIndices() const {
return NumSubRegIndices;
}
- /// \brief Return the number of (native) register units in the
+ /// Return the number of (native) register units in the
/// target. Register units are numbered from 0 to getNumRegUnits() - 1. They
/// can be accessed through MCRegUnitIterator defined below.
unsigned getNumRegUnits() const {
return NumRegUnits;
}
- /// \brief Map a target register to an equivalent dwarf register
+ /// Map a target register to an equivalent dwarf register
/// number. Returns -1 if there is no equivalent value. The second
/// parameter allows targets to use different numberings for EH info and
/// debugging info.
int getDwarfRegNum(unsigned RegNum, bool isEH) const;
- /// \brief Map a dwarf register back to a target register.
+ /// Map a dwarf register back to a target register.
int getLLVMRegNum(unsigned RegNum, bool isEH) const;
- /// \brief Map a DWARF EH register back to a target register (same as
+ /// Map a DWARF EH register back to a target register (same as
/// getLLVMRegNum(RegNum, true)) but return -1 if there is no mapping,
/// rather than asserting that there must be one.
int getLLVMRegNumFromEH(unsigned RegNum) const;
- /// \brief Map a target EH register number to an equivalent DWARF register
+ /// Map a target EH register number to an equivalent DWARF register
/// number.
int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const;
- /// \brief Map a target register to an equivalent SEH register
+ /// Map a target register to an equivalent SEH register
/// number. Returns LLVM register number if there is no equivalent value.
int getSEHRegNum(unsigned RegNum) const;
- /// \brief Map a target register to an equivalent CodeView register
+ /// Map a target register to an equivalent CodeView register
/// number.
int getCodeViewRegNum(unsigned RegNum) const;
return (unsigned)(regclass_end()-regclass_begin());
}
- /// \brief Returns the register class associated with the enumeration
+ /// Returns the register class associated with the enumeration
/// value. See class MCOperandInfo.
const MCRegisterClass& getRegClass(unsigned i) const {
assert(i < getNumRegClasses() && "Register Class ID out of range");
return RegClassStrings + Class->NameIdx;
}
- /// \brief Returns the encoding for RegNo
+ /// Returns the encoding for RegNo
uint16_t getEncodingValue(unsigned RegNo) const {
assert(RegNo < NumRegs &&
"Attempting to get encoding for invalid register number!");
return RegEncodingTable[RegNo];
}
- /// \brief Returns true if RegB is a sub-register of RegA.
+ /// Returns true if RegB is a sub-register of RegA.
bool isSubRegister(unsigned RegA, unsigned RegB) const {
return isSuperRegister(RegB, RegA);
}
- /// \brief Returns true if RegB is a super-register of RegA.
+ /// Returns true if RegB is a super-register of RegA.
bool isSuperRegister(unsigned RegA, unsigned RegB) const;
- /// \brief Returns true if RegB is a sub-register of RegA or if RegB == RegA.
+ /// Returns true if RegB is a sub-register of RegA or if RegB == RegA.
bool isSubRegisterEq(unsigned RegA, unsigned RegB) const {
return isSuperRegisterEq(RegB, RegA);
}
- /// \brief Returns true if RegB is a super-register of RegA or if
+ /// Returns true if RegB is a super-register of RegA or if
/// RegB == RegA.
bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const {
return RegA == RegB || isSuperRegister(RegA, RegB);
}
- /// \brief Returns true if RegB is a super-register or sub-register of RegA
+ /// Returns true if RegB is a super-register or sub-register of RegA
/// or if RegB == RegA.
bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const {
return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB);
Reg1 = MCRI->RegUnitRoots[RegUnit][1];
}
- /// \brief Dereference to get the current root register.
+ /// Dereference to get the current root register.
unsigned operator*() const {
return Reg0;
}
- /// \brief Check if the iterator is at the end of the list.
+ /// Check if the iterator is at the end of the list.
bool isValid() const {
return Reg0;
}
- /// \brief Preincrement to move to the next root register.
+ /// Preincrement to move to the next root register.
void operator++() {
assert(isValid() && "Cannot move off the end of the list.");
Reg0 = Reg1;
public:
enum SectionVariant { SV_COFF = 0, SV_ELF, SV_MachO, SV_Wasm };
- /// \brief Express the state of bundle locked groups while emitting code.
+ /// Express the state of bundle locked groups while emitting code.
enum BundleLockStateType {
NotBundleLocked,
BundleLocked,
/// The index of this section in the layout order.
unsigned LayoutOrder;
- /// \brief Keeping track of bundle-locked state.
+ /// Keeping track of bundle-locked state.
BundleLockStateType BundleLockState = NotBundleLocked;
- /// \brief Current nesting depth of bundle_lock directives.
+ /// Current nesting depth of bundle_lock directives.
unsigned BundleLockNestingDepth = 0;
- /// \brief We've seen a bundle_lock directive but not its first instruction
+ /// We've seen a bundle_lock directive but not its first instruction
/// yet.
bool BundleGroupBeforeFirstInst : 1;
std::unique_ptr<AssemblerConstantPools> ConstantPools;
};
-/// \brief Streaming machine code generation interface.
+/// Streaming machine code generation interface.
///
/// This interface is intended to provide a programatic interface that is very
/// similar to the level that an assembler .s file provides. It has callbacks
/// closed. Otherwise, issue an error and return null.
WinEH::FrameInfo *EnsureValidWinFrameInfo(SMLoc Loc);
- /// \brief Tracks an index to represent the order a symbol was emitted in.
+ /// Tracks an index to represent the order a symbol was emitted in.
/// Zero means we did not emit that symbol.
DenseMap<const MCSymbol *, unsigned> SymbolOrdering;
- /// \brief This is stack of current and previous section values saved by
+ /// This is stack of current and previous section values saved by
/// PushSection.
SmallVector<std::pair<MCSectionSubPair, MCSectionSubPair>, 4> SectionStack;
/// \name Assembly File Formatting.
/// @{
- /// \brief Return true if this streamer supports verbose assembly and if it is
+ /// Return true if this streamer supports verbose assembly and if it is
/// enabled.
virtual bool isVerboseAsm() const { return false; }
- /// \brief Return true if this asm streamer supports emitting unformatted text
+ /// Return true if this asm streamer supports emitting unformatted text
/// to the .s file with EmitRawText.
virtual bool hasRawTextSupport() const { return false; }
- /// \brief Is the integrated assembler required for this streamer to function
+ /// Is the integrated assembler required for this streamer to function
/// correctly?
virtual bool isIntegratedAssemblerRequired() const { return false; }
- /// \brief Add a textual comment.
+ /// Add a textual comment.
///
/// Typically for comments that can be emitted to the generated .s
/// file if applicable as a QoI issue to make the output of the compiler
/// with a false value.
virtual void AddComment(const Twine &T, bool EOL = true) {}
- /// \brief Return a raw_ostream that comments can be written to. Unlike
+ /// Return a raw_ostream that comments can be written to. Unlike
/// AddComment, you are required to terminate comments with \n if you use this
/// method.
virtual raw_ostream &GetCommentOS();
- /// \brief Print T and prefix it with the comment string (normally #) and
+ /// Print T and prefix it with the comment string (normally #) and
/// optionally a tab. This prints the comment immediately, not at the end of
/// the current line. It is basically a safe version of EmitRawText: since it
/// only prints comments, the object streamer ignores it instead of asserting.
virtual void emitRawComment(const Twine &T, bool TabPrefix = true);
- /// \brief Add explicit comment T. T is required to be a valid
+ /// Add explicit comment T. T is required to be a valid
/// comment in the output and does not need to be escaped.
virtual void addExplicitComment(const Twine &T);
- /// \brief Emit added explicit comments.
+ /// Emit added explicit comments.
virtual void emitExplicitComments();
/// AddBlankLine - Emit a blank line to a .s file to pretty it up.
/// \name Symbol & Section Management
/// @{
- /// \brief Return the current section that the streamer is emitting code to.
+ /// Return the current section that the streamer is emitting code to.
MCSectionSubPair getCurrentSection() const {
if (!SectionStack.empty())
return SectionStack.back().first;
}
MCSection *getCurrentSectionOnly() const { return getCurrentSection().first; }
- /// \brief Return the previous section that the streamer is emitting code to.
+ /// Return the previous section that the streamer is emitting code to.
MCSectionSubPair getPreviousSection() const {
if (!SectionStack.empty())
return SectionStack.back().second;
return MCSectionSubPair();
}
- /// \brief Returns an index to represent the order a symbol was emitted in.
+ /// Returns an index to represent the order a symbol was emitted in.
/// (zero if we did not emit that symbol)
unsigned GetSymbolOrder(const MCSymbol *Sym) const {
return SymbolOrdering.lookup(Sym);
}
- /// \brief Update streamer for a new active section.
+ /// Update streamer for a new active section.
///
/// This is called by PopSection and SwitchSection, if the current
/// section changes.
virtual void ChangeSection(MCSection *, const MCExpr *);
- /// \brief Save the current and previous section on the section stack.
+ /// Save the current and previous section on the section stack.
void PushSection() {
SectionStack.push_back(
std::make_pair(getCurrentSection(), getPreviousSection()));
}
- /// \brief Restore the current and previous section from the section stack.
+ /// Restore the current and previous section from the section stack.
/// Calls ChangeSection as needed.
///
/// Returns false if the stack was empty.
virtual void SwitchSection(MCSection *Section,
const MCExpr *Subsection = nullptr);
- /// \brief Set the current section where code is being emitted to \p Section.
+ /// Set the current section where code is being emitted to \p Section.
/// This is required to update CurSection. This version does not call
/// ChangeSection.
void SwitchSectionNoChange(MCSection *Section,
SectionStack.back().first = MCSectionSubPair(Section, Subsection);
}
- /// \brief Create the default sections and set the initial one.
+ /// Create the default sections and set the initial one.
virtual void InitSections(bool NoExecStack);
MCSymbol *endSection(MCSection *Section);
- /// \brief Sets the symbol's section.
+ /// Sets the symbol's section.
///
/// Each emitted symbol will be tracked in the ordering table,
/// so we can sort on them later.
void AssignFragment(MCSymbol *Symbol, MCFragment *Fragment);
- /// \brief Emit a label for \p Symbol into the current section.
+ /// Emit a label for \p Symbol into the current section.
///
/// This corresponds to an assembler statement such as:
/// foo:
virtual void EmitEHSymAttributes(const MCSymbol *Symbol, MCSymbol *EHSymbol);
- /// \brief Note in the output the specified \p Flag.
+ /// Note in the output the specified \p Flag.
virtual void EmitAssemblerFlag(MCAssemblerFlag Flag);
- /// \brief Emit the given list \p Options of strings as linker
+ /// Emit the given list \p Options of strings as linker
/// options into the output.
virtual void EmitLinkerOptions(ArrayRef<std::string> Kind) {}
- /// \brief Note in the output the specified region \p Kind.
+ /// Note in the output the specified region \p Kind.
virtual void EmitDataRegion(MCDataRegionType Kind) {}
- /// \brief Specify the Mach-O minimum deployment target version.
+ /// Specify the Mach-O minimum deployment target version.
virtual void EmitVersionMin(MCVersionMinType Type, unsigned Major,
unsigned Minor, unsigned Update) {}
void EmitVersionForTarget(const Triple &Target);
- /// \brief Note in the output that the specified \p Func is a Thumb mode
+ /// Note in the output that the specified \p Func is a Thumb mode
/// function (ARM target only).
virtual void EmitThumbFunc(MCSymbol *Func);
- /// \brief Emit an assignment of \p Value to \p Symbol.
+ /// Emit an assignment of \p Value to \p Symbol.
///
/// This corresponds to an assembler statement such as:
/// symbol = value
/// \param Value - The value for the symbol.
virtual void EmitAssignment(MCSymbol *Symbol, const MCExpr *Value);
- /// \brief Emit an weak reference from \p Alias to \p Symbol.
+ /// Emit an weak reference from \p Alias to \p Symbol.
///
/// This corresponds to an assembler statement such as:
/// .weakref alias, symbol
/// \param Symbol - The symbol being aliased.
virtual void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol);
- /// \brief Add the given \p Attribute to \p Symbol.
+ /// Add the given \p Attribute to \p Symbol.
virtual bool EmitSymbolAttribute(MCSymbol *Symbol,
MCSymbolAttr Attribute) = 0;
- /// \brief Set the \p DescValue for the \p Symbol.
+ /// Set the \p DescValue for the \p Symbol.
///
/// \param Symbol - The symbol to have its n_desc field set.
/// \param DescValue - The value to set into the n_desc field.
virtual void EmitSymbolDesc(MCSymbol *Symbol, unsigned DescValue);
- /// \brief Start emitting COFF symbol definition
+ /// Start emitting COFF symbol definition
///
/// \param Symbol - The symbol to have its External & Type fields set.
virtual void BeginCOFFSymbolDef(const MCSymbol *Symbol);
- /// \brief Emit the storage class of the symbol.
+ /// Emit the storage class of the symbol.
///
/// \param StorageClass - The storage class the symbol should have.
virtual void EmitCOFFSymbolStorageClass(int StorageClass);
- /// \brief Emit the type of the symbol.
+ /// Emit the type of the symbol.
///
/// \param Type - A COFF type identifier (see COFF::SymbolType in X86COFF.h)
virtual void EmitCOFFSymbolType(int Type);
- /// \brief Marks the end of the symbol definition.
+ /// Marks the end of the symbol definition.
virtual void EndCOFFSymbolDef();
virtual void EmitCOFFSafeSEH(MCSymbol const *Symbol);
- /// \brief Emits the symbol table index of a Symbol into the current section.
+ /// Emits the symbol table index of a Symbol into the current section.
virtual void EmitCOFFSymbolIndex(MCSymbol const *Symbol);
- /// \brief Emits a COFF section index.
+ /// Emits a COFF section index.
///
/// \param Symbol - Symbol the section number relocation should point to.
virtual void EmitCOFFSectionIndex(MCSymbol const *Symbol);
- /// \brief Emits a COFF section relative relocation.
+ /// Emits a COFF section relative relocation.
///
/// \param Symbol - Symbol the section relative relocation should point to.
virtual void EmitCOFFSecRel32(MCSymbol const *Symbol, uint64_t Offset);
- /// \brief Emit an ELF .size directive.
+ /// Emit an ELF .size directive.
///
/// This corresponds to an assembler statement such as:
/// .size symbol, expression
virtual void emitELFSize(MCSymbol *Symbol, const MCExpr *Value);
- /// \brief Emit an ELF .symver directive.
+ /// Emit an ELF .symver directive.
///
/// This corresponds to an assembler statement such as:
/// .symver _start, foo@@SOME_VERSION
virtual void emitELFSymverDirective(StringRef AliasName,
const MCSymbol *Aliasee);
- /// \brief Emit a Linker Optimization Hint (LOH) directive.
+ /// Emit a Linker Optimization Hint (LOH) directive.
/// \param Args - Arguments of the LOH.
virtual void EmitLOHDirective(MCLOHType Kind, const MCLOHArgs &Args) {}
- /// \brief Emit a common symbol.
+ /// Emit a common symbol.
///
/// \param Symbol - The common symbol to emit.
/// \param Size - The size of the common symbol.
virtual void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment) = 0;
- /// \brief Emit a local common (.lcomm) symbol.
+ /// Emit a local common (.lcomm) symbol.
///
/// \param Symbol - The common symbol to emit.
/// \param Size - The size of the common symbol.
virtual void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size,
unsigned ByteAlignment);
- /// \brief Emit the zerofill section and an optional symbol.
+ /// Emit the zerofill section and an optional symbol.
///
/// \param Section - The zerofill section to create and or to put the symbol
/// \param Symbol - The zerofill symbol to emit, if non-NULL.
virtual void EmitZerofill(MCSection *Section, MCSymbol *Symbol = nullptr,
uint64_t Size = 0, unsigned ByteAlignment = 0) = 0;
- /// \brief Emit a thread local bss (.tbss) symbol.
+ /// Emit a thread local bss (.tbss) symbol.
///
/// \param Section - The thread local common section.
/// \param Symbol - The thread local common symbol to emit.
/// \name Generating Data
/// @{
- /// \brief Emit the bytes in \p Data into the output.
+ /// Emit the bytes in \p Data into the output.
///
/// This is used to implement assembler directives such as .byte, .ascii,
/// etc.
/// method uses .byte directives instead of .ascii or .asciz for readability.
virtual void EmitBinaryData(StringRef Data);
- /// \brief Emit the expression \p Value into the output as a native
+ /// Emit the expression \p Value into the output as a native
/// integer of the given \p Size bytes.
///
/// This is used to implement assembler directives such as .word, .quad,
void EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc = SMLoc());
- /// \brief Special case of EmitValue that avoids the client having
+ /// Special case of EmitValue that avoids the client having
/// to pass in a MCExpr for constant integers.
virtual void EmitIntValue(uint64_t Value, unsigned Size);
virtual void EmitSLEB128Value(const MCExpr *Value);
- /// \brief Special case of EmitULEB128Value that avoids the client having to
+ /// Special case of EmitULEB128Value that avoids the client having to
/// pass in a MCExpr for constant integers.
void EmitULEB128IntValue(uint64_t Value);
- /// \brief Special case of EmitSLEB128Value that avoids the client having to
+ /// Special case of EmitSLEB128Value that avoids the client having to
/// pass in a MCExpr for constant integers.
void EmitSLEB128IntValue(int64_t Value);
- /// \brief Special case of EmitValue that avoids the client having to pass in
+ /// Special case of EmitValue that avoids the client having to pass in
/// a MCExpr for MCSymbols.
void EmitSymbolValue(const MCSymbol *Sym, unsigned Size,
bool IsSectionRelative = false);
- /// \brief Emit the expression \p Value into the output as a dtprel
+ /// Emit the expression \p Value into the output as a dtprel
/// (64-bit DTP relative) value.
///
/// This is used to implement assembler directives such as .dtpreldword on
/// targets that support them.
virtual void EmitDTPRel64Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a dtprel
+ /// Emit the expression \p Value into the output as a dtprel
/// (32-bit DTP relative) value.
///
/// This is used to implement assembler directives such as .dtprelword on
/// targets that support them.
virtual void EmitDTPRel32Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a tprel
+ /// Emit the expression \p Value into the output as a tprel
/// (64-bit TP relative) value.
///
/// This is used to implement assembler directives such as .tpreldword on
/// targets that support them.
virtual void EmitTPRel64Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a tprel
+ /// Emit the expression \p Value into the output as a tprel
/// (32-bit TP relative) value.
///
/// This is used to implement assembler directives such as .tprelword on
/// targets that support them.
virtual void EmitTPRel32Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a gprel64 (64-bit
+ /// Emit the expression \p Value into the output as a gprel64 (64-bit
/// GP relative) value.
///
/// This is used to implement assembler directives such as .gpdword on
/// targets that support them.
virtual void EmitGPRel64Value(const MCExpr *Value);
- /// \brief Emit the expression \p Value into the output as a gprel32 (32-bit
+ /// Emit the expression \p Value into the output as a gprel32 (32-bit
/// GP relative) value.
///
/// This is used to implement assembler directives such as .gprel32 on
/// targets that support them.
virtual void EmitGPRel32Value(const MCExpr *Value);
- /// \brief Emit NumBytes bytes worth of the value specified by FillValue.
+ /// Emit NumBytes bytes worth of the value specified by FillValue.
/// This implements directives such as '.space'.
void emitFill(uint64_t NumBytes, uint8_t FillValue);
- /// \brief Emit \p Size bytes worth of the value specified by \p FillValue.
+ /// Emit \p Size bytes worth of the value specified by \p FillValue.
///
/// This is used to implement assembler directives such as .space or .skip.
///
virtual void emitFill(const MCExpr &NumBytes, uint64_t FillValue,
SMLoc Loc = SMLoc());
- /// \brief Emit \p NumValues copies of \p Size bytes. Each \p Size bytes is
+ /// Emit \p NumValues copies of \p Size bytes. Each \p Size bytes is
/// taken from the lowest order 4 bytes of \p Expr expression.
///
/// This is used to implement assembler directives such as .fill.
virtual void emitFill(const MCExpr &NumValues, int64_t Size, int64_t Expr,
SMLoc Loc = SMLoc());
- /// \brief Emit NumBytes worth of zeros.
+ /// Emit NumBytes worth of zeros.
/// This function properly handles data in virtual sections.
void EmitZeros(uint64_t NumBytes);
- /// \brief Emit some number of copies of \p Value until the byte alignment \p
+ /// Emit some number of copies of \p Value until the byte alignment \p
/// ByteAlignment is reached.
///
/// If the number of bytes need to emit for the alignment is not a multiple
unsigned ValueSize = 1,
unsigned MaxBytesToEmit = 0);
- /// \brief Emit nops until the byte alignment \p ByteAlignment is reached.
+ /// Emit nops until the byte alignment \p ByteAlignment is reached.
///
/// This used to align code where the alignment bytes may be executed. This
/// can emit different bytes for different sizes to optimize execution.
virtual void EmitCodeAlignment(unsigned ByteAlignment,
unsigned MaxBytesToEmit = 0);
- /// \brief Emit some number of copies of \p Value until the byte offset \p
+ /// Emit some number of copies of \p Value until the byte offset \p
/// Offset is reached.
///
/// This is used to implement assembler directives such as .org.
/// @}
- /// \brief Switch to a new logical file. This is used to implement the '.file
+ /// Switch to a new logical file. This is used to implement the '.file
/// "foo.c"' assembler directive.
virtual void EmitFileDirective(StringRef Filename);
- /// \brief Emit the "identifiers" directive. This implements the
+ /// Emit the "identifiers" directive. This implements the
/// '.ident "version foo"' assembler directive.
virtual void EmitIdent(StringRef IdentString) {}
- /// \brief Associate a filename with a specified logical file number. This
+ /// Associate a filename with a specified logical file number. This
/// implements the DWARF2 '.file 4 "foo.c"' assembler directive.
unsigned EmitDwarfFileDirective(unsigned FileNo, StringRef Directory,
StringRef Filename,
Optional<StringRef> Source,
unsigned CUID = 0);
- /// \brief This implements the DWARF2 '.loc fileno lineno ...' assembler
+ /// This implements the DWARF2 '.loc fileno lineno ...' assembler
/// directive.
virtual void EmitDwarfLocDirective(unsigned FileNo, unsigned Line,
unsigned Column, unsigned Flags,
ArrayRef<uint8_t> Checksum,
unsigned ChecksumKind);
- /// \brief Introduces a function id for use with .cv_loc.
+ /// Introduces a function id for use with .cv_loc.
virtual bool EmitCVFuncIdDirective(unsigned FunctionId);
- /// \brief Introduces an inline call site id for use with .cv_loc. Includes
+ /// Introduces an inline call site id for use with .cv_loc. Includes
/// extra information for inline line table generation.
virtual bool EmitCVInlineSiteIdDirective(unsigned FunctionId, unsigned IAFunc,
unsigned IAFile, unsigned IALine,
unsigned IACol, SMLoc Loc);
- /// \brief This implements the CodeView '.cv_loc' assembler directive.
+ /// This implements the CodeView '.cv_loc' assembler directive.
virtual void EmitCVLocDirective(unsigned FunctionId, unsigned FileNo,
unsigned Line, unsigned Column,
bool PrologueEnd, bool IsStmt,
StringRef FileName, SMLoc Loc);
- /// \brief This implements the CodeView '.cv_linetable' assembler directive.
+ /// This implements the CodeView '.cv_linetable' assembler directive.
virtual void EmitCVLinetableDirective(unsigned FunctionId,
const MCSymbol *FnStart,
const MCSymbol *FnEnd);
- /// \brief This implements the CodeView '.cv_inline_linetable' assembler
+ /// This implements the CodeView '.cv_inline_linetable' assembler
/// directive.
virtual void EmitCVInlineLinetableDirective(unsigned PrimaryFunctionId,
unsigned SourceFileId,
const MCSymbol *FnStartSym,
const MCSymbol *FnEndSym);
- /// \brief This implements the CodeView '.cv_def_range' assembler
+ /// This implements the CodeView '.cv_def_range' assembler
/// directive.
virtual void EmitCVDefRangeDirective(
ArrayRef<std::pair<const MCSymbol *, const MCSymbol *>> Ranges,
StringRef FixedSizePortion);
- /// \brief This implements the CodeView '.cv_stringtable' assembler directive.
+ /// This implements the CodeView '.cv_stringtable' assembler directive.
virtual void EmitCVStringTableDirective() {}
- /// \brief This implements the CodeView '.cv_filechecksums' assembler directive.
+ /// This implements the CodeView '.cv_filechecksums' assembler directive.
virtual void EmitCVFileChecksumsDirective() {}
/// This implements the CodeView '.cv_filechecksumoffset' assembler
virtual void EmitSyntaxDirective();
- /// \brief Emit a .reloc directive.
+ /// Emit a .reloc directive.
/// Returns true if the relocation could not be emitted because Name is not
/// known.
virtual bool EmitRelocDirective(const MCExpr &Offset, StringRef Name,
return true;
}
- /// \brief Emit the given \p Instruction into the current section.
+ /// Emit the given \p Instruction into the current section.
/// PrintSchedInfo == true then schedul comment should be added to output
virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
bool PrintSchedInfo = false);
- /// \brief Set the bundle alignment mode from now on in the section.
+ /// Set the bundle alignment mode from now on in the section.
/// The argument is the power of 2 to which the alignment is set. The
/// value 0 means turn the bundle alignment off.
virtual void EmitBundleAlignMode(unsigned AlignPow2);
- /// \brief The following instructions are a bundle-locked group.
+ /// The following instructions are a bundle-locked group.
///
/// \param AlignToEnd - If true, the bundle-locked group will be aligned to
/// the end of a bundle.
virtual void EmitBundleLock(bool AlignToEnd);
- /// \brief Ends a bundle-locked group.
+ /// Ends a bundle-locked group.
virtual void EmitBundleUnlock();
- /// \brief If this file is backed by a assembly streamer, this dumps the
+ /// If this file is backed by a assembly streamer, this dumps the
/// specified string in the output .s file. This capability is indicated by
/// the hasRawTextSupport() predicate. By default this aborts.
void EmitRawText(const Twine &String);
- /// \brief Streamer specific finalization.
+ /// Streamer specific finalization.
virtual void FinishImpl();
- /// \brief Finish emission of machine code.
+ /// Finish emission of machine code.
void Finish();
virtual bool mayHaveInstructions(MCSection &Sec) const { return true; }
/// "Lfoo" or ".foo".
unsigned IsTemporary : 1;
- /// \brief True if this symbol can be redefined.
+ /// True if this symbol can be redefined.
unsigned IsRedefinable : 1;
/// IsUsed - True if this symbol has been used.
friend class MCExpr;
friend class MCContext;
- /// \brief The name for a symbol.
+ /// The name for a symbol.
/// MCSymbol contains a uint64_t so is probably aligned to 8. On a 32-bit
/// system, the name is a pointer so isn't going to satisfy the 8 byte
/// alignment of uint64_t. Account for that here.
private:
void operator delete(void *);
- /// \brief Placement delete - required by std, but never called.
+ /// Placement delete - required by std, but never called.
void operator delete(void*, unsigned) {
llvm_unreachable("Constructor throws?");
}
- /// \brief Placement delete - required by std, but never called.
+ /// Placement delete - required by std, but never called.
void operator delete(void*, unsigned, bool) {
llvm_unreachable("Constructor throws?");
}
return nullptr;
}
- /// \brief Get a reference to the name field. Requires that we have a name
+ /// Get a reference to the name field. Requires that we have a name
const StringMapEntry<bool> *&getNameEntryPtr() {
assert(FragmentAndHasName.getInt() && "Name is required");
NameEntryStorageTy *Name = reinterpret_cast<NameEntryStorageTy *>(this);
/// isUsed - Check if this is used.
bool isUsed() const { return IsUsed; }
- /// \brief Check if this symbol is redefinable.
+ /// Check if this symbol is redefinable.
bool isRedefinable() const { return IsRedefinable; }
- /// \brief Mark this symbol as redefinable.
+ /// Mark this symbol as redefinable.
void setRedefinable(bool Value) { IsRedefinable = Value; }
- /// \brief Prepare this symbol to be redefined.
+ /// Prepare this symbol to be redefined.
void redefineIfPossible() {
if (IsRedefinable) {
if (SymbolContents == SymContentsVariable) {
namespace llvm {
class MCSymbolMachO : public MCSymbol {
- /// \brief We store the value for the 'desc' symbol field in the
+ /// We store the value for the 'desc' symbol field in the
/// lowest 16 bits of the implementation defined flags.
enum MachOSymbolFlags : uint16_t { // See <mach-o/nlist.h>.
SF_DescFlagsMask = 0xFFFF,
setFlags(Value & SF_DescFlagsMask);
}
- /// \brief Get the encoded value of the flags as they will be emitted in to
+ /// Get the encoded value of the flags as they will be emitted in to
/// the MachO binary
uint16_t getEncodedFlags(bool EncodeAsAltEntry) const {
uint16_t Flags = getFlags();
class MCAsmInfo;
class raw_ostream;
-/// \brief This represents an "assembler immediate".
+/// This represents an "assembler immediate".
///
/// In its most general form, this can hold ":Kind:(SymbolA - SymbolB +
/// imm64)". Not all targets supports relocations of this general form, but we
const MCSymbolRefExpr *getSymB() const { return SymB; }
uint32_t getRefKind() const { return RefKind; }
- /// \brief Is this an absolute (as opposed to relocatable) value.
+ /// Is this an absolute (as opposed to relocatable) value.
bool isAbsolute() const { return !SymA && !SymB; }
- /// \brief Print the value to the stream \p OS.
+ /// Print the value to the stream \p OS.
void print(raw_ostream &OS) const;
- /// \brief Print the value to stderr.
+ /// Print the value to stderr.
void dump() const;
MCSymbolRefExpr::VariantKind getAccessVariant() const;
/// @}
};
-/// \brief Construct a new Wasm writer instance.
+/// Construct a new Wasm writer instance.
///
/// \param MOTW - The target specific Wasm writer subclass.
/// \param OS - The stream to write to.
void EmitInstToFragment(const MCInst &Inst, const MCSubtargetInfo &) override;
void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo &) override;
- /// \brief Merge the content of the fragment \p EF into the fragment \p DF.
+ /// Merge the content of the fragment \p EF into the fragment \p DF.
void mergeFragment(MCDataFragment *, MCDataFragment *);
bool SeenIdent;
virtual bool recordRelocation(const MCFixup &) const { return true; }
};
- /// \brief Construct a new Win COFF writer instance.
+ /// Construct a new Win COFF writer instance.
///
/// \param MOTW - The target specific WinCOFF writer subclass.
/// \param OS - The stream to write to.
class raw_ostream;
-/// \brief Utility for building string tables with deduplicated suffixes.
+/// Utility for building string tables with deduplicated suffixes.
class StringTableBuilder {
public:
enum Kind { ELF, WinCOFF, MachO, RAW, DWARF };
StringTableBuilder(Kind K, unsigned Alignment = 1);
~StringTableBuilder();
- /// \brief Add a string to the builder. Returns the position of S in the
+ /// Add a string to the builder. Returns the position of S in the
/// table. The position will be changed if finalize is used.
/// Can only be used before the table is finalized.
size_t add(CachedHashStringRef S);
size_t add(StringRef S) { return add(CachedHashStringRef(S)); }
- /// \brief Analyze the strings and build the final table. No more strings can
+ /// Analyze the strings and build the final table. No more strings can
/// be added after this point.
void finalize();
/// returned by add will still be valid.
void finalizeInOrder();
- /// \brief Get the offest of a string in the string table. Can only be used
+ /// Get the offest of a string in the string table. Can only be used
/// after the table is finalized.
size_t getOffset(CachedHashStringRef S) const;
size_t getOffset(StringRef S) const {
const Archive *Parent;
ArchiveMemberHeader Header;
- /// \brief Includes header but not padding byte.
+ /// Includes header but not padding byte.
StringRef Data;
- /// \brief Offset from Data to the start of the file.
+ /// Offset from Data to the start of the file.
uint16_t StartOfFile;
Expected<bool> isThinMember() const;
void getRelocationTypeName(uint32_t Type,
SmallVectorImpl<char> &Result) const;
- /// \brief Get the symbol for a given relocation.
+ /// Get the symbol for a given relocation.
Expected<const Elf_Sym *> getRelocationSymbol(const Elf_Rel *Rel,
const Elf_Shdr *SymTab) const;
Expected<std::vector<Elf_Rela>> android_relas(const Elf_Shdr *Sec) const;
- /// \brief Iterate over program header table.
+ /// Iterate over program header table.
Expected<Elf_Phdr_Range> program_headers() const {
if (getHeader()->e_phnum && getHeader()->e_phentsize != sizeof(Elf_Phdr))
return createError("invalid e_phentsize");
uint64_t getSectionOffset(DataRefImpl Sec) const override;
StringRef getRelocationTypeName(uint32_t Type) const;
- /// \brief Get the relocation section that contains \a Rel.
+ /// Get the relocation section that contains \a Rel.
const Elf_Shdr *getRelSection(DataRefImpl Rel) const {
auto RelSecOrErr = EF.getSection(Rel.d.a);
if (!RelSecOrErr)
return v->isIR();
}
- /// \brief Finds and returns bitcode embedded in the given object file, or an
+ /// Finds and returns bitcode embedded in the given object file, or an
/// error code if not found.
static Expected<MemoryBufferRef> findBitcodeInObject(const ObjectFile &Obj);
- /// \brief Finds and returns bitcode in the given memory buffer (which may
+ /// Finds and returns bitcode in the given memory buffer (which may
/// be either a bitcode file or a native object file with embedded bitcode),
/// or an error code if not found.
static Expected<MemoryBufferRef>
public:
class ObjectForArch {
const MachOUniversalBinary *Parent;
- /// \brief Index of object in the universal binary.
+ /// Index of object in the universal binary.
uint32_t Index;
- /// \brief Descriptor of the object.
+ /// Descriptor of the object.
MachO::fat_arch Header;
MachO::fat_arch_64 Header64;
//
//===----------------------------------------------------------------------===//
/// \file
-/// \brief Common declarations for yaml2obj
+/// Common declarations for yaml2obj
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECTYAML_DWARFEMITTER_H
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares classes for handling the YAML representation
+/// This file declares classes for handling the YAML representation
/// of DWARF Debug Info.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares classes for handling the YAML representation
+/// This file declares classes for handling the YAML representation
/// of ELF.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares classes for handling the YAML representation
+/// This file declares classes for handling the YAML representation
/// of Mach-O.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares classes for handling the YAML representation
+/// This file declares classes for handling the YAML representation
/// of wasm binaries.
///
//===----------------------------------------------------------------------===//
namespace yaml {
-/// \brief Specialized YAMLIO scalar type for representing a binary blob.
+/// Specialized YAMLIO scalar type for representing a binary blob.
///
/// A typical use case would be to represent the content of a section in a
/// binary file.
class BinaryRef {
friend bool operator==(const BinaryRef &LHS, const BinaryRef &RHS);
- /// \brief Either raw binary data, or a string of hex bytes (must always
+ /// Either raw binary data, or a string of hex bytes (must always
/// be an even number of characters).
ArrayRef<uint8_t> Data;
- /// \brief Discriminator between the two states of the `Data` member.
+ /// Discriminator between the two states of the `Data` member.
bool DataIsHexString = true;
public:
BinaryRef(StringRef Data)
: Data(reinterpret_cast<const uint8_t *>(Data.data()), Data.size()) {}
- /// \brief The number of bytes that are represented by this BinaryRef.
+ /// The number of bytes that are represented by this BinaryRef.
/// This is the number of bytes that writeAsBinary() will write.
ArrayRef<uint8_t>::size_type binary_size() const {
if (DataIsHexString)
return Data.size();
}
- /// \brief Write the contents (regardless of whether it is binary or a
+ /// Write the contents (regardless of whether it is binary or a
/// hex string) as binary to the given raw_ostream.
void writeAsBinary(raw_ostream &OS) const;
- /// \brief Write the contents (regardless of whether it is binary or a
+ /// Write the contents (regardless of whether it is binary or a
/// hex string) as hex to the given raw_ostream.
///
/// For example, a possible output could be `DEADBEEFCAFEBABE`.
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Defines the llvm::Arg class for parsed arguments.
+/// Defines the llvm::Arg class for parsed arguments.
///
//===----------------------------------------------------------------------===//
class ArgList;
-/// \brief A concrete instance of a particular driver option.
+/// A concrete instance of a particular driver option.
///
/// The Arg class encodes just enough information to be able to
/// derive the argument values efficiently.
class Arg {
private:
- /// \brief The option this argument is an instance of.
+ /// The option this argument is an instance of.
const Option Opt;
- /// \brief The argument this argument was derived from (during tool chain
+ /// The argument this argument was derived from (during tool chain
/// argument translation), if any.
const Arg *BaseArg;
- /// \brief How this instance of the option was spelled.
+ /// How this instance of the option was spelled.
StringRef Spelling;
- /// \brief The index at which this argument appears in the containing
+ /// The index at which this argument appears in the containing
/// ArgList.
unsigned Index;
- /// \brief Was this argument used to effect compilation?
+ /// Was this argument used to effect compilation?
///
/// This is used for generating "argument unused" diagnostics.
mutable unsigned Claimed : 1;
- /// \brief Does this argument own its values?
+ /// Does this argument own its values?
mutable unsigned OwnsValues : 1;
- /// \brief The argument values, as C strings.
+ /// The argument values, as C strings.
SmallVector<const char *, 2> Values;
public:
StringRef getSpelling() const { return Spelling; }
unsigned getIndex() const { return Index; }
- /// \brief Return the base argument which generated this arg.
+ /// Return the base argument which generated this arg.
///
/// This is either the argument itself or the argument it was
/// derived from during tool chain specific argument translation.
bool isClaimed() const { return getBaseArg().Claimed; }
- /// \brief Set the Arg claimed bit.
+ /// Set the Arg claimed bit.
void claim() const { getBaseArg().Claimed = true; }
unsigned getNumValues() const { return Values.size(); }
return false;
}
- /// \brief Append the argument onto the given array as strings.
+ /// Append the argument onto the given array as strings.
void render(const ArgList &Args, ArgStringList &Output) const;
- /// \brief Append the argument, render as an input, onto the given
+ /// Append the argument, render as an input, onto the given
/// array as strings.
///
/// The distinction is that some options only render their values
void print(raw_ostream &O) const;
void dump() const;
- /// \brief Return a formatted version of the argument and
+ /// Return a formatted version of the argument and
/// its values, for debugging and diagnostics.
std::string getAsString(const ArgList &Args) const;
};
return MakeArgStringRef(Str.toStringRef(Buf));
}
- /// \brief Create an arg string for (\p LHS + \p RHS), reusing the
+ /// Create an arg string for (\p LHS + \p RHS), reusing the
/// string at \p Index if possible.
const char *GetOrMakeJoinedArgString(unsigned Index, StringRef LHS,
StringRef RHS) const;
class InputArgList;
class Option;
-/// \brief Provide access to the Option info table.
+/// Provide access to the Option info table.
///
/// The OptTable class provides a layer of indirection which allows Option
/// instance to be created lazily. In the common case, only a few options will
/// parts of the driver still use Option instances where convenient.
class OptTable {
public:
- /// \brief Entry for a single option instance in the option data table.
+ /// Entry for a single option instance in the option data table.
struct Info {
/// A null terminated array of prefix strings to apply to name while
/// matching.
};
private:
- /// \brief The option information table.
+ /// The option information table.
std::vector<Info> OptionInfos;
bool IgnoreCase;
public:
~OptTable();
- /// \brief Return the total number of option classes.
+ /// Return the total number of option classes.
unsigned getNumOptions() const { return OptionInfos.size(); }
- /// \brief Get the given Opt's Option instance, lazily creating it
+ /// Get the given Opt's Option instance, lazily creating it
/// if necessary.
///
/// \return The option, or null for the INVALID option id.
const Option getOption(OptSpecifier Opt) const;
- /// \brief Lookup the name of the given option.
+ /// Lookup the name of the given option.
const char *getOptionName(OptSpecifier id) const {
return getInfo(id).Name;
}
- /// \brief Get the kind of the given option.
+ /// Get the kind of the given option.
unsigned getOptionKind(OptSpecifier id) const {
return getInfo(id).Kind;
}
- /// \brief Get the group id for the given option.
+ /// Get the group id for the given option.
unsigned getOptionGroupID(OptSpecifier id) const {
return getInfo(id).GroupID;
}
- /// \brief Get the help text to use to describe this option.
+ /// Get the help text to use to describe this option.
const char *getOptionHelpText(OptSpecifier id) const {
return getInfo(id).HelpText;
}
- /// \brief Get the meta-variable name to use when describing
+ /// Get the meta-variable name to use when describing
/// this options values in the help text.
const char *getOptionMetaVar(OptSpecifier id) const {
return getInfo(id).MetaVar;
/// \return true in success, and false in fail.
bool addValues(const char *Option, const char *Values);
- /// \brief Parse a single argument; returning the new argument and
+ /// Parse a single argument; returning the new argument and
/// updating Index.
///
/// \param [in,out] Index - The current parsing position in the argument
unsigned FlagsToInclude = 0,
unsigned FlagsToExclude = 0) const;
- /// \brief Parse an list of arguments into an InputArgList.
+ /// Parse an list of arguments into an InputArgList.
///
/// The resulting InputArgList will reference the strings in [\p ArgBegin,
/// \p ArgEnd), and their lifetime should extend past that of the returned
unsigned &MissingArgCount, unsigned FlagsToInclude = 0,
unsigned FlagsToExclude = 0) const;
- /// \brief Render the help text for an option table.
+ /// Render the help text for an option table.
///
/// \param OS - The stream to write the help text to.
/// \param Name - The name to use in the usage line.
return OptionClass(Info->Kind);
}
- /// \brief Get the name of this option without any prefix.
+ /// Get the name of this option without any prefix.
StringRef getName() const {
assert(Info && "Must have a valid info!");
return Info->Name;
return Owner->getOption(Info->AliasID);
}
- /// \brief Get the alias arguments as a \0 separated list.
+ /// Get the alias arguments as a \0 separated list.
/// E.g. ["foo", "bar"] would be returned as "foo\0bar\0".
const char *getAliasArgs() const {
assert(Info && "Must have a valid info!");
return Info->AliasArgs;
}
- /// \brief Get the default prefix for this option.
+ /// Get the default prefix for this option.
StringRef getPrefix() const {
const char *Prefix = *Info->Prefixes;
return Prefix ? Prefix : StringRef();
}
- /// \brief Get the name of this option with the default prefix.
+ /// Get the name of this option with the default prefix.
std::string getPrefixedName() const {
std::string Ret = getPrefix();
Ret += getName();
bool SamplePGOSupport;
};
-/// \brief This class provides access to building LLVM's passes.
+/// This class provides access to building LLVM's passes.
///
/// It's members provide the baseline state available to passes during their
/// construction. The \c PassRegistry.def file specifies how to construct all
Optional<PGOOptions> PGOOpt;
public:
- /// \brief A struct to capture parsed pass pipeline names.
+ /// A struct to capture parsed pass pipeline names.
///
/// A pipeline is defined as a series of names, each of which may in itself
/// recursively contain a nested pipeline. A name is either the name of a pass
std::vector<PipelineElement> InnerPipeline;
};
- /// \brief ThinLTO phase.
+ /// ThinLTO phase.
///
/// This enumerates the LLVM ThinLTO optimization phases.
enum class ThinLTOPhase {
PostLink
};
- /// \brief LLVM-provided high-level optimization levels.
+ /// LLVM-provided high-level optimization levels.
///
/// This enumerates the LLVM-provided high-level optimization levels. Each
/// level has a specific goal and rationale.
Optional<PGOOptions> PGOOpt = None)
: TM(TM), PGOOpt(PGOOpt) {}
- /// \brief Cross register the analysis managers through their proxies.
+ /// Cross register the analysis managers through their proxies.
///
/// This is an interface that can be used to cross register each
// AnalysisManager with all the others analysis managers.
CGSCCAnalysisManager &CGAM,
ModuleAnalysisManager &MAM);
- /// \brief Registers all available module analysis passes.
+ /// Registers all available module analysis passes.
///
/// This is an interface that can be used to populate a \c
/// ModuleAnalysisManager with all registered module analyses. Callers can
/// pre-register analyses and this will not override those.
void registerModuleAnalyses(ModuleAnalysisManager &MAM);
- /// \brief Registers all available CGSCC analysis passes.
+ /// Registers all available CGSCC analysis passes.
///
/// This is an interface that can be used to populate a \c CGSCCAnalysisManager
/// with all registered CGSCC analyses. Callers can still manually register any
/// not override those.
void registerCGSCCAnalyses(CGSCCAnalysisManager &CGAM);
- /// \brief Registers all available function analysis passes.
+ /// Registers all available function analysis passes.
///
/// This is an interface that can be used to populate a \c
/// FunctionAnalysisManager with all registered function analyses. Callers can
/// pre-register analyses and this will not override those.
void registerFunctionAnalyses(FunctionAnalysisManager &FAM);
- /// \brief Registers all available loop analysis passes.
+ /// Registers all available loop analysis passes.
///
/// This is an interface that can be used to populate a \c LoopAnalysisManager
/// with all registered loop analyses. Callers can still manually register any
/// registered.
AAManager buildDefaultAAPipeline();
- /// \brief Parse a textual pass pipeline description into a \c
+ /// Parse a textual pass pipeline description into a \c
/// ModulePassManager.
///
/// The format of the textual pass pipeline description looks something like:
/// returns false.
bool parseAAPipeline(AAManager &AA, StringRef PipelineText);
- /// \brief Register a callback for a default optimizer pipeline extension
+ /// Register a callback for a default optimizer pipeline extension
/// point
///
/// This extension point allows adding passes that perform peephole
PeepholeEPCallbacks.push_back(C);
}
- /// \brief Register a callback for a default optimizer pipeline extension
+ /// Register a callback for a default optimizer pipeline extension
/// point
///
/// This extension point allows adding late loop canonicalization and
LateLoopOptimizationsEPCallbacks.push_back(C);
}
- /// \brief Register a callback for a default optimizer pipeline extension
+ /// Register a callback for a default optimizer pipeline extension
/// point
///
/// This extension point allows adding loop passes to the end of the loop
LoopOptimizerEndEPCallbacks.push_back(C);
}
- /// \brief Register a callback for a default optimizer pipeline extension
+ /// Register a callback for a default optimizer pipeline extension
/// point
///
/// This extension point allows adding optimization passes after most of the
ScalarOptimizerLateEPCallbacks.push_back(C);
}
- /// \brief Register a callback for a default optimizer pipeline extension
+ /// Register a callback for a default optimizer pipeline extension
/// point
///
/// This extension point allows adding CallGraphSCC passes at the end of the
CGSCCOptimizerLateEPCallbacks.push_back(C);
}
- /// \brief Register a callback for a default optimizer pipeline extension
+ /// Register a callback for a default optimizer pipeline extension
/// point
///
/// This extension point allows adding optimization passes before the
PipelineStartEPCallbacks.push_back(C);
}
- /// \brief Register a callback for parsing an AliasAnalysis Name to populate
+ /// Register a callback for parsing an AliasAnalysis Name to populate
/// the given AAManager \p AA
void registerParseAACallback(
const std::function<bool(StringRef Name, AAManager &AA)> &C) {
}
/// @}}
- /// \brief Register a callback for a top-level pipeline entry.
+ /// Register a callback for a top-level pipeline entry.
///
/// If the PassManager type is not given at the top level of the pipeline
/// text, this Callback should be used to determine the appropriate stack of
class CoverageMappingReader;
-/// \brief Coverage mapping information for a single function.
+/// Coverage mapping information for a single function.
struct CoverageMappingRecord {
StringRef FunctionName;
uint64_t FunctionHash;
ArrayRef<CounterMappingRegion> MappingRegions;
};
-/// \brief A file format agnostic iterator over coverage mapping data.
+/// A file format agnostic iterator over coverage mapping data.
class CoverageMappingIterator
: public std::iterator<std::input_iterator_tag, CoverageMappingRecord> {
CoverageMappingReader *Reader;
CoverageMappingIterator end() { return CoverageMappingIterator(); }
};
-/// \brief Base class for the raw coverage mapping and filenames data readers.
+/// Base class for the raw coverage mapping and filenames data readers.
class RawCoverageReader {
protected:
StringRef Data;
Error readString(StringRef &Result);
};
-/// \brief Reader for the raw coverage filenames.
+/// Reader for the raw coverage filenames.
class RawCoverageFilenamesReader : public RawCoverageReader {
std::vector<StringRef> &Filenames;
Error read();
};
-/// \brief Checks if the given coverage mapping data is exported for
+/// Checks if the given coverage mapping data is exported for
/// an unused function.
class RawCoverageMappingDummyChecker : public RawCoverageReader {
public:
Expected<bool> isDummy();
};
-/// \brief Reader for the raw coverage mapping data.
+/// Reader for the raw coverage mapping data.
class RawCoverageMappingReader : public RawCoverageReader {
ArrayRef<StringRef> TranslationUnitFilenames;
std::vector<StringRef> &Filenames;
unsigned InferredFileID, size_t NumFileIDs);
};
-/// \brief Reader for the coverage mapping data that is emitted by the
+/// Reader for the coverage mapping data that is emitted by the
/// frontend and stored in an object file.
class BinaryCoverageReader : public CoverageMappingReader {
public:
namespace coverage {
-/// \brief Writer of the filenames section for the instrumentation
+/// Writer of the filenames section for the instrumentation
/// based code coverage.
class CoverageFilenamesSectionWriter {
ArrayRef<StringRef> Filenames;
CoverageFilenamesSectionWriter(ArrayRef<StringRef> Filenames)
: Filenames(Filenames) {}
- /// \brief Write encoded filenames to the given output stream.
+ /// Write encoded filenames to the given output stream.
void write(raw_ostream &OS);
};
-/// \brief Writer for instrumentation based coverage mapping data.
+/// Writer for instrumentation based coverage mapping data.
class CoverageMappingWriter {
ArrayRef<unsigned> VirtualFileMapping;
ArrayRef<CounterExpression> Expressions;
: VirtualFileMapping(VirtualFileMapping), Expressions(Expressions),
MappingRegions(MappingRegions) {}
- /// \brief Write encoded coverage mapping data to the given output stream.
+ /// Write encoded coverage mapping data to the given output stream.
void write(raw_ostream &OS);
};
enum GCOVVersion { V402, V404, V704 };
-/// \brief A struct for passing gcov options between functions.
+/// A struct for passing gcov options between functions.
struct Options {
Options(bool A, bool B, bool C, bool F, bool P, bool U, bool L, bool N)
: AllBlocks(A), BranchInfo(B), BranchCount(C), FuncCoverage(F),
#ifdef __cplusplus
/*!
- * \brief Return the number of value sites.
+ * Return the number of value sites.
*/
uint32_t getNumValueSites() const { return NumValueSites; }
/*!
- * \brief Read data from this record and save it to Record.
+ * Read data from this record and save it to Record.
*/
void deserializeTo(InstrProfRecord &Record,
InstrProfSymtab *SymTab);
#endif
/*!
- * \brief Return the \c ValueProfRecord header size including the
+ * Return the \c ValueProfRecord header size including the
* padding bytes.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
}
/*!
- * \brief Return the total size of the value profile record including the
+ * Return the total size of the value profile record including the
* header and the value data.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
}
/*!
- * \brief Return the pointer to the start of value data array.
+ * Return the pointer to the start of value data array.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
InstrProfValueData *getValueProfRecordValueData(ValueProfRecord *This) {
}
/*!
- * \brief Return the total number of value data for \c This record.
+ * Return the total number of value data for \c This record.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
uint32_t getValueProfRecordNumValueData(ValueProfRecord *This) {
}
/*!
- * \brief Use this method to advance to the next \c This \c ValueProfRecord.
+ * Use this method to advance to the next \c This \c ValueProfRecord.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
ValueProfRecord *getValueProfRecordNext(ValueProfRecord *This) {
}
/*!
- * \brief Return the first \c ValueProfRecord instance.
+ * Return the first \c ValueProfRecord instance.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
ValueProfRecord *getFirstValueProfRecord(ValueProfData *This) {
void computeDetailedSummary();
public:
- /// \brief A vector of useful cutoff values for detailed summary.
+ /// A vector of useful cutoff values for detailed summary.
static const ArrayRef<uint32_t> DefaultCutoffs;
};
/// We assume that a single function will not exceed 65535 LOC.
static unsigned getOffset(const DILocation *DIL);
- /// \brief Get the FunctionSamples of the inline instance where DIL originates
+ /// Get the FunctionSamples of the inline instance where DIL originates
/// from.
///
/// The FunctionSamples of the instruction (Machine or IR) associated to
namespace sampleprof {
-/// \brief Sample-based profile reader.
+/// Sample-based profile reader.
///
/// Each profile contains sample counts for all the functions
/// executed. Inside each function, statements are annotated with the
virtual ~SampleProfileReader() = default;
- /// \brief Read and validate the file header.
+ /// Read and validate the file header.
virtual std::error_code readHeader() = 0;
- /// \brief Read sample profiles from the associated file.
+ /// Read sample profiles from the associated file.
virtual std::error_code read() = 0;
- /// \brief Print the profile for \p FName on stream \p OS.
+ /// Print the profile for \p FName on stream \p OS.
void dumpFunctionProfile(StringRef FName, raw_ostream &OS = dbgs());
- /// \brief Print all the profiles on stream \p OS.
+ /// Print all the profiles on stream \p OS.
void dump(raw_ostream &OS = dbgs());
- /// \brief Return the samples collected for function \p F.
+ /// Return the samples collected for function \p F.
FunctionSamples *getSamplesFor(const Function &F) {
// The function name may have been updated by adding suffix. In sample
// profile, the function names are all stripped, so we need to strip
return nullptr;
}
- /// \brief Return all the profiles.
+ /// Return all the profiles.
StringMap<FunctionSamples> &getProfiles() { return Profiles; }
- /// \brief Report a parse error message.
+ /// Report a parse error message.
void reportError(int64_t LineNumber, Twine Msg) const {
Ctx.diagnose(DiagnosticInfoSampleProfile(Buffer->getBufferIdentifier(),
LineNumber, Msg));
}
- /// \brief Create a sample profile reader appropriate to the file format.
+ /// Create a sample profile reader appropriate to the file format.
static ErrorOr<std::unique_ptr<SampleProfileReader>>
create(const Twine &Filename, LLVMContext &C);
- /// \brief Create a sample profile reader from the supplied memory buffer.
+ /// Create a sample profile reader from the supplied memory buffer.
static ErrorOr<std::unique_ptr<SampleProfileReader>>
create(std::unique_ptr<MemoryBuffer> &B, LLVMContext &C);
- /// \brief Return the profile summary.
+ /// Return the profile summary.
ProfileSummary &getSummary() { return *(Summary.get()); }
protected:
- /// \brief Map every function to its associated profile.
+ /// Map every function to its associated profile.
///
/// The profile of every function executed at runtime is collected
/// in the structure FunctionSamples. This maps function objects
/// to their corresponding profiles.
StringMap<FunctionSamples> Profiles;
- /// \brief LLVM context used to emit diagnostics.
+ /// LLVM context used to emit diagnostics.
LLVMContext &Ctx;
- /// \brief Memory buffer holding the profile file.
+ /// Memory buffer holding the profile file.
std::unique_ptr<MemoryBuffer> Buffer;
- /// \brief Profile summary information.
+ /// Profile summary information.
std::unique_ptr<ProfileSummary> Summary;
- /// \brief Compute summary for this profile.
+ /// Compute summary for this profile.
void computeSummary();
};
SampleProfileReaderText(std::unique_ptr<MemoryBuffer> B, LLVMContext &C)
: SampleProfileReader(std::move(B), C) {}
- /// \brief Read and validate the file header.
+ /// Read and validate the file header.
std::error_code readHeader() override { return sampleprof_error::success; }
- /// \brief Read sample profiles from the associated file.
+ /// Read sample profiles from the associated file.
std::error_code read() override;
- /// \brief Return true if \p Buffer is in the format supported by this class.
+ /// Return true if \p Buffer is in the format supported by this class.
static bool hasFormat(const MemoryBuffer &Buffer);
};
SampleProfileReaderBinary(std::unique_ptr<MemoryBuffer> B, LLVMContext &C)
: SampleProfileReader(std::move(B), C) {}
- /// \brief Read and validate the file header.
+ /// Read and validate the file header.
std::error_code readHeader() override;
- /// \brief Read sample profiles from the associated file.
+ /// Read sample profiles from the associated file.
std::error_code read() override;
- /// \brief Return true if \p Buffer is in the format supported by this class.
+ /// Return true if \p Buffer is in the format supported by this class.
static bool hasFormat(const MemoryBuffer &Buffer);
protected:
- /// \brief Read a numeric value of type T from the profile.
+ /// Read a numeric value of type T from the profile.
///
/// If an error occurs during decoding, a diagnostic message is emitted and
/// EC is set.
/// \returns the read value.
template <typename T> ErrorOr<T> readNumber();
- /// \brief Read a string from the profile.
+ /// Read a string from the profile.
///
/// If an error occurs during decoding, a diagnostic message is emitted and
/// EC is set.
/// Read a string indirectly via the name table.
ErrorOr<StringRef> readStringFromTable();
- /// \brief Return true if we've reached the end of file.
+ /// Return true if we've reached the end of file.
bool at_eof() const { return Data >= End; }
/// Read the contents of the given profile instance.
std::error_code readProfile(FunctionSamples &FProfile);
- /// \brief Points to the current location in the buffer.
+ /// Points to the current location in the buffer.
const uint8_t *Data = nullptr;
- /// \brief Points to the end of the buffer.
+ /// Points to the end of the buffer.
const uint8_t *End = nullptr;
/// Function name table.
private:
std::error_code readSummaryEntry(std::vector<ProfileSummaryEntry> &Entries);
- /// \brief Read profile summary.
+ /// Read profile summary.
std::error_code readSummary();
};
SampleProfileReaderGCC(std::unique_ptr<MemoryBuffer> B, LLVMContext &C)
: SampleProfileReader(std::move(B), C), GcovBuffer(Buffer.get()) {}
- /// \brief Read and validate the file header.
+ /// Read and validate the file header.
std::error_code readHeader() override;
- /// \brief Read sample profiles from the associated file.
+ /// Read sample profiles from the associated file.
std::error_code read() override;
- /// \brief Return true if \p Buffer is in the format supported by this class.
+ /// Return true if \p Buffer is in the format supported by this class.
static bool hasFormat(const MemoryBuffer &Buffer);
protected:
template <typename T> ErrorOr<T> readNumber();
ErrorOr<StringRef> readString();
- /// \brief Read the section tag and check that it's the same as \p Expected.
+ /// Read the section tag and check that it's the same as \p Expected.
std::error_code readSectionTag(uint32_t Expected);
/// GCOV buffer containing the profile.
enum SampleProfileFormat { SPF_None = 0, SPF_Text, SPF_Binary, SPF_GCC };
-/// \brief Sample-based profile writer. Base class.
+/// Sample-based profile writer. Base class.
class SampleProfileWriter {
public:
virtual ~SampleProfileWriter() = default;
SampleProfileWriter(std::unique_ptr<raw_ostream> &OS)
: OutputStream(std::move(OS)) {}
- /// \brief Write a file header for the profile file.
+ /// Write a file header for the profile file.
virtual std::error_code
writeHeader(const StringMap<FunctionSamples> &ProfileMap) = 0;
- /// \brief Output stream where to emit the profile to.
+ /// Output stream where to emit the profile to.
std::unique_ptr<raw_ostream> OutputStream;
- /// \brief Profile summary.
+ /// Profile summary.
std::unique_ptr<ProfileSummary> Summary;
- /// \brief Compute summary for this profile.
+ /// Compute summary for this profile.
void computeSummary(const StringMap<FunctionSamples> &ProfileMap);
};
-/// \brief Sample-based profile writer (text format).
+/// Sample-based profile writer (text format).
class SampleProfileWriterText : public SampleProfileWriter {
public:
std::error_code write(const FunctionSamples &S) override;
SampleProfileFormat Format);
};
-/// \brief Sample-based profile writer (binary format).
+/// Sample-based profile writer (binary format).
class SampleProfileWriterBinary : public SampleProfileWriter {
public:
std::error_code write(const FunctionSamples &S) override;
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU kernel descriptor definitions. For more information, visit
+/// AMDGPU kernel descriptor definitions. For more information, visit
/// https://llvm.org/docs/AMDGPUUsage.html#kernel-descriptor-for-gfx6-gfx9
//
//===----------------------------------------------------------------------===//
namespace AMDGPU {
namespace HSAKD {
-/// \brief Floating point rounding modes.
+/// Floating point rounding modes.
enum : uint8_t {
AMDGPU_FLOAT_ROUND_MODE_NEAR_EVEN = 0,
AMDGPU_FLOAT_ROUND_MODE_PLUS_INFINITY = 1,
AMDGPU_FLOAT_ROUND_MODE_ZERO = 3,
};
-/// \brief Floating point denorm modes.
+/// Floating point denorm modes.
enum : uint8_t {
AMDGPU_FLOAT_DENORM_MODE_FLUSH_SRC_DST = 0,
AMDGPU_FLOAT_DENORM_MODE_FLUSH_DST = 1,
AMDGPU_FLOAT_DENORM_MODE_FLUSH_NONE = 3,
};
-/// \brief System VGPR workitem IDs.
+/// System VGPR workitem IDs.
enum : uint8_t {
AMDGPU_SYSTEM_VGPR_WORKITEM_ID_X = 0,
AMDGPU_SYSTEM_VGPR_WORKITEM_ID_X_Y = 1,
AMDGPU_SYSTEM_VGPR_WORKITEM_ID_UNDEFINED = 3,
};
-/// \brief Compute program resource register one layout.
+/// Compute program resource register one layout.
enum ComputePgmRsrc1 {
AMDGPU_BITS_ENUM_ENTRY(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6),
AMDGPU_BITS_ENUM_ENTRY(GRANULATED_WAVEFRONT_SGPR_COUNT, 6, 4),
AMDGPU_BITS_ENUM_ENTRY(RESERVED0, 27, 5),
};
-/// \brief Compute program resource register two layout.
+/// Compute program resource register two layout.
enum ComputePgmRsrc2 {
AMDGPU_BITS_ENUM_ENTRY(ENABLE_SGPR_PRIVATE_SEGMENT_WAVE_OFFSET, 0, 1),
AMDGPU_BITS_ENUM_ENTRY(USER_SGPR_COUNT, 1, 5),
AMDGPU_BITS_ENUM_ENTRY(RESERVED1, 31, 1),
};
-/// \brief Kernel descriptor layout. This layout should be kept backwards
+/// Kernel descriptor layout. This layout should be kept backwards
/// compatible as it is consumed by the command processor.
struct KernelDescriptor final {
uint32_t GroupSegmentFixedSize;
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU metadata definitions and in-memory representations.
+/// AMDGPU metadata definitions and in-memory representations.
///
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
namespace HSAMD {
-/// \brief HSA metadata major version.
+/// HSA metadata major version.
constexpr uint32_t VersionMajor = 1;
-/// \brief HSA metadata minor version.
+/// HSA metadata minor version.
constexpr uint32_t VersionMinor = 0;
-/// \brief HSA metadata beginning assembler directive.
+/// HSA metadata beginning assembler directive.
constexpr char AssemblerDirectiveBegin[] = ".amd_amdgpu_hsa_metadata";
-/// \brief HSA metadata ending assembler directive.
+/// HSA metadata ending assembler directive.
constexpr char AssemblerDirectiveEnd[] = ".end_amd_amdgpu_hsa_metadata";
-/// \brief Access qualifiers.
+/// Access qualifiers.
enum class AccessQualifier : uint8_t {
Default = 0,
ReadOnly = 1,
Unknown = 0xff
};
-/// \brief Address space qualifiers.
+/// Address space qualifiers.
enum class AddressSpaceQualifier : uint8_t {
Private = 0,
Global = 1,
Unknown = 0xff
};
-/// \brief Value kinds.
+/// Value kinds.
enum class ValueKind : uint8_t {
ByValue = 0,
GlobalBuffer = 1,
Unknown = 0xff
};
-/// \brief Value types.
+/// Value types.
enum class ValueType : uint8_t {
Struct = 0,
I8 = 1,
namespace Attrs {
namespace Key {
-/// \brief Key for Kernel::Attr::Metadata::mReqdWorkGroupSize.
+/// Key for Kernel::Attr::Metadata::mReqdWorkGroupSize.
constexpr char ReqdWorkGroupSize[] = "ReqdWorkGroupSize";
-/// \brief Key for Kernel::Attr::Metadata::mWorkGroupSizeHint.
+/// Key for Kernel::Attr::Metadata::mWorkGroupSizeHint.
constexpr char WorkGroupSizeHint[] = "WorkGroupSizeHint";
-/// \brief Key for Kernel::Attr::Metadata::mVecTypeHint.
+/// Key for Kernel::Attr::Metadata::mVecTypeHint.
constexpr char VecTypeHint[] = "VecTypeHint";
-/// \brief Key for Kernel::Attr::Metadata::mRuntimeHandle.
+/// Key for Kernel::Attr::Metadata::mRuntimeHandle.
constexpr char RuntimeHandle[] = "RuntimeHandle";
} // end namespace Key
-/// \brief In-memory representation of kernel attributes metadata.
+/// In-memory representation of kernel attributes metadata.
struct Metadata final {
- /// \brief 'reqd_work_group_size' attribute. Optional.
+ /// 'reqd_work_group_size' attribute. Optional.
std::vector<uint32_t> mReqdWorkGroupSize = std::vector<uint32_t>();
- /// \brief 'work_group_size_hint' attribute. Optional.
+ /// 'work_group_size_hint' attribute. Optional.
std::vector<uint32_t> mWorkGroupSizeHint = std::vector<uint32_t>();
- /// \brief 'vec_type_hint' attribute. Optional.
+ /// 'vec_type_hint' attribute. Optional.
std::string mVecTypeHint = std::string();
- /// \brief External symbol created by runtime to store the kernel address
+ /// External symbol created by runtime to store the kernel address
/// for enqueued blocks.
std::string mRuntimeHandle = std::string();
- /// \brief Default constructor.
+ /// Default constructor.
Metadata() = default;
/// \returns True if kernel attributes metadata is empty, false otherwise.
namespace Arg {
namespace Key {
-/// \brief Key for Kernel::Arg::Metadata::mName.
+/// Key for Kernel::Arg::Metadata::mName.
constexpr char Name[] = "Name";
-/// \brief Key for Kernel::Arg::Metadata::mTypeName.
+/// Key for Kernel::Arg::Metadata::mTypeName.
constexpr char TypeName[] = "TypeName";
-/// \brief Key for Kernel::Arg::Metadata::mSize.
+/// Key for Kernel::Arg::Metadata::mSize.
constexpr char Size[] = "Size";
-/// \brief Key for Kernel::Arg::Metadata::mAlign.
+/// Key for Kernel::Arg::Metadata::mAlign.
constexpr char Align[] = "Align";
-/// \brief Key for Kernel::Arg::Metadata::mValueKind.
+/// Key for Kernel::Arg::Metadata::mValueKind.
constexpr char ValueKind[] = "ValueKind";
-/// \brief Key for Kernel::Arg::Metadata::mValueType.
+/// Key for Kernel::Arg::Metadata::mValueType.
constexpr char ValueType[] = "ValueType";
-/// \brief Key for Kernel::Arg::Metadata::mPointeeAlign.
+/// Key for Kernel::Arg::Metadata::mPointeeAlign.
constexpr char PointeeAlign[] = "PointeeAlign";
-/// \brief Key for Kernel::Arg::Metadata::mAddrSpaceQual.
+/// Key for Kernel::Arg::Metadata::mAddrSpaceQual.
constexpr char AddrSpaceQual[] = "AddrSpaceQual";
-/// \brief Key for Kernel::Arg::Metadata::mAccQual.
+/// Key for Kernel::Arg::Metadata::mAccQual.
constexpr char AccQual[] = "AccQual";
-/// \brief Key for Kernel::Arg::Metadata::mActualAccQual.
+/// Key for Kernel::Arg::Metadata::mActualAccQual.
constexpr char ActualAccQual[] = "ActualAccQual";
-/// \brief Key for Kernel::Arg::Metadata::mIsConst.
+/// Key for Kernel::Arg::Metadata::mIsConst.
constexpr char IsConst[] = "IsConst";
-/// \brief Key for Kernel::Arg::Metadata::mIsRestrict.
+/// Key for Kernel::Arg::Metadata::mIsRestrict.
constexpr char IsRestrict[] = "IsRestrict";
-/// \brief Key for Kernel::Arg::Metadata::mIsVolatile.
+/// Key for Kernel::Arg::Metadata::mIsVolatile.
constexpr char IsVolatile[] = "IsVolatile";
-/// \brief Key for Kernel::Arg::Metadata::mIsPipe.
+/// Key for Kernel::Arg::Metadata::mIsPipe.
constexpr char IsPipe[] = "IsPipe";
} // end namespace Key
-/// \brief In-memory representation of kernel argument metadata.
+/// In-memory representation of kernel argument metadata.
struct Metadata final {
- /// \brief Name. Optional.
+ /// Name. Optional.
std::string mName = std::string();
- /// \brief Type name. Optional.
+ /// Type name. Optional.
std::string mTypeName = std::string();
- /// \brief Size in bytes. Required.
+ /// Size in bytes. Required.
uint32_t mSize = 0;
- /// \brief Alignment in bytes. Required.
+ /// Alignment in bytes. Required.
uint32_t mAlign = 0;
- /// \brief Value kind. Required.
+ /// Value kind. Required.
ValueKind mValueKind = ValueKind::Unknown;
- /// \brief Value type. Required.
+ /// Value type. Required.
ValueType mValueType = ValueType::Unknown;
- /// \brief Pointee alignment in bytes. Optional.
+ /// Pointee alignment in bytes. Optional.
uint32_t mPointeeAlign = 0;
- /// \brief Address space qualifier. Optional.
+ /// Address space qualifier. Optional.
AddressSpaceQualifier mAddrSpaceQual = AddressSpaceQualifier::Unknown;
- /// \brief Access qualifier. Optional.
+ /// Access qualifier. Optional.
AccessQualifier mAccQual = AccessQualifier::Unknown;
- /// \brief Actual access qualifier. Optional.
+ /// Actual access qualifier. Optional.
AccessQualifier mActualAccQual = AccessQualifier::Unknown;
- /// \brief True if 'const' qualifier is specified. Optional.
+ /// True if 'const' qualifier is specified. Optional.
bool mIsConst = false;
- /// \brief True if 'restrict' qualifier is specified. Optional.
+ /// True if 'restrict' qualifier is specified. Optional.
bool mIsRestrict = false;
- /// \brief True if 'volatile' qualifier is specified. Optional.
+ /// True if 'volatile' qualifier is specified. Optional.
bool mIsVolatile = false;
- /// \brief True if 'pipe' qualifier is specified. Optional.
+ /// True if 'pipe' qualifier is specified. Optional.
bool mIsPipe = false;
- /// \brief Default constructor.
+ /// Default constructor.
Metadata() = default;
};
namespace CodeProps {
namespace Key {
-/// \brief Key for Kernel::CodeProps::Metadata::mKernargSegmentSize.
+/// Key for Kernel::CodeProps::Metadata::mKernargSegmentSize.
constexpr char KernargSegmentSize[] = "KernargSegmentSize";
-/// \brief Key for Kernel::CodeProps::Metadata::mGroupSegmentFixedSize.
+/// Key for Kernel::CodeProps::Metadata::mGroupSegmentFixedSize.
constexpr char GroupSegmentFixedSize[] = "GroupSegmentFixedSize";
-/// \brief Key for Kernel::CodeProps::Metadata::mPrivateSegmentFixedSize.
+/// Key for Kernel::CodeProps::Metadata::mPrivateSegmentFixedSize.
constexpr char PrivateSegmentFixedSize[] = "PrivateSegmentFixedSize";
-/// \brief Key for Kernel::CodeProps::Metadata::mKernargSegmentAlign.
+/// Key for Kernel::CodeProps::Metadata::mKernargSegmentAlign.
constexpr char KernargSegmentAlign[] = "KernargSegmentAlign";
-/// \brief Key for Kernel::CodeProps::Metadata::mWavefrontSize.
+/// Key for Kernel::CodeProps::Metadata::mWavefrontSize.
constexpr char WavefrontSize[] = "WavefrontSize";
-/// \brief Key for Kernel::CodeProps::Metadata::mNumSGPRs.
+/// Key for Kernel::CodeProps::Metadata::mNumSGPRs.
constexpr char NumSGPRs[] = "NumSGPRs";
-/// \brief Key for Kernel::CodeProps::Metadata::mNumVGPRs.
+/// Key for Kernel::CodeProps::Metadata::mNumVGPRs.
constexpr char NumVGPRs[] = "NumVGPRs";
-/// \brief Key for Kernel::CodeProps::Metadata::mMaxFlatWorkGroupSize.
+/// Key for Kernel::CodeProps::Metadata::mMaxFlatWorkGroupSize.
constexpr char MaxFlatWorkGroupSize[] = "MaxFlatWorkGroupSize";
-/// \brief Key for Kernel::CodeProps::Metadata::mIsDynamicCallStack.
+/// Key for Kernel::CodeProps::Metadata::mIsDynamicCallStack.
constexpr char IsDynamicCallStack[] = "IsDynamicCallStack";
-/// \brief Key for Kernel::CodeProps::Metadata::mIsXNACKEnabled.
+/// Key for Kernel::CodeProps::Metadata::mIsXNACKEnabled.
constexpr char IsXNACKEnabled[] = "IsXNACKEnabled";
-/// \brief Key for Kernel::CodeProps::Metadata::mNumSpilledSGPRs.
+/// Key for Kernel::CodeProps::Metadata::mNumSpilledSGPRs.
constexpr char NumSpilledSGPRs[] = "NumSpilledSGPRs";
-/// \brief Key for Kernel::CodeProps::Metadata::mNumSpilledVGPRs.
+/// Key for Kernel::CodeProps::Metadata::mNumSpilledVGPRs.
constexpr char NumSpilledVGPRs[] = "NumSpilledVGPRs";
} // end namespace Key
-/// \brief In-memory representation of kernel code properties metadata.
+/// In-memory representation of kernel code properties metadata.
struct Metadata final {
- /// \brief Size in bytes of the kernarg segment memory. Kernarg segment memory
+ /// Size in bytes of the kernarg segment memory. Kernarg segment memory
/// holds the values of the arguments to the kernel. Required.
uint64_t mKernargSegmentSize = 0;
- /// \brief Size in bytes of the group segment memory required by a workgroup.
+ /// Size in bytes of the group segment memory required by a workgroup.
/// This value does not include any dynamically allocated group segment memory
/// that may be added when the kernel is dispatched. Required.
uint32_t mGroupSegmentFixedSize = 0;
- /// \brief Size in bytes of the private segment memory required by a workitem.
+ /// Size in bytes of the private segment memory required by a workitem.
/// Private segment memory includes arg, spill and private segments. Required.
uint32_t mPrivateSegmentFixedSize = 0;
- /// \brief Maximum byte alignment of variables used by the kernel in the
+ /// Maximum byte alignment of variables used by the kernel in the
/// kernarg memory segment. Required.
uint32_t mKernargSegmentAlign = 0;
- /// \brief Wavefront size. Required.
+ /// Wavefront size. Required.
uint32_t mWavefrontSize = 0;
- /// \brief Total number of SGPRs used by a wavefront. Optional.
+ /// Total number of SGPRs used by a wavefront. Optional.
uint16_t mNumSGPRs = 0;
- /// \brief Total number of VGPRs used by a workitem. Optional.
+ /// Total number of VGPRs used by a workitem. Optional.
uint16_t mNumVGPRs = 0;
- /// \brief Maximum flat work-group size supported by the kernel. Optional.
+ /// Maximum flat work-group size supported by the kernel. Optional.
uint32_t mMaxFlatWorkGroupSize = 0;
- /// \brief True if the generated machine code is using a dynamically sized
+ /// True if the generated machine code is using a dynamically sized
/// call stack. Optional.
bool mIsDynamicCallStack = false;
- /// \brief True if the generated machine code is capable of supporting XNACK.
+ /// True if the generated machine code is capable of supporting XNACK.
/// Optional.
bool mIsXNACKEnabled = false;
- /// \brief Number of SGPRs spilled by a wavefront. Optional.
+ /// Number of SGPRs spilled by a wavefront. Optional.
uint16_t mNumSpilledSGPRs = 0;
- /// \brief Number of VGPRs spilled by a workitem. Optional.
+ /// Number of VGPRs spilled by a workitem. Optional.
uint16_t mNumSpilledVGPRs = 0;
- /// \brief Default constructor.
+ /// Default constructor.
Metadata() = default;
/// \returns True if kernel code properties metadata is empty, false
namespace DebugProps {
namespace Key {
-/// \brief Key for Kernel::DebugProps::Metadata::mDebuggerABIVersion.
+/// Key for Kernel::DebugProps::Metadata::mDebuggerABIVersion.
constexpr char DebuggerABIVersion[] = "DebuggerABIVersion";
-/// \brief Key for Kernel::DebugProps::Metadata::mReservedNumVGPRs.
+/// Key for Kernel::DebugProps::Metadata::mReservedNumVGPRs.
constexpr char ReservedNumVGPRs[] = "ReservedNumVGPRs";
-/// \brief Key for Kernel::DebugProps::Metadata::mReservedFirstVGPR.
+/// Key for Kernel::DebugProps::Metadata::mReservedFirstVGPR.
constexpr char ReservedFirstVGPR[] = "ReservedFirstVGPR";
-/// \brief Key for Kernel::DebugProps::Metadata::mPrivateSegmentBufferSGPR.
+/// Key for Kernel::DebugProps::Metadata::mPrivateSegmentBufferSGPR.
constexpr char PrivateSegmentBufferSGPR[] = "PrivateSegmentBufferSGPR";
-/// \brief Key for
+/// Key for
/// Kernel::DebugProps::Metadata::mWavefrontPrivateSegmentOffsetSGPR.
constexpr char WavefrontPrivateSegmentOffsetSGPR[] =
"WavefrontPrivateSegmentOffsetSGPR";
} // end namespace Key
-/// \brief In-memory representation of kernel debug properties metadata.
+/// In-memory representation of kernel debug properties metadata.
struct Metadata final {
- /// \brief Debugger ABI version. Optional.
+ /// Debugger ABI version. Optional.
std::vector<uint32_t> mDebuggerABIVersion = std::vector<uint32_t>();
- /// \brief Consecutive number of VGPRs reserved for debugger use. Must be 0 if
+ /// Consecutive number of VGPRs reserved for debugger use. Must be 0 if
/// mDebuggerABIVersion is not set. Optional.
uint16_t mReservedNumVGPRs = 0;
- /// \brief First fixed VGPR reserved. Must be uint16_t(-1) if
+ /// First fixed VGPR reserved. Must be uint16_t(-1) if
/// mDebuggerABIVersion is not set or mReservedFirstVGPR is 0. Optional.
uint16_t mReservedFirstVGPR = uint16_t(-1);
- /// \brief Fixed SGPR of the first of 4 SGPRs used to hold the scratch V# used
+ /// Fixed SGPR of the first of 4 SGPRs used to hold the scratch V# used
/// for the entire kernel execution. Must be uint16_t(-1) if
/// mDebuggerABIVersion is not set or SGPR not used or not known. Optional.
uint16_t mPrivateSegmentBufferSGPR = uint16_t(-1);
- /// \brief Fixed SGPR used to hold the wave scratch offset for the entire
+ /// Fixed SGPR used to hold the wave scratch offset for the entire
/// kernel execution. Must be uint16_t(-1) if mDebuggerABIVersion is not set
/// or SGPR is not used or not known. Optional.
uint16_t mWavefrontPrivateSegmentOffsetSGPR = uint16_t(-1);
- /// \brief Default constructor.
+ /// Default constructor.
Metadata() = default;
/// \returns True if kernel debug properties metadata is empty, false
} // end namespace DebugProps
namespace Key {
-/// \brief Key for Kernel::Metadata::mName.
+/// Key for Kernel::Metadata::mName.
constexpr char Name[] = "Name";
-/// \brief Key for Kernel::Metadata::mSymbolName.
+/// Key for Kernel::Metadata::mSymbolName.
constexpr char SymbolName[] = "SymbolName";
-/// \brief Key for Kernel::Metadata::mLanguage.
+/// Key for Kernel::Metadata::mLanguage.
constexpr char Language[] = "Language";
-/// \brief Key for Kernel::Metadata::mLanguageVersion.
+/// Key for Kernel::Metadata::mLanguageVersion.
constexpr char LanguageVersion[] = "LanguageVersion";
-/// \brief Key for Kernel::Metadata::mAttrs.
+/// Key for Kernel::Metadata::mAttrs.
constexpr char Attrs[] = "Attrs";
-/// \brief Key for Kernel::Metadata::mArgs.
+/// Key for Kernel::Metadata::mArgs.
constexpr char Args[] = "Args";
-/// \brief Key for Kernel::Metadata::mCodeProps.
+/// Key for Kernel::Metadata::mCodeProps.
constexpr char CodeProps[] = "CodeProps";
-/// \brief Key for Kernel::Metadata::mDebugProps.
+/// Key for Kernel::Metadata::mDebugProps.
constexpr char DebugProps[] = "DebugProps";
} // end namespace Key
-/// \brief In-memory representation of kernel metadata.
+/// In-memory representation of kernel metadata.
struct Metadata final {
- /// \brief Kernel source name. Required.
+ /// Kernel source name. Required.
std::string mName = std::string();
- /// \brief Kernel descriptor name. Required.
+ /// Kernel descriptor name. Required.
std::string mSymbolName = std::string();
- /// \brief Language. Optional.
+ /// Language. Optional.
std::string mLanguage = std::string();
- /// \brief Language version. Optional.
+ /// Language version. Optional.
std::vector<uint32_t> mLanguageVersion = std::vector<uint32_t>();
- /// \brief Attributes metadata. Optional.
+ /// Attributes metadata. Optional.
Attrs::Metadata mAttrs = Attrs::Metadata();
- /// \brief Arguments metadata. Optional.
+ /// Arguments metadata. Optional.
std::vector<Arg::Metadata> mArgs = std::vector<Arg::Metadata>();
- /// \brief Code properties metadata. Optional.
+ /// Code properties metadata. Optional.
CodeProps::Metadata mCodeProps = CodeProps::Metadata();
- /// \brief Debug properties metadata. Optional.
+ /// Debug properties metadata. Optional.
DebugProps::Metadata mDebugProps = DebugProps::Metadata();
- /// \brief Default constructor.
+ /// Default constructor.
Metadata() = default;
};
} // end namespace Kernel
namespace Key {
-/// \brief Key for HSA::Metadata::mVersion.
+/// Key for HSA::Metadata::mVersion.
constexpr char Version[] = "Version";
-/// \brief Key for HSA::Metadata::mPrintf.
+/// Key for HSA::Metadata::mPrintf.
constexpr char Printf[] = "Printf";
-/// \brief Key for HSA::Metadata::mKernels.
+/// Key for HSA::Metadata::mKernels.
constexpr char Kernels[] = "Kernels";
} // end namespace Key
-/// \brief In-memory representation of HSA metadata.
+/// In-memory representation of HSA metadata.
struct Metadata final {
- /// \brief HSA metadata version. Required.
+ /// HSA metadata version. Required.
std::vector<uint32_t> mVersion = std::vector<uint32_t>();
- /// \brief Printf metadata. Optional.
+ /// Printf metadata. Optional.
std::vector<std::string> mPrintf = std::vector<std::string>();
- /// \brief Kernels metadata. Required.
+ /// Kernels metadata. Required.
std::vector<Kernel::Metadata> mKernels = std::vector<Kernel::Metadata>();
- /// \brief Default constructor.
+ /// Default constructor.
Metadata() = default;
};
-/// \brief Converts \p String to \p HSAMetadata.
+/// Converts \p String to \p HSAMetadata.
std::error_code fromString(std::string String, Metadata &HSAMetadata);
-/// \brief Converts \p HSAMetadata to \p String.
+/// Converts \p HSAMetadata to \p String.
std::error_code toString(Metadata HSAMetadata, std::string &String);
} // end namespace HSAMD
//===----------------------------------------------------------------------===//
namespace PALMD {
-/// \brief PAL metadata assembler directive.
+/// PAL metadata assembler directive.
constexpr char AssemblerDirective[] = ".amd_amdgpu_pal_metadata";
-/// \brief PAL metadata keys.
+/// PAL metadata keys.
enum Key : uint32_t {
LS_NUM_USED_VGPRS = 0x10000021,
HS_NUM_USED_VGPRS = 0x10000022,
CS_SCRATCH_SIZE = 0x1000004a
};
-/// \brief PAL metadata represented as a vector.
+/// PAL metadata represented as a vector.
typedef std::vector<uint32_t> Metadata;
-/// \brief Converts \p PALMetadata to \p String.
+/// Converts \p PALMetadata to \p String.
std::error_code toString(const Metadata &PALMetadata, std::string &String);
} // end namespace PALMD
namespace llvm {
/// \struct AlignedCharArray
-/// \brief Helper for building an aligned character array type.
+/// Helper for building an aligned character array type.
///
/// This template is used to explicitly build up a collection of aligned
/// character array types. We have to build these up using a macro and explicit
#else // _MSC_VER
-/// \brief Create a type with an aligned char buffer.
+/// Create a type with an aligned char buffer.
template<std::size_t Alignment, std::size_t Size>
struct AlignedCharArray;
};
} // end namespace detail
-/// \brief This union template exposes a suitably aligned and sized character
+/// This union template exposes a suitably aligned and sized character
/// array member which can hold elements of any of up to ten types.
///
/// These types may be arrays, structs, or any other types. The goal is to
namespace llvm {
-/// \brief CRTP base class providing obvious overloads for the core \c
+/// CRTP base class providing obvious overloads for the core \c
/// Allocate() methods of LLVM-style allocators.
///
/// This base class both documents the full public interface exposed by all
/// set of methods which the derived class must define.
template <typename DerivedT> class AllocatorBase {
public:
- /// \brief Allocate \a Size bytes of \a Alignment aligned memory. This method
+ /// Allocate \a Size bytes of \a Alignment aligned memory. This method
/// must be implemented by \c DerivedT.
void *Allocate(size_t Size, size_t Alignment) {
#ifdef __clang__
return static_cast<DerivedT *>(this)->Allocate(Size, Alignment);
}
- /// \brief Deallocate \a Ptr to \a Size bytes of memory allocated by this
+ /// Deallocate \a Ptr to \a Size bytes of memory allocated by this
/// allocator.
void Deallocate(const void *Ptr, size_t Size) {
#ifdef __clang__
// The rest of these methods are helpers that redirect to one of the above
// core methods.
- /// \brief Allocate space for a sequence of objects without constructing them.
+ /// Allocate space for a sequence of objects without constructing them.
template <typename T> T *Allocate(size_t Num = 1) {
return static_cast<T *>(Allocate(Num * sizeof(T), alignof(T)));
}
- /// \brief Deallocate space for a sequence of objects without constructing them.
+ /// Deallocate space for a sequence of objects without constructing them.
template <typename T>
typename std::enable_if<
!std::is_same<typename std::remove_cv<T>::type, void>::value, void>::type
} // end namespace detail
-/// \brief Allocate memory in an ever growing pool, as if by bump-pointer.
+/// Allocate memory in an ever growing pool, as if by bump-pointer.
///
/// This isn't strictly a bump-pointer allocator as it uses backing slabs of
/// memory rather than relying on a boundless contiguous heap. However, it has
return *this;
}
- /// \brief Deallocate all but the current slab and reset the current pointer
+ /// Deallocate all but the current slab and reset the current pointer
/// to the beginning of it, freeing all memory allocated so far.
void Reset() {
// Deallocate all but the first slab, and deallocate all custom-sized slabs.
Slabs.erase(std::next(Slabs.begin()), Slabs.end());
}
- /// \brief Allocate space at the specified alignment.
+ /// Allocate space at the specified alignment.
LLVM_ATTRIBUTE_RETURNS_NONNULL LLVM_ATTRIBUTE_RETURNS_NOALIAS void *
Allocate(size_t Size, size_t Alignment) {
assert(Alignment > 0 && "0-byte alignnment is not allowed. Use 1 instead.");
}
private:
- /// \brief The current pointer into the current slab.
+ /// The current pointer into the current slab.
///
/// This points to the next free byte in the slab.
char *CurPtr = nullptr;
- /// \brief The end of the current slab.
+ /// The end of the current slab.
char *End = nullptr;
- /// \brief The slabs allocated so far.
+ /// The slabs allocated so far.
SmallVector<void *, 4> Slabs;
- /// \brief Custom-sized slabs allocated for too-large allocation requests.
+ /// Custom-sized slabs allocated for too-large allocation requests.
SmallVector<std::pair<void *, size_t>, 0> CustomSizedSlabs;
- /// \brief How many bytes we've allocated.
+ /// How many bytes we've allocated.
///
/// Used so that we can compute how much space was wasted.
size_t BytesAllocated = 0;
- /// \brief The number of bytes to put between allocations when running under
+ /// The number of bytes to put between allocations when running under
/// a sanitizer.
size_t RedZoneSize = 1;
- /// \brief The allocator instance we use to get slabs of memory.
+ /// The allocator instance we use to get slabs of memory.
AllocatorT Allocator;
static size_t computeSlabSize(unsigned SlabIdx) {
return SlabSize * ((size_t)1 << std::min<size_t>(30, SlabIdx / 128));
}
- /// \brief Allocate a new slab and move the bump pointers over into the new
+ /// Allocate a new slab and move the bump pointers over into the new
/// slab, modifying CurPtr and End.
void StartNewSlab() {
size_t AllocatedSlabSize = computeSlabSize(Slabs.size());
End = ((char *)NewSlab) + AllocatedSlabSize;
}
- /// \brief Deallocate a sequence of slabs.
+ /// Deallocate a sequence of slabs.
void DeallocateSlabs(SmallVectorImpl<void *>::iterator I,
SmallVectorImpl<void *>::iterator E) {
for (; I != E; ++I) {
}
}
- /// \brief Deallocate all memory for custom sized slabs.
+ /// Deallocate all memory for custom sized slabs.
void DeallocateCustomSizedSlabs() {
for (auto &PtrAndSize : CustomSizedSlabs) {
void *Ptr = PtrAndSize.first;
template <typename T> friend class SpecificBumpPtrAllocator;
};
-/// \brief The standard BumpPtrAllocator which just uses the default template
+/// The standard BumpPtrAllocator which just uses the default template
/// parameters.
typedef BumpPtrAllocatorImpl<> BumpPtrAllocator;
-/// \brief A BumpPtrAllocator that allows only elements of a specific type to be
+/// A BumpPtrAllocator that allows only elements of a specific type to be
/// allocated.
///
/// This allows calling the destructor in DestroyAll() and when the allocator is
Allocator.Reset();
}
- /// \brief Allocate space for an array of objects without constructing them.
+ /// Allocate space for an array of objects without constructing them.
T *Allocate(size_t num = 1) { return Allocator.Allocate<T>(num); }
};
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Atomic ordering constants.
+/// Atomic ordering constants.
///
/// These values are used by LLVM to represent atomic ordering for C++11's
/// memory model and more, as detailed in docs/Atomics.rst.
namespace llvm {
-/// \brief An implementation of BinaryStream which holds its entire data set
+/// An implementation of BinaryStream which holds its entire data set
/// in a single contiguous buffer. BinaryByteStream guarantees that no read
/// operation will ever incur a copy. Note that BinaryByteStream does not
/// own the underlying buffer.
ArrayRef<uint8_t> Data;
};
-/// \brief An implementation of BinaryStream whose data is backed by an llvm
+/// An implementation of BinaryStream whose data is backed by an llvm
/// MemoryBuffer object. MemoryBufferByteStream owns the MemoryBuffer in
/// question. As with BinaryByteStream, reading from a MemoryBufferByteStream
/// will never cause a copy.
std::unique_ptr<MemoryBuffer> MemBuffer;
};
-/// \brief An implementation of BinaryStream which holds its entire data set
+/// An implementation of BinaryStream which holds its entire data set
/// in a single contiguous buffer. As with BinaryByteStream, the mutable
/// version also guarantees that no read operation will ever incur a copy,
/// and similarly it does not own the underlying buffer.
BinaryByteStream ImmutableStream;
};
-/// \brief An implementation of WritableBinaryStream which can write at its end
+/// An implementation of WritableBinaryStream which can write at its end
/// causing the underlying data to grow. This class owns the underlying data.
class AppendingBinaryByteStream : public WritableBinaryStream {
std::vector<uint8_t> Data;
Error commit() override { return Error::success(); }
- /// \brief Return the properties of this stream.
+ /// Return the properties of this stream.
virtual BinaryStreamFlags getFlags() const override {
return BSF_Write | BSF_Append;
}
MutableArrayRef<uint8_t> data() { return Data; }
};
-/// \brief An implementation of WritableBinaryStream backed by an llvm
+/// An implementation of WritableBinaryStream backed by an llvm
/// FileOutputBuffer.
class FileBufferByteStream : public WritableBinaryStream {
private:
LLVM_MARK_AS_BITMASK_ENUM(/* LargestValue = */ BSF_Append)
};
-/// \brief An interface for accessing data in a stream-like format, but which
+/// An interface for accessing data in a stream-like format, but which
/// discourages copying. Instead of specifying a buffer in which to copy
/// data on a read, the API returns an ArrayRef to data owned by the stream's
/// implementation. Since implementations may not necessarily store data in a
virtual llvm::support::endianness getEndian() const = 0;
- /// \brief Given an offset into the stream and a number of bytes, attempt to
+ /// Given an offset into the stream and a number of bytes, attempt to
/// read the bytes and set the output ArrayRef to point to data owned by the
/// stream.
virtual Error readBytes(uint32_t Offset, uint32_t Size,
ArrayRef<uint8_t> &Buffer) = 0;
- /// \brief Given an offset into the stream, read as much as possible without
+ /// Given an offset into the stream, read as much as possible without
/// copying any data.
virtual Error readLongestContiguousChunk(uint32_t Offset,
ArrayRef<uint8_t> &Buffer) = 0;
- /// \brief Return the number of bytes of data in this stream.
+ /// Return the number of bytes of data in this stream.
virtual uint32_t getLength() = 0;
- /// \brief Return the properties of this stream.
+ /// Return the properties of this stream.
virtual BinaryStreamFlags getFlags() const { return BSF_None; }
protected:
}
};
-/// \brief A BinaryStream which can be read from as well as written to. Note
+/// A BinaryStream which can be read from as well as written to. Note
/// that writing to a BinaryStream always necessitates copying from the input
/// buffer to the stream's backing store. Streams are assumed to be buffered
/// so that to be portable it is necessary to call commit() on the stream when
public:
~WritableBinaryStream() override = default;
- /// \brief Attempt to write the given bytes into the stream at the desired
+ /// Attempt to write the given bytes into the stream at the desired
/// offset. This will always necessitate a copy. Cannot shrink or grow the
/// stream, only writes into existing allocated space.
virtual Error writeBytes(uint32_t Offset, ArrayRef<uint8_t> Data) = 0;
- /// \brief For buffered streams, commits changes to the backing store.
+ /// For buffered streams, commits changes to the backing store.
virtual Error commit() = 0;
- /// \brief Return the properties of this stream.
+ /// Return the properties of this stream.
BinaryStreamFlags getFlags() const override { return BSF_Write; }
protected:
bool empty() const { return Stream.getLength() == 0; }
- /// \brief given an offset into the array's underlying stream, return an
+ /// given an offset into the array's underlying stream, return an
/// iterator to the record at that offset. This is considered unsafe
/// since the behavior is undefined if \p Offset does not refer to the
/// beginning of a valid record.
namespace llvm {
-/// \brief Provides read only access to a subclass of `BinaryStream`. Provides
+/// Provides read only access to a subclass of `BinaryStream`. Provides
/// bounds checking and helpers for writing certain common data types such as
/// null-terminated strings, integers in various flavors of endianness, etc.
/// Can be subclassed to provide reading of custom datatypes, although no
Optional<uint32_t> Length;
};
-/// \brief BinaryStreamRef is to BinaryStream what ArrayRef is to an Array. It
+/// BinaryStreamRef is to BinaryStream what ArrayRef is to an Array. It
/// provides copy-semantics and read only access to a "window" of the underlying
/// BinaryStream. Note that BinaryStreamRef is *not* a BinaryStream. That is to
/// say, it does not inherit and override the methods of BinaryStream. In
/// Conver this WritableBinaryStreamRef to a read-only BinaryStreamRef.
operator BinaryStreamRef() const;
- /// \brief For buffered streams, commits changes to the backing store.
+ /// For buffered streams, commits changes to the backing store.
Error commit();
};
namespace llvm {
-/// \brief Provides write only access to a subclass of `WritableBinaryStream`.
+/// Provides write only access to a subclass of `WritableBinaryStream`.
/// Provides bounds checking and helpers for writing certain common data types
/// such as null-terminated strings, integers in various flavors of endianness,
/// etc. Can be subclassed to provide reading and writing of custom datatypes,
public:
BlockFrequency(uint64_t Freq = 0) : Frequency(Freq) { }
- /// \brief Returns the maximum possible frequency, the saturation value.
+ /// Returns the maximum possible frequency, the saturation value.
static uint64_t getMaxFrequency() { return -1ULL; }
- /// \brief Returns the frequency as a fixpoint number scaled by the entry
+ /// Returns the frequency as a fixpoint number scaled by the entry
/// frequency.
uint64_t getFrequency() const { return Frequency; }
- /// \brief Multiplies with a branch probability. The computation will never
+ /// Multiplies with a branch probability. The computation will never
/// overflow.
BlockFrequency &operator*=(BranchProbability Prob);
BlockFrequency operator*(BranchProbability Prob) const;
- /// \brief Divide by a non-zero branch probability using saturating
+ /// Divide by a non-zero branch probability using saturating
/// arithmetic.
BlockFrequency &operator/=(BranchProbability Prob);
BlockFrequency operator/(BranchProbability Prob) const;
- /// \brief Adds another block frequency using saturating arithmetic.
+ /// Adds another block frequency using saturating arithmetic.
BlockFrequency &operator+=(BlockFrequency Freq);
BlockFrequency operator+(BlockFrequency Freq) const;
- /// \brief Subtracts another block frequency using saturating arithmetic.
+ /// Subtracts another block frequency using saturating arithmetic.
BlockFrequency &operator-=(BlockFrequency Freq);
BlockFrequency operator-(BlockFrequency Freq) const;
- /// \brief Shift block frequency to the right by count digits saturating to 1.
+ /// Shift block frequency to the right by count digits saturating to 1.
BlockFrequency &operator>>=(const unsigned count);
bool operator<(BlockFrequency RHS) const {
void dump() const;
- /// \brief Scale a large integer.
+ /// Scale a large integer.
///
/// Scales \c Num. Guarantees full precision. Returns the floor of the
/// result.
/// \return \c Num times \c this.
uint64_t scale(uint64_t Num) const;
- /// \brief Scale a large integer by the inverse.
+ /// Scale a large integer by the inverse.
///
/// Scales \c Num by the inverse of \c this. Guarantees full precision.
/// Returns the floor of the result.
}
};
-/// \brief Always allow upcasts, and perform no dynamic check for them.
+/// Always allow upcasts, and perform no dynamic check for them.
template <typename To, typename From>
struct isa_impl<
To, From, typename std::enable_if<std::is_base_of<To, From>::value>::type> {
// Forward declaration - AddLiteralOption needs to be up here to make gcc happy.
class Option;
-/// \brief Adds a new option for parsing and provides the option it refers to.
+/// Adds a new option for parsing and provides the option it refers to.
///
/// \param O pointer to the option
/// \param Name the string name for the option to handle during parsing
// Public interface for accessing registered options.
//
-/// \brief Use this to get a StringMap to all registered named options
+/// Use this to get a StringMap to all registered named options
/// (e.g. -help). Note \p Map Should be an empty StringMap.
///
/// \return A reference to the StringMap used by the cl APIs to parse options.
/// than just handing around a global list.
StringMap<Option *> &getRegisteredOptions(SubCommand &Sub = *TopLevelSubCommand);
-/// \brief Use this to get all registered SubCommands from the provided parser.
+/// Use this to get all registered SubCommands from the provided parser.
///
/// \return A range of all SubCommand pointers registered with the parser.
///
// Standalone command line processing utilities.
//
-/// \brief Tokenizes a command line that can contain escapes and quotes.
+/// Tokenizes a command line that can contain escapes and quotes.
//
/// The quoting rules match those used by GCC and other tools that use
/// libiberty's buildargv() or expandargv() utilities, and do not match bash.
SmallVectorImpl<const char *> &NewArgv,
bool MarkEOLs = false);
-/// \brief Tokenizes a Windows command line which may contain quotes and escaped
+/// Tokenizes a Windows command line which may contain quotes and escaped
/// quotes.
///
/// See MSDN docs for CommandLineToArgvW for information on the quoting rules.
SmallVectorImpl<const char *> &NewArgv,
bool MarkEOLs = false);
-/// \brief String tokenization function type. Should be compatible with either
+/// String tokenization function type. Should be compatible with either
/// Windows or Unix command line tokenizers.
using TokenizerCallback = void (*)(StringRef Source, StringSaver &Saver,
SmallVectorImpl<const char *> &NewArgv,
bool readConfigFile(StringRef CfgFileName, StringSaver &Saver,
SmallVectorImpl<const char *> &Argv);
-/// \brief Expand response files on a command line recursively using the given
+/// Expand response files on a command line recursively using the given
/// StringSaver and tokenization strategy. Argv should contain the command line
/// before expansion and will be modified in place. If requested, Argv will
/// also be populated with nullptrs indicating where each response file line
SmallVectorImpl<const char *> &Argv,
bool MarkEOLs = false, bool RelativeNames = false);
-/// \brief Mark all options not part of this category as cl::ReallyHidden.
+/// Mark all options not part of this category as cl::ReallyHidden.
///
/// \param Category the category of options to keep displaying
///
void HideUnrelatedOptions(cl::OptionCategory &Category,
SubCommand &Sub = *TopLevelSubCommand);
-/// \brief Mark all options not part of the categories as cl::ReallyHidden.
+/// Mark all options not part of the categories as cl::ReallyHidden.
///
/// \param Categories the categories of options to keep displaying.
///
void HideUnrelatedOptions(ArrayRef<const cl::OptionCategory *> Categories,
SubCommand &Sub = *TopLevelSubCommand);
-/// \brief Reset all command line options to a state that looks as if they have
+/// Reset all command line options to a state that looks as if they have
/// never appeared on the command line. This is useful for being able to parse
/// a command line multiple times (especially useful for writing tests).
void ResetAllOptionOccurrences();
-/// \brief Reset the command line parser back to its initial state. This
+/// Reset the command line parser back to its initial state. This
/// removes
/// all options, categories, and subcommands and returns the parser to a state
/// where no options are supported.
DataExtractor(StringRef Data, bool IsLittleEndian, uint8_t AddressSize)
: Data(Data), IsLittleEndian(IsLittleEndian), AddressSize(AddressSize) {}
- /// \brief Get the data pointed to by this extractor.
+ /// Get the data pointed to by this extractor.
StringRef getData() const { return Data; }
- /// \brief Get the endianness for this extractor.
+ /// Get the endianness for this extractor.
bool isLittleEndian() const { return IsLittleEndian; }
- /// \brief Get the address size for this extractor.
+ /// Get the address size for this extractor.
uint8_t getAddressSize() const { return AddressSize; }
- /// \brief Set the address size for this extractor.
+ /// Set the address size for this extractor.
void setAddressSize(uint8_t Size) { AddressSize = Size; }
/// Extract a C string from \a *offset_ptr.
//
//===----------------------------------------------------------------------===//
/// \file
-/// \brief This file provides an implementation of debug counters. Debug
+/// This file provides an implementation of debug counters. Debug
/// counters are a tool that let you narrow down a miscompilation to a specific
/// thing happening.
///
class DebugCounter {
public:
- /// \brief Returns a reference to the singleton instance.
+ /// Returns a reference to the singleton instance.
static DebugCounter &instance();
// Used by the command line option parser to push a new value it parsed.
namespace detail {
-/// \brief ::value is either alignment, or alignof(T) if alignment is 0.
+/// ::value is either alignment, or alignof(T) if alignment is 0.
template<class T, int alignment>
struct PickAlignment {
enum { value = alignment == 0 ? alignof(T) : alignment };
getErrorStorage()->~error_type();
}
- /// \brief Return false if there is an error.
+ /// Return false if there is an error.
explicit operator bool() {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Unchecked = HasError;
return !HasError;
}
- /// \brief Returns a reference to the stored T value.
+ /// Returns a reference to the stored T value.
reference get() {
assertIsChecked();
return *getStorage();
}
- /// \brief Returns a const reference to the stored T value.
+ /// Returns a const reference to the stored T value.
const_reference get() const {
assertIsChecked();
return const_cast<Expected<T> *>(this)->get();
}
- /// \brief Check that this Expected<T> is an error of type ErrT.
+ /// Check that this Expected<T> is an error of type ErrT.
template <typename ErrT> bool errorIsA() const {
return HasError && (*getErrorStorage())->template isA<ErrT>();
}
- /// \brief Take ownership of the stored error.
+ /// Take ownership of the stored error.
/// After calling this the Expected<T> is in an indeterminate state that can
/// only be safely destructed. No further calls (beside the destructor) should
/// be made on the Expected<T> vaule.
return HasError ? Error(std::move(*getErrorStorage())) : Error::success();
}
- /// \brief Returns a pointer to the stored T value.
+ /// Returns a pointer to the stored T value.
pointer operator->() {
assertIsChecked();
return toPointer(getStorage());
}
- /// \brief Returns a const pointer to the stored T value.
+ /// Returns a const pointer to the stored T value.
const_pointer operator->() const {
assertIsChecked();
return toPointer(getStorage());
}
- /// \brief Returns a reference to the stored T value.
+ /// Returns a reference to the stored T value.
reference operator*() {
assertIsChecked();
return *getStorage();
}
- /// \brief Returns a const reference to the stored T value.
+ /// Returns a const reference to the stored T value.
const_reference operator*() const {
assertIsChecked();
return *getStorage();
namespace llvm {
-/// \brief Stores a reference that can be changed.
+/// Stores a reference that can be changed.
template <typename T>
class ReferenceStorage {
T *Storage;
T &get() const { return *Storage; }
};
-/// \brief Represents either an error or a value T.
+/// Represents either an error or a value T.
///
/// ErrorOr<T> is a pointer-like class that represents the result of an
/// operation. The result is either an error, or a value of type T. This is
getStorage()->~storage_type();
}
- /// \brief Return false if there is an error.
+ /// Return false if there is an error.
explicit operator bool() const {
return !HasError;
}
}
};
-// \brief Format text given a format string and replacement parameters.
+// Format text given a format string and replacement parameters.
//
// ===General Description===
//
struct SemiNCAInfo;
} // namespace DomTreeBuilder
-/// \brief Base class for the actual dominator tree node.
+/// Base class for the actual dominator tree node.
template <class NodeT> class DomTreeNodeBase {
friend class PostDominatorTree;
friend class DominatorTreeBase<NodeT, false>;
bool Verify(const DomTreeT &DT, typename DomTreeT::VerificationLevel VL);
} // namespace DomTreeBuilder
-/// \brief Core dominator tree base class.
+/// Core dominator tree base class.
///
/// This class is a generic template over graph nodes. It is instantiated for
/// various graphs in the LLVM IR or in the code generator.
return IDom != nullptr;
}
- /// \brief Wipe this tree's state without releasing any resources.
+ /// Wipe this tree's state without releasing any resources.
///
/// This is essentially a post-move helper only. It leaves the object in an
/// assignable and destroyable state, but otherwise invalid.
std::string EscapeString(const std::string &Label);
-/// \brief Get a color string for this node number. Simply round-robin selects
+/// Get a color string for this node number. Simply round-robin selects
/// from a reasonable number of colors.
StringRef getColorString(unsigned NodeNumber);
public:
JamCRC(uint32_t Init = 0xFFFFFFFFU) : CRC(Init) {}
- // \brief Update the CRC calculation with Data.
+ // Update the CRC calculation with Data.
void update(ArrayRef<char> Data);
uint32_t getCRC() const { return CRC; }
class MemoryBuffer;
-/// \brief A forward iterator which reads text lines from a buffer.
+/// A forward iterator which reads text lines from a buffer.
///
/// This class provides a forward iterator interface for reading one line at
/// a time from a buffer. When default constructed the iterator will be the
StringRef CurrentLine;
public:
- /// \brief Default construct an "end" iterator.
+ /// Default construct an "end" iterator.
line_iterator() : Buffer(nullptr) {}
- /// \brief Construct a new iterator around some memory buffer.
+ /// Construct a new iterator around some memory buffer.
explicit line_iterator(const MemoryBuffer &Buffer, bool SkipBlanks = true,
char CommentMarker = '\0');
- /// \brief Return true if we've reached EOF or are an "end" iterator.
+ /// Return true if we've reached EOF or are an "end" iterator.
bool is_at_eof() const { return !Buffer; }
- /// \brief Return true if we're an "end" iterator or have reached EOF.
+ /// Return true if we're an "end" iterator or have reached EOF.
bool is_at_end() const { return is_at_eof(); }
- /// \brief Return the current line number. May return any number at EOF.
+ /// Return the current line number. May return any number at EOF.
int64_t line_number() const { return LineNumber; }
- /// \brief Advance to the next (non-empty, non-comment) line.
+ /// Advance to the next (non-empty, non-comment) line.
line_iterator &operator++() {
advance();
return *this;
return tmp;
}
- /// \brief Get the current line as a \c StringRef.
+ /// Get the current line as a \c StringRef.
StringRef operator*() const { return CurrentLine; }
const StringRef *operator->() const { return &CurrentLine; }
}
private:
- /// \brief Advance the iterator to the next line.
+ /// Advance the iterator to the next line.
void advance();
};
}
namespace llvm {
class StringRef;
-/// \brief Class that manages the creation of a lock file to aid
+/// Class that manages the creation of a lock file to aid
/// implicit coordination between different processes.
///
/// The implicit coordination works by creating a ".lock" file alongside
/// operation.
class LockFileManager {
public:
- /// \brief Describes the state of a lock file.
+ /// Describes the state of a lock file.
enum LockFileState {
- /// \brief The lock file has been created and is owned by this instance
+ /// The lock file has been created and is owned by this instance
/// of the object.
LFS_Owned,
- /// \brief The lock file already exists and is owned by some other
+ /// The lock file already exists and is owned by some other
/// instance.
LFS_Shared,
- /// \brief An error occurred while trying to create or find the lock
+ /// An error occurred while trying to create or find the lock
/// file.
LFS_Error
};
- /// \brief Describes the result of waiting for the owner to release the lock.
+ /// Describes the result of waiting for the owner to release the lock.
enum WaitForUnlockResult {
- /// \brief The lock was released successfully.
+ /// The lock was released successfully.
Res_Success,
- /// \brief Owner died while holding the lock.
+ /// Owner died while holding the lock.
Res_OwnerDied,
- /// \brief Reached timeout while waiting for the owner to release the lock.
+ /// Reached timeout while waiting for the owner to release the lock.
Res_Timeout
};
LockFileManager(StringRef FileName);
~LockFileManager();
- /// \brief Determine the state of the lock file.
+ /// Determine the state of the lock file.
LockFileState getState() const;
operator LockFileState() const { return getState(); }
- /// \brief For a shared lock, wait until the owner releases the lock.
+ /// For a shared lock, wait until the owner releases the lock.
WaitForUnlockResult waitForUnlock();
- /// \brief Remove the lock file. This may delete a different lock file than
+ /// Remove the lock file. This may delete a different lock file than
/// the one previously read if there is a race.
std::error_code unsafeRemoveLockFile();
- /// \brief Get error message, or "" if there is no error.
+ /// Get error message, or "" if there is no error.
std::string getErrorMessage() const;
- /// \brief Set error and error message
+ /// Set error and error message
void setError(const std::error_code &EC, StringRef ErrorMsg = "") {
ErrorCode = EC;
ErrorDiagMsg = ErrorMsg.str();
MD5();
- /// \brief Updates the hash for the byte stream provided.
+ /// Updates the hash for the byte stream provided.
void update(ArrayRef<uint8_t> Data);
- /// \brief Updates the hash for the StringRef provided.
+ /// Updates the hash for the StringRef provided.
void update(StringRef Str);
- /// \brief Finishes off the hash and puts the result in result.
+ /// Finishes off the hash and puts the result in result.
void final(MD5Result &Result);
- /// \brief Translates the bytes in \p Res to a hex string that is
+ /// Translates the bytes in \p Res to a hex string that is
/// deposited into \p Str. The result will be of length 32.
static void stringifyResult(MD5Result &Result, SmallString<32> &Str);
- /// \brief Computes the hash for a given bytes.
+ /// Computes the hash for a given bytes.
static std::array<uint8_t, 16> hash(ArrayRef<uint8_t> Data);
private:
#endif
namespace llvm {
-/// \brief The behavior an operation has on an input of 0.
+/// The behavior an operation has on an input of 0.
enum ZeroBehavior {
- /// \brief The returned value is undefined.
+ /// The returned value is undefined.
ZB_Undefined,
- /// \brief The returned value is numeric_limits<T>::max()
+ /// The returned value is numeric_limits<T>::max()
ZB_Max,
- /// \brief The returned value is numeric_limits<T>::digits
+ /// The returned value is numeric_limits<T>::digits
ZB_Width
};
#endif
} // namespace detail
-/// \brief Count number of 0's from the least significant bit to the most
+/// Count number of 0's from the least significant bit to the most
/// stopping at the first 1.
///
/// Only unsigned integral types are allowed.
#endif
} // namespace detail
-/// \brief Count number of 0's from the most significant bit to the least
+/// Count number of 0's from the most significant bit to the least
/// stopping at the first 1.
///
/// Only unsigned integral types are allowed.
return llvm::detail::LeadingZerosCounter<T, sizeof(T)>::count(Val, ZB);
}
-/// \brief Get the index of the first set bit starting from the least
+/// Get the index of the first set bit starting from the least
/// significant bit.
///
/// Only unsigned integral types are allowed.
return countTrailingZeros(Val, ZB_Undefined);
}
-/// \brief Create a bitmask with the N right-most bits set to 1, and all other
+/// Create a bitmask with the N right-most bits set to 1, and all other
/// bits set to 0. Only unsigned types are allowed.
template <typename T> T maskTrailingOnes(unsigned N) {
static_assert(std::is_unsigned<T>::value, "Invalid type!");
return N == 0 ? 0 : (T(-1) >> (Bits - N));
}
-/// \brief Create a bitmask with the N left-most bits set to 1, and all other
+/// Create a bitmask with the N left-most bits set to 1, and all other
/// bits set to 0. Only unsigned types are allowed.
template <typename T> T maskLeadingOnes(unsigned N) {
return ~maskTrailingOnes<T>(CHAR_BIT * sizeof(T) - N);
}
-/// \brief Create a bitmask with the N right-most bits set to 0, and all other
+/// Create a bitmask with the N right-most bits set to 0, and all other
/// bits set to 1. Only unsigned types are allowed.
template <typename T> T maskTrailingZeros(unsigned N) {
return maskLeadingOnes<T>(CHAR_BIT * sizeof(T) - N);
}
-/// \brief Create a bitmask with the N left-most bits set to 0, and all other
+/// Create a bitmask with the N left-most bits set to 0, and all other
/// bits set to 1. Only unsigned types are allowed.
template <typename T> T maskLeadingZeros(unsigned N) {
return maskTrailingOnes<T>(CHAR_BIT * sizeof(T) - N);
}
-/// \brief Get the index of the last set bit starting from the least
+/// Get the index of the last set bit starting from the least
/// significant bit.
///
/// Only unsigned integral types are allowed.
(std::numeric_limits<T>::digits - 1);
}
-/// \brief Macro compressed bit reversal table for 256 bits.
+/// Macro compressed bit reversal table for 256 bits.
///
/// http://graphics.stanford.edu/~seander/bithacks.html#BitReverseTable
static const unsigned char BitReverseTable256[256] = {
#undef R6
};
-/// \brief Reverse the bits in \p Val.
+/// Reverse the bits in \p Val.
template <typename T>
T reverseBits(T Val) {
unsigned char in[sizeof(Val)];
return sys::SwapByteOrder_64(Value);
}
-/// \brief Count the number of ones from the most significant bit to the first
+/// Count the number of ones from the most significant bit to the first
/// zero bit.
///
/// Ex. countLeadingOnes(0xFF0FFF00) == 8.
return countLeadingZeros<T>(~Value, ZB);
}
-/// \brief Count the number of ones from the least significant bit to the first
+/// Count the number of ones from the least significant bit to the first
/// zero bit.
///
/// Ex. countTrailingOnes(0x00FF00FF) == 8.
};
} // namespace detail
-/// \brief Count the number of set bits in a value.
+/// Count the number of set bits in a value.
/// Ex. countPopulation(0xF000F000) = 8
/// Returns 0 if the word is zero.
template <typename T>
return (A | B) & (1 + ~(A | B));
}
-/// \brief Aligns \c Addr to \c Alignment bytes, rounding up.
+/// Aligns \c Addr to \c Alignment bytes, rounding up.
///
/// Alignment should be a power of two. This method rounds up, so
/// alignAddr(7, 4) == 8 and alignAddr(8, 4) == 8.
return (((uintptr_t)Addr + Alignment - 1) & ~(uintptr_t)(Alignment - 1));
}
-/// \brief Returns the necessary adjustment for aligning \c Ptr to \c Alignment
+/// Returns the necessary adjustment for aligning \c Ptr to \c Alignment
/// bytes, rounding up.
inline size_t alignmentAdjustment(const void *Ptr, size_t Alignment) {
return alignAddr(Ptr, Alignment) - (uintptr_t)Ptr;
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Defines facilities for reading and writing on-disk hash tables.
+/// Defines facilities for reading and writing on-disk hash tables.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ONDISKHASHTABLE_H
namespace llvm {
-/// \brief Generates an on disk hash table.
+/// Generates an on disk hash table.
///
/// This needs an \c Info that handles storing values into the hash table's
/// payload and computes the hash for a given key. This should provide the
/// };
/// \endcode
template <typename Info> class OnDiskChainedHashTableGenerator {
- /// \brief A single item in the hash table.
+ /// A single item in the hash table.
class Item {
public:
typename Info::key_type Key;
offset_type NumEntries;
llvm::SpecificBumpPtrAllocator<Item> BA;
- /// \brief A linked list of values in a particular hash bucket.
+ /// A linked list of values in a particular hash bucket.
struct Bucket {
offset_type Off;
unsigned Length;
Bucket *Buckets;
private:
- /// \brief Insert an item into the appropriate hash bucket.
+ /// Insert an item into the appropriate hash bucket.
void insert(Bucket *Buckets, size_t Size, Item *E) {
Bucket &B = Buckets[E->Hash & (Size - 1)];
E->Next = B.Head;
B.Head = E;
}
- /// \brief Resize the hash table, moving the old entries into the new buckets.
+ /// Resize the hash table, moving the old entries into the new buckets.
void resize(size_t NewSize) {
Bucket *NewBuckets = static_cast<Bucket *>(
safe_calloc(NewSize, sizeof(Bucket)));
}
public:
- /// \brief Insert an entry into the table.
+ /// Insert an entry into the table.
void insert(typename Info::key_type_ref Key,
typename Info::data_type_ref Data) {
Info InfoObj;
insert(Key, Data, InfoObj);
}
- /// \brief Insert an entry into the table.
+ /// Insert an entry into the table.
///
/// Uses the provided Info instead of a stack allocated one.
void insert(typename Info::key_type_ref Key,
insert(Buckets, NumBuckets, new (BA.Allocate()) Item(Key, Data, InfoObj));
}
- /// \brief Determine whether an entry has been inserted.
+ /// Determine whether an entry has been inserted.
bool contains(typename Info::key_type_ref Key, Info &InfoObj) {
unsigned Hash = InfoObj.ComputeHash(Key);
for (Item *I = Buckets[Hash & (NumBuckets - 1)].Head; I; I = I->Next)
return false;
}
- /// \brief Emit the table to Out, which must not be at offset 0.
+ /// Emit the table to Out, which must not be at offset 0.
offset_type Emit(raw_ostream &Out) {
Info InfoObj;
return Emit(Out, InfoObj);
}
- /// \brief Emit the table to Out, which must not be at offset 0.
+ /// Emit the table to Out, which must not be at offset 0.
///
/// Uses the provided Info instead of a stack allocated one.
offset_type Emit(raw_ostream &Out, Info &InfoObj) {
~OnDiskChainedHashTableGenerator() { std::free(Buckets); }
};
-/// \brief Provides lookup on an on disk hash table.
+/// Provides lookup on an on disk hash table.
///
/// This needs an \c Info that handles reading values from the hash table's
/// payload and computes the hash for a given key. This should provide the
bool operator!=(const iterator &X) const { return X.Data != Data; }
};
- /// \brief Look up the stored data for a particular key.
+ /// Look up the stored data for a particular key.
iterator find(const external_key_type &EKey, Info *InfoPtr = nullptr) {
const internal_key_type &IKey = InfoObj.GetInternalKey(EKey);
hash_value_type KeyHash = InfoObj.ComputeHash(IKey);
return find_hashed(IKey, KeyHash, InfoPtr);
}
- /// \brief Look up the stored data for a particular key with a known hash.
+ /// Look up the stored data for a particular key with a known hash.
iterator find_hashed(const internal_key_type &IKey, hash_value_type KeyHash,
Info *InfoPtr = nullptr) {
using namespace llvm::support;
Info &getInfoObj() { return InfoObj; }
- /// \brief Create the hash table.
+ /// Create the hash table.
///
/// \param Buckets is the beginning of the hash table itself, which follows
/// the payload of entire structure. This is the value returned by
}
};
-/// \brief Provides lookup and iteration over an on disk hash table.
+/// Provides lookup and iteration over an on disk hash table.
///
/// \copydetails llvm::OnDiskChainedHashTable
template <typename Info>
typedef typename base_type::offset_type offset_type;
private:
- /// \brief Iterates over all of the keys in the table.
+ /// Iterates over all of the keys in the table.
class iterator_base {
const unsigned char *Ptr;
offset_type NumItemsInBucketLeft;
: base_type(NumBuckets, NumEntries, Buckets, Base, InfoObj),
Payload(Payload) {}
- /// \brief Iterates over all of the keys in the table.
+ /// Iterates over all of the keys in the table.
class key_iterator : public iterator_base {
Info *InfoObj;
return make_range(key_begin(), key_end());
}
- /// \brief Iterates over all the entries in the table, returning the data.
+ /// Iterates over all the entries in the table, returning the data.
class data_iterator : public iterator_base {
Info *InfoObj;
return make_range(data_begin(), data_end());
}
- /// \brief Create the hash table.
+ /// Create the hash table.
///
/// \param Buckets is the beginning of the hash table itself, which follows
/// the payload of entire structure. This is the value returned by
} // namespace detail
-/// \brief Singleton class used to register debug options.
+/// Singleton class used to register debug options.
///
/// The OptionRegistry is responsible for managing lifetimes of the options and
/// provides interfaces for option registration and reading values from options.
private:
DenseMap<void *, cl::Option *> Options;
- /// \brief Adds a cl::Option to the registry.
+ /// Adds a cl::Option to the registry.
///
/// \param Key unique key for option
/// \param O option to map to \p Key
~OptionRegistry();
OptionRegistry() {}
- /// \brief Returns a reference to the singleton instance.
+ /// Returns a reference to the singleton instance.
static OptionRegistry &instance();
- /// \brief Registers an option with the OptionRegistry singleton.
+ /// Registers an option with the OptionRegistry singleton.
///
/// \tparam ValT type of the option's data
/// \tparam Base class used to key the option
instance().addOption(&detail::OptionKey<ValT, Base, Mem>::ID, Option);
}
- /// \brief Returns the value of the option.
+ /// Returns the value of the option.
///
/// \tparam ValT type of the option's data
/// \tparam Base class used to key the option
#else
const ptrdiff_t MinParallelSize = 1024;
-/// \brief Inclusive median.
+/// Inclusive median.
template <class RandomAccessIterator, class Comparator>
RandomAccessIterator medianOf3(RandomAccessIterator Start,
RandomAccessIterator End,
namespace sys {
-/// \brief A collection of legacy interfaces for querying information about the
+/// A collection of legacy interfaces for querying information about the
/// current executing process.
class Process {
public:
static unsigned getPageSize();
- /// \brief Return process memory usage.
+ /// Return process memory usage.
/// This static function will return the total amount of memory allocated
/// by the process. This only counts the memory allocated via the malloc,
/// calloc and realloc functions and includes any "free" holes in the
/// @brief Prevent core file generation.
static void PreventCoreFiles();
- /// \brief true if PreventCoreFiles has been called, false otherwise.
+ /// true if PreventCoreFiles has been called, false otherwise.
static bool AreCoreFilesPrevented();
// This function returns the environment variable \arg name's value as a UTF-8
ProcessInfo();
};
- /// \brief Find the first executable file \p Name in \p Paths.
+ /// Find the first executable file \p Name in \p Paths.
///
/// This does not perform hashing as a shell would but instead stats each PATH
/// entry individually so should generally be avoided. Core LLVM library
std::string sub(StringRef Repl, StringRef String,
std::string *Error = nullptr);
- /// \brief If this function returns true, ^Str$ is an extended regular
+ /// If this function returns true, ^Str$ is an extended regular
/// expression that matches Str and only Str.
static bool isLiteralERE(StringRef Str);
- /// \brief Turn String into a regex by escaping its special characters.
+ /// Turn String into a regex by escaping its special characters.
static std::string escape(StringRef String);
private:
namespace llvm {
namespace ScaledNumbers {
-/// \brief Maximum scale; same as APFloat for easy debug printing.
+/// Maximum scale; same as APFloat for easy debug printing.
const int32_t MaxScale = 16383;
-/// \brief Maximum scale; same as APFloat for easy debug printing.
+/// Maximum scale; same as APFloat for easy debug printing.
const int32_t MinScale = -16382;
-/// \brief Get the width of a number.
+/// Get the width of a number.
template <class DigitsT> inline int getWidth() { return sizeof(DigitsT) * 8; }
-/// \brief Conditionally round up a scaled number.
+/// Conditionally round up a scaled number.
///
/// Given \c Digits and \c Scale, round up iff \c ShouldRound is \c true.
/// Always returns \c Scale unless there's an overflow, in which case it
return std::make_pair(Digits, Scale);
}
-/// \brief Convenience helper for 32-bit rounding.
+/// Convenience helper for 32-bit rounding.
inline std::pair<uint32_t, int16_t> getRounded32(uint32_t Digits, int16_t Scale,
bool ShouldRound) {
return getRounded(Digits, Scale, ShouldRound);
}
-/// \brief Convenience helper for 64-bit rounding.
+/// Convenience helper for 64-bit rounding.
inline std::pair<uint64_t, int16_t> getRounded64(uint64_t Digits, int16_t Scale,
bool ShouldRound) {
return getRounded(Digits, Scale, ShouldRound);
}
-/// \brief Adjust a 64-bit scaled number down to the appropriate width.
+/// Adjust a 64-bit scaled number down to the appropriate width.
///
/// \pre Adding 64 to \c Scale will not overflow INT16_MAX.
template <class DigitsT>
Digits & (UINT64_C(1) << (Shift - 1)));
}
-/// \brief Convenience helper for adjusting to 32 bits.
+/// Convenience helper for adjusting to 32 bits.
inline std::pair<uint32_t, int16_t> getAdjusted32(uint64_t Digits,
int16_t Scale = 0) {
return getAdjusted<uint32_t>(Digits, Scale);
}
-/// \brief Convenience helper for adjusting to 64 bits.
+/// Convenience helper for adjusting to 64 bits.
inline std::pair<uint64_t, int16_t> getAdjusted64(uint64_t Digits,
int16_t Scale = 0) {
return getAdjusted<uint64_t>(Digits, Scale);
}
-/// \brief Multiply two 64-bit integers to create a 64-bit scaled number.
+/// Multiply two 64-bit integers to create a 64-bit scaled number.
///
/// Implemented with four 64-bit integer multiplies.
std::pair<uint64_t, int16_t> multiply64(uint64_t LHS, uint64_t RHS);
-/// \brief Multiply two 32-bit integers to create a 32-bit scaled number.
+/// Multiply two 32-bit integers to create a 32-bit scaled number.
///
/// Implemented with one 64-bit integer multiply.
template <class DigitsT>
return multiply64(LHS, RHS);
}
-/// \brief Convenience helper for 32-bit product.
+/// Convenience helper for 32-bit product.
inline std::pair<uint32_t, int16_t> getProduct32(uint32_t LHS, uint32_t RHS) {
return getProduct(LHS, RHS);
}
-/// \brief Convenience helper for 64-bit product.
+/// Convenience helper for 64-bit product.
inline std::pair<uint64_t, int16_t> getProduct64(uint64_t LHS, uint64_t RHS) {
return getProduct(LHS, RHS);
}
-/// \brief Divide two 64-bit integers to create a 64-bit scaled number.
+/// Divide two 64-bit integers to create a 64-bit scaled number.
///
/// Implemented with long division.
///
/// \pre \c Dividend and \c Divisor are non-zero.
std::pair<uint64_t, int16_t> divide64(uint64_t Dividend, uint64_t Divisor);
-/// \brief Divide two 32-bit integers to create a 32-bit scaled number.
+/// Divide two 32-bit integers to create a 32-bit scaled number.
///
/// Implemented with one 64-bit integer divide/remainder pair.
///
/// \pre \c Dividend and \c Divisor are non-zero.
std::pair<uint32_t, int16_t> divide32(uint32_t Dividend, uint32_t Divisor);
-/// \brief Divide two 32-bit numbers to create a 32-bit scaled number.
+/// Divide two 32-bit numbers to create a 32-bit scaled number.
///
/// Implemented with one 64-bit integer divide/remainder pair.
///
return divide32(Dividend, Divisor);
}
-/// \brief Convenience helper for 32-bit quotient.
+/// Convenience helper for 32-bit quotient.
inline std::pair<uint32_t, int16_t> getQuotient32(uint32_t Dividend,
uint32_t Divisor) {
return getQuotient(Dividend, Divisor);
}
-/// \brief Convenience helper for 64-bit quotient.
+/// Convenience helper for 64-bit quotient.
inline std::pair<uint64_t, int16_t> getQuotient64(uint64_t Dividend,
uint64_t Divisor) {
return getQuotient(Dividend, Divisor);
}
-/// \brief Implementation of getLg() and friends.
+/// Implementation of getLg() and friends.
///
/// Returns the rounded lg of \c Digits*2^Scale and an int specifying whether
/// this was rounded up (1), down (-1), or exact (0).
return std::make_pair(Floor + Round, Round ? 1 : -1);
}
-/// \brief Get the lg (rounded) of a scaled number.
+/// Get the lg (rounded) of a scaled number.
///
/// Get the lg of \c Digits*2^Scale.
///
return getLgImpl(Digits, Scale).first;
}
-/// \brief Get the lg floor of a scaled number.
+/// Get the lg floor of a scaled number.
///
/// Get the floor of the lg of \c Digits*2^Scale.
///
return Lg.first - (Lg.second > 0);
}
-/// \brief Get the lg ceiling of a scaled number.
+/// Get the lg ceiling of a scaled number.
///
/// Get the ceiling of the lg of \c Digits*2^Scale.
///
return Lg.first + (Lg.second < 0);
}
-/// \brief Implementation for comparing scaled numbers.
+/// Implementation for comparing scaled numbers.
///
/// Compare two 64-bit numbers with different scales. Given that the scale of
/// \c L is higher than that of \c R by \c ScaleDiff, compare them. Return -1,
/// \pre 0 <= ScaleDiff < 64.
int compareImpl(uint64_t L, uint64_t R, int ScaleDiff);
-/// \brief Compare two scaled numbers.
+/// Compare two scaled numbers.
///
/// Compare two scaled numbers. Returns 0 for equal, -1 for less than, and 1
/// for greater than.
return -compareImpl(RDigits, LDigits, LScale - RScale);
}
-/// \brief Match scales of two numbers.
+/// Match scales of two numbers.
///
/// Given two scaled numbers, match up their scales. Change the digits and
/// scales in place. Shift the digits as necessary to form equivalent numbers,
return LScale;
}
-/// \brief Get the sum of two scaled numbers.
+/// Get the sum of two scaled numbers.
///
/// Get the sum of two scaled numbers with as much precision as possible.
///
return std::make_pair(HighBit | Sum >> 1, Scale + 1);
}
-/// \brief Convenience helper for 32-bit sum.
+/// Convenience helper for 32-bit sum.
inline std::pair<uint32_t, int16_t> getSum32(uint32_t LDigits, int16_t LScale,
uint32_t RDigits, int16_t RScale) {
return getSum(LDigits, LScale, RDigits, RScale);
}
-/// \brief Convenience helper for 64-bit sum.
+/// Convenience helper for 64-bit sum.
inline std::pair<uint64_t, int16_t> getSum64(uint64_t LDigits, int16_t LScale,
uint64_t RDigits, int16_t RScale) {
return getSum(LDigits, LScale, RDigits, RScale);
}
-/// \brief Get the difference of two scaled numbers.
+/// Get the difference of two scaled numbers.
///
/// Get LHS minus RHS with as much precision as possible.
///
return std::make_pair(LDigits, LScale);
}
-/// \brief Convenience helper for 32-bit difference.
+/// Convenience helper for 32-bit difference.
inline std::pair<uint32_t, int16_t> getDifference32(uint32_t LDigits,
int16_t LScale,
uint32_t RDigits,
return getDifference(LDigits, LScale, RDigits, RScale);
}
-/// \brief Convenience helper for 64-bit difference.
+/// Convenience helper for 64-bit difference.
inline std::pair<uint64_t, int16_t> getDifference64(uint64_t LDigits,
int16_t LScale,
uint64_t RDigits,
}
};
-/// \brief Simple representation of a scaled number.
+/// Simple representation of a scaled number.
///
/// ScaledNumber is a number represented by digits and a scale. It uses simple
/// saturation arithmetic and every operation is well-defined for every value.
int16_t getScale() const { return Scale; }
DigitsType getDigits() const { return Digits; }
- /// \brief Convert to the given integer type.
+ /// Convert to the given integer type.
///
/// Convert to \c IntT using simple saturating arithmetic, truncating if
/// necessary.
return Digits == DigitsType(1) << -Scale;
}
- /// \brief The log base 2, rounded.
+ /// The log base 2, rounded.
///
/// Get the lg of the scalar. lg 0 is defined to be INT32_MIN.
int32_t lg() const { return ScaledNumbers::getLg(Digits, Scale); }
- /// \brief The log base 2, rounded towards INT32_MIN.
+ /// The log base 2, rounded towards INT32_MIN.
///
/// Get the lg floor. lg 0 is defined to be INT32_MIN.
int32_t lgFloor() const { return ScaledNumbers::getLgFloor(Digits, Scale); }
- /// \brief The log base 2, rounded towards INT32_MAX.
+ /// The log base 2, rounded towards INT32_MAX.
///
/// Get the lg ceiling. lg 0 is defined to be INT32_MIN.
int32_t lgCeiling() const {
bool operator!() const { return isZero(); }
- /// \brief Convert to a decimal representation in a string.
+ /// Convert to a decimal representation in a string.
///
/// Convert to a string. Uses scientific notation for very large/small
/// numbers. Scientific notation is used roughly for numbers outside of the
return ScaledNumberBase::toString(Digits, Scale, Width, Precision);
}
- /// \brief Print a decimal representation.
+ /// Print a decimal representation.
///
/// Print a string. See toString for documentation.
raw_ostream &print(raw_ostream &OS,
void shiftLeft(int32_t Shift);
void shiftRight(int32_t Shift);
- /// \brief Adjust two floats to have matching exponents.
+ /// Adjust two floats to have matching exponents.
///
/// Adjust \c this and \c X to have matching exponents. Returns the new \c X
/// by value. Does nothing if \a isZero() for either.
}
public:
- /// \brief Scale a large number accurately.
+ /// Scale a large number accurately.
///
/// Scale N (multiply it by this). Uses full precision multiplication, even
/// if Width is smaller than 64, so information is not lost.
return countLeadingZeros32(Digits) + Width - 32;
}
- /// \brief Adjust a number to width, rounding up if necessary.
+ /// Adjust a number to width, rounding up if necessary.
///
/// Should only be called for \c Shift close to zero.
///
/// When an error signal (such as SIGABRT or SIGSEGV) is delivered to the
/// process, print a stack trace and then exit.
- /// \brief Print a stack trace if a fatal signal occurs.
+ /// Print a stack trace if a fatal signal occurs.
/// \param Argv0 the current binary name, used to find the symbolizer
/// relative to the current binary before searching $PATH; can be
/// StringRef(), in which case we will only search $PATH.
/// Disable all system dialog boxes that appear when the process crashes.
void DisableSystemDialogsOnCrash();
- /// \brief Print the stack trace using the given \c raw_ostream object.
+ /// Print the stack trace using the given \c raw_ostream object.
void PrintStackTrace(raw_ostream &OS);
// Run all registered signal handlers.
namespace llvm {
-/// \brief SmallVector-backed MemoryBuffer instance.
+/// SmallVector-backed MemoryBuffer instance.
///
/// This class enables efficient construction of MemoryBuffers from SmallVector
/// instances. This is useful for MCJIT and Orc, where object files are streamed
/// MemoryBuffer).
class SmallVectorMemoryBuffer : public MemoryBuffer {
public:
- /// \brief Construct an SmallVectorMemoryBuffer from the given SmallVector
+ /// Construct an SmallVectorMemoryBuffer from the given SmallVector
/// r-value.
///
/// FIXME: It'd be nice for this to be a non-templated constructor taking a
init(this->SV.begin(), this->SV.end(), false);
}
- /// \brief Construct a named SmallVectorMemoryBuffer from the given
+ /// Construct a named SmallVectorMemoryBuffer from the given
/// SmallVector r-value and StringRef.
SmallVectorMemoryBuffer(SmallVectorImpl<char> &&SV, StringRef Name)
: SV(std::move(SV)), BufferName(Name) {
namespace llvm {
-/// \brief Saves strings in the inheritor's stable storage and returns a
+/// Saves strings in the inheritor's stable storage and returns a
/// StringRef with a stable character pointer.
class StringSaver final {
BumpPtrAllocator &Alloc;
// YOU SHOULD NEVER USE THIS DIRECTLY.
class ThreadLocalImpl {
typedef uint64_t ThreadLocalDataTy;
- /// \brief Platform-specific thread local data.
+ /// Platform-specific thread local data.
///
/// This is embedded in the class and we avoid malloc'ing/free'ing it,
/// to make this class more safe for use along with CrashRecoveryContext.
enum InitStatus { Uninitialized = 0, Wait = 1, Done = 2 };
- /// \brief The llvm::once_flag structure
+ /// The llvm::once_flag structure
///
/// This type is modeled after std::once_flag to use with llvm::call_once.
/// This structure must be used as an opaque object. It is a struct to force
#endif
- /// \brief Execute the function specified as a parameter once.
+ /// Execute the function specified as a parameter once.
///
/// Typical usage:
/// \code
/// not available.
unsigned hardware_concurrency();
- /// \brief Return the current thread id, as used in various OS system calls.
+ /// Return the current thread id, as used in various OS system calls.
/// Note that not all platforms guarantee that the value returned will be
/// unique across the entire system, so portable code should not assume
/// this.
uint64_t get_threadid();
- /// \brief Get the maximum length of a thread name on this platform.
+ /// Get the maximum length of a thread name on this platform.
/// A value of 0 means there is no limit.
uint32_t get_max_thread_name_length();
- /// \brief Set the name of the current thread. Setting a thread's name can
+ /// Set the name of the current thread. Setting a thread's name can
/// be helpful for enabling useful diagnostics under a debugger or when
/// logging. The level of support for setting a thread's name varies
/// wildly across operating systems, and we only make a best effort to
/// or failure is returned.
void set_thread_name(const Twine &Name);
- /// \brief Get the name of the current thread. The level of support for
+ /// Get the name of the current thread. The level of support for
/// getting a thread's name varies wildly across operating systems, and it
/// is not even guaranteed that if you can successfully set a thread's name
/// that you can later get it back. This function is intended for diagnostic
namespace llvm {
namespace sys {
-/// \brief Represents a closed range of Unicode code points [Lower, Upper].
+/// Represents a closed range of Unicode code points [Lower, Upper].
struct UnicodeCharRange {
uint32_t Lower;
uint32_t Upper;
return Range.Upper < Value;
}
-/// \brief Holds a reference to an ordered array of UnicodeCharRange and allows
+/// Holds a reference to an ordered array of UnicodeCharRange and allows
/// to quickly check if a code point is contained in the set represented by this
/// array.
class UnicodeCharSet {
public:
typedef ArrayRef<UnicodeCharRange> CharRanges;
- /// \brief Constructs a UnicodeCharSet instance from an array of
+ /// Constructs a UnicodeCharSet instance from an array of
/// UnicodeCharRanges.
///
/// Array pointed by \p Ranges should have the lifetime at least as long as
}
#endif
- /// \brief Returns true if the character set contains the Unicode code point
+ /// Returns true if the character set contains the Unicode code point
/// \p C.
bool contains(uint32_t C) const {
return std::binary_search(Ranges.begin(), Ranges.end(), C);
}
private:
- /// \brief Returns true if each of the ranges is a proper closed range
+ /// Returns true if each of the ranges is a proper closed range
/// [min, max], and if the ranges themselves are ordered and non-overlapping.
bool rangesAreValid() const {
uint32_t Prev = 0;
// For more information please see MSDN at:
// http://msdn.microsoft.com/en-us/library/ddssxxy8.aspx
- /// \brief Return pointer to language specific data part of UnwindInfo.
+ /// Return pointer to language specific data part of UnwindInfo.
void *getLanguageSpecificData() {
return reinterpret_cast<void *>(&UnwindCodes[(NumCodes+1) & ~1]);
}
- /// \brief Return pointer to language specific data part of UnwindInfo.
+ /// Return pointer to language specific data part of UnwindInfo.
const void *getLanguageSpecificData() const {
return reinterpret_cast<const void *>(&UnwindCodes[(NumCodes + 1) & ~1]);
}
- /// \brief Return image-relative offset of language-specific exception handler.
+ /// Return image-relative offset of language-specific exception handler.
uint32_t getLanguageSpecificHandlerOffset() const {
return *reinterpret_cast<const support::ulittle32_t *>(
getLanguageSpecificData());
}
- /// \brief Set image-relative offset of language-specific exception handler.
+ /// Set image-relative offset of language-specific exception handler.
void setLanguageSpecificHandlerOffset(uint32_t offset) {
*reinterpret_cast<support::ulittle32_t *>(getLanguageSpecificData()) =
offset;
}
- /// \brief Return pointer to exception-specific data.
+ /// Return pointer to exception-specific data.
void *getExceptionData() {
return reinterpret_cast<void *>(reinterpret_cast<uint32_t *>(
getLanguageSpecificData())+1);
}
- /// \brief Return pointer to chained unwind info.
+ /// Return pointer to chained unwind info.
RuntimeFunction *getChainedFunctionEntry() {
return reinterpret_cast<RuntimeFunction *>(getLanguageSpecificData());
}
- /// \brief Return pointer to chained unwind info.
+ /// Return pointer to chained unwind info.
const RuntimeFunction *getChainedFunctionEntry() const {
return reinterpret_cast<const RuntimeFunction *>(getLanguageSpecificData());
}
};
#undef ENUM_ENTRY
-/// \brief The specification for how to extract and interpret one operand.
+/// The specification for how to extract and interpret one operand.
struct OperandSpecifier {
uint8_t encoding;
uint8_t type;
class Scanner;
struct Token;
-/// \brief Dump all the tokens in this stream to OS.
+/// Dump all the tokens in this stream to OS.
/// \returns true if there was an error, false otherwise.
bool dumpTokens(StringRef Input, raw_ostream &);
-/// \brief Scans all tokens in input without outputting anything. This is used
+/// Scans all tokens in input without outputting anything. This is used
/// for benchmarking the tokenizer.
/// \returns true if there was an error, false otherwise.
bool scanTokens(StringRef Input);
-/// \brief Escape \a Input for a double quoted scalar; if \p EscapePrintable
+/// Escape \a Input for a double quoted scalar; if \p EscapePrintable
/// is true, all UTF8 sequences will be escaped, if \p EscapePrintable is
/// false, those UTF8 sequences encoding printable unicode scalars will not be
/// escaped, but emitted verbatim.
std::string escape(StringRef Input, bool EscapePrintable = true);
-/// \brief This class represents a YAML stream potentially containing multiple
+/// This class represents a YAML stream potentially containing multiple
/// documents.
class Stream {
public:
- /// \brief This keeps a reference to the string referenced by \p Input.
+ /// This keeps a reference to the string referenced by \p Input.
Stream(StringRef Input, SourceMgr &, bool ShowColors = true,
std::error_code *EC = nullptr);
std::unique_ptr<Document> CurrentDoc;
};
-/// \brief Abstract base class for all Nodes.
+/// Abstract base class for all Nodes.
class Node {
virtual void anchor();
void operator delete(void *) noexcept = delete;
- /// \brief Get the value of the anchor attached to this node. If it does not
+ /// Get the value of the anchor attached to this node. If it does not
/// have one, getAnchor().size() will be 0.
StringRef getAnchor() const { return Anchor; }
- /// \brief Get the tag as it was written in the document. This does not
+ /// Get the tag as it was written in the document. This does not
/// perform tag resolution.
StringRef getRawTag() const { return Tag; }
- /// \brief Get the verbatium tag for a given Node. This performs tag resoluton
+ /// Get the verbatium tag for a given Node. This performs tag resoluton
/// and substitution.
std::string getVerbatimTag() const;
private:
unsigned int TypeID;
StringRef Anchor;
- /// \brief The tag as typed in the document.
+ /// The tag as typed in the document.
StringRef Tag;
};
-/// \brief A null value.
+/// A null value.
///
/// Example:
/// !!null null
static bool classof(const Node *N) { return N->getType() == NK_Null; }
};
-/// \brief A scalar node is an opaque datum that can be presented as a
+/// A scalar node is an opaque datum that can be presented as a
/// series of zero or more Unicode scalar values.
///
/// Example:
// utf8).
StringRef getRawValue() const { return Value; }
- /// \brief Gets the value of this node as a StringRef.
+ /// Gets the value of this node as a StringRef.
///
/// \param Storage is used to store the content of the returned StringRef iff
/// it requires any modification from how it appeared in the source.
SmallVectorImpl<char> &Storage) const;
};
-/// \brief A block scalar node is an opaque datum that can be presented as a
+/// A block scalar node is an opaque datum that can be presented as a
/// series of zero or more Unicode scalar values.
///
/// Example:
SourceRange = SMRange(Start, End);
}
- /// \brief Gets the value of this node as a StringRef.
+ /// Gets the value of this node as a StringRef.
StringRef getValue() const { return Value; }
static bool classof(const Node *N) {
StringRef Value;
};
-/// \brief A key and value pair. While not technically a Node under the YAML
+/// A key and value pair. While not technically a Node under the YAML
/// representation graph, it is easier to treat them this way.
///
/// TODO: Consider making this not a child of Node.
KeyValueNode(std::unique_ptr<Document> &D)
: Node(NK_KeyValue, D, StringRef(), StringRef()) {}
- /// \brief Parse and return the key.
+ /// Parse and return the key.
///
/// This may be called multiple times.
///
/// \returns The key, or nullptr if failed() == true.
Node *getKey();
- /// \brief Parse and return the value.
+ /// Parse and return the value.
///
/// This may be called multiple times.
///
Node *Value = nullptr;
};
-/// \brief This is an iterator abstraction over YAML collections shared by both
+/// This is an iterator abstraction over YAML collections shared by both
/// sequences and maps.
///
/// BaseT must have a ValueT* member named CurrentEntry and a member function
i->skip();
}
-/// \brief Represents a YAML map created from either a block map for a flow map.
+/// Represents a YAML map created from either a block map for a flow map.
///
/// This parses the YAML stream as increment() is called.
///
void increment();
};
-/// \brief Represents a YAML sequence created from either a block sequence for a
+/// Represents a YAML sequence created from either a block sequence for a
/// flow sequence.
///
/// This parses the YAML stream as increment() is called.
Node *CurrentEntry = nullptr;
};
-/// \brief Represents an alias to a Node with an anchor.
+/// Represents an alias to a Node with an anchor.
///
/// Example:
/// *AnchorName
StringRef Name;
};
-/// \brief A YAML Stream is a sequence of Documents. A document contains a root
+/// A YAML Stream is a sequence of Documents. A document contains a root
/// node.
class Document {
public:
Document(Stream &ParentStream);
- /// \brief Root for parsing a node. Returns a single node.
+ /// Root for parsing a node. Returns a single node.
Node *parseBlockNode();
- /// \brief Finish parsing the current document and return true if there are
+ /// Finish parsing the current document and return true if there are
/// more. Return false otherwise.
bool skip();
- /// \brief Parse and return the root level node.
+ /// Parse and return the root level node.
Node *getRoot() {
if (Root)
return Root;
friend class Node;
friend class document_iterator;
- /// \brief Stream to read tokens from.
+ /// Stream to read tokens from.
Stream &stream;
- /// \brief Used to allocate nodes to. All are destroyed without calling their
+ /// Used to allocate nodes to. All are destroyed without calling their
/// destructor when the document is destroyed.
BumpPtrAllocator NodeAllocator;
- /// \brief The root node. Used to support skipping a partially parsed
+ /// The root node. Used to support skipping a partially parsed
/// document.
Node *Root;
- /// \brief Maps tag prefixes to their expansion.
+ /// Maps tag prefixes to their expansion.
std::map<StringRef, StringRef> TagMap;
Token &peekNext();
void setError(const Twine &Message, Token &Location) const;
bool failed() const;
- /// \brief Parse %BLAH directives and return true if any were encountered.
+ /// Parse %BLAH directives and return true if any were encountered.
bool parseDirectives();
- /// \brief Parse %YAML
+ /// Parse %YAML
void parseYAMLDirective();
- /// \brief Parse %TAG
+ /// Parse %TAG
void parseTAGDirective();
- /// \brief Consume the next token and error if it is not \a TK.
+ /// Consume the next token and error if it is not \a TK.
bool expectToken(int TK);
};
-/// \brief Iterator abstraction for Documents over a Stream.
+/// Iterator abstraction for Documents over a Stream.
class document_iterator {
public:
document_iterator() = default;
Output(raw_ostream &, void *Ctxt = nullptr, int WrapColumn = 70);
~Output() override;
- /// \brief Set whether or not to output optional values which are equal
+ /// Set whether or not to output optional values which are equal
/// to the default value. By default, when outputting if you attempt
/// to write a value that is equal to the default, the value gets ignored.
/// Sometimes, it is useful to be able to see these in the resulting YAML
static const bool value = isPodLike<T>::value && isPodLike<U>::value;
};
-/// \brief Metafunction that determines whether the given type is either an
+/// Metafunction that determines whether the given type is either an
/// integral type or an enumeration type, including enum classes.
///
/// Note that this accepts potentially more integral types than is_integral
std::is_convertible<UnderlyingT, unsigned long long>::value);
};
-/// \brief If T is a pointer, just return it. If it is not, return T&.
+/// If T is a pointer, just return it. If it is not, return T&.
template<typename T, typename Enable = void>
struct add_lvalue_reference_if_not_pointer { using type = T &; };
using type = T;
};
-/// \brief If T is a pointer to X, return a pointer to const X. If it is not,
+/// If T is a pointer to X, return a pointer to const X. If it is not,
/// return const T.
template<typename T, typename Enable = void>
struct add_const_past_pointer { using type = const T; };
class RecTy {
public:
- /// \brief Subclass discriminator (for dyn_cast<> et al.)
+ /// Subclass discriminator (for dyn_cast<> et al.)
enum RecTyKind {
BitRecTyKind,
BitsRecTyKind,
class Init {
protected:
- /// \brief Discriminator enum (for isa<>, dyn_cast<>, et al.)
+ /// Discriminator enum (for isa<>, dyn_cast<>, et al.)
///
/// This enum is laid out by a preorder traversal of the inheritance
/// hierarchy, and does not contain an entry for abstract classes, as per
return StaticDtorSection;
}
- /// \brief Create a symbol reference to describe the given TLS variable when
+ /// Create a symbol reference to describe the given TLS variable when
/// emitting the address in debug info.
virtual const MCExpr *getDebugThreadLocalSymbol(const MCSymbol *Sym) const;
return nullptr;
}
- /// \brief Target supports replacing a data "PC"-relative access to a symbol
+ /// Target supports replacing a data "PC"-relative access to a symbol
/// through another symbol, by accessing the later via a GOT entry instead?
bool supportIndirectSymViaGOTPCRel() const {
return SupportIndirectSymViaGOTPCRel;
}
- /// \brief Target GOT "PC"-relative relocation supports encoding an additional
+ /// Target GOT "PC"-relative relocation supports encoding an additional
/// binary expression with an offset?
bool supportGOTPCRelWithOffset() const {
return SupportGOTPCRelWithOffset;
}
- /// \brief Get the target specific PC relative GOT entry relocation
+ /// Get the target specific PC relative GOT entry relocation
virtual const MCExpr *getIndirectSymViaGOTPCRel(const MCSymbol *Sym,
const MCValue &MV,
int64_t Offset,
return DL.getPointerSize(DL.getAllocaAddrSpace());
}
- /// \brief Reset the target options based on the function's attributes.
+ /// Reset the target options based on the function's attributes.
// FIXME: Remove TargetOptions that affect per-function code generation
// from TargetMachine.
void resetTargetOptions(const Function &F) const;
/// Returns the optimization level: None, Less, Default, or Aggressive.
CodeGenOpt::Level getOptLevel() const;
- /// \brief Overrides the optimization level.
+ /// Overrides the optimization level.
void setOptLevel(CodeGenOpt::Level Level);
void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
return Options.FunctionSections;
}
- /// \brief Get a \c TargetIRAnalysis appropriate for the target.
+ /// Get a \c TargetIRAnalysis appropriate for the target.
///
/// This is used to construct the new pass manager's target IR analysis pass,
/// set up appropriately for this target machine. Even the old pass manager
/// uses this to answer queries about the IR.
TargetIRAnalysis getTargetIRAnalysis();
- /// \brief Return a TargetTransformInfo for a given function.
+ /// Return a TargetTransformInfo for a given function.
///
/// The returned TargetTransformInfo is specialized to the subtarget
/// corresponding to \p F.
void initAsmInfo();
public:
- /// \brief Get a TargetTransformInfo implementation for the target.
+ /// Get a TargetTransformInfo implementation for the target.
///
/// The TTI returned uses the common code generator to answer queries about
/// the IR.
/// EXPENSIVE_CHECKS is enabled.
virtual bool isMachineVerifierClean() const { return true; }
- /// \brief Adds an AsmPrinter pass to the pipeline that prints assembly or
+ /// Adds an AsmPrinter pass to the pipeline that prints assembly or
/// machine code from the MI representation.
bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
CodeGenFileType FileTYpe, MCContext &Context);
Export, ///< Export information to summary.
};
-/// \brief This pass lowers type metadata and the llvm.type.test intrinsic to
+/// This pass lowers type metadata and the llvm.type.test intrinsic to
/// bitsets.
///
/// The behavior depends on the summary arguments:
ModulePass *createLowerTypeTestsPass(ModuleSummaryIndex *ExportSummary,
const ModuleSummaryIndex *ImportSummary);
-/// \brief This pass export CFI checks for use by external modules.
+/// This pass export CFI checks for use by external modules.
ModulePass *createCrossDSOCFIPass();
-/// \brief This pass implements whole-program devirtualization using type
+/// This pass implements whole-program devirtualization using type
/// metadata.
///
/// The behavior depends on the summary arguments:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief The legacy pass manager's instcombine pass.
+/// The legacy pass manager's instcombine pass.
///
/// This is a basic whole-function wrapper around the instcombine utility. It
/// will try to combine all instructions in the function.
ModulePass *createSanitizerCoverageModulePass(
const SanitizerCoverageOptions &Options = SanitizerCoverageOptions());
-/// \brief Calculate what to divide by to scale counts.
+/// Calculate what to divide by to scale counts.
///
/// Given the maximum count, calculate a divisor that will scale all the
/// weights to strictly less than std::numeric_limits<uint32_t>::max().
: MaxCount / std::numeric_limits<uint32_t>::max() + 1;
}
-/// \brief Scale an individual branch count.
+/// Scale an individual branch count.
///
/// Scale a 64-bit weight down to 32-bits using \c Scale.
///
namespace llvm {
struct CallSiteSplittingPass : PassInfoMixin<CallSiteSplittingPass> {
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // end namespace llvm
/// clients.
namespace consthoist {
-/// \brief Keeps track of the user of a constant and the operand index where the
+/// Keeps track of the user of a constant and the operand index where the
/// constant is used.
struct ConstantUser {
Instruction *Inst;
using ConstantUseListType = SmallVector<ConstantUser, 8>;
-/// \brief Keeps track of a constant candidate and its uses.
+/// Keeps track of a constant candidate and its uses.
struct ConstantCandidate {
ConstantUseListType Uses;
ConstantInt *ConstInt;
ConstantCandidate(ConstantInt *ConstInt) : ConstInt(ConstInt) {}
- /// \brief Add the user to the use list and update the cost.
+ /// Add the user to the use list and update the cost.
void addUser(Instruction *Inst, unsigned Idx, unsigned Cost) {
CumulativeCost += Cost;
Uses.push_back(ConstantUser(Inst, Idx));
}
};
-/// \brief This represents a constant that has been rebased with respect to a
+/// This represents a constant that has been rebased with respect to a
/// base constant. The difference to the base constant is recorded in Offset.
struct RebasedConstantInfo {
ConstantUseListType Uses;
using RebasedConstantListType = SmallVector<RebasedConstantInfo, 4>;
-/// \brief A base constant and all its rebased constants.
+/// A base constant and all its rebased constants.
struct ConstantInfo {
ConstantInt *BaseConstant;
RebasedConstantListType RebasedConstants;
class Function;
-/// \brief A simple and fast domtree-based CSE pass.
+/// A simple and fast domtree-based CSE pass.
///
/// This pass does a simple depth-first walk over the dominator tree,
/// eliminating trivially redundant instructions and using instsimplify to
struct EarlyCSEPass : PassInfoMixin<EarlyCSEPass> {
EarlyCSEPass(bool UseMemorySSA = false) : UseMemorySSA(UseMemorySSA) {}
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
bool UseMemorySSA;
public:
struct Expression;
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
/// This removes the specified instruction from
/// loads are eliminated by the pass.
FunctionPass *createGVNPass(bool NoLoads = false);
-/// \brief A simple and fast domtree-based GVN pass to hoist common expressions
+/// A simple and fast domtree-based GVN pass to hoist common expressions
/// from sibling branches.
struct GVNHoistPass : PassInfoMixin<GVNHoistPass> {
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Uses an "inverted" value numbering to decide the similarity of
+/// Uses an "inverted" value numbering to decide the similarity of
/// expressions and sinks similar expressions into successors.
struct GVNSinkPass : PassInfoMixin<GVNSinkPass> {
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
return ET > ET_BasicStart && ET < ET_BasicEnd;
}
- /// \brief Swap two operands. Used during GVN to put commutative operands in
+ /// Swap two operands. Used during GVN to put commutative operands in
/// order.
void swapOperands(unsigned First, unsigned Second) {
std::swap(Operands[First], Operands[Second]);
namespace llvm {
-/// \brief Printer pass for the \c LoopAccessInfo results.
+/// Printer pass for the \c LoopAccessInfo results.
class LoopAccessInfoPrinterPass
: public PassInfoMixin<LoopAccessInfoPrinterPass> {
raw_ostream &OS;
public:
LoopDataPrefetchPass() = default;
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
extern template class PassManager<Loop, LoopAnalysisManager,
LoopStandardAnalysisResults &, LPMUpdater &>;
-/// \brief The Loop pass manager.
+/// The Loop pass manager.
///
/// See the documentation for the PassManager template for details. It runs
/// a sequence of Loop passes over each Loop that the manager is run over. This
: Worklist(Worklist), LAM(LAM) {}
};
-/// \brief Adaptor that maps from a function to its loops.
+/// Adaptor that maps from a function to its loops.
///
/// Designed to allow composition of a LoopPass(Manager) and a
/// FunctionPassManager. Note that if this pass is constructed with a \c
LoopCanonicalizationFPM.addPass(LCSSAPass());
}
- /// \brief Runs the loop passes across every loop in the function.
+ /// Runs the loop passes across every loop in the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM) {
// Before we even compute any loop analyses, first run a miniature function
// pass pipeline to put loops into their canonical form. Note that we can
FunctionPassManager LoopCanonicalizationFPM;
};
-/// \brief A function to deduce a loop pass type and wrap it in the templated
+/// A function to deduce a loop pass type and wrap it in the templated
/// adaptor.
template <typename LoopPassT>
FunctionToLoopPassAdaptor<LoopPassT>
return FunctionToLoopPassAdaptor<LoopPassT>(std::move(Pass), DebugLogging);
}
-/// \brief Pass for printing a loop's contents as textual IR.
+/// Pass for printing a loop's contents as textual IR.
class PrintLoopPass : public PassInfoMixin<PrintLoopPass> {
raw_ostream &OS;
std::string Banner;
namespace llvm {
struct LowerExpectIntrinsicPass : PassInfoMixin<LowerExpectIntrinsicPass> {
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
///
/// This will lower all of the expect intrinsic calls in this function into
/// branch weight metadata. That metadata will subsequently feed the analysis
//===----------------------------------------------------------------------===//
//
//! \file
-//! \brief This pass performs merges of loads and stores on both sides of a
+//! This pass performs merges of loads and stores on both sides of a
// diamond (hammock). It hoists the loads and sinks the stores.
//
// The algorithm iteratively hoists two loads to the same address out of a
class NewGVNPass : public PassInfoMixin<NewGVNPass> {
public:
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, AnalysisManager<Function> &AM);
};
return LHS.Rank > RHS.Rank; // Sort so that highest rank goes to start.
}
-/// \brief Utility class representing a base and exponent pair which form one
+/// Utility class representing a base and exponent pair which form one
/// factor of some product.
struct Factor {
Value *Base;
} // end namespace sroa
-/// \brief An optimization pass providing Scalar Replacement of Aggregates.
+/// An optimization pass providing Scalar Replacement of Aggregates.
///
/// This pass takes allocations which can be completely analyzed (that is, they
/// don't escape) and tries to turn them into scalar SSA values. There are
DominatorTree *DT = nullptr;
AssumptionCache *AC = nullptr;
- /// \brief Worklist of alloca instructions to simplify.
+ /// Worklist of alloca instructions to simplify.
///
/// Each alloca in the function is added to this. Each new alloca formed gets
/// added to it as well to recursively simplify unless that alloca can be
/// already present to ensure it is re-visited.
SetVector<AllocaInst *, SmallVector<AllocaInst *, 16>> Worklist;
- /// \brief A collection of instructions to delete.
+ /// A collection of instructions to delete.
/// We try to batch deletions to simplify code and make things a bit more
/// efficient.
SetVector<Instruction *, SmallVector<Instruction *, 8>> DeadInsts;
- /// \brief Post-promotion worklist.
+ /// Post-promotion worklist.
///
/// Sometimes we discover an alloca which has a high probability of becoming
/// viable for SROA after a round of promotion takes place. In those cases,
/// the event they are deleted.
SetVector<AllocaInst *, SmallVector<AllocaInst *, 16>> PostPromotionWorklist;
- /// \brief A collection of alloca instructions we can directly promote.
+ /// A collection of alloca instructions we can directly promote.
std::vector<AllocaInst *> PromotableAllocas;
- /// \brief A worklist of PHIs to speculate prior to promoting allocas.
+ /// A worklist of PHIs to speculate prior to promoting allocas.
///
/// All of these PHIs have been checked for the safety of speculation and by
/// being speculated will allow promoting allocas currently in the promotable
/// queue.
SetVector<PHINode *, SmallVector<PHINode *, 2>> SpeculatablePHIs;
- /// \brief A worklist of select instructions to speculate prior to promoting
+ /// A worklist of select instructions to speculate prior to promoting
/// allocas.
///
/// All of these select instructions have been checked for the safety of
public:
SROA() = default;
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
private:
/// Construct a pass with optional optimizations.
SimplifyCFGPass(const SimplifyCFGOptions &PassOptions);
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// here are relatively simple ones around execution and codesize cost, without
/// any need to consider simplifications or other transformations.
struct SpeculateAroundPHIsPass : PassInfoMixin<SpeculateAroundPHIsPass> {
- /// \brief Run the pass over the function.
+ /// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
AAResults *CalleeAAR = nullptr, bool InsertLifetime = true,
Function *ForwardVarArgsTo = nullptr);
-/// \brief Clones a loop \p OrigLoop. Returns the loop and the blocks in \p
+/// Clones a loop \p OrigLoop. Returns the loop and the blocks in \p
/// Blocks.
///
/// Updates LoopInfo and DominatorTree assuming the loop is dominated by block
DominatorTree *DT,
SmallVectorImpl<BasicBlock *> &Blocks);
-/// \brief Remaps instructions in \p Blocks using the mapping in \p VMap.
+/// Remaps instructions in \p Blocks using the mapping in \p VMap.
void remapInstructionsInBlocks(const SmallVectorImpl<BasicBlock *> &Blocks,
ValueToValueMapTy &VMap);
class Type;
class Value;
- /// \brief Utility class for extracting code into a new function.
+ /// Utility class for extracting code into a new function.
///
/// This utility provides a simple interface for extracting some sequence of
/// code into its own function, replacing it with a call to that function. It
Type *RetTy;
public:
- /// \brief Create a code extractor for a sequence of blocks.
+ /// Create a code extractor for a sequence of blocks.
///
/// Given a sequence of basic blocks where the first block in the sequence
/// dominates the rest, prepare a code extractor object for pulling this
BranchProbabilityInfo *BPI = nullptr,
bool AllowVarArgs = false);
- /// \brief Create a code extractor for a loop body.
+ /// Create a code extractor for a loop body.
///
/// Behaves just like the generic code sequence constructor, but uses the
/// block sequence of the loop.
BlockFrequencyInfo *BFI = nullptr,
BranchProbabilityInfo *BPI = nullptr);
- /// \brief Check to see if a block is valid for extraction.
+ /// Check to see if a block is valid for extraction.
///
/// Blocks containing EHPads, allocas and invokes are not valid. If
/// AllowVarArgs is true, blocks with vastart can be extracted. This is
static bool isBlockValidForExtraction(const BasicBlock &BB,
bool AllowVarArgs);
- /// \brief Perform the extraction, returning the new function.
+ /// Perform the extraction, returning the new function.
///
/// Returns zero when called on a CodeExtractor instance where isEligible
/// returns false.
Function *extractCodeRegion();
- /// \brief Test whether this code extractor is eligible.
+ /// Test whether this code extractor is eligible.
///
/// Based on the blocks used when constructing the code extractor,
/// determine whether it is eligible for extraction.
bool isEligible() const { return !Blocks.empty(); }
- /// \brief Compute the set of input values and output values for the code.
+ /// Compute the set of input values and output values for the code.
///
/// These can be used either when performing the extraction or to evaluate
/// the expected size of a call to the extracted function. Note that this
namespace llvm {
class Module;
class Function;
-/// \brief Calculate and dump ThinLTO specific inliner stats.
+/// Calculate and dump ThinLTO specific inliner stats.
/// The main statistics are:
/// (1) Number of inlined imported functions,
/// (2) Number of imported functions inlined into importing module (indirect),
struct SimplifyQuery;
class TargetTransformInfo;
-/// \brief Convert a loop into a loop with bottom test. It may
+/// Convert a loop into a loop with bottom test. It may
/// perform loop latch simplication as well if the flag RotationOnly
/// is false. The flag Threshold represents the size threshold of the loop
/// header. If the loop header's size exceeds the threshold, the loop rotation
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Simplify each loop in a loop nest recursively.
+/// Simplify each loop in a loop nest recursively.
///
/// This takes a potentially un-simplified loop L (and its children) and turns
/// it into a simplified loop nest with preheaders and single backedges. It will
bool formLCSSAForInstructions(SmallVectorImpl<Instruction *> &Worklist,
DominatorTree &DT, LoopInfo &LI);
-/// \brief Put loop into LCSSA form.
+/// Put loop into LCSSA form.
///
/// Looks at all instructions in the loop which have uses outside of the
/// current loop. For each, an LCSSA PHI node is inserted and the uses outside
/// Returns true if any modifications are made to the loop.
bool formLCSSA(Loop &L, DominatorTree &DT, LoopInfo *LI, ScalarEvolution *SE);
-/// \brief Put a loop nest into LCSSA form.
+/// Put a loop nest into LCSSA form.
///
/// This recursively forms LCSSA for a loop nest.
///
bool formLCSSARecursively(Loop &L, DominatorTree &DT, LoopInfo *LI,
ScalarEvolution *SE);
-/// \brief Walk the specified region of the CFG (defined by all blocks
+/// Walk the specified region of the CFG (defined by all blocks
/// dominated by the specified block, and that are in the current loop) in
/// reverse depth first order w.r.t the DominatorTree. This allows us to visit
/// uses before definitions, allowing us to sink a loop body in one pass without
AliasSetTracker *, LoopSafetyInfo *,
OptimizationRemarkEmitter *ORE);
-/// \brief Walk the specified region of the CFG (defined by all blocks
+/// Walk the specified region of the CFG (defined by all blocks
/// dominated by the specified block, and that are in the current loop) in depth
/// first order w.r.t the DominatorTree. This allows us to visit definitions
/// before uses, allowing us to hoist a loop body in one pass without iteration.
void deleteDeadLoop(Loop *L, DominatorTree *DT, ScalarEvolution *SE,
LoopInfo *LI);
-/// \brief Try to promote memory values to scalars by sinking stores out of
+/// Try to promote memory values to scalars by sinking stores out of
/// the loop and moving loads to before the loop. We do this by looping over
/// the stores in the loop, looking for stores to Must pointers which are
/// loop invariant. It takes a set of must-alias values, Loop exit blocks
SmallVector<DomTreeNode *, 16> collectChildrenInLoop(DomTreeNode *N,
const Loop *CurLoop);
-/// \brief Returns the instructions that use values defined in the loop.
+/// Returns the instructions that use values defined in the loop.
SmallVector<Instruction *, 8> findDefsUsedOutsideOfLoop(Loop *L);
-/// \brief Find string metadata for loop
+/// Find string metadata for loop
///
/// If it has a value (e.g. {"llvm.distribute", 1} return the value as an
/// operand or null otherwise. If the string metadata is not found return
Optional<const MDOperand *> findStringMetadataForLoop(Loop *TheLoop,
StringRef Name);
-/// \brief Set input string into loop metadata by keeping other values intact.
+/// Set input string into loop metadata by keeping other values intact.
void addStringMetadataToLoop(Loop *TheLoop, const char *MDString,
unsigned V = 0);
-/// \brief Get a loop's estimated trip count based on branch weight metadata.
+/// Get a loop's estimated trip count based on branch weight metadata.
/// Returns 0 when the count is estimated to be 0, or None when a meaningful
/// estimate can not be made.
Optional<unsigned> getLoopEstimatedTripCount(Loop *L);
class LoopInfo;
class ScalarEvolution;
-/// \brief This class emits a version of the loop where run-time checks ensure
+/// This class emits a version of the loop where run-time checks ensure
/// that may-alias pointers can't overlap.
///
/// It currently only supports single-exit loops and assumes that the loop
/// already has a preheader.
class LoopVersioning {
public:
- /// \brief Expects LoopAccessInfo, Loop, LoopInfo, DominatorTree as input.
+ /// Expects LoopAccessInfo, Loop, LoopInfo, DominatorTree as input.
/// It uses runtime check provided by the user. If \p UseLAIChecks is true,
/// we will retain the default checks made by LAI. Otherwise, construct an
/// object having no checks and we expect the user to add them.
DominatorTree *DT, ScalarEvolution *SE,
bool UseLAIChecks = true);
- /// \brief Performs the CFG manipulation part of versioning the loop including
+ /// Performs the CFG manipulation part of versioning the loop including
/// the DominatorTree and LoopInfo updates.
///
/// The loop that was used to construct the class will be the "versioned" loop
/// transform L
void versionLoop() { versionLoop(findDefsUsedOutsideOfLoop(VersionedLoop)); }
- /// \brief Same but if the client has already precomputed the set of values
+ /// Same but if the client has already precomputed the set of values
/// used outside the loop, this API will allows passing that.
void versionLoop(const SmallVectorImpl<Instruction *> &DefsUsedOutside);
- /// \brief Returns the versioned loop. Control flows here if pointers in the
+ /// Returns the versioned loop. Control flows here if pointers in the
/// loop don't alias (i.e. all memchecks passed). (This loop is actually the
/// same as the original loop that we got constructed with.)
Loop *getVersionedLoop() { return VersionedLoop; }
- /// \brief Returns the fall-back loop. Control flows here if pointers in the
+ /// Returns the fall-back loop. Control flows here if pointers in the
/// loop may alias (i.e. one of the memchecks failed).
Loop *getNonVersionedLoop() { return NonVersionedLoop; }
- /// \brief Sets the runtime alias checks for versioning the loop.
+ /// Sets the runtime alias checks for versioning the loop.
void setAliasChecks(
SmallVector<RuntimePointerChecking::PointerCheck, 4> Checks);
- /// \brief Sets the runtime SCEV checks for versioning the loop.
+ /// Sets the runtime SCEV checks for versioning the loop.
void setSCEVChecks(SCEVUnionPredicate Check);
- /// \brief Annotate memory instructions in the versioned loop with no-alias
+ /// Annotate memory instructions in the versioned loop with no-alias
/// metadata based on the memchecks issued.
///
/// This is just wrapper that calls prepareNoAliasMetadata and
/// annotateInstWithNoAlias on the instructions of the versioned loop.
void annotateLoopWithNoAlias();
- /// \brief Set up the aliasing scopes based on the memchecks. This needs to
+ /// Set up the aliasing scopes based on the memchecks. This needs to
/// be called before the first call to annotateInstWithNoAlias.
void prepareNoAliasMetadata();
- /// \brief Add the noalias annotations to \p VersionedInst.
+ /// Add the noalias annotations to \p VersionedInst.
///
/// \p OrigInst is the instruction corresponding to \p VersionedInst in the
/// original loop. Initialize the aliasing scopes with
const Instruction *OrigInst);
private:
- /// \brief Adds the necessary PHI nodes for the versioned loops based on the
+ /// Adds the necessary PHI nodes for the versioned loops based on the
/// loop-defined values used outside of the loop.
///
/// This needs to be called after versionLoop if there are defs in the loop
/// that are used outside the loop.
void addPHINodes(const SmallVectorImpl<Instruction *> &DefsUsedOutside);
- /// \brief Add the noalias annotations to \p I. Initialize the aliasing
+ /// Add the noalias annotations to \p I. Initialize the aliasing
/// scopes with prepareNoAliasMetadata once before this can be called.
void annotateInstWithNoAlias(Instruction *I) {
annotateInstWithNoAlias(I, I);
}
- /// \brief The original loop. This becomes the "versioned" one. I.e.,
+ /// The original loop. This becomes the "versioned" one. I.e.,
/// control flows here if pointers in the loop don't alias.
Loop *VersionedLoop;
- /// \brief The fall-back loop. I.e. control flows here if pointers in the
+ /// The fall-back loop. I.e. control flows here if pointers in the
/// loop may alias (memchecks failed).
Loop *NonVersionedLoop;
- /// \brief This maps the instructions from VersionedLoop to their counterpart
+ /// This maps the instructions from VersionedLoop to their counterpart
/// in NonVersionedLoop.
ValueToValueMapTy VMap;
- /// \brief The set of alias checks that we are versioning for.
+ /// The set of alias checks that we are versioning for.
SmallVector<RuntimePointerChecking::PointerCheck, 4> AliasChecks;
- /// \brief The set of SCEV checks that we are versioning for.
+ /// The set of SCEV checks that we are versioning for.
SCEVUnionPredicate Preds;
- /// \brief Maps a pointer to the pointer checking group that the pointer
+ /// Maps a pointer to the pointer checking group that the pointer
/// belongs to.
DenseMap<const Value *, const RuntimePointerChecking::CheckingPtrGroup *>
PtrToGroup;
- /// \brief The alias scope corresponding to a pointer checking group.
+ /// The alias scope corresponding to a pointer checking group.
DenseMap<const RuntimePointerChecking::CheckingPtrGroup *, MDNode *>
GroupToScope;
- /// \brief The list of alias scopes that a pointer checking group can't alias.
+ /// The list of alias scopes that a pointer checking group can't alias.
DenseMap<const RuntimePointerChecking::CheckingPtrGroup *, MDNode *>
GroupToNonAliasingScopeList;
- /// \brief Analyses used.
+ /// Analyses used.
const LoopAccessInfo &LAI;
LoopInfo *LI;
DominatorTree *DT;
Function *declareSanitizerInitFunction(Module &M, StringRef InitName,
ArrayRef<Type *> InitArgTypes);
-/// \brief Creates sanitizer constructor function, and calls sanitizer's init
+/// Creates sanitizer constructor function, and calls sanitizer's init
/// function from it.
/// \return Returns pair of pointers to constructor, and init functions
/// respectively.
/// the list of public globals in the module.
bool nameUnamedGlobals(Module &M);
-/// \brief Adds global values to the llvm.used list.
+/// Adds global values to the llvm.used list.
void appendToUsed(Module &M, ArrayRef<GlobalValue *> Values);
-/// \brief Adds global values to the llvm.compiler.used list.
+/// Adds global values to the llvm.compiler.used list.
void appendToCompilerUsed(Module &M, ArrayRef<GlobalValue *> Values);
/// Filter out potentially dead comdat functions where other entries keep the
void filterDeadComdatFunctions(
Module &M, SmallVectorImpl<Function *> &DeadComdatFunctions);
-/// \brief Produce a unique identifier for this module by taking the MD5 sum of
+/// Produce a unique identifier for this module by taking the MD5 sum of
/// the names of the module's strong external symbols that are not comdat
/// members.
///
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the PredicateInfo analysis, which creates an Extended
+/// This file implements the PredicateInfo analysis, which creates an Extended
/// SSA form for operations used in branch comparisons and llvm.assume
/// comparisons.
///
struct ValueDFS;
}
-/// \brief Encapsulates PredicateInfo, including all data associated with memory
+/// Encapsulates PredicateInfo, including all data associated with memory
/// accesses.
class PredicateInfo {
private:
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
-/// \brief Printer pass for \c PredicateInfo.
+/// Printer pass for \c PredicateInfo.
class PredicateInfoPrinterPass
: public PassInfoMixin<PredicateInfoPrinterPass> {
raw_ostream &OS;
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
-/// \brief Verifier pass for \c PredicateInfo.
+/// Verifier pass for \c PredicateInfo.
struct PredicateInfoVerifierPass : PassInfoMixin<PredicateInfoVerifierPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
class AliasSetTracker;
class AssumptionCache;
-/// \brief Return true if this alloca is legal for promotion.
+/// Return true if this alloca is legal for promotion.
///
/// This is true if there are only loads, stores, and lifetime markers
/// (transitively) using this alloca. This also enforces that there is only
/// markers.
bool isAllocaPromotable(const AllocaInst *AI);
-/// \brief Promote the specified list of alloca instructions into scalar
+/// Promote the specified list of alloca instructions into scalar
/// registers, inserting PHI nodes as appropriate.
///
/// This function makes use of DominanceFrontier information. This function
class Use;
class Value;
-/// \brief Helper class for SSA formation on a set of values defined in
+/// Helper class for SSA formation on a set of values defined in
/// multiple blocks.
///
/// This is used when code duplication or another unstructured
SSAUpdater &operator=(const SSAUpdater &) = delete;
~SSAUpdater();
- /// \brief Reset this object to get ready for a new set of SSA updates with
+ /// Reset this object to get ready for a new set of SSA updates with
/// type 'Ty'.
///
/// PHI nodes get a name based on 'Name'.
void Initialize(Type *Ty, StringRef Name);
- /// \brief Indicate that a rewritten value is available in the specified block
+ /// Indicate that a rewritten value is available in the specified block
/// with the specified value.
void AddAvailableValue(BasicBlock *BB, Value *V);
- /// \brief Return true if the SSAUpdater already has a value for the specified
+ /// Return true if the SSAUpdater already has a value for the specified
/// block.
bool HasValueForBlock(BasicBlock *BB) const;
- /// \brief Construct SSA form, materializing a value that is live at the end
+ /// Construct SSA form, materializing a value that is live at the end
/// of the specified block.
Value *GetValueAtEndOfBlock(BasicBlock *BB);
- /// \brief Construct SSA form, materializing a value that is live in the
+ /// Construct SSA form, materializing a value that is live in the
/// middle of the specified block.
///
/// \c GetValueInMiddleOfBlock is the same as \c GetValueAtEndOfBlock except
/// merge the appropriate values, and this value isn't live out of the block.
Value *GetValueInMiddleOfBlock(BasicBlock *BB);
- /// \brief Rewrite a use of the symbolic value.
+ /// Rewrite a use of the symbolic value.
///
/// This handles PHI nodes, which use their value in the corresponding
/// predecessor. Note that this will not work if the use is supposed to be
/// be below it.
void RewriteUse(Use &U);
- /// \brief Rewrite a use like \c RewriteUse but handling in-block definitions.
+ /// Rewrite a use like \c RewriteUse but handling in-block definitions.
///
/// This version of the method can rewrite uses in the same block as
/// a definition, because it assumes that all uses of a value are below any
Value *GetValueAtEndOfBlockInternal(BasicBlock *BB);
};
-/// \brief Helper class for promoting a collection of loads and stores into SSA
+/// Helper class for promoting a collection of loads and stores into SSA
/// Form using the SSAUpdater.
///
/// This handles complexities that SSAUpdater doesn't, such as multiple loads
SSAUpdater &S, StringRef Name = StringRef());
virtual ~LoadAndStorePromoter() = default;
- /// \brief This does the promotion.
+ /// This does the promotion.
///
/// Insts is a list of loads and stores to promote, and Name is the basename
/// for the PHIs to insert. After this is complete, the loads and stores are
/// removed from the code.
void run(const SmallVectorImpl<Instruction *> &Insts) const;
- /// \brief Return true if the specified instruction is in the Inst list.
+ /// Return true if the specified instruction is in the Inst list.
///
/// The Insts list is the one passed into the constructor. Clients should
/// implement this with a more efficient version if possible.
virtual bool isInstInList(Instruction *I,
const SmallVectorImpl<Instruction *> &Insts) const;
- /// \brief This hook is invoked after all the stores are found and inserted as
+ /// This hook is invoked after all the stores are found and inserted as
/// available values.
virtual void doExtraRewritesBeforeFinalDeletion() const {}
- /// \brief Clients can choose to implement this to get notified right before
+ /// Clients can choose to implement this to get notified right before
/// a load is RAUW'd another value.
virtual void replaceLoadWithValue(LoadInst *LI, Value *V) const {}
- /// \brief Called before each instruction is deleted.
+ /// Called before each instruction is deleted.
virtual void instructionDeleted(Instruction *I) const {}
- /// \brief Called to update debug info associated with the instruction.
+ /// Called to update debug info associated with the instruction.
virtual void updateDebugInfo(Instruction *I) const {}
};
class Function;
class OptimizationRemarkEmitter;
-/// \brief This class implements simplifications for calls to fortified library
+/// This class implements simplifications for calls to fortified library
/// functions (__st*cpy_chk, __memcpy_chk, __memmove_chk, __memset_chk), to,
/// when possible, replace them with their non-checking counterparts.
/// Other optimizations can also be done, but it's possible to disable them and
FortifiedLibCallSimplifier(const TargetLibraryInfo *TLI,
bool OnlyLowerUnknownSize = false);
- /// \brief Take the given call instruction and return a more
+ /// Take the given call instruction and return a more
/// optimal value to replace the instruction with or 0 if a more
/// optimal form can't be found.
/// The call must not be an indirect call.
Value *optimizeStrpCpyChk(CallInst *CI, IRBuilder<> &B, LibFunc Func);
Value *optimizeStrpNCpyChk(CallInst *CI, IRBuilder<> &B, LibFunc Func);
- /// \brief Checks whether the call \p CI to a fortified libcall is foldable
+ /// Checks whether the call \p CI to a fortified libcall is foldable
/// to the non-fortified version.
bool isFortifiedCallFoldable(CallInst *CI, unsigned ObjSizeOp,
unsigned SizeOp, bool isString);
bool UnsafeFPShrink;
function_ref<void(Instruction *, Value *)> Replacer;
- /// \brief Internal wrapper for RAUW that is the default implementation.
+ /// Internal wrapper for RAUW that is the default implementation.
///
/// Other users may provide an alternate function with this signature instead
/// of this one.
static void replaceAllUsesWithDefault(Instruction *I, Value *With);
- /// \brief Replace an instruction's uses with a value using our replacer.
+ /// Replace an instruction's uses with a value using our replacer.
void replaceAllUsesWith(Instruction *I, Value *With);
public:
unsigned getIsVectorized() const { return IsVectorized.Value; }
enum ForceKind getForce() const { return (ForceKind)Force.Value; }
- /// \brief If hints are provided that force vectorization, use the AlwaysPrint
+ /// If hints are provided that force vectorization, use the AlwaysPrint
/// pass name to force the frontend to print the diagnostic.
const char *vectorizeAnalysisPassName() const;
OptimizationRemarkEmitter &ORE;
};
-/// \brief This holds vectorization requirements that must be verified late in
+/// This holds vectorization requirements that must be verified late in
/// the process. The requirements are set by legalize and costmodel. Once
/// vectorization has been determined to be possible and profitable the
/// requirements can be verified by looking for metadata or compiler options.
RemarkName, TheLoop, I);
}
- /// \brief If an access has a symbolic strides, this maps the pointer value to
+ /// If an access has a symbolic strides, this maps the pointer value to
/// the stride symbol.
const ValueToValueMap *getSymbolicStrides() {
// FIXME: Currently, the set of symbolic strides is sometimes queried before
OptimizationRemarkEmitter *ORE_);
private:
- /// \brief Collect store and getelementptr instructions and organize them
+ /// Collect store and getelementptr instructions and organize them
/// according to the underlying object of their pointer operands. We sort the
/// instructions by their underlying objects to reduce the cost of
/// consecutive access queries.
/// every time we run into a memory barrier.
void collectSeedInstructions(BasicBlock *BB);
- /// \brief Try to vectorize a chain that starts at two arithmetic instrs.
+ /// Try to vectorize a chain that starts at two arithmetic instrs.
bool tryToVectorizePair(Value *A, Value *B, slpvectorizer::BoUpSLP &R);
- /// \brief Try to vectorize a list of operands.
+ /// Try to vectorize a list of operands.
/// \param UserCost Cost of the user operations of \p VL if they may affect
/// the cost of the vectorization.
/// \returns true if a value was vectorized.
bool tryToVectorizeList(ArrayRef<Value *> VL, slpvectorizer::BoUpSLP &R,
int UserCost = 0, bool AllowReorder = false);
- /// \brief Try to vectorize a chain that may start at the operands of \p I.
+ /// Try to vectorize a chain that may start at the operands of \p I.
bool tryToVectorize(Instruction *I, slpvectorizer::BoUpSLP &R);
- /// \brief Vectorize the store instructions collected in Stores.
+ /// Vectorize the store instructions collected in Stores.
bool vectorizeStoreChains(slpvectorizer::BoUpSLP &R);
- /// \brief Vectorize the index computations of the getelementptr instructions
+ /// Vectorize the index computations of the getelementptr instructions
/// collected in GEPs.
bool vectorizeGEPIndices(BasicBlock *BB, slpvectorizer::BoUpSLP &R);
bool vectorizeSimpleInstructions(SmallVectorImpl<WeakVH> &Instructions,
BasicBlock *BB, slpvectorizer::BoUpSLP &R);
- /// \brief Scan the basic block and look for patterns that are likely to start
+ /// Scan the basic block and look for patterns that are likely to start
/// a vectorization chain.
bool vectorizeChainsInBlock(BasicBlock *BB, slpvectorizer::BoUpSLP &R);
return ModRefInfo::ModRef;
}
-/// \brief Return information about whether a particular call site modifies
+/// Return information about whether a particular call site modifies
/// or reads the specified memory location \p MemLoc before instruction \p I
/// in a BasicBlock. An ordered basic block \p OBB can be used to speed up
/// instruction-ordering queries inside the BasicBlock containing \p I.
using Weight = BlockFrequencyInfoImplBase::Weight;
using FrequencyData = BlockFrequencyInfoImplBase::FrequencyData;
-/// \brief Dithering mass distributer.
+/// Dithering mass distributer.
///
/// This class splits up a single mass into portions by weight, dithering to
/// spread out error. No mass is lost. The dithering precision depends on the
Loops.clear();
}
-/// \brief Clear all memory not needed downstream.
+/// Clear all memory not needed downstream.
///
/// Releases all memory not used downstream. In particular, saves Freqs.
static void cleanup(BlockFrequencyInfoImplBase &BFI) {
return true;
}
-/// \brief Compute the loop scale for a loop.
+/// Compute the loop scale for a loop.
void BlockFrequencyInfoImplBase::computeLoopScale(LoopData &Loop) {
// Compute loop scale.
DEBUG(dbgs() << "compute-loop-scale: " << getLoopName(Loop) << "\n");
<< " - scale = " << Loop.Scale << "\n");
}
-/// \brief Package up a loop.
+/// Package up a loop.
void BlockFrequencyInfoImplBase::packageLoop(LoopData &Loop) {
DEBUG(dbgs() << "packaging-loop: " << getLoopName(Loop) << "\n");
}
}
-/// \brief Unwrap a loop package.
+/// Unwrap a loop package.
///
/// Visits all the members of a loop, adjusting their BlockData according to
/// the loop's pseudo-node.
} // end namespace llvm
-/// \brief Find extra irreducible headers.
+/// Find extra irreducible headers.
///
/// Find entry blocks and other blocks with backedges, which exist when \c G
/// contains irreducible sub-SCCs.
// Unlikely edges within a loop are half as likely as other edges
static const uint32_t LBH_UNLIKELY_WEIGHT = 62;
-/// \brief Unreachable-terminating branch taken probability.
+/// Unreachable-terminating branch taken probability.
///
/// This is the probability for a branch being taken to a block that terminates
/// (eventually) in unreachable. These are predicted as unlikely as possible.
/// All reachable probability will equally share the remaining part.
static const BranchProbability UR_TAKEN_PROB = BranchProbability::getRaw(1);
-/// \brief Weight for a branch taken going into a cold block.
+/// Weight for a branch taken going into a cold block.
///
/// This is the weight for a branch taken toward a block marked
/// cold. A block is marked cold if it's postdominated by a
/// are those marked with attribute 'cold'.
static const uint32_t CC_TAKEN_WEIGHT = 4;
-/// \brief Weight for a branch not-taken into a cold block.
+/// Weight for a branch not-taken into a cold block.
///
/// This is the weight for a branch not taken toward a block marked
/// cold.
static const uint32_t FPH_TAKEN_WEIGHT = 20;
static const uint32_t FPH_NONTAKEN_WEIGHT = 12;
-/// \brief Invoke-terminating normal branch taken weight
+/// Invoke-terminating normal branch taken weight
///
/// This is the weight for branching to the normal destination of an invoke
/// instruction. We expect this to happen most of the time. Set the weight to an
/// absurdly high value so that nested loops subsume it.
static const uint32_t IH_TAKEN_WEIGHT = 1024 * 1024 - 1;
-/// \brief Invoke-terminating normal branch not-taken weight.
+/// Invoke-terminating normal branch not-taken weight.
///
/// This is the weight for branching to the unwind destination of an invoke
/// instruction. This is essentially never taken.
static const uint32_t IH_NONTAKEN_WEIGHT = 1;
-/// \brief Add \p BB to PostDominatedByUnreachable set if applicable.
+/// Add \p BB to PostDominatedByUnreachable set if applicable.
void
BranchProbabilityInfo::updatePostDominatedByUnreachable(const BasicBlock *BB) {
const TerminatorInst *TI = BB->getTerminator();
PostDominatedByUnreachable.insert(BB);
}
-/// \brief Add \p BB to PostDominatedByColdCall set if applicable.
+/// Add \p BB to PostDominatedByColdCall set if applicable.
void
BranchProbabilityInfo::updatePostDominatedByColdCall(const BasicBlock *BB) {
assert(!PostDominatedByColdCall.count(BB));
}
}
-/// \brief Calculate edge weights for successors lead to unreachable.
+/// Calculate edge weights for successors lead to unreachable.
///
/// Predict that a successor which leads necessarily to an
/// unreachable-terminated block as extremely unlikely.
return true;
}
-/// \brief Calculate edge weights for edges leading to cold blocks.
+/// Calculate edge weights for edges leading to cold blocks.
///
/// A cold block is one post-dominated by a block with a call to a
/// cold function. Those edges are unlikely to be taken, so we give
namespace llvm {
namespace cflaa {
-/// \brief The Program Expression Graph (PEG) of CFL analysis
+/// The Program Expression Graph (PEG) of CFL analysis
/// CFLGraph is auxiliary data structure used by CFL-based alias analysis to
/// describe flow-insensitive pointer-related behaviors. Given an LLVM function,
/// the main purpose of this graph is to abstract away unrelated facts and
}
};
-///\brief A builder class used to create CFLGraph instance from a given function
+///A builder class used to create CFLGraph instance from a given function
/// The CFL-AA that uses this builder must provide its own type as a template
/// argument. This is necessary for interprocedural processing: CFLGraphBuilder
/// needs a way of obtaining the summary of other functions when callinsts are
} // namespace
-/// \brief Test whether the given value is an Alloca-derived function argument.
+/// Test whether the given value is an Alloca-derived function argument.
bool CallAnalyzer::isAllocaDerivedArg(Value *V) {
return SROAArgValues.count(V);
}
-/// \brief Lookup the SROA-candidate argument and cost iterator which V maps to.
+/// Lookup the SROA-candidate argument and cost iterator which V maps to.
/// Returns false if V does not map to a SROA-candidate.
bool CallAnalyzer::lookupSROAArgAndCost(
Value *V, Value *&Arg, DenseMap<Value *, int>::iterator &CostIt) {
return CostIt != SROAArgCosts.end();
}
-/// \brief Disable SROA for the candidate marked by this cost iterator.
+/// Disable SROA for the candidate marked by this cost iterator.
///
/// This marks the candidate as no longer viable for SROA, and adds the cost
/// savings associated with it back into the inline cost measurement.
disableLoadElimination();
}
-/// \brief If 'V' maps to a SROA candidate, disable SROA for it.
+/// If 'V' maps to a SROA candidate, disable SROA for it.
void CallAnalyzer::disableSROA(Value *V) {
Value *SROAArg;
DenseMap<Value *, int>::iterator CostIt;
disableSROA(CostIt);
}
-/// \brief Accumulate the given cost for a particular SROA candidate.
+/// Accumulate the given cost for a particular SROA candidate.
void CallAnalyzer::accumulateSROACost(DenseMap<Value *, int>::iterator CostIt,
int InstructionCost) {
CostIt->second += InstructionCost;
}
}
-/// \brief Accumulate a constant GEP offset into an APInt if possible.
+/// Accumulate a constant GEP offset into an APInt if possible.
///
/// Returns false if unable to compute the offset for any reason. Respects any
/// simplified values known during the analysis of this callsite.
return true;
}
-/// \brief Use TTI to check whether a GEP is free.
+/// Use TTI to check whether a GEP is free.
///
/// Respects any simplified values known during the analysis of this callsite.
bool CallAnalyzer::isGEPFree(GetElementPtrInst &GEP) {
return true;
}
-/// \brief Check we can fold GEPs of constant-offset call site argument pointers.
+/// Check we can fold GEPs of constant-offset call site argument pointers.
/// This requires target data and inbounds GEPs.
///
/// \return true if the specified GEP can be folded.
return false;
}
-/// \brief Try to simplify a call site.
+/// Try to simplify a call site.
///
/// Takes a concrete function and callsite and tries to actually simplify it by
/// analyzing the arguments and call itself with instsimplify. Returns true if
return false;
}
-/// \brief Analyze a basic block for its contribution to the inline cost.
+/// Analyze a basic block for its contribution to the inline cost.
///
/// This method walks the analyzer over every instruction in the given basic
/// block and accounts for their cost during inlining at this callsite. It
return true;
}
-/// \brief Compute the base pointer and cumulative constant offsets for V.
+/// Compute the base pointer and cumulative constant offsets for V.
///
/// This strips all constant offsets off of V, leaving it the base pointer, and
/// accumulates the total constant offset applied in the returned constant. It
return cast<ConstantInt>(ConstantInt::get(IntPtrTy, Offset));
}
-/// \brief Find dead blocks due to deleted CFG edges during inlining.
+/// Find dead blocks due to deleted CFG edges during inlining.
///
/// If we know the successor of the current block, \p CurrBB, has to be \p
/// NextBB, the other successors of \p CurrBB are dead if these successors have
}
}
-/// \brief Analyze a call site for potential inlining.
+/// Analyze a call site for potential inlining.
///
/// Returns true if inlining this call is viable, and false if it is not
/// viable. It computes the cost and adjusts the threshold based on numerous
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-/// \brief Dump stats about this call's analysis.
+/// Dump stats about this call's analysis.
LLVM_DUMP_METHOD void CallAnalyzer::dump() {
#define DEBUG_PRINT_STAT(x) dbgs() << " " #x ": " << x << "\n"
DEBUG_PRINT_STAT(NumConstantArgs);
}
#endif
-/// \brief Test that there are no attribute conflicts between Caller and Callee
+/// Test that there are no attribute conflicts between Caller and Callee
/// that prevent inlining.
static bool functionsHaveCompatibleAttributes(Function *Caller,
Function *Callee,
return ::SimplifyAddInst(Op0, Op1, isNSW, isNUW, Query, RecursionLimit);
}
-/// \brief Compute the base pointer and cumulative constant offsets for V.
+/// Compute the base pointer and cumulative constant offsets for V.
///
/// This strips all constant offsets off of V, leaving it the base pointer, and
/// accumulates the total constant offset applied in the returned constant. It
return OffsetIntPtr;
}
-/// \brief Compute the constant difference between two pointer values.
+/// Compute the constant difference between two pointer values.
/// If the difference is not a constant, returns zero.
static Constant *computePointerDifference(const DataLayout &DL, Value *LHS,
Value *RHS) {
return nullptr;
}
-/// \brief Given operands for an Shl, LShr or AShr, see if we can
+/// Given operands for an Shl, LShr or AShr, see if we can
/// fold the result. If not, this returns null.
static Value *SimplifyRightShift(Instruction::BinaryOps Opcode, Value *Op0,
Value *Op1, bool isExact, const SimplifyQuery &Q,
return Result == I ? UndefValue::get(I->getType()) : Result;
}
-/// \brief Implementation of recursive simplification through an instruction's
+/// Implementation of recursive simplification through an instruction's
/// uses.
///
/// This is the common implementation of the recursive simplification routines.
return ValueLatticeElement::getOverdefined();
}
-/// \brief Compute the value of Val on the edge BBFrom -> BBTo. Returns false if
+/// Compute the value of Val on the edge BBFrom -> BBTo. Returns false if
/// Val is not constrained on the edge. Result is unspecified if return value
/// is false.
static bool getEdgeValueLocal(Value *Val, BasicBlock *BBFrom,
return false;
}
-/// \brief Compute the value of Val on the edge BBFrom -> BBTo or the value at
+/// Compute the value of Val on the edge BBFrom -> BBTo or the value at
/// the basic block if the edge does not constrain Val.
bool LazyValueInfoImpl::getEdgeValue(Value *Val, BasicBlock *BBFrom,
BasicBlock *BBTo,
}
}
- /// \brief A check failed, so printout out the condition and the message.
+ /// A check failed, so printout out the condition and the message.
///
/// This provides a nice place to put a breakpoint if you want to see why
/// something is not correct.
void CheckFailed(const Twine &Message) { MessagesStr << Message << '\n'; }
- /// \brief A check failed (with values to print).
+ /// A check failed (with values to print).
///
/// This calls the Message-only version so that the above is easier to set
/// a breakpoint on.
return isDereferenceableAndAlignedPointer(V, 1, DL, CtxI, DT);
}
-/// \brief Test if A and B will obviously have the same value.
+/// Test if A and B will obviously have the same value.
///
/// This includes recognizing that %t0 and %t1 will have the same
/// value in code like this:
return false;
}
-/// \brief Check if executing a load of this pointer value cannot trap.
+/// Check if executing a load of this pointer value cannot trap.
///
/// If DT and ScanFrom are specified this method performs context-sensitive
/// analysis and returns true if it is safe to load immediately before ScanFrom.
cl::location(VectorizerParams::RuntimeMemoryCheckThreshold), cl::init(8));
unsigned VectorizerParams::RuntimeMemoryCheckThreshold;
-/// \brief The maximum iterations used to merge memory checks
+/// The maximum iterations used to merge memory checks
static cl::opt<unsigned> MemoryCheckMergeThreshold(
"memory-check-merge-threshold", cl::Hidden,
cl::desc("Maximum number of comparisons done when trying to merge "
/// Maximum SIMD width.
const unsigned VectorizerParams::MaxVectorWidth = 64;
-/// \brief We collect dependences up to this threshold.
+/// We collect dependences up to this threshold.
static cl::opt<unsigned>
MaxDependences("max-dependences", cl::Hidden,
cl::desc("Maximum number of dependences collected by "
"enable-mem-access-versioning", cl::init(true), cl::Hidden,
cl::desc("Enable symbolic stride memory access versioning"));
-/// \brief Enable store-to-load forwarding conflict detection. This option can
+/// Enable store-to-load forwarding conflict detection. This option can
/// be disabled for correctness testing.
static cl::opt<bool> EnableForwardingConflictDetection(
"store-to-load-forwarding-conflict-detection", cl::Hidden,
namespace {
-/// \brief Analyses memory accesses in a loop.
+/// Analyses memory accesses in a loop.
///
/// Checks whether run time pointer checks are needed and builds sets for data
/// dependence checking.
class AccessAnalysis {
public:
- /// \brief Read or write access location.
+ /// Read or write access location.
typedef PointerIntPair<Value *, 1, bool> MemAccessInfo;
typedef SmallVector<MemAccessInfo, 8> MemAccessInfoList;
: DL(Dl), AST(*AA), LI(LI), DepCands(DA), IsRTCheckAnalysisNeeded(false),
PSE(PSE) {}
- /// \brief Register a load and whether it is only read from.
+ /// Register a load and whether it is only read from.
void addLoad(MemoryLocation &Loc, bool IsReadOnly) {
Value *Ptr = const_cast<Value*>(Loc.Ptr);
AST.add(Ptr, MemoryLocation::UnknownSize, Loc.AATags);
ReadOnlyPtr.insert(Ptr);
}
- /// \brief Register a store.
+ /// Register a store.
void addStore(MemoryLocation &Loc) {
Value *Ptr = const_cast<Value*>(Loc.Ptr);
AST.add(Ptr, MemoryLocation::UnknownSize, Loc.AATags);
Accesses.insert(MemAccessInfo(Ptr, true));
}
- /// \brief Check if we can emit a run-time no-alias check for \p Access.
+ /// Check if we can emit a run-time no-alias check for \p Access.
///
/// Returns true if we can emit a run-time no alias check for \p Access.
/// If we can check this access, this also adds it to a dependence set and
unsigned ASId, bool ShouldCheckStride,
bool Assume);
- /// \brief Check whether we can check the pointers at runtime for
+ /// Check whether we can check the pointers at runtime for
/// non-intersection.
///
/// Returns true if we need no check or if we do and we can generate them
Loop *TheLoop, const ValueToValueMap &Strides,
bool ShouldCheckWrap = false);
- /// \brief Goes over all memory accesses, checks whether a RT check is needed
+ /// Goes over all memory accesses, checks whether a RT check is needed
/// and builds sets of dependent accesses.
void buildDependenceSets() {
processMemAccesses();
}
- /// \brief Initial processing of memory accesses determined that we need to
+ /// Initial processing of memory accesses determined that we need to
/// perform dependency checking.
///
/// Note that this can later be cleared if we retry memcheck analysis without
private:
typedef SetVector<MemAccessInfo> PtrAccessSet;
- /// \brief Go over all memory access and check whether runtime pointer checks
+ /// Go over all memory access and check whether runtime pointer checks
/// are needed and build sets of dependency check candidates.
void processMemAccesses();
/// dependence check.
MemoryDepChecker::DepCandidates &DepCands;
- /// \brief Initial processing of memory accesses determined that we may need
+ /// Initial processing of memory accesses determined that we may need
/// to add memchecks. Perform the analysis to determine the necessary checks.
///
/// Note that, this is different from isDependencyCheckNeeded. When we retry
} // end anonymous namespace
-/// \brief Check whether a pointer can participate in a runtime bounds check.
+/// Check whether a pointer can participate in a runtime bounds check.
/// If \p Assume, try harder to prove that we can compute the bounds of \p Ptr
/// by adding run-time checks (overflow checks) if necessary.
static bool hasComputableBounds(PredicatedScalarEvolution &PSE,
return AR->isAffine();
}
-/// \brief Check whether a pointer address cannot wrap.
+/// Check whether a pointer address cannot wrap.
static bool isNoWrap(PredicatedScalarEvolution &PSE,
const ValueToValueMap &Strides, Value *Ptr, Loop *L) {
const SCEV *PtrScev = PSE.getSCEV(Ptr);
return false;
}
-/// \brief Return true if an AddRec pointer \p Ptr is unsigned non-wrapping,
+/// Return true if an AddRec pointer \p Ptr is unsigned non-wrapping,
/// i.e. monotonically increasing/decreasing.
static bool isNoWrapAddRec(Value *Ptr, const SCEVAddRecExpr *AR,
PredicatedScalarEvolution &PSE, const Loop *L) {
return false;
}
-/// \brief Check whether the access through \p Ptr has a constant stride.
+/// Check whether the access through \p Ptr has a constant stride.
int64_t llvm::getPtrStride(PredicatedScalarEvolution &PSE, Value *Ptr,
const Loop *Lp, const ValueToValueMap &StridesMap,
bool Assume, bool ShouldCheckWrap) {
return false;
}
-/// \brief Check the dependence for two accesses with the same stride \p Stride.
+/// Check the dependence for two accesses with the same stride \p Stride.
/// \p Distance is the positive distance and \p TypeByteSize is type size in
/// bytes.
///
namespace {
-/// \brief IR Values for the lower and upper bounds of a pointer evolution. We
+/// IR Values for the lower and upper bounds of a pointer evolution. We
/// need to use value-handles because SCEV expansion can invalidate previously
/// expanded values. Thus expansion of a pointer can invalidate the bounds for
/// a previous one.
} // end anonymous namespace
-/// \brief Expand code for the lower and upper bound of the pointer group \p CG
+/// Expand code for the lower and upper bound of the pointer group \p CG
/// in \p TheLoop. \return the values for the bounds.
static PointerBounds
expandBounds(const RuntimePointerChecking::CheckingPtrGroup *CG, Loop *TheLoop,
}
}
-/// \brief Turns a collection of checks into a collection of expanded upper and
+/// Turns a collection of checks into a collection of expanded upper and
/// lower bounds for both pointers in the check.
static SmallVector<std::pair<PointerBounds, PointerBounds>, 4> expandBounds(
const SmallVectorImpl<RuntimePointerChecking::PointerCheck> &PointerChecks,
using namespace llvm;
-/// \brief Try to simplify instruction \param I using its SCEV expression.
+/// Try to simplify instruction \param I using its SCEV expression.
///
/// The idea is that some AddRec expressions become constants, which then
/// could trigger folding of other instructions. However, that only happens
return CS && CS.hasRetAttr(Attribute::NoAlias);
}
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates or reallocates memory (either malloc, calloc, realloc, or strdup
/// like).
bool llvm::isAllocationFn(const Value *V, const TargetLibraryInfo *TLI,
return getAllocationData(V, AnyAlloc, TLI, LookThroughBitCast).hasValue();
}
-/// \brief Tests if a value is a call or invoke to a function that returns a
+/// Tests if a value is a call or invoke to a function that returns a
/// NoAlias pointer (including malloc/calloc/realloc/strdup-like functions).
bool llvm::isNoAliasFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
hasNoAliasAttr(V, LookThroughBitCast);
}
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates uninitialized memory (such as malloc).
bool llvm::isMallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, MallocLike, TLI, LookThroughBitCast).hasValue();
}
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates zero-filled memory (such as calloc).
bool llvm::isCallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return getAllocationData(V, CallocLike, TLI, LookThroughBitCast).hasValue();
}
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates memory similar to malloc or calloc.
bool llvm::isMallocOrCallocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
LookThroughBitCast).hasValue();
}
-/// \brief Tests if a value is a call or invoke to a library function that
+/// Tests if a value is a call or invoke to a library function that
/// allocates memory (either malloc, calloc, or strdup like).
bool llvm::isAllocLikeFn(const Value *V, const TargetLibraryInfo *TLI,
bool LookThroughBitCast) {
return Data.first - Data.second;
}
-/// \brief Compute the size of the object pointed by Ptr. Returns true and the
+/// Compute the size of the object pointed by Ptr. Returns true and the
/// object size in Size if successful, and false otherwise.
/// If RoundToAlign is true, then Size is rounded up to the alignment of
/// allocas, byval arguments, and global variables.
namespace llvm {
-/// \brief An assembly annotator class to print Memory SSA information in
+/// An assembly annotator class to print Memory SSA information in
/// comments.
class MemorySSAAnnotatedWriter : public AssemblyAnnotationWriter {
friend class MemorySSA;
namespace llvm {
-/// \brief A MemorySSAWalker that does AA walks to disambiguate accesses. It no
+/// A MemorySSAWalker that does AA walks to disambiguate accesses. It no
/// longer does caching on its own,
/// but the name has been retained for the moment.
class MemorySSA::CachingWalker final : public MemorySSAWalker {
}
}
-/// \brief Rename a single basic block into MemorySSA form.
+/// Rename a single basic block into MemorySSA form.
/// Uses the standard SSA renaming algorithm.
/// \returns The new incoming value.
MemoryAccess *MemorySSA::renameBlock(BasicBlock *BB, MemoryAccess *IncomingVal,
return IncomingVal;
}
-/// \brief This is the standard SSA renaming algorithm.
+/// This is the standard SSA renaming algorithm.
///
/// We walk the dominator tree in preorder, renaming accesses, and then filling
/// in phi nodes in our successors.
}
}
-/// \brief This handles unreachable block accesses by deleting phi nodes in
+/// This handles unreachable block accesses by deleting phi nodes in
/// unreachable blocks, and marking all other unreachable MemoryAccess's as
/// being uses of the live on entry definition.
void MemorySSA::markUnreachableAsLiveOnEntry(BasicBlock *BB) {
return false;
}
-/// \brief Helper function to create new memory accesses
+/// Helper function to create new memory accesses
MemoryUseOrDef *MemorySSA::createNewAccess(Instruction *I) {
// The assume intrinsic has a control dependency which we model by claiming
// that it writes arbitrarily. Ignore that fake memory dependency here.
return MUD;
}
-/// \brief Returns true if \p Replacer dominates \p Replacee .
+/// Returns true if \p Replacer dominates \p Replacee .
bool MemorySSA::dominatesUse(const MemoryAccess *Replacer,
const MemoryAccess *Replacee) const {
if (isa<MemoryUseOrDef>(Replacee))
return true;
}
-/// \brief Properly remove \p MA from all of MemorySSA's lookup tables.
+/// Properly remove \p MA from all of MemorySSA's lookup tables.
void MemorySSA::removeFromLookups(MemoryAccess *MA) {
assert(MA->use_empty() &&
"Trying to remove memory access that still has uses");
ValueToMemoryAccess.erase(VMA);
}
-/// \brief Properly remove \p MA from all of MemorySSA's lists.
+/// Properly remove \p MA from all of MemorySSA's lists.
///
/// Because of the way the intrusive list and use lists work, it is important to
/// do removal in the right order.
Walker->verify(this);
}
-/// \brief Verify that the order and existence of MemoryAccesses matches the
+/// Verify that the order and existence of MemoryAccesses matches the
/// order and existence of memory affecting instructions.
void MemorySSA::verifyOrdering(Function &F) const {
// Walk all the blocks, comparing what the lookups think and what the access
}
}
-/// \brief Verify the domination properties of MemorySSA by checking that each
+/// Verify the domination properties of MemorySSA by checking that each
/// definition dominates all of its uses.
void MemorySSA::verifyDomination(Function &F) const {
#ifndef NDEBUG
#endif
}
-/// \brief Verify the def-use lists in MemorySSA, by verifying that \p Use
+/// Verify the def-use lists in MemorySSA, by verifying that \p Use
/// appears in the use list of \p Def.
void MemorySSA::verifyUseInDefs(MemoryAccess *Def, MemoryAccess *Use) const {
#ifndef NDEBUG
#endif
}
-/// \brief Verify the immediate use information, by walking all the memory
+/// Verify the immediate use information, by walking all the memory
/// accesses and verifying that, for each use, it appears in the
/// appropriate def's use list
void MemorySSA::verifyDefUses(Function &F) const {
BlockNumberingValid.insert(B);
}
-/// \brief Determine, for two memory accesses in the same block,
+/// Determine, for two memory accesses in the same block,
/// whether \p Dominator dominates \p Dominatee.
/// \returns True if \p Dominator dominates \p Dominatee.
bool MemorySSA::locallyDominates(const MemoryAccess *Dominator,
MUD->resetOptimized();
}
-/// \brief Walk the use-def chains starting at \p MA and find
+/// Walk the use-def chains starting at \p MA and find
/// the MemoryAccess that actually clobbers Loc.
///
/// \returns our clobbering memory access
return moveTo(What, BB, Where);
}
-/// \brief If all arguments of a MemoryPHI are defined by the same incoming
+/// If all arguments of a MemoryPHI are defined by the same incoming
/// argument, return that argument.
static MemoryAccess *onlySingleValue(MemoryPhi *MP) {
MemoryAccess *MA = nullptr;
}
namespace {
-/// \brief An assembly annotator class to print must execute information in
+/// An assembly annotator class to print must execute information in
/// comments.
class MustExecuteAnnotatedWriter : public AssemblyAnnotationWriter {
DenseMap<const Value*, SmallVector<Loop*, 4> > MustExec;
using namespace llvm;
using namespace llvm::objcarc;
-/// \brief A handy option to enable/disable all ARC Optimizations.
+/// A handy option to enable/disable all ARC Optimizations.
bool llvm::objcarc::EnableARCOpts;
static cl::opt<bool, true> EnableARCOptimizations(
"enable-objc-arc-opts", cl::desc("enable/disable all ARC Optimizations"),
}
}
-/// \brief Determine what kind of construct V is.
+/// Determine what kind of construct V is.
ARCInstKind llvm::objcarc::GetARCInstKind(const Value *V) {
if (const Instruction *I = dyn_cast<Instruction>(V)) {
// Any instruction other than bitcast and gep with a pointer operand have a
return ARCInstKind::None;
}
-/// \brief Test if the given class is a kind of user.
+/// Test if the given class is a kind of user.
bool llvm::objcarc::IsUser(ARCInstKind Class) {
switch (Class) {
case ARCInstKind::User:
llvm_unreachable("covered switch isn't covered?");
}
-/// \brief Test if the given class is objc_retain or equivalent.
+/// Test if the given class is objc_retain or equivalent.
bool llvm::objcarc::IsRetain(ARCInstKind Class) {
switch (Class) {
case ARCInstKind::Retain:
llvm_unreachable("covered switch isn't covered?");
}
-/// \brief Test if the given class is objc_autorelease or equivalent.
+/// Test if the given class is objc_autorelease or equivalent.
bool llvm::objcarc::IsAutorelease(ARCInstKind Class) {
switch (Class) {
case ARCInstKind::Autorelease:
llvm_unreachable("covered switch isn't covered?");
}
-/// \brief Test if the given class represents instructions which return their
+/// Test if the given class represents instructions which return their
/// argument verbatim.
bool llvm::objcarc::IsForwarding(ARCInstKind Class) {
switch (Class) {
llvm_unreachable("covered switch isn't covered?");
}
-/// \brief Test if the given class represents instructions which do nothing if
+/// Test if the given class represents instructions which do nothing if
/// passed a null pointer.
bool llvm::objcarc::IsNoopOnNull(ARCInstKind Class) {
switch (Class) {
llvm_unreachable("covered switch isn't covered?");
}
-/// \brief Test if the given class represents instructions which are always safe
+/// Test if the given class represents instructions which are always safe
/// to mark with the "tail" keyword.
bool llvm::objcarc::IsAlwaysTail(ARCInstKind Class) {
// ARCInstKind::RetainBlock may be given a stack argument.
llvm_unreachable("covered switch isn't covered?");
}
-/// \brief Test if the given class represents instructions which are never safe
+/// Test if the given class represents instructions which are never safe
/// to mark with the "tail" keyword.
bool llvm::objcarc::IsNeverTail(ARCInstKind Class) {
/// It is never safe to tail call objc_autorelease since by tail calling
llvm_unreachable("covered switch isn't covered?");
}
-/// \brief Test if the given class represents instructions which are always safe
+/// Test if the given class represents instructions which are always safe
/// to mark with the nounwind attribute.
bool llvm::objcarc::IsNoThrow(ARCInstKind Class) {
// objc_retainBlock is not nounwind because it calls user copy constructors
LastInstFound = BB->end();
}
-/// \brief Given no cached results, find if \p A comes before \p B in \p BB.
+/// Given no cached results, find if \p A comes before \p B in \p BB.
/// Cache and number out instruction while walking \p BB.
bool OrderedBasicBlock::comesBefore(const Instruction *A,
const Instruction *B) {
return Inst != B;
}
-/// \brief Find out whether \p A dominates \p B, meaning whether \p A
+/// Find out whether \p A dominates \p B, meaning whether \p A
/// comes before \p B in \p BB. This is a simplification that considers
/// cached instruction positions and ignores other basic blocks, being
/// only relevant to compare relative instructions positions inside \p BB.
return IncV;
}
-/// \brief Hoist the addrec instruction chain rooted in the loop phi above the
+/// Hoist the addrec instruction chain rooted in the loop phi above the
/// position. This routine assumes that this is possible (has been checked).
void SCEVExpander::hoistBeforePos(DominatorTree *DT, Instruction *InstToHoist,
Instruction *Pos, PHINode *LoopPhi) {
} while (InstToHoist != LoopPhi);
}
-/// \brief Check whether we can cheaply express the requested SCEV in terms of
+/// Check whether we can cheaply express the requested SCEV in terms of
/// the available PHI SCEV by truncation and/or inversion of the step.
static bool canBeCheaplyTransformed(ScalarEvolution &SE,
const SCEVAddRecExpr *Phi,
/// NOTE: ^ This can't be a short -- bootstrapping clang has a case where
/// ~1M sets exist.
-// \brief Container of information related to a value in a StratifiedSet.
+// Container of information related to a value in a StratifiedSet.
struct StratifiedInfo {
StratifiedIndex Index;
/// For field sensitivity, etc. we can tack fields on here.
/// A "link" between two StratifiedSets.
struct StratifiedLink {
- /// \brief This is a value used to signify "does not exist" where the
+ /// This is a value used to signify "does not exist" where the
/// StratifiedIndex type is used.
///
/// This is used instead of Optional<StratifiedIndex> because
void clearAbove() { Above = SetSentinel; }
};
-/// \brief These are stratified sets, as described in "Fast algorithms for
+/// These are stratified sets, as described in "Fast algorithms for
/// Dyck-CFL-reachability with applications to Alias Analysis" by Zhang Q, Lyu M
/// R, Yuan H, and Su Z. -- in short, this is meant to represent different sets
/// of Value*s. If two Value*s are in the same set, or if both sets have
/// remap has occurred, and use this information so we can defer renumbering set
/// elements until build time.
template <typename T> class StratifiedSetsBuilder {
- /// \brief Represents a Stratified Set, with information about the Stratified
+ /// Represents a Stratified Set, with information about the Stratified
/// Set above it, the set below it, and whether the current set has been
/// remapped to another.
struct BuilderLink {
StratifiedIndex Remap;
};
- /// \brief This function performs all of the set unioning/value renumbering
+ /// This function performs all of the set unioning/value renumbering
/// that we've been putting off, and generates a vector<StratifiedLink> that
/// may be placed in a StratifiedSets instance.
void finalizeSets(std::vector<StratifiedLink> &StratLinks) {
}
}
- /// \brief There's a guarantee in StratifiedLink where all bits set in a
+ /// There's a guarantee in StratifiedLink where all bits set in a
/// Link.externals will be set in all Link.externals "below" it.
static void propagateAttrs(std::vector<StratifiedLink> &Links) {
const auto getHighestParentAbove = [&Links](StratifiedIndex Idx) {
return addAtMerging(Main, NewIndex);
}
- /// \brief Restructures the stratified sets as necessary to make "ToAdd" in a
+ /// Restructures the stratified sets as necessary to make "ToAdd" in a
/// set above "Main". There are some cases where this is not possible (see
/// above), so we merge them such that ToAdd and Main are in the same set.
bool addAbove(const T &Main, const T &ToAdd) {
return addAtMerging(ToAdd, Above);
}
- /// \brief Restructures the stratified sets as necessary to make "ToAdd" in a
+ /// Restructures the stratified sets as necessary to make "ToAdd" in a
/// set below "Main". There are some cases where this is not possible (see
/// above), so we merge them such that ToAdd and Main are in the same set.
bool addBelow(const T &Main, const T &ToAdd) {
return *Current;
}
- /// \brief Merges two sets into one another. Assumes that these sets are not
+ /// Merges two sets into one another. Assumes that these sets are not
/// already one in the same.
void merge(StratifiedIndex Idx1, StratifiedIndex Idx2) {
assert(inbounds(Idx1) && inbounds(Idx2));
mergeDirect(Idx1, Idx2);
}
- /// \brief Merges two sets assuming that the set at `Idx1` is unreachable from
+ /// Merges two sets assuming that the set at `Idx1` is unreachable from
/// traversing above or below the set at `Idx2`.
void mergeDirect(StratifiedIndex Idx1, StratifiedIndex Idx2) {
assert(inbounds(Idx1) && inbounds(Idx2));
cl::desc("Recognize reduction patterns."));
namespace {
-/// \brief No-op implementation of the TTI interface using the utility base
+/// No-op implementation of the TTI interface using the utility base
/// classes.
///
/// This is used when no target specific information is available.
return false;
}
-/// \brief Test whether a GEP's result is known to be non-null.
+/// Test whether a GEP's result is known to be non-null.
///
/// Uses properties inherent in a GEP to try to determine whether it is known
/// to be non-null.
return Len == ~0ULL ? 1 : Len;
}
-/// \brief \p PN defines a loop-variant pointer to an object. Check if the
+/// \p PN defines a loop-variant pointer to an object. Check if the
/// previous iteration of the loop was referring to the same object as \p PN.
static bool isSameUnderlyingObjectInLoop(const PHINode *PN,
const LoopInfo *LI) {
return OverflowResult::MayOverflow;
}
-/// \brief Return true if we can prove that adding the two values of the
+/// Return true if we can prove that adding the two values of the
/// knownbits will not overflow.
/// Otherwise return false.
static bool checkRippleForSignedAdd(const KnownBits &LHSKnown,
using namespace llvm;
using namespace llvm::PatternMatch;
-/// \brief Identify if the intrinsic is trivially vectorizable.
+/// Identify if the intrinsic is trivially vectorizable.
/// This method returns true if the intrinsic's argument types are all
/// scalars for the scalar form of the intrinsic and all vectors for
/// the vector form of the intrinsic.
}
}
-/// \brief Identifies if the intrinsic has a scalar operand. It check for
+/// Identifies if the intrinsic has a scalar operand. It check for
/// ctlz,cttz and powi special intrinsics whose argument is scalar.
bool llvm::hasVectorInstrinsicScalarOpd(Intrinsic::ID ID,
unsigned ScalarOpdIdx) {
}
}
-/// \brief Returns intrinsic ID for call.
+/// Returns intrinsic ID for call.
/// For the input call instruction it finds mapping intrinsic and returns
/// its ID, in case it does not found it return not_intrinsic.
Intrinsic::ID llvm::getVectorIntrinsicIDForCall(const CallInst *CI,
return Intrinsic::not_intrinsic;
}
-/// \brief Find the operand of the GEP that should be checked for consecutive
+/// Find the operand of the GEP that should be checked for consecutive
/// stores. This ignores trailing indices that have no effect on the final
/// pointer.
unsigned llvm::getGEPInductionOperand(const GetElementPtrInst *Gep) {
return LastOperand;
}
-/// \brief If the argument is a GEP, then returns the operand identified by
+/// If the argument is a GEP, then returns the operand identified by
/// getGEPInductionOperand. However, if there is some other non-loop-invariant
/// operand, it returns that instead.
Value *llvm::stripGetElementPtr(Value *Ptr, ScalarEvolution *SE, Loop *Lp) {
return GEP->getOperand(InductionOperand);
}
-/// \brief If a value has only one user that is a CastInst, return it.
+/// If a value has only one user that is a CastInst, return it.
Value *llvm::getUniqueCastUse(Value *Ptr, Loop *Lp, Type *Ty) {
Value *UniqueCast = nullptr;
for (User *U : Ptr->users()) {
return UniqueCast;
}
-/// \brief Get the stride of a pointer access in a loop. Looks for symbolic
+/// Get the stride of a pointer access in a loop. Looks for symbolic
/// strides "a[i*stride]". Returns the symbolic stride, or null otherwise.
Value *llvm::getStrideFromPointer(Value *Ptr, ScalarEvolution *SE, Loop *Lp) {
auto *PtrTy = dyn_cast<PointerType>(Ptr->getType());
return Stride;
}
-/// \brief Given a vector and an element number, see if the scalar value is
+/// Given a vector and an element number, see if the scalar value is
/// already around as a register, for example if it were inserted then extracted
/// from the vector.
Value *llvm::findScalarElement(Value *V, unsigned EltNo) {
return nullptr;
}
-/// \brief Get splat value if the input is a splat vector or return nullptr.
+/// Get splat value if the input is a splat vector or return nullptr.
/// This function is not fully general. It checks only 2 cases:
/// the input value is (1) a splat constants vector or (2) a sequence
/// of instructions that broadcast a single value into a vector.
Error materializeModule() override;
std::vector<StructType *> getIdentifiedStructTypes() const override;
- /// \brief Main interface to parsing a bitcode buffer.
+ /// Main interface to parsing a bitcode buffer.
/// \returns true if an error occurred.
Error parseBitcodeInto(Module *M, bool ShouldLazyLoadMetadata = false,
bool IsImporting = false);
}
}
-/// \brief This fills an AttrBuilder object with the LLVM attributes that have
+/// This fills an AttrBuilder object with the LLVM attributes that have
/// been decoded from the given integer. This function must stay in sync with
/// 'encodeLLVMAttributesForBitcode'.
static void decodeLLVMAttributesForBitcode(AttrBuilder &B,
}
}
-/// \brief Get a lazy one-at-time loading module from bitcode.
+/// Get a lazy one-at-time loading module from bitcode.
///
/// This isn't always used in a lazy context. In particular, it's also used by
/// \a parseModule(). If this is truly lazy, then we need to eagerly pull
namespace {
-/// \brief A class for maintaining the slot number definition
+/// A class for maintaining the slot number definition
/// as a placeholder for the actual definition for forward constants defs.
class ConstantPlaceHolder : public ConstantExpr {
public:
// allocate space for exactly one operand
void *operator new(size_t s) { return User::operator new(s, 1); }
- /// \brief Methods to support type inquiry through isa, cast, and dyn_cast.
+ /// Methods to support type inquiry through isa, cast, and dyn_cast.
static bool classof(const Value *V) {
return isa<ConstantExpr>(V) &&
cast<ConstantExpr>(V)->getOpcode() == Instruction::UserOp1;
public:
AddressPool() = default;
- /// \brief Returns the index into the address pool with the given
+ /// Returns the index into the address pool with the given
/// label/symbol.
unsigned getIndex(const MCSymbol *Sym, bool TLS = false);
OutStreamer->AddBlankLine();
}
-/// \brief Compute the number of Global Variables that uses a Constant.
+/// Compute the number of Global Variables that uses a Constant.
static unsigned getNumGlobalVariableUses(const Constant *C) {
if (!C)
return 0;
return NumUses;
}
-/// \brief Only consider global GOT equivalents if at least one user is a
+/// Only consider global GOT equivalents if at least one user is a
/// cstexpr inside an initializer of another global variables. Also, don't
/// handle cstexpr inside instructions. During global variable emission,
/// candidates are skipped and are emitted later in case at least one cstexpr
return NumGOTEquivUsers > 0;
}
-/// \brief Unnamed constant global variables solely contaning a pointer to
+/// Unnamed constant global variables solely contaning a pointer to
/// another globals variable is equivalent to a GOT table entry; it contains the
/// the address of another symbol. Optimize it and replace accesses to these
/// "GOT equivalents" by using the GOT entry for the final global instead.
}
}
-/// \brief Constant expressions using GOT equivalent globals may not be eligible
+/// Constant expressions using GOT equivalent globals may not be eligible
/// for PC relative GOT entry conversion, in such cases we need to emit such
/// globals we previously omitted in EmitGlobalVariable.
void AsmPrinter::emitGlobalGOTEquivs() {
}
}
-/// \brief Transform a not absolute MCExpr containing a reference to a GOT
+/// Transform a not absolute MCExpr containing a reference to a GOT
/// equivalent global, by a target specific GOT pc relative access to the
/// final symbol.
static void handleIndirectSymViaGOTPCRel(AsmPrinter &AP, const MCExpr **ME,
typedef MCSymbol *ExceptionSymbolProvider(AsmPrinter *Asm);
-/// \brief Collects and handles AsmPrinter objects required to build debug
+/// Collects and handles AsmPrinter objects required to build debug
/// or EH information.
class AsmPrinterHandler {
public:
virtual ~AsmPrinterHandler();
- /// \brief For symbols that have a size designated (e.g. common symbols),
+ /// For symbols that have a size designated (e.g. common symbols),
/// this tracks that size.
virtual void setSymbolSize(const MCSymbol *Sym, uint64_t Size) = 0;
- /// \brief Emit all sections that should come after the content.
+ /// Emit all sections that should come after the content.
virtual void endModule() = 0;
- /// \brief Gather pre-function debug information.
+ /// Gather pre-function debug information.
/// Every beginFunction(MF) call should be followed by an endFunction(MF)
/// call.
virtual void beginFunction(const MachineFunction *MF) = 0;
- // \brief Emit any of function marker (like .cfi_endproc). This is called
+ // Emit any of function marker (like .cfi_endproc). This is called
// before endFunction and cannot switch sections.
virtual void markFunctionEnd();
- /// \brief Gather post-function debug information.
+ /// Gather post-function debug information.
/// Please note that some AsmPrinter implementations may not call
/// beginFunction at all.
virtual void endFunction(const MachineFunction *MF) = 0;
ExceptionSymbolProvider ESP) {}
virtual void endFragment() {}
- /// \brief Emit target-specific EH funclet machinery.
+ /// Emit target-specific EH funclet machinery.
virtual void beginFunclet(const MachineBasicBlock &MBB,
MCSymbol *Sym = nullptr) {}
virtual void endFunclet() {}
- /// \brief Process beginning of an instruction.
+ /// Process beginning of an instruction.
virtual void beginInstruction(const MachineInstr *MI) = 0;
- /// \brief Process end of an instruction.
+ /// Process end of an instruction.
virtual void endInstruction() = 0;
};
} // End of namespace llvm
SmallVectorImpl<char> &Buffer;
SmallVectorImpl<std::string> &Comments;
- /// \brief Only verbose textual output needs comments. This will be set to
+ /// Only verbose textual output needs comments. This will be set to
/// true for that case, and false otherwise. If false, comments passed in to
/// the emit methods will be ignored.
bool GenerateComments;
class MCSymbol;
class MachineFunction;
-/// \brief Collects and handles line tables information in a CodeView format.
+/// Collects and handles line tables information in a CodeView format.
class LLVM_LIBRARY_VISIBILITY CodeViewDebug : public DebugHandlerBase {
MCStreamer &OS;
BumpPtrAllocator Allocator;
unsigned getPointerSizeInBytes();
protected:
- /// \brief Gather pre-function debug information.
+ /// Gather pre-function debug information.
void beginFunctionImpl(const MachineFunction *MF) override;
- /// \brief Gather post-function debug information.
+ /// Gather post-function debug information.
void endFunctionImpl(const MachineFunction *) override;
public:
void setSymbolSize(const MCSymbol *, uint64_t) override {}
- /// \brief Emit the COFF section that holds the line table information.
+ /// Emit the COFF section that holds the line table information.
void endModule() override;
- /// \brief Process beginning of an instruction.
+ /// Process beginning of an instruction.
void beginInstruction(const MachineInstr *MI) override;
};
#define DEBUG_TYPE "dwarfdebug"
-/// \brief Grabs the string in whichever attribute is passed in and returns
+/// Grabs the string in whichever attribute is passed in and returns
/// a reference to it.
static StringRef getDIEStringAttr(const DIE &Die, uint16_t Attr) {
// Iterate through all the attributes until we find the one we're
return StringRef("");
}
-/// \brief Adds the string in \p Str to the hash. This also hashes
+/// Adds the string in \p Str to the hash. This also hashes
/// a trailing NULL with the string.
void DIEHash::addString(StringRef Str) {
DEBUG(dbgs() << "Adding string " << Str << " to hash.\n");
// FIXME: The LEB128 routines are copied and only slightly modified out of
// LEB128.h.
-/// \brief Adds the unsigned in \p Value to the hash encoded as a ULEB128.
+/// Adds the unsigned in \p Value to the hash encoded as a ULEB128.
void DIEHash::addULEB128(uint64_t Value) {
DEBUG(dbgs() << "Adding ULEB128 " << Value << " to hash.\n");
do {
} while (More);
}
-/// \brief Including \p Parent adds the context of Parent to the hash..
+/// Including \p Parent adds the context of Parent to the hash..
void DIEHash::addParentContext(const DIE &Parent) {
DEBUG(dbgs() << "Adding parent context to hash...\n");
class AsmPrinter;
class CompileUnit;
-/// \brief An object containing the capability of hashing and adding hash
+/// An object containing the capability of hashing and adding hash
/// attributes onto a DIE.
class DIEHash {
// Collection of all attributes used in hashing a particular DIE.
public:
DIEHash(AsmPrinter *A = nullptr) : AP(A) {}
- /// \brief Computes the CU signature.
+ /// Computes the CU signature.
uint64_t computeCUSignature(StringRef DWOName, const DIE &Die);
- /// \brief Computes the type signature.
+ /// Computes the type signature.
uint64_t computeTypeSignature(const DIE &Die);
// Helper routines to process parts of a DIE.
private:
- /// \brief Adds the parent context of \param Die to the hash.
+ /// Adds the parent context of \param Die to the hash.
void addParentContext(const DIE &Die);
- /// \brief Adds the attributes of \param Die to the hash.
+ /// Adds the attributes of \param Die to the hash.
void addAttributes(const DIE &Die);
- /// \brief Computes the full DWARF4 7.27 hash of the DIE.
+ /// Computes the full DWARF4 7.27 hash of the DIE.
void computeHash(const DIE &Die);
// Routines that add DIEValues to the hash.
public:
- /// \brief Adds \param Value to the hash.
+ /// Adds \param Value to the hash.
void update(uint8_t Value) { Hash.update(Value); }
- /// \brief Encodes and adds \param Value to the hash as a ULEB128.
+ /// Encodes and adds \param Value to the hash as a ULEB128.
void addULEB128(uint64_t Value);
- /// \brief Encodes and adds \param Value to the hash as a SLEB128.
+ /// Encodes and adds \param Value to the hash as a SLEB128.
void addSLEB128(int64_t Value);
private:
- /// \brief Adds \param Str to the hash and includes a NULL byte.
+ /// Adds \param Str to the hash and includes a NULL byte.
void addString(StringRef Str);
- /// \brief Collects the attributes of DIE \param Die into the \param Attrs
+ /// Collects the attributes of DIE \param Die into the \param Attrs
/// structure.
void collectAttributes(const DIE &Die, DIEAttrs &Attrs);
- /// \brief Hashes the attributes in \param Attrs in order.
+ /// Hashes the attributes in \param Attrs in order.
void hashAttributes(const DIEAttrs &Attrs, dwarf::Tag Tag);
- /// \brief Hashes the data in a block like DIEValue, e.g. DW_FORM_block or
+ /// Hashes the data in a block like DIEValue, e.g. DW_FORM_block or
/// DW_FORM_exprloc.
void hashBlockData(const DIE::const_value_range &Values);
- /// \brief Hashes the contents pointed to in the .debug_loc section.
+ /// Hashes the contents pointed to in the .debug_loc section.
void hashLocList(const DIELocList &LocList);
- /// \brief Hashes an individual attribute.
+ /// Hashes an individual attribute.
void hashAttribute(const DIEValue &Value, dwarf::Tag Tag);
- /// \brief Hashes an attribute that refers to another DIE.
+ /// Hashes an attribute that refers to another DIE.
void hashDIEEntry(dwarf::Attribute Attribute, dwarf::Tag Tag,
const DIE &Entry);
- /// \brief Hashes a reference to a named type in such a way that is
+ /// Hashes a reference to a named type in such a way that is
/// independent of whether that type is described by a declaration or a
/// definition.
void hashShallowTypeReference(dwarf::Attribute Attribute, const DIE &Entry,
StringRef Name);
- /// \brief Hashes a reference to a previously referenced type DIE.
+ /// Hashes a reference to a previously referenced type DIE.
void hashRepeatedTypeReference(dwarf::Attribute Attribute,
unsigned DieNumber);
#define DEBUG_TYPE "dwarfdebug"
-// \brief If @MI is a DBG_VALUE with debug value described by a
+// If @MI is a DBG_VALUE with debug value described by a
// defined register, returns the number of this register.
// In the other case, returns 0.
static unsigned isDescribedByReg(const MachineInstr &MI) {
} // end anonymous namespace
-// \brief Claim that @Var is not described by @RegNo anymore.
+// Claim that @Var is not described by @RegNo anymore.
static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
InlinedVariable Var) {
const auto &I = RegVars.find(RegNo);
RegVars.erase(I);
}
-// \brief Claim that @Var is now described by @RegNo.
+// Claim that @Var is now described by @RegNo.
static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
InlinedVariable Var) {
assert(RegNo != 0U);
VarSet.push_back(Var);
}
-// \brief Terminate the location range for variables described by register at
+// Terminate the location range for variables described by register at
// @I by inserting @ClobberingInstr to their history.
static void clobberRegisterUses(RegDescribedVarsMap &RegVars,
RegDescribedVarsMap::iterator I,
RegVars.erase(I);
}
-// \brief Terminate the location range for variables described by register
+// Terminate the location range for variables described by register
// @RegNo by inserting @ClobberingInstr to their history.
static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
DbgValueHistoryMap &HistMap,
clobberRegisterUses(RegVars, I, HistMap, ClobberingInstr);
}
-// \brief Returns the first instruction in @MBB which corresponds to
+// Returns the first instruction in @MBB which corresponds to
// the function epilogue, or nullptr if @MBB doesn't contain an epilogue.
static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) {
auto LastMI = MBB.getLastNonDebugInstr();
return &*MBB.begin();
}
-// \brief Collect registers that are modified in the function body (their
+// Collect registers that are modified in the function body (their
// contents is changed outside of the prologue and epilogue).
static void collectChangingRegs(const MachineFunction *MF,
const TargetRegisterInfo *TRI,
namespace llvm {
class AsmPrinter;
-/// \brief This struct describes location entries emitted in the .debug_loc
+/// This struct describes location entries emitted in the .debug_loc
/// section.
class DebugLocEntry {
/// Begin and end symbols for the address range that this location is valid.
const MCSymbol *End;
public:
- /// \brief A single location or constant.
+ /// A single location or constant.
struct Value {
Value(const DIExpression *Expr, int64_t i)
: Expression(Expr), EntryKind(E_Integer) {
Values.push_back(std::move(Val));
}
- /// \brief If this and Next are describing different pieces of the same
+ /// If this and Next are describing different pieces of the same
/// variable, merge them by appending Next's values to the current
/// list of values.
/// Return true if the merge was successful.
bool MergeValues(const DebugLocEntry &Next);
- /// \brief Attempt to merge this DebugLocEntry with Next and return
+ /// Attempt to merge this DebugLocEntry with Next and return
/// true if the merge was successful. Entries can be merged if they
/// share the same Loc/Constant and if Next immediately follows this
/// Entry.
}) && "value must be a piece");
}
- // \brief Sort the pieces by offset.
+ // Sort the pieces by offset.
// Remove any duplicate entries by dropping all but the first.
void sortUniqueValues() {
llvm::sort(Values.begin(), Values.end());
Values.end());
}
- /// \brief Lower this entry into a DWARF expression.
+ /// Lower this entry into a DWARF expression.
void finalize(const AsmPrinter &AP, DebugLocStream::ListBuilder &List,
const DIBasicType *BT);
};
-/// \brief Compare two Values for equality.
+/// Compare two Values for equality.
inline bool operator==(const DebugLocEntry::Value &A,
const DebugLocEntry::Value &B) {
if (A.EntryKind != B.EntryKind)
class MachineInstr;
class MCSymbol;
-/// \brief Byte stream of .debug_loc entries.
+/// Byte stream of .debug_loc entries.
///
/// Stores a unified stream of .debug_loc entries. There's \a List for each
/// variable/inlined-at pair, and an \a Entry for each \a DebugLocEntry.
SmallString<256> DWARFBytes;
SmallVector<std::string, 32> Comments;
- /// \brief Only verbose textual output needs comments. This will be set to
+ /// Only verbose textual output needs comments. This will be set to
/// true for that case, and false otherwise.
bool GenerateComments;
class EntryBuilder;
private:
- /// \brief Start a new .debug_loc entry list.
+ /// Start a new .debug_loc entry list.
///
/// Start a new .debug_loc entry list. Return the new list's index so it can
/// be retrieved later via \a getList().
/// \return false iff the list is deleted.
bool finalizeList(AsmPrinter &Asm);
- /// \brief Start a new .debug_loc entry.
+ /// Start a new .debug_loc entry.
///
/// Until the next call, bytes added to the stream will be added to this
/// entry.
DenseMap<const MDNode *, DIE *> AbstractSPDies;
DenseMap<const MDNode *, std::unique_ptr<DbgVariable>> AbstractVariables;
- /// \brief Construct a DIE for the given DbgVariable without initializing the
+ /// Construct a DIE for the given DbgVariable without initializing the
/// DbgVariable's DIE reference.
DIE *constructVariableDIEImpl(const DbgVariable &DV, bool Abstract);
void attachLowHighPC(DIE &D, const MCSymbol *Begin, const MCSymbol *End);
- /// \brief Find DIE for the given subprogram and attach appropriate
+ /// Find DIE for the given subprogram and attach appropriate
/// DW_AT_low_pc and DW_AT_high_pc attributes. If there are global
/// variables in this scope then create and insert DIEs for these
/// variables.
void constructScopeDIE(LexicalScope *Scope,
SmallVectorImpl<DIE *> &FinalChildren);
- /// \brief A helper function to construct a RangeSpanList for a given
+ /// A helper function to construct a RangeSpanList for a given
/// lexical scope.
void addScopeRangeList(DIE &ScopeDIE, SmallVector<RangeSpan, 2> Range);
void attachRangesOrLowHighPC(DIE &D,
const SmallVectorImpl<InsnRange> &Ranges);
- /// \brief This scope represents inlined body of a function. Construct
+ /// This scope represents inlined body of a function. Construct
/// DIE to represent this concrete inlined copy of the function.
DIE *constructInlinedScopeDIE(LexicalScope *Scope);
- /// \brief Construct new DW_TAG_lexical_block for this scope and
+ /// Construct new DW_TAG_lexical_block for this scope and
/// attach DW_AT_low_pc/DW_AT_high_pc labels.
DIE *constructLexicalScopeDIE(LexicalScope *Scope);
SmallVectorImpl<DIE *> &Children,
bool *HasNonScopeChildren = nullptr);
- /// \brief Construct a DIE for this subprogram scope.
+ /// Construct a DIE for this subprogram scope.
void constructSubprogramScopeDIE(const DISubprogram *Sub, LexicalScope *Scope);
DIE *createAndAddScopeChildren(LexicalScope *Scope, DIE &ScopeDIE);
void constructAbstractSubprogramScopeDIE(LexicalScope *Scope);
- /// \brief Construct import_module DIE.
+ /// Construct import_module DIE.
DIE *constructImportedEntityDIE(const DIImportedEntity *Module);
void finishSubprogramDefinition(const DISubprogram *SP);
llvm_unreachable("Unexpected 4-operand DBG_VALUE instruction!");
}
-/// \brief If this and Next are describing different fragments of the same
+/// If this and Next are describing different fragments of the same
/// variable, merge them by appending Next's values to the current
/// list of values.
/// Return true if the merge was successful.
return CUs;
}
- /// \brief Compute the size and offset of a DIE given an incoming Offset.
+ /// Compute the size and offset of a DIE given an incoming Offset.
unsigned computeSizeAndOffset(DIE &Die, unsigned Offset);
- /// \brief Compute the size and offset of all the DIEs.
+ /// Compute the size and offset of all the DIEs.
void computeSizeAndOffsets();
- /// \brief Compute the size and offset of all the DIEs in the given unit.
+ /// Compute the size and offset of all the DIEs in the given unit.
/// \returns The size of the root DIE.
unsigned computeSizeAndOffsetsForUnit(DwarfUnit *TheU);
- /// \brief Add a unit to the list of CUs.
+ /// Add a unit to the list of CUs.
void addUnit(std::unique_ptr<DwarfCompileUnit> U);
/// Emit the string table offsets header.
void emitStringOffsetsTableHeader(MCSection *Section);
- /// \brief Emit all of the units to the section listed with the given
+ /// Emit all of the units to the section listed with the given
/// abbreviation section.
void emitUnits(bool UseOffsets);
- /// \brief Emit the given unit to its section.
+ /// Emit the given unit to its section.
void emitUnit(DwarfUnit *U, bool UseOffsets);
- /// \brief Emit a set of abbreviations to the specific section.
+ /// Emit a set of abbreviations to the specific section.
void emitAbbrevs(MCSection *);
/// Emit all of the strings to the section given. If OffsetSection is
void emitStrings(MCSection *StrSection, MCSection *OffsetSection = nullptr,
bool UseRelativeOffsets = false);
- /// \brief Returns the string pool.
+ /// Returns the string pool.
DwarfStringPool &getStringPool() { return StrPool; }
MCSymbol *getStringOffsetsStartSym() const { return StringOffsetsStartSym; }
void setSymbolSize(const MCSymbol *Sym, uint64_t Size) override {}
- /// \brief Emit the Control Flow Guard function ID table
+ /// Emit the Control Flow Guard function ID table
void endModule() override;
- /// \brief Gather pre-function debug information.
+ /// Gather pre-function debug information.
/// Every beginFunction(MF) call should be followed by an endFunction(MF)
/// call.
void beginFunction(const MachineFunction *MF) override {}
- /// \brief Gather post-function debug information.
+ /// Gather post-function debug information.
/// Please note that some AsmPrinter implementations may not call
/// beginFunction at all.
void endFunction(const MachineFunction *MF) override {}
- /// \brief Process beginning of an instruction.
+ /// Process beginning of an instruction.
void beginInstruction(const MachineInstr *MI) override {}
- /// \brief Process end of an instruction.
+ /// Process end of an instruction.
void endInstruction() override {}
};
/// Gather and emit post-function exception information.
void endFunction(const MachineFunction *) override;
- /// \brief Emit target-specific EH funclet machinery.
+ /// Emit target-specific EH funclet machinery.
void beginFunclet(const MachineBasicBlock &MBB, MCSymbol *Sym) override;
void endFunclet() override;
};
LivePhysRegs LiveRegs;
public:
- /// \brief This class keeps track of branch frequencies of newly created
+ /// This class keeps track of branch frequencies of newly created
/// blocks and tail-merged blocks.
class MBFIWrapper {
public:
/// Also break dependencies on partial defs and undef uses.
void processDefs(MachineInstr *MI);
- /// \brief Helps avoid false dependencies on undef registers by updating the
+ /// Helps avoid false dependencies on undef registers by updating the
/// machine instructions' undef operand to use a register that the instruction
/// is truly dependent on, or use a register with clearance higher than Pref.
/// Returns true if it was able to find a true dependency, thus not requiring
bool pickBestRegisterForUndef(MachineInstr *MI, unsigned OpIdx,
unsigned Pref);
- /// \brief Return true to if it makes sense to break dependence on a partial
+ /// Return true to if it makes sense to break dependence on a partial
/// def or undef use.
bool shouldBreakDependence(MachineInstr *, unsigned OpIdx, unsigned Pref);
- /// \brief Break false dependencies on undefined register reads.
+ /// Break false dependencies on undefined register reads.
/// Walk the block backward computing precise liveness. This is expensive, so
/// we only do it on demand. Note that the occurrence of undefined register
/// reads that should be broken is very rare, but when they occur we may have
namespace {
-/// \brief This class provides transaction based operation on the IR.
+/// This class provides transaction based operation on the IR.
/// Every change made through this class is recorded in the internal state and
/// can be undone (rollback) until commit is called.
class TypePromotionTransaction {
- /// \brief This represents the common interface of the individual transaction.
+ /// This represents the common interface of the individual transaction.
/// Each class implements the logic for doing one specific modification on
/// the IR via the TypePromotionTransaction.
class TypePromotionAction {
Instruction *Inst;
public:
- /// \brief Constructor of the action.
+ /// Constructor of the action.
/// The constructor performs the related action on the IR.
TypePromotionAction(Instruction *Inst) : Inst(Inst) {}
virtual ~TypePromotionAction() = default;
- /// \brief Undo the modification done by this action.
+ /// Undo the modification done by this action.
/// When this method is called, the IR must be in the same state as it was
/// before this action was applied.
/// \pre Undoing the action works if and only if the IR is in the exact same
/// state as it was directly after this action was applied.
virtual void undo() = 0;
- /// \brief Advocate every change made by this action.
+ /// Advocate every change made by this action.
/// When the results on the IR of the action are to be kept, it is important
/// to call this function, otherwise hidden information may be kept forever.
virtual void commit() {
}
};
- /// \brief Utility to remember the position of an instruction.
+ /// Utility to remember the position of an instruction.
class InsertionHandler {
/// Position of an instruction.
/// Either an instruction:
bool HasPrevInstruction;
public:
- /// \brief Record the position of \p Inst.
+ /// Record the position of \p Inst.
InsertionHandler(Instruction *Inst) {
BasicBlock::iterator It = Inst->getIterator();
HasPrevInstruction = (It != (Inst->getParent()->begin()));
Point.BB = Inst->getParent();
}
- /// \brief Insert \p Inst at the recorded position.
+ /// Insert \p Inst at the recorded position.
void insert(Instruction *Inst) {
if (HasPrevInstruction) {
if (Inst->getParent())
}
};
- /// \brief Move an instruction before another.
+ /// Move an instruction before another.
class InstructionMoveBefore : public TypePromotionAction {
/// Original position of the instruction.
InsertionHandler Position;
public:
- /// \brief Move \p Inst before \p Before.
+ /// Move \p Inst before \p Before.
InstructionMoveBefore(Instruction *Inst, Instruction *Before)
: TypePromotionAction(Inst), Position(Inst) {
DEBUG(dbgs() << "Do: move: " << *Inst << "\nbefore: " << *Before << "\n");
Inst->moveBefore(Before);
}
- /// \brief Move the instruction back to its original position.
+ /// Move the instruction back to its original position.
void undo() override {
DEBUG(dbgs() << "Undo: moveBefore: " << *Inst << "\n");
Position.insert(Inst);
}
};
- /// \brief Set the operand of an instruction with a new value.
+ /// Set the operand of an instruction with a new value.
class OperandSetter : public TypePromotionAction {
/// Original operand of the instruction.
Value *Origin;
unsigned Idx;
public:
- /// \brief Set \p Idx operand of \p Inst with \p NewVal.
+ /// Set \p Idx operand of \p Inst with \p NewVal.
OperandSetter(Instruction *Inst, unsigned Idx, Value *NewVal)
: TypePromotionAction(Inst), Idx(Idx) {
DEBUG(dbgs() << "Do: setOperand: " << Idx << "\n"
Inst->setOperand(Idx, NewVal);
}
- /// \brief Restore the original value of the instruction.
+ /// Restore the original value of the instruction.
void undo() override {
DEBUG(dbgs() << "Undo: setOperand:" << Idx << "\n"
<< "for: " << *Inst << "\n"
}
};
- /// \brief Hide the operands of an instruction.
+ /// Hide the operands of an instruction.
/// Do as if this instruction was not using any of its operands.
class OperandsHider : public TypePromotionAction {
/// The list of original operands.
SmallVector<Value *, 4> OriginalValues;
public:
- /// \brief Remove \p Inst from the uses of the operands of \p Inst.
+ /// Remove \p Inst from the uses of the operands of \p Inst.
OperandsHider(Instruction *Inst) : TypePromotionAction(Inst) {
DEBUG(dbgs() << "Do: OperandsHider: " << *Inst << "\n");
unsigned NumOpnds = Inst->getNumOperands();
}
}
- /// \brief Restore the original list of uses.
+ /// Restore the original list of uses.
void undo() override {
DEBUG(dbgs() << "Undo: OperandsHider: " << *Inst << "\n");
for (unsigned It = 0, EndIt = OriginalValues.size(); It != EndIt; ++It)
}
};
- /// \brief Build a truncate instruction.
+ /// Build a truncate instruction.
class TruncBuilder : public TypePromotionAction {
Value *Val;
public:
- /// \brief Build a truncate instruction of \p Opnd producing a \p Ty
+ /// Build a truncate instruction of \p Opnd producing a \p Ty
/// result.
/// trunc Opnd to Ty.
TruncBuilder(Instruction *Opnd, Type *Ty) : TypePromotionAction(Opnd) {
DEBUG(dbgs() << "Do: TruncBuilder: " << *Val << "\n");
}
- /// \brief Get the built value.
+ /// Get the built value.
Value *getBuiltValue() { return Val; }
- /// \brief Remove the built instruction.
+ /// Remove the built instruction.
void undo() override {
DEBUG(dbgs() << "Undo: TruncBuilder: " << *Val << "\n");
if (Instruction *IVal = dyn_cast<Instruction>(Val))
}
};
- /// \brief Build a sign extension instruction.
+ /// Build a sign extension instruction.
class SExtBuilder : public TypePromotionAction {
Value *Val;
public:
- /// \brief Build a sign extension instruction of \p Opnd producing a \p Ty
+ /// Build a sign extension instruction of \p Opnd producing a \p Ty
/// result.
/// sext Opnd to Ty.
SExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty)
DEBUG(dbgs() << "Do: SExtBuilder: " << *Val << "\n");
}
- /// \brief Get the built value.
+ /// Get the built value.
Value *getBuiltValue() { return Val; }
- /// \brief Remove the built instruction.
+ /// Remove the built instruction.
void undo() override {
DEBUG(dbgs() << "Undo: SExtBuilder: " << *Val << "\n");
if (Instruction *IVal = dyn_cast<Instruction>(Val))
}
};
- /// \brief Build a zero extension instruction.
+ /// Build a zero extension instruction.
class ZExtBuilder : public TypePromotionAction {
Value *Val;
public:
- /// \brief Build a zero extension instruction of \p Opnd producing a \p Ty
+ /// Build a zero extension instruction of \p Opnd producing a \p Ty
/// result.
/// zext Opnd to Ty.
ZExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty)
DEBUG(dbgs() << "Do: ZExtBuilder: " << *Val << "\n");
}
- /// \brief Get the built value.
+ /// Get the built value.
Value *getBuiltValue() { return Val; }
- /// \brief Remove the built instruction.
+ /// Remove the built instruction.
void undo() override {
DEBUG(dbgs() << "Undo: ZExtBuilder: " << *Val << "\n");
if (Instruction *IVal = dyn_cast<Instruction>(Val))
}
};
- /// \brief Mutate an instruction to another type.
+ /// Mutate an instruction to another type.
class TypeMutator : public TypePromotionAction {
/// Record the original type.
Type *OrigTy;
public:
- /// \brief Mutate the type of \p Inst into \p NewTy.
+ /// Mutate the type of \p Inst into \p NewTy.
TypeMutator(Instruction *Inst, Type *NewTy)
: TypePromotionAction(Inst), OrigTy(Inst->getType()) {
DEBUG(dbgs() << "Do: MutateType: " << *Inst << " with " << *NewTy
Inst->mutateType(NewTy);
}
- /// \brief Mutate the instruction back to its original type.
+ /// Mutate the instruction back to its original type.
void undo() override {
DEBUG(dbgs() << "Undo: MutateType: " << *Inst << " with " << *OrigTy
<< "\n");
}
};
- /// \brief Replace the uses of an instruction by another instruction.
+ /// Replace the uses of an instruction by another instruction.
class UsesReplacer : public TypePromotionAction {
/// Helper structure to keep track of the replaced uses.
struct InstructionAndIdx {
using use_iterator = SmallVectorImpl<InstructionAndIdx>::iterator;
public:
- /// \brief Replace all the use of \p Inst by \p New.
+ /// Replace all the use of \p Inst by \p New.
UsesReplacer(Instruction *Inst, Value *New) : TypePromotionAction(Inst) {
DEBUG(dbgs() << "Do: UsersReplacer: " << *Inst << " with " << *New
<< "\n");
Inst->replaceAllUsesWith(New);
}
- /// \brief Reassign the original uses of Inst to Inst.
+ /// Reassign the original uses of Inst to Inst.
void undo() override {
DEBUG(dbgs() << "Undo: UsersReplacer: " << *Inst << "\n");
for (use_iterator UseIt = OriginalUses.begin(),
}
};
- /// \brief Remove an instruction from the IR.
+ /// Remove an instruction from the IR.
class InstructionRemover : public TypePromotionAction {
/// Original position of the instruction.
InsertionHandler Inserter;
SetOfInstrs &RemovedInsts;
public:
- /// \brief Remove all reference of \p Inst and optinally replace all its
+ /// Remove all reference of \p Inst and optinally replace all its
/// uses with New.
/// \p RemovedInsts Keep track of the instructions removed by this Action.
/// \pre If !Inst->use_empty(), then New != nullptr
~InstructionRemover() override { delete Replacer; }
- /// \brief Resurrect the instruction and reassign it to the proper uses if
+ /// Resurrect the instruction and reassign it to the proper uses if
/// new value was provided when build this action.
void undo() override {
DEBUG(dbgs() << "Undo: InstructionRemover: " << *Inst << "\n");
namespace {
-/// \brief A helper class for matching addressing modes.
+/// A helper class for matching addressing modes.
///
/// This encapsulates the logic for matching the target-legal addressing modes.
class AddressingModeMatcher {
Value *PromotedOperand) const;
};
-/// \brief Keep track of simplification of Phi nodes.
+/// Keep track of simplification of Phi nodes.
/// Accept the set of all phi nodes and erase phi node from this set
/// if it is simplified.
class SimplificationTracker {
}
};
-/// \brief A helper class for combining addressing modes.
+/// A helper class for combining addressing modes.
class AddressingModeCombiner {
typedef std::pair<Value *, BasicBlock *> ValueInBB;
typedef DenseMap<ValueInBB, Value *> FoldAddrToValueMapping;
AddressingModeCombiner(const SimplifyQuery &_SQ, ValueInBB OriginalValue)
: CommonType(nullptr), SQ(_SQ), Original(OriginalValue) {}
- /// \brief Get the combined AddrMode
+ /// Get the combined AddrMode
const ExtAddrMode &getAddrMode() const {
return AddrModes[0];
}
- /// \brief Add a new AddrMode if it's compatible with the AddrModes we already
+ /// Add a new AddrMode if it's compatible with the AddrModes we already
/// have.
/// \return True iff we succeeded in doing so.
bool addNewAddrMode(ExtAddrMode &NewAddrMode) {
return CanHandle;
}
- /// \brief Combine the addressing modes we've collected into a single
+ /// Combine the addressing modes we've collected into a single
/// addressing mode.
/// \return True iff we successfully combined them or we only had one so
/// didn't need to combine them anyway.
}
private:
- /// \brief Initialize Map with anchor values. For address seen in some BB
+ /// Initialize Map with anchor values. For address seen in some BB
/// we set the value of different field saw in this address.
/// If address is not an instruction than basic block is set to null.
/// At the same time we find a common type for different field we will
return true;
}
- /// \brief We have mapping between value A and basic block where value A
+ /// We have mapping between value A and basic block where value A
/// seen to other value B where B was a field in addressing mode represented
/// by A. Also we have an original value C representin an address in some
/// basic block. Traversing from C through phi and selects we ended up with
return Result;
}
- /// \brief Try to match PHI node to Candidate.
+ /// Try to match PHI node to Candidate.
/// Matcher tracks the matched Phi nodes.
bool MatchPhiNode(PHINode *PHI, PHINode *Candidate,
SmallSetVector<PHIPair, 8> &Matcher,
return true;
}
- /// \brief For the given set of PHI nodes (in the SimplificationTracker) try
+ /// For the given set of PHI nodes (in the SimplificationTracker) try
/// to find their equivalents.
/// Returns false if this matching fails and creation of new Phi is disabled.
bool MatchPhiSet(SimplificationTracker &ST, bool AllowNewPhiNodes,
}
return true;
}
- /// \brief Fill the placeholder with values from predecessors and simplify it.
+ /// Fill the placeholder with values from predecessors and simplify it.
void FillPlaceholders(FoldAddrToValueMapping &Map,
SmallVectorImpl<ValueInBB> &TraverseOrder,
SimplificationTracker &ST) {
}
}
-/// \brief Check whether or not \p Val is a legal instruction for \p TLI.
+/// Check whether or not \p Val is a legal instruction for \p TLI.
/// \note \p Val is assumed to be the product of some type promotion.
/// Therefore if \p Val has an undefined state in \p TLI, this is assumed
/// to be legal, as the non-promoted value would have had the same state.
namespace {
-/// \brief Hepler class to perform type promotion.
+/// Hepler class to perform type promotion.
class TypePromotionHelper {
- /// \brief Utility function to check whether or not a sign or zero extension
+ /// Utility function to check whether or not a sign or zero extension
/// of \p Inst with \p ConsideredExtType can be moved through \p Inst by
/// either using the operands of \p Inst or promoting \p Inst.
/// The type of the extension is defined by \p IsSExt.
static bool canGetThrough(const Instruction *Inst, Type *ConsideredExtType,
const InstrToOrigTy &PromotedInsts, bool IsSExt);
- /// \brief Utility function to determine if \p OpIdx should be promoted when
+ /// Utility function to determine if \p OpIdx should be promoted when
/// promoting \p Inst.
static bool shouldExtOperand(const Instruction *Inst, int OpIdx) {
return !(isa<SelectInst>(Inst) && OpIdx == 0);
}
- /// \brief Utility function to promote the operand of \p Ext when this
+ /// Utility function to promote the operand of \p Ext when this
/// operand is a promotable trunc or sext or zext.
/// \p PromotedInsts maps the instructions to their type before promotion.
/// \p CreatedInstsCost[out] contains the cost of all instructions
SmallVectorImpl<Instruction *> *Exts,
SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI);
- /// \brief Utility function to promote the operand of \p Ext when this
+ /// Utility function to promote the operand of \p Ext when this
/// operand is promotable and is not a supported trunc or sext.
/// \p PromotedInsts maps the instructions to their type before promotion.
/// \p CreatedInstsCost[out] contains the cost of all the instructions
SmallVectorImpl<Instruction *> *Truncs,
const TargetLowering &TLI);
- /// \brief Given a sign/zero extend instruction \p Ext, return the approriate
+ /// Given a sign/zero extend instruction \p Ext, return the approriate
/// action to promote the operand of \p Ext instead of using Ext.
/// \return NULL if no promotable action is possible with the current
/// sign extension.
return MadeChange;
}
-/// \brief Check if all the uses of \p Val are equivalent (or free) zero or
+/// Check if all the uses of \p Val are equivalent (or free) zero or
/// sign extensions.
static bool hasSameExtUse(Value *Val, const TargetLowering &TLI) {
assert(!Val->use_empty() && "Input must have at least one use");
return true;
}
-/// \brief Try to speculatively promote extensions in \p Exts and continue
+/// Try to speculatively promote extensions in \p Exts and continue
/// promoting through newly promoted operands recursively as far as doing so is
/// profitable. Save extensions profitably moved up, in \p ProfitablyMovedExts.
/// When some promotion happened, \p TPT contains the proper state to revert
namespace {
-/// \brief Helper class to promote a scalar operation to a vector one.
+/// Helper class to promote a scalar operation to a vector one.
/// This class is used to move downward extractelement transition.
/// E.g.,
/// a = vector_op <2 x i32>
/// Instruction that will be combined with the transition.
Instruction *CombineInst = nullptr;
- /// \brief The instruction that represents the current end of the transition.
+ /// The instruction that represents the current end of the transition.
/// Since we are faking the promotion until we reach the end of the chain
/// of computation, we need a way to get the current end of the transition.
Instruction *getEndOfTransition() const {
return InstsToBePromoted.back();
}
- /// \brief Return the index of the original value in the transition.
+ /// Return the index of the original value in the transition.
/// E.g., for "extractelement <2 x i32> c, i32 1" the original value,
/// c, is at index 0.
unsigned getTransitionOriginalValueIdx() const {
return 0;
}
- /// \brief Return the index of the index in the transition.
+ /// Return the index of the index in the transition.
/// E.g., for "extractelement <2 x i32> c, i32 0" the index
/// is at index 1.
unsigned getTransitionIdx() const {
return 1;
}
- /// \brief Get the type of the transition.
+ /// Get the type of the transition.
/// This is the type of the original value.
/// E.g., for "extractelement <2 x i32> c, i32 1" the type of the
/// transition is <2 x i32>.
return Transition->getOperand(getTransitionOriginalValueIdx())->getType();
}
- /// \brief Promote \p ToBePromoted by moving \p Def downward through.
+ /// Promote \p ToBePromoted by moving \p Def downward through.
/// I.e., we have the following sequence:
/// Def = Transition <ty1> a to <ty2>
/// b = ToBePromoted <ty2> Def, ...
/// Def = Transition <ty1> ToBePromoted to <ty2>
void promoteImpl(Instruction *ToBePromoted);
- /// \brief Check whether or not it is profitable to promote all the
+ /// Check whether or not it is profitable to promote all the
/// instructions enqueued to be promoted.
bool isProfitableToPromote() {
Value *ValIdx = Transition->getOperand(getTransitionOriginalValueIdx());
return ScalarCost > VectorCost;
}
- /// \brief Generate a constant vector with \p Val with the same
+ /// Generate a constant vector with \p Val with the same
/// number of elements as the transition.
/// \p UseSplat defines whether or not \p Val should be replicated
/// across the whole vector.
return ConstantVector::get(ConstVec);
}
- /// \brief Check if promoting to a vector type an operand at \p OperandIdx
+ /// Check if promoting to a vector type an operand at \p OperandIdx
/// in \p Use can trigger undefined behavior.
static bool canCauseUndefinedBehavior(const Instruction *Use,
unsigned OperandIdx) {
assert(Transition && "Do not know how to promote null");
}
- /// \brief Check if we can promote \p ToBePromoted to \p Type.
+ /// Check if we can promote \p ToBePromoted to \p Type.
bool canPromote(const Instruction *ToBePromoted) const {
// We could support CastInst too.
return isa<BinaryOperator>(ToBePromoted);
}
- /// \brief Check if it is profitable to promote \p ToBePromoted
+ /// Check if it is profitable to promote \p ToBePromoted
/// by moving downward the transition through.
bool shouldPromote(const Instruction *ToBePromoted) const {
// Promote only if all the operands can be statically expanded.
ISDOpcode, TLI.getValueType(DL, getTransitionType(), true));
}
- /// \brief Check whether or not \p Use can be combined
+ /// Check whether or not \p Use can be combined
/// with the transition.
/// I.e., is it possible to do Use(Transition) => AnotherUse?
bool canCombine(const Instruction *Use) { return isa<StoreInst>(Use); }
- /// \brief Record \p ToBePromoted as part of the chain to be promoted.
+ /// Record \p ToBePromoted as part of the chain to be promoted.
void enqueueForPromotion(Instruction *ToBePromoted) {
InstsToBePromoted.push_back(ToBePromoted);
}
- /// \brief Set the instruction that will be combined with the transition.
+ /// Set the instruction that will be combined with the transition.
void recordCombineInstruction(Instruction *ToBeCombined) {
assert(canCombine(ToBeCombined) && "Unsupported instruction to combine");
CombineInst = ToBeCombined;
}
- /// \brief Promote all the instructions enqueued for promotion if it is
+ /// Promote all the instructions enqueued for promotion if it is
/// is profitable.
/// \return True if the promotion happened, false otherwise.
bool promote() {
return MadeChange;
}
-/// \brief Scale down both weights to fit into uint32_t.
+/// Scale down both weights to fit into uint32_t.
static void scaleWeights(uint64_t &NewTrue, uint64_t &NewFalse) {
uint64_t NewMax = (NewTrue > NewFalse) ? NewTrue : NewFalse;
uint32_t Scale = (NewMax / std::numeric_limits<uint32_t>::max()) + 1;
NewFalse = NewFalse / Scale;
}
-/// \brief Some targets prefer to split a conditional branch like:
+/// Some targets prefer to split a conditional branch like:
/// \code
/// %0 = icmp ne i32 %a, 0
/// %1 = icmp ne i32 %b, 0
bool doMerge(SmallVectorImpl<GlobalVariable*> &Globals,
Module &M, bool isConst, unsigned AddrSpace) const;
- /// \brief Merge everything in \p Globals for which the corresponding bit
+ /// Merge everything in \p Globals for which the corresponding bit
/// in \p GlobalSet is set.
bool doMerge(const SmallVectorImpl<GlobalVariable *> &Globals,
const BitVector &GlobalSet, Module &M, bool isConst,
unsigned AddrSpace) const;
- /// \brief Check if the given variable has been identified as must keep
+ /// Check if the given variable has been identified as must keep
/// \pre setMustKeepGlobalVariables must have been called on the Module that
/// contains GV
bool isMustKeepGlobalVariable(const GlobalVariable *GV) const {
/// The maximum supported interleave factor.
unsigned MaxFactor;
- /// \brief Transform an interleaved load into target specific intrinsics.
+ /// Transform an interleaved load into target specific intrinsics.
bool lowerInterleavedLoad(LoadInst *LI,
SmallVector<Instruction *, 32> &DeadInsts);
- /// \brief Transform an interleaved store into target specific intrinsics.
+ /// Transform an interleaved store into target specific intrinsics.
bool lowerInterleavedStore(StoreInst *SI,
SmallVector<Instruction *, 32> &DeadInsts);
- /// \brief Returns true if the uses of an interleaved load by the
+ /// Returns true if the uses of an interleaved load by the
/// extractelement instructions in \p Extracts can be replaced by uses of the
/// shufflevector instructions in \p Shuffles instead. If so, the necessary
/// replacements are also performed.
return new InterleavedAccess();
}
-/// \brief Check if the mask is a DE-interleave mask of the given factor
+/// Check if the mask is a DE-interleave mask of the given factor
/// \p Factor like:
/// <Index, Index+Factor, ..., Index+(NumElts-1)*Factor>
static bool isDeInterleaveMaskOfFactor(ArrayRef<int> Mask, unsigned Factor,
return false;
}
-/// \brief Check if the mask is a DE-interleave mask for an interleaved load.
+/// Check if the mask is a DE-interleave mask for an interleaved load.
///
/// E.g. DE-interleave masks (Factor = 2) could be:
/// <0, 2, 4, 6> (mask of index 0 to extract even elements)
return false;
}
-/// \brief Check if the mask can be used in an interleaved store.
+/// Check if the mask can be used in an interleaved store.
//
/// It checks for a more general pattern than the RE-interleave mask.
/// I.e. <x, y, ... z, x+1, y+1, ...z+1, x+2, y+2, ...z+2, ...>
STATISTIC(NumInserted, "Number of DBG_VALUE instructions inserted");
-// \brief If @MI is a DBG_VALUE with debug value described by a defined
+// If @MI is a DBG_VALUE with debug value described by a defined
// register, returns the number of this register. In the other case, returns 0.
static unsigned isDbgValueDescribedByReg(const MachineInstr &MI) {
assert(MI.isDebugValue() && "expected a DBG_VALUE");
using namespace llvm;
-/// \brief Remove all registers from the set that get clobbered by the register
+/// Remove all registers from the set that get clobbered by the register
/// mask.
/// The clobbers set will be the list of live registers clobbered
/// by the regmask.
class BlockChain;
-/// \brief Type for our function-wide basic block -> block chain mapping.
+/// Type for our function-wide basic block -> block chain mapping.
using BlockToChainMapType = DenseMap<const MachineBasicBlock *, BlockChain *>;
-/// \brief A chain of blocks which will be laid out contiguously.
+/// A chain of blocks which will be laid out contiguously.
///
/// This is the datastructure representing a chain of consecutive blocks that
/// are profitable to layout together in order to maximize fallthrough
/// them. They participate in a block-to-chain mapping, which is updated
/// automatically as chains are merged together.
class BlockChain {
- /// \brief The sequence of blocks belonging to this chain.
+ /// The sequence of blocks belonging to this chain.
///
/// This is the sequence of blocks for a particular chain. These will be laid
/// out in-order within the function.
SmallVector<MachineBasicBlock *, 4> Blocks;
- /// \brief A handle to the function-wide basic block to block chain mapping.
+ /// A handle to the function-wide basic block to block chain mapping.
///
/// This is retained in each block chain to simplify the computation of child
/// block chains for SCC-formation and iteration. We store the edges to child
BlockToChainMapType &BlockToChain;
public:
- /// \brief Construct a new BlockChain.
+ /// Construct a new BlockChain.
///
/// This builds a new block chain representing a single basic block in the
/// function. It also registers itself as the chain that block participates
BlockToChain[BB] = this;
}
- /// \brief Iterator over blocks within the chain.
+ /// Iterator over blocks within the chain.
using iterator = SmallVectorImpl<MachineBasicBlock *>::iterator;
using const_iterator = SmallVectorImpl<MachineBasicBlock *>::const_iterator;
- /// \brief Beginning of blocks within the chain.
+ /// Beginning of blocks within the chain.
iterator begin() { return Blocks.begin(); }
const_iterator begin() const { return Blocks.begin(); }
- /// \brief End of blocks within the chain.
+ /// End of blocks within the chain.
iterator end() { return Blocks.end(); }
const_iterator end() const { return Blocks.end(); }
return false;
}
- /// \brief Merge a block chain into this one.
+ /// Merge a block chain into this one.
///
/// This routine merges a block chain into this one. It takes care of forming
/// a contiguous sequence of basic blocks, updating the edge list, and
}
#ifndef NDEBUG
- /// \brief Dump the blocks in this chain.
+ /// Dump the blocks in this chain.
LLVM_DUMP_METHOD void dump() {
for (MachineBasicBlock *MBB : *this)
MBB->dump();
}
#endif // NDEBUG
- /// \brief Count of predecessors of any block within the chain which have not
+ /// Count of predecessors of any block within the chain which have not
/// yet been scheduled. In general, we will delay scheduling this chain
/// until those predecessors are scheduled (or we find a sufficiently good
/// reason to override this heuristic.) Note that when forming loop chains,
};
class MachineBlockPlacement : public MachineFunctionPass {
- /// \brief A type for a block filter set.
+ /// A type for a block filter set.
using BlockFilterSet = SmallSetVector<const MachineBasicBlock *, 16>;
/// Pair struct containing basic block and taildup profitiability
MachineBasicBlock *Dest;
};
- /// \brief work lists of blocks that are ready to be laid out
+ /// work lists of blocks that are ready to be laid out
SmallVector<MachineBasicBlock *, 16> BlockWorkList;
SmallVector<MachineBasicBlock *, 16> EHPadWorkList;
/// Edges that have already been computed as optimal.
DenseMap<const MachineBasicBlock *, BlockAndTailDupResult> ComputedEdges;
- /// \brief Machine Function
+ /// Machine Function
MachineFunction *F;
- /// \brief A handle to the branch probability pass.
+ /// A handle to the branch probability pass.
const MachineBranchProbabilityInfo *MBPI;
- /// \brief A handle to the function-wide block frequency pass.
+ /// A handle to the function-wide block frequency pass.
std::unique_ptr<BranchFolder::MBFIWrapper> MBFI;
- /// \brief A handle to the loop info.
+ /// A handle to the loop info.
MachineLoopInfo *MLI;
- /// \brief Preferred loop exit.
+ /// Preferred loop exit.
/// Member variable for convenience. It may be removed by duplication deep
/// in the call stack.
MachineBasicBlock *PreferredLoopExit;
- /// \brief A handle to the target's instruction info.
+ /// A handle to the target's instruction info.
const TargetInstrInfo *TII;
- /// \brief A handle to the target's lowering info.
+ /// A handle to the target's lowering info.
const TargetLoweringBase *TLI;
- /// \brief A handle to the post dominator tree.
+ /// A handle to the post dominator tree.
MachinePostDominatorTree *MPDT;
- /// \brief Duplicator used to duplicate tails during placement.
+ /// Duplicator used to duplicate tails during placement.
///
/// Placement decisions can open up new tail duplication opportunities, but
/// since tail duplication affects placement decisions of later blocks, it
/// must be done inline.
TailDuplicator TailDup;
- /// \brief Allocator and owner of BlockChain structures.
+ /// Allocator and owner of BlockChain structures.
///
/// We build BlockChains lazily while processing the loop structure of
/// a function. To reduce malloc traffic, we allocate them using this
/// the chains.
SpecificBumpPtrAllocator<BlockChain> ChainAllocator;
- /// \brief Function wide BasicBlock to BlockChain mapping.
+ /// Function wide BasicBlock to BlockChain mapping.
///
/// This mapping allows efficiently moving from any given basic block to the
/// BlockChain it participates in, if any. We use it to, among other things,
MachineFunction::iterator &PrevUnplacedBlockIt,
const BlockFilterSet *BlockFilter);
- /// \brief Add a basic block to the work list if it is appropriate.
+ /// Add a basic block to the work list if it is appropriate.
///
/// If the optional parameter BlockFilter is provided, only MBB
/// present in the set will be added to the worklist. If nullptr
"Branch Probability Basic Block Placement", false, false)
#ifndef NDEBUG
-/// \brief Helper to print the name of a MBB.
+/// Helper to print the name of a MBB.
///
/// Only used by debug logging.
static std::string getBlockName(const MachineBasicBlock *BB) {
}
#endif
-/// \brief Mark a chain's successors as having one fewer preds.
+/// Mark a chain's successors as having one fewer preds.
///
/// When a chain is being merged into the "placed" chain, this routine will
/// quickly walk the successors of each block in the chain and mark them as
}
}
-/// \brief Mark a single block's successors as having one fewer preds.
+/// Mark a single block's successors as having one fewer preds.
///
/// Under normal circumstances, this is only called by markChainSuccessors,
/// but if a block that was to be placed is completely tail-duplicated away,
return false;
}
-/// \brief Select the best successor for a block.
+/// Select the best successor for a block.
///
/// This looks across all successors of a particular block and attempts to
/// select the "best" one to be the layout successor. It only considers direct
return BestSucc;
}
-/// \brief Select the best block from a worklist.
+/// Select the best block from a worklist.
///
/// This looks through the provided worklist as a list of candidate basic
/// blocks and select the most profitable one to place. The definition of
return BestBlock;
}
-/// \brief Retrieve the first unplaced basic block.
+/// Retrieve the first unplaced basic block.
///
/// This routine is called when we are unable to use the CFG to walk through
/// all of the basic blocks and form a chain due to unnatural loops in the CFG.
<< getBlockName(*Chain.begin()) << "\n");
}
-/// \brief Find the best loop top block for layout.
+/// Find the best loop top block for layout.
///
/// Look for a block which is strictly better than the loop header for laying
/// out at the top of the loop. This looks for one and only one pattern:
return BestPred;
}
-/// \brief Find the best loop exiting block for layout.
+/// Find the best loop exiting block for layout.
///
/// This routine implements the logic to analyze the loop looking for the best
/// block to layout at the top of the loop. Typically this is done to maximize
return ExitingBB;
}
-/// \brief Attempt to rotate an exiting block to the bottom of the loop.
+/// Attempt to rotate an exiting block to the bottom of the loop.
///
/// Once we have built a chain, try to rotate it to line up the hot exit block
/// with fallthrough out of the loop if doing so doesn't introduce unnecessary
std::rotate(LoopChain.begin(), std::next(ExitIt), LoopChain.end());
}
-/// \brief Attempt to rotate a loop based on profile data to reduce branch cost.
+/// Attempt to rotate a loop based on profile data to reduce branch cost.
///
/// With profile data, we can determine the cost in terms of missed fall through
/// opportunities when rotating a loop chain and select the best rotation.
}
}
-/// \brief Collect blocks in the given loop that are to be placed.
+/// Collect blocks in the given loop that are to be placed.
///
/// When profile data is available, exclude cold blocks from the returned set;
/// otherwise, collect all blocks in the loop.
return LoopBlockSet;
}
-/// \brief Forms basic block chains from the natural loop structures.
+/// Forms basic block chains from the natural loop structures.
///
/// These chains are designed to preserve the existing *structure* of the code
/// as much as possible. We can then stitch the chains together in a way which
namespace {
-/// \brief A pass to compute block placement statistics.
+/// A pass to compute block placement statistics.
///
/// A separate pass to compute interesting statistics for evaluating block
/// placement. This is separate from the actual placement pass so that they can
/// be computed in the absence of any placement transformations or when using
/// alternative placement strategies.
class MachineBlockPlacementStats : public MachineFunctionPass {
- /// \brief A handle to the branch probability pass.
+ /// A handle to the branch probability pass.
const MachineBranchProbabilityInfo *MBPI;
- /// \brief A handle to the function-wide block frequency pass.
+ /// A handle to the function-wide block frequency pass.
const MachineBlockFrequencyInfo *MBFI;
public:
namespace {
-/// \brief An individual sequence of instructions to be replaced with a call to
+/// An individual sequence of instructions to be replaced with a call to
/// an outlined function.
struct Candidate {
private:
/// Set to false if the candidate overlapped with another candidate.
bool InCandidateList = true;
- /// \brief The index of this \p Candidate's \p OutlinedFunction in the list of
+ /// The index of this \p Candidate's \p OutlinedFunction in the list of
/// \p OutlinedFunctions.
unsigned FunctionIdx;
// Return the end index of this candidate.
unsigned getEndIdx() const { return StartIdx + Len - 1; }
- /// \brief The number of instructions that would be saved by outlining every
+ /// The number of instructions that would be saved by outlining every
/// candidate of this type.
///
/// This is a fixed value which is not updated during the candidate pruning
Candidate() {}
- /// \brief Used to ensure that \p Candidates are outlined in an order that
+ /// Used to ensure that \p Candidates are outlined in an order that
/// preserves the start and end indices of other \p Candidates.
bool operator<(const Candidate &RHS) const {
return getStartIdx() > RHS.getStartIdx();
}
};
-/// \brief The information necessary to create an outlined function for some
+/// The information necessary to create an outlined function for some
/// class of candidate.
struct OutlinedFunction {
/// A number assigned to this function which appears at the end of its name.
unsigned Name;
- /// \brief The sequence of integers corresponding to the instructions in this
+ /// The sequence of integers corresponding to the instructions in this
/// function.
std::vector<unsigned> Sequence;
return getOccurrenceCount();
}
- /// \brief Return the number of instructions it would take to outline this
+ /// Return the number of instructions it would take to outline this
/// function.
unsigned getOutliningCost() {
return (OccurrenceCount * MInfo.CallOverhead) + Sequence.size() +
MInfo.FrameOverhead;
}
- /// \brief Return the number of instructions that would be saved by outlining
+ /// Return the number of instructions that would be saved by outlining
/// this function.
unsigned getBenefit() {
unsigned NotOutlinedCost = OccurrenceCount * Sequence.size();
/// For all other nodes, this is ignored.
unsigned SuffixIdx = EmptyIdx;
- /// \brief For internal nodes, a pointer to the internal node representing
+ /// For internal nodes, a pointer to the internal node representing
/// the same sequence with the first character chopped off.
///
/// This acts as a shortcut in Ukkonen's algorithm. One of the things that
/// The end index of each leaf in the tree.
unsigned LeafEndIdx = -1;
- /// \brief Helper struct which keeps track of the next insertion point in
+ /// Helper struct which keeps track of the next insertion point in
/// Ukkonen's algorithm.
struct ActiveState {
/// The next node to insert at.
unsigned Len = 0;
};
- /// \brief The point the next insertion will take place at in the
+ /// The point the next insertion will take place at in the
/// construction algorithm.
ActiveState Active;
return N;
}
- /// \brief Set the suffix indices of the leaves to the start indices of their
+ /// Set the suffix indices of the leaves to the start indices of their
/// respective suffixes. Also stores each leaf in \p LeafVector at its
/// respective suffix index.
///
}
}
- /// \brief Construct the suffix tree for the prefix of the input ending at
+ /// Construct the suffix tree for the prefix of the input ending at
/// \p EndIdx.
///
/// Used to construct the full suffix tree iteratively. At the end of each
}
};
-/// \brief Maps \p MachineInstrs to unsigned integers and stores the mappings.
+/// Maps \p MachineInstrs to unsigned integers and stores the mappings.
struct InstructionMapper {
- /// \brief The next available integer to assign to a \p MachineInstr that
+ /// The next available integer to assign to a \p MachineInstr that
/// cannot be outlined.
///
/// Set to -3 for compatability with \p DenseMapInfo<unsigned>.
unsigned IllegalInstrNumber = -3;
- /// \brief The next available integer to assign to a \p MachineInstr that can
+ /// The next available integer to assign to a \p MachineInstr that can
/// be outlined.
unsigned LegalInstrNumber = 0;
/// The vector of unsigned integers that the module is mapped to.
std::vector<unsigned> UnsignedVec;
- /// \brief Stores the location of the instruction associated with the integer
+ /// Stores the location of the instruction associated with the integer
/// at index i in \p UnsignedVec for each index i.
std::vector<MachineBasicBlock::iterator> InstrList;
- /// \brief Maps \p *It to a legal integer.
+ /// Maps \p *It to a legal integer.
///
/// Updates \p InstrList, \p UnsignedVec, \p InstructionIntegerMap,
/// \p IntegerInstructionMap, and \p LegalInstrNumber.
return MINumber;
}
- /// \brief Transforms a \p MachineBasicBlock into a \p vector of \p unsigneds
+ /// Transforms a \p MachineBasicBlock into a \p vector of \p unsigneds
/// and appends it to \p UnsignedVec and \p InstrList.
///
/// Two instructions are assigned the same integer if they are identical.
}
};
-/// \brief An interprocedural pass which finds repeated sequences of
+/// An interprocedural pass which finds repeated sequences of
/// instructions and replaces them with calls to functions.
///
/// Each instruction is mapped to an unsigned integer and placed in a string.
static char ID;
- /// \brief Set to true if the outliner should consider functions with
+ /// Set to true if the outliner should consider functions with
/// linkonceodr linkage.
bool OutlineFromLinkOnceODRs = false;
std::vector<std::shared_ptr<Candidate>> &CandidateList,
std::vector<OutlinedFunction> &FunctionList);
- /// \brief Replace the sequences of instructions represented by the
+ /// Replace the sequences of instructions represented by the
/// \p Candidates in \p CandidateList with calls to \p MachineFunctions
/// described in \p FunctionList.
///
/// Removes \p C from the candidate list, and updates its \p OutlinedFunction.
void prune(Candidate &C, std::vector<OutlinedFunction> &FunctionList);
- /// \brief Remove any overlapping candidates that weren't handled by the
+ /// Remove any overlapping candidates that weren't handled by the
/// suffix tree's pruning method.
///
/// Pruning from the suffix tree doesn't necessarily remove all overlaps.
namespace {
-/// \brief Post-process the DAG to create cluster edges between neighboring
+/// Post-process the DAG to create cluster edges between neighboring
/// loads or between neighboring stores.
class BaseMemOpClusterMutation : public ScheduleDAGMutation {
struct MemOpInfo {
}
}
-/// \brief Callback from DAG postProcessing to create cluster edges for loads.
+/// Callback from DAG postProcessing to create cluster edges for loads.
void BaseMemOpClusterMutation::apply(ScheduleDAGInstrs *DAGInstrs) {
ScheduleDAGMI *DAG = static_cast<ScheduleDAGMI*>(DAGInstrs);
namespace {
-/// \brief Post-process the DAG to create weak edges from all uses of a copy to
+/// Post-process the DAG to create weak edges from all uses of a copy to
/// the one use that defines the copy's source vreg, most likely an induction
/// variable increment.
class CopyConstrain : public ScheduleDAGMutation {
}
}
-/// \brief Callback from DAG postProcessing to create weak edges to encourage
+/// Callback from DAG postProcessing to create weak edges to encourage
/// copy elimination.
void CopyConstrain::apply(ScheduleDAGInstrs *DAGInstrs) {
ScheduleDAGMI *DAG = static_cast<ScheduleDAGMI*>(DAGInstrs);
namespace {
-/// \brief Order nodes by the ILP metric.
+/// Order nodes by the ILP metric.
struct ILPOrder {
const SchedDFSResult *DFSResult = nullptr;
const BitVector *ScheduledTrees = nullptr;
ILPOrder(bool MaxILP) : MaximizeILP(MaxILP) {}
- /// \brief Apply a less-than relation on node priority.
+ /// Apply a less-than relation on node priority.
///
/// (Return true if A comes after B in the Q.)
bool operator()(const SUnit *A, const SUnit *B) const {
}
};
-/// \brief Schedule based on the ILP metric.
+/// Schedule based on the ILP metric.
class ILPScheduler : public MachineSchedStrategy {
ScheduleDAGMILive *DAG = nullptr;
ILPOrder Cmp;
return SU;
}
- /// \brief Scheduler callback to notify that a new subtree is scheduled.
+ /// Scheduler callback to notify that a new subtree is scheduled.
void scheduleTree(unsigned SubtreeID) override {
std::make_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
}
MachineBasicBlock *From,
MachineBasicBlock *To);
- /// \brief Postpone the splitting of the given critical
+ /// Postpone the splitting of the given critical
/// edge (\p From, \p To).
///
/// We do not split the edges on the fly. Indeed, this invalidates
return SuccToSinkTo;
}
-/// \brief Return true if MI is likely to be usable as a memory operation by the
+/// Return true if MI is likely to be usable as a memory operation by the
/// implicit null check optimization.
///
/// This is a "best effort" heuristic, and should not be relied upon for
namespace {
-/// \brief Post-process the DAG to create cluster edges between instrs that may
+/// Post-process the DAG to create cluster edges between instrs that may
/// be fused by the processor into a single operation.
class MacroFusion : public ScheduleDAGMutation {
ShouldSchedulePredTy shouldScheduleAdjacent;
scheduleAdjacentImpl(*DAG, DAG->ExitSU);
}
-/// \brief Implement the fusion of instr pairs in the scheduling DAG,
+/// Implement the fusion of instr pairs in the scheduling DAG,
/// anchored at the instr in AnchorSU..
bool MacroFusion::scheduleAdjacentImpl(ScheduleDAGMI &DAG, SUnit &AnchorSU) {
const MachineInstr &AnchorMI = *AnchorSU.getInstr();
bool foldImmediate(MachineInstr &MI, SmallSet<unsigned, 4> &ImmDefRegs,
DenseMap<unsigned, MachineInstr*> &ImmDefMIs);
- /// \brief Finds recurrence cycles, but only ones that formulated around
+ /// Finds recurrence cycles, but only ones that formulated around
/// a def operand and a use operand that are tied. If there is a use
/// operand commutable with the tied use operand, find recurrence cycle
/// along that operand as well.
const SmallSet<unsigned, 2> &TargetReg,
RecurrenceCycle &RC);
- /// \brief If copy instruction \p MI is a virtual register copy, track it in
+ /// If copy instruction \p MI is a virtual register copy, track it in
/// the set \p CopySrcRegs and \p CopyMIs. If this virtual register was
/// previously seen as a copy, replace the uses of this copy with the
/// previously seen copy's destination register.
/// Is the register \p Reg a non-allocatable physical register?
bool isNAPhysCopy(unsigned Reg);
- /// \brief If copy instruction \p MI is a non-allocatable virtual<->physical
+ /// If copy instruction \p MI is a non-allocatable virtual<->physical
/// register copy, track it in the \p NAPhysToVirtMIs map. If this
/// non-allocatable physical register was previously copied to a virtual
/// registered and hasn't been clobbered, the virt->phys copy can be
bool isLoadFoldable(MachineInstr &MI,
SmallSet<unsigned, 16> &FoldAsLoadDefCandidates);
- /// \brief Check whether \p MI is understood by the register coalescer
+ /// Check whether \p MI is understood by the register coalescer
/// but may require some rewriting.
bool isCoalescableCopy(const MachineInstr &MI) {
// SubregToRegs are not interesting, because they are already register
MI.isExtractSubreg()));
}
- /// \brief Check whether \p MI is a copy like instruction that is
+ /// Check whether \p MI is a copy like instruction that is
/// not recognized by the register coalescer.
bool isUncoalescableCopy(const MachineInstr &MI) {
return MI.isBitcast() ||
}
};
- /// \brief Helper class to track the possible sources of a value defined by
+ /// Helper class to track the possible sources of a value defined by
/// a (chain of) copy related instructions.
/// Given a definition (instruction and definition index), this class
/// follows the use-def chain to find successive suitable sources.
}
}
- /// \brief Following the use-def chain, get the next available source
+ /// Following the use-def chain, get the next available source
/// for the tracked value.
/// \return A ValueTrackerResult containing a set of registers
/// and sub registers with tracked values. A ValueTrackerResult with
return TII->optimizeCondBranch(MI);
}
-/// \brief Try to find the next source that share the same register file
+/// Try to find the next source that share the same register file
/// for the value defined by \p Reg and \p SubReg.
/// When true is returned, the \p RewriteMap can be used by the client to
/// retrieve all Def -> Use along the way up to the next source. Any found
return CurSrcPair.Reg != Reg;
}
-/// \brief Insert a PHI instruction with incoming edges \p SrcRegs that are
+/// Insert a PHI instruction with incoming edges \p SrcRegs that are
/// guaranteed to have the same register class. This is necessary whenever we
/// successfully traverse a PHI instruction and find suitable sources coming
/// from its edges. By inserting a new PHI, we provide a rewritten PHI def
Rewriter(MachineInstr &CopyLike) : CopyLike(CopyLike) {}
virtual ~Rewriter() {}
- /// \brief Get the next rewritable source (SrcReg, SrcSubReg) and
+ /// Get the next rewritable source (SrcReg, SrcSubReg) and
/// the related value that it affects (DstReg, DstSubReg).
/// A source is considered rewritable if its register class and the
/// register class of the related DstReg may not be register
}
};
-/// \brief Helper class to rewrite uncoalescable copy like instructions
+/// Helper class to rewrite uncoalescable copy like instructions
/// into new COPY (coalescable friendly) instructions.
class UncoalescableRewriter : public Rewriter {
unsigned NumDefs; ///< Number of defs in the bitcast.
}
}
-/// \brief Given a \p Def.Reg and Def.SubReg pair, use \p RewriteMap to find
+/// Given a \p Def.Reg and Def.SubReg pair, use \p RewriteMap to find
/// the new source to use for rewrite. If \p HandleMultipleSources is true and
/// multiple sources for a given \p Def are found along the way, we found a
/// PHI instructions that needs to be rewritten.
return Changed;
}
-/// \brief Rewrite the source found through \p Def, by using the \p RewriteMap
+/// Rewrite the source found through \p Def, by using the \p RewriteMap
/// and create a new COPY instruction. More info about RewriteMap in
/// PeepholeOptimizer::findNextSource. Right now this is only used to handle
/// Uncoalescable copies, since they are copy like instructions that aren't
return *NewCopy;
}
-/// \brief Optimize copy-like instructions to create
+/// Optimize copy-like instructions to create
/// register coalescer friendly instruction.
/// The optimization tries to kill-off the \p MI by looking
/// through a chain of copies to find a source that has a compatible
}
}
-/// \brief Return the cost of spilling clearing out PhysReg and aliases so it is
+/// Return the cost of spilling clearing out PhysReg and aliases so it is
/// free for allocation. Returns 0 when PhysReg is free or disabled with all
/// aliases disabled - it can be allocated directly.
/// \returns spillImpossible when PhysReg or an alias can't be spilled.
return Cost;
}
-/// \brief This method updates local state so that we know that PhysReg is the
+/// This method updates local state so that we know that PhysReg is the
/// proper container for VirtReg now. The physical register must not be used
/// for anything else when this is called.
void RegAllocFast::assignVirtToPhysReg(LiveReg &LR, MCPhysReg PhysReg) {
EvicteeInfo Evictees;
public:
- /// \brief Clear all eviction information.
+ /// Clear all eviction information.
void clear() { Evictees.clear(); }
- /// \brief Clear eviction information for the given evictee Vreg.
+ /// Clear eviction information for the given evictee Vreg.
/// E.g. when Vreg get's a new allocation, the old eviction info is no
/// longer relevant.
/// \param Evictee The evictee Vreg for whom we want to clear collected
/// eviction info.
void clearEvicteeInfo(unsigned Evictee) { Evictees.erase(Evictee); }
- /// \brief Track new eviction.
+ /// Track new eviction.
/// The Evictor vreg has evicted the Evictee vreg from Physreg.
/// \praram PhysReg The phisical register Evictee was evicted from.
/// \praram Evictor The evictor Vreg that evicted Evictee.
return true;
}
-/// \brief Return true if all interferences between VirtReg and PhysReg between
+/// Return true if all interferences between VirtReg and PhysReg between
/// Start and End can be evicted.
///
/// \param VirtReg Live range that is about to be assigned.
return true;
}
-/// \brief Return tthe physical register that will be best
+/// Return tthe physical register that will be best
/// candidate for eviction by a local split interval that will be created
/// between Start and End.
///
return Cost;
}
-/// \brief Check if splitting Evictee will create a local split interval in
+/// Check if splitting Evictee will create a local split interval in
/// basic block number BBNumber that may cause a bad eviction chain. This is
/// intended to prevent bad eviction sequences like:
/// movl %ebp, 8(%esp) # 4-byte Spill
return true;
}
-/// \brief Check if splitting VirtRegToSplit will create a local split interval
+/// Check if splitting VirtRegToSplit will create a local split interval
/// in basic block number BBNumber that may cause a spill.
///
/// \param VirtRegToSplit The register considered to be split.
CSRCost = CSRCost.getFrequency() * (ActualEntry / FixedEntry);
}
-/// \brief Collect the hint info for \p Reg.
+/// Collect the hint info for \p Reg.
/// The results are stored into \p Out.
/// \p Out is not cleared before being populated.
void RAGreedy::collectHintInfo(unsigned Reg, HintsInfo &Out) {
}
}
-/// \brief Using the given \p List, compute the cost of the broken hints if
+/// Using the given \p List, compute the cost of the broken hints if
/// \p PhysReg was used.
/// \return The cost of \p List for \p PhysReg.
BlockFrequency RAGreedy::getBrokenHintFreq(const HintsInfo &List,
return Cost;
}
-/// \brief Using the register assigned to \p VirtReg, try to recolor
+/// Using the register assigned to \p VirtReg, try to recolor
/// all the live ranges that are copy-related with \p VirtReg.
/// The recoloring is then propagated to all the live-ranges that have
/// been recolored and so on, until no more copies can be coalesced or
} while (!RecoloringCandidates.empty());
}
-/// \brief Try to recolor broken hints.
+/// Try to recolor broken hints.
/// Broken hints may be repaired by recoloring when an evicted variable
/// freed up a register for a larger live-range.
/// Consider the following example:
/// always available for the remat of all the siblings of the original reg.
SmallPtrSet<MachineInstr *, 32> DeadRemats;
- /// \brief Finds the initial set of vreg intervals to allocate.
+ /// Finds the initial set of vreg intervals to allocate.
void findVRegIntervalsToAlloc(const MachineFunction &MF, LiveIntervals &LIS);
- /// \brief Constructs an initial graph.
+ /// Constructs an initial graph.
void initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, Spiller &VRegSpiller);
- /// \brief Spill the given VReg.
+ /// Spill the given VReg.
void spillVReg(unsigned VReg, SmallVectorImpl<unsigned> &NewIntervals,
MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
Spiller &VRegSpiller);
- /// \brief Given a solved PBQP problem maps this solution back to a register
+ /// Given a solved PBQP problem maps this solution back to a register
/// assignment.
bool mapPBQPToRegAlloc(const PBQPRAGraph &G,
const PBQP::Solution &Solution,
VirtRegMap &VRM,
Spiller &VRegSpiller);
- /// \brief Postprocessing before final spilling. Sets basic block "live in"
+ /// Postprocessing before final spilling. Sets basic block "live in"
/// variables.
void finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS,
VirtRegMap &VRM) const;
/// checked for smaller live intervals.
bool ShrinkMainRange;
- /// \brief True if the coalescer should aggressively coalesce global copies
+ /// True if the coalescer should aggressively coalesce global copies
/// in favor of keeping local copies.
bool JoinGlobalCopies;
- /// \brief True if the coalescer should aggressively coalesce fall-thru
+ /// True if the coalescer should aggressively coalesce fall-thru
/// blocks exclusively containing copies.
bool JoinSplitEdges;
/// Split unrelated subregister components and rename them to new vregs.
bool renameComponents(LiveInterval &LI) const;
- /// \brief Build a vector of SubRange infos and a union find set of
+ /// Build a vector of SubRange infos and a union find set of
/// equivalence classes.
/// Returns true if more than 1 equivalence class was found.
bool findComponents(IntEqClasses &Classes,
SmallVectorImpl<SubRangeInfo> &SubRangeInfos,
LiveInterval &LI) const;
- /// \brief Distribute the LiveInterval segments into the new LiveIntervals
+ /// Distribute the LiveInterval segments into the new LiveIntervals
/// belonging to their class.
void distribute(const IntEqClasses &Classes,
const SmallVectorImpl<SubRangeInfo> &SubRangeInfos,
const SmallVectorImpl<LiveInterval*> &Intervals) const;
- /// \brief Constructs main liverange and add missing undef+dead flags.
+ /// Constructs main liverange and add missing undef+dead flags.
void computeMainRangesFixFlags(const IntEqClasses &Classes,
const SmallVectorImpl<SubRangeInfo> &SubRangeInfos,
const SmallVectorImpl<LiveInterval*> &Intervals) const;
/// might expect to appear on the stack on most common targets.
enum { StackAlignment = 16 };
- /// \brief Return the value of the stack canary.
+ /// Return the value of the stack canary.
Value *getStackGuard(IRBuilder<> &IRB, Function &F);
- /// \brief Load stack guard from the frame and check if it has changed.
+ /// Load stack guard from the frame and check if it has changed.
void checkStackGuard(IRBuilder<> &IRB, Function &F, ReturnInst &RI,
AllocaInst *StackGuardSlot, Value *StackGuard);
- /// \brief Find all static allocas, dynamic allocas, return instructions and
+ /// Find all static allocas, dynamic allocas, return instructions and
/// stack restore points (exception unwind blocks and setjmp calls) in the
/// given function and append them to the respective vectors.
void findInsts(Function &F, SmallVectorImpl<AllocaInst *> &StaticAllocas,
SmallVectorImpl<ReturnInst *> &Returns,
SmallVectorImpl<Instruction *> &StackRestorePoints);
- /// \brief Calculate the allocation size of a given alloca. Returns 0 if the
+ /// Calculate the allocation size of a given alloca. Returns 0 if the
/// size can not be statically determined.
uint64_t getStaticAllocaAllocationSize(const AllocaInst* AI);
- /// \brief Allocate space for all static allocas in \p StaticAllocas,
+ /// Allocate space for all static allocas in \p StaticAllocas,
/// replace allocas with pointers into the unsafe stack and generate code to
/// restore the stack pointer before all return instructions in \p Returns.
///
Instruction *BasePointer,
AllocaInst *StackGuardSlot);
- /// \brief Generate code to restore the stack after all stack restore points
+ /// Generate code to restore the stack after all stack restore points
/// in \p StackRestorePoints.
///
/// \returns A local variable in which to maintain the dynamic top of the
ArrayRef<Instruction *> StackRestorePoints,
Value *StaticTop, bool NeedDynamicTop);
- /// \brief Replace all allocas in \p DynamicAllocas with code to allocate
+ /// Replace all allocas in \p DynamicAllocas with code to allocate
/// space dynamically on the unsafe stack and store the dynamic unsafe stack
/// top to \p DynamicTop if non-null.
void moveDynamicAllocasToUnsafeStack(Function &F, Value *UnsafeStackPtr,
}
}
-/// \brief Adds register dependencies (data, anti, and output) from this SUnit
+/// Adds register dependencies (data, anti, and output) from this SUnit
/// to following instructions in the same scheduling region that depend the
/// physical register referenced at OperIdx.
void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) {
CurrentVRegDefs.insert(VReg2SUnit(Reg, LaneMask, SU));
}
-/// \brief Adds a register data dependency if the instruction that defines the
+/// Adds a register data dependency if the instruction that defines the
/// virtual register used at OperIdx is mapped to an SUnit. Add a register
/// antidependency from this SUnit to instructions that occur later in the same
/// scheduling region if they write the virtual register.
}
}
-/// \brief Creates an SUnit for each real instruction, numbered in top-down
+/// Creates an SUnit for each real instruction, numbered in top-down
/// topological order. The instruction order A < B, implies that no edge exists
/// from B to A.
///
RootSet[SU->NodeNum] = RData;
}
- /// \brief Called once for each tree edge after calling visitPostOrderNode on
+ /// Called once for each tree edge after calling visitPostOrderNode on
/// the predecessor. Increment the parent node's instruction count and
/// preemptively join this subtree to its parent's if it is small enough.
void visitPostorderEdge(const SDep &PredDep, const SUnit *Succ) {
bool LegalTypes = false;
bool ForCodeSize;
- /// \brief Worklist of all of the nodes that need to be simplified.
+ /// Worklist of all of the nodes that need to be simplified.
///
/// This must behave as a stack -- new nodes to process are pushed onto the
/// back and when processing we pop off of the back.
/// due to nodes being deleted from the underlying DAG.
SmallVector<SDNode *, 64> Worklist;
- /// \brief Mapping from an SDNode to its position on the worklist.
+ /// Mapping from an SDNode to its position on the worklist.
///
/// This is used to find and remove nodes from the worklist (by nulling
/// them) when they are deleted from the underlying DAG. It relies on
/// stable indices of nodes within the worklist.
DenseMap<SDNode *, unsigned> WorklistMap;
- /// \brief Set of nodes which have been combined (at least once).
+ /// Set of nodes which have been combined (at least once).
///
/// This is used to allow us to reliably add any operands of a DAG node
/// which have not yet been combined to the worklist.
SDValue SplitIndexingFromLoad(LoadSDNode *LD);
bool SliceUpLoad(SDNode *N);
- /// \brief Replace an ISD::EXTRACT_VECTOR_ELT of a load with a narrowed
+ /// Replace an ISD::EXTRACT_VECTOR_ELT of a load with a narrowed
/// load.
///
/// \param EVE ISD::EXTRACT_VECTOR_ELT to be replaced.
/// affected nodes are stored as a prefix in \p StoreNodes).
bool MergeConsecutiveStores(StoreSDNode *N);
- /// \brief Try to transform a truncation where C is a constant:
+ /// Try to transform a truncation where C is a constant:
/// (trunc (and X, C)) -> (and (trunc X), (trunc C))
///
/// \p N needs to be a truncation and its first operand an AND. Other
return false;
}
-// \brief Returns the SDNode if it is a constant float BuildVector
+// Returns the SDNode if it is a constant float BuildVector
// or constant float.
static SDNode *isConstantFPBuildVectorOrConstantFP(SDValue N) {
if (isa<ConstantFPSDNode>(N))
return false;
}
-/// \brief Recursively delete a node which has no uses and any operands for
+/// Recursively delete a node which has no uses and any operands for
/// which it is the only use.
///
/// Note that this both deletes the nodes and removes them from the worklist.
return SDValue();
}
-/// \brief Generate Min/Max node
+/// Generate Min/Max node
static SDValue combineMinNumMaxNum(const SDLoc &DL, EVT VT, SDValue LHS,
SDValue RHS, SDValue True, SDValue False,
ISD::CondCode CC, const TargetLowering &TLI,
return false;
}
-/// \brief Return the base-pointer arithmetic from an indexed \p LD.
+/// Return the base-pointer arithmetic from an indexed \p LD.
SDValue DAGCombiner::SplitIndexingFromLoad(LoadSDNode *LD) {
ISD::MemIndexedMode AM = LD->getAddressingMode();
assert(AM != ISD::UNINDEXED);
namespace {
-/// \brief Helper structure used to slice a load in smaller loads.
+/// Helper structure used to slice a load in smaller loads.
/// Basically a slice is obtained from the following sequence:
/// Origin = load Ty1, Base
/// Shift = srl Ty1 Origin, CstTy Amount
/// SliceTy is deduced from the number of bits that are actually used to
/// build Inst.
struct LoadedSlice {
- /// \brief Helper structure used to compute the cost of a slice.
+ /// Helper structure used to compute the cost of a slice.
struct Cost {
/// Are we optimizing for code size.
bool ForCodeSize;
Cost(bool ForCodeSize = false) : ForCodeSize(ForCodeSize) {}
- /// \brief Get the cost of one isolated slice.
+ /// Get the cost of one isolated slice.
Cost(const LoadedSlice &LS, bool ForCodeSize = false)
: ForCodeSize(ForCodeSize), Loads(1) {
EVT TruncType = LS.Inst->getValueType(0);
ZExts = 1;
}
- /// \brief Account for slicing gain in the current cost.
+ /// Account for slicing gain in the current cost.
/// Slicing provide a few gains like removing a shift or a
/// truncate. This method allows to grow the cost of the original
/// load with the gain from this slice.
unsigned Shift = 0, SelectionDAG *DAG = nullptr)
: Inst(Inst), Origin(Origin), Shift(Shift), DAG(DAG) {}
- /// \brief Get the bits used in a chunk of bits \p BitWidth large.
+ /// Get the bits used in a chunk of bits \p BitWidth large.
/// \return Result is \p BitWidth and has used bits set to 1 and
/// not used bits set to 0.
APInt getUsedBits() const {
return UsedBits;
}
- /// \brief Get the size of the slice to be loaded in bytes.
+ /// Get the size of the slice to be loaded in bytes.
unsigned getLoadedSize() const {
unsigned SliceSize = getUsedBits().countPopulation();
assert(!(SliceSize & 0x7) && "Size is not a multiple of a byte.");
return SliceSize / 8;
}
- /// \brief Get the type that will be loaded for this slice.
+ /// Get the type that will be loaded for this slice.
/// Note: This may not be the final type for the slice.
EVT getLoadedType() const {
assert(DAG && "Missing context");
return EVT::getIntegerVT(Ctxt, getLoadedSize() * 8);
}
- /// \brief Get the alignment of the load used for this slice.
+ /// Get the alignment of the load used for this slice.
unsigned getAlignment() const {
unsigned Alignment = Origin->getAlignment();
unsigned Offset = getOffsetFromBase();
return Alignment;
}
- /// \brief Check if this slice can be rewritten with legal operations.
+ /// Check if this slice can be rewritten with legal operations.
bool isLegal() const {
// An invalid slice is not legal.
if (!Origin || !Inst || !DAG)
return true;
}
- /// \brief Get the offset in bytes of this slice in the original chunk of
+ /// Get the offset in bytes of this slice in the original chunk of
/// bits.
/// \pre DAG != nullptr.
uint64_t getOffsetFromBase() const {
return Offset;
}
- /// \brief Generate the sequence of instructions to load the slice
+ /// Generate the sequence of instructions to load the slice
/// represented by this object and redirect the uses of this slice to
/// this new sequence of instructions.
/// \pre this->Inst && this->Origin are valid Instructions and this
return LastInst;
}
- /// \brief Check if this slice can be merged with an expensive cross register
+ /// Check if this slice can be merged with an expensive cross register
/// bank copy. E.g.,
/// i = load i32
/// f = bitcast i32 i to float
} // end anonymous namespace
-/// \brief Check that all bits set in \p UsedBits form a dense region, i.e.,
+/// Check that all bits set in \p UsedBits form a dense region, i.e.,
/// \p UsedBits looks like 0..0 1..1 0..0.
static bool areUsedBitsDense(const APInt &UsedBits) {
// If all the bits are one, this is dense!
return NarrowedUsedBits.isAllOnesValue();
}
-/// \brief Check whether or not \p First and \p Second are next to each other
+/// Check whether or not \p First and \p Second are next to each other
/// in memory. This means that there is no hole between the bits loaded
/// by \p First and the bits loaded by \p Second.
static bool areSlicesNextToEachOther(const LoadedSlice &First,
return areUsedBitsDense(UsedBits);
}
-/// \brief Adjust the \p GlobalLSCost according to the target
+/// Adjust the \p GlobalLSCost according to the target
/// paring capabilities and the layout of the slices.
/// \pre \p GlobalLSCost should account for at least as many loads as
/// there is in the slices in \p LoadedSlices.
}
}
-/// \brief Check the profitability of all involved LoadedSlice.
+/// Check the profitability of all involved LoadedSlice.
/// Currently, it is considered profitable if there is exactly two
/// involved slices (1) which are (2) next to each other in memory, and
/// whose cost (\see LoadedSlice::Cost) is smaller than the original load (3).
return OrigCost > GlobalSlicingCost;
}
-/// \brief If the given load, \p LI, is used only by trunc or trunc(lshr)
+/// If the given load, \p LI, is used only by trunc or trunc(lshr)
/// operations, split it in the various pieces being extracted.
///
/// This sort of thing is introduced by SROA.
return true;
}
-/// \brief Lower an argument list according to the target calling convention.
+/// Lower an argument list according to the target calling convention.
///
/// This is a helper for lowering intrinsics that follow a target calling
/// convention or require stack pointer adjustment. Only a subset of the
const TargetLowering &TLI;
SelectionDAG &DAG;
- /// \brief The set of nodes which have already been legalized. We hold a
+ /// The set of nodes which have already been legalized. We hold a
/// reference to it in order to update as necessary on node deletion.
SmallPtrSetImpl<SDNode *> &LegalizedNodes;
- /// \brief A set of all the nodes updated during legalization.
+ /// A set of all the nodes updated during legalization.
SmallSetVector<SDNode *, 16> *UpdatedNodes;
EVT getSetCCResultType(EVT VT) const {
: TM(DAG.getTarget()), TLI(DAG.getTargetLoweringInfo()), DAG(DAG),
LegalizedNodes(LegalizedNodes), UpdatedNodes(UpdatedNodes) {}
- /// \brief Legalizes the given operation.
+ /// Legalizes the given operation.
void LegalizeOp(SDNode *Node);
private:
/// legalizing the same thing more than once.
SmallDenseMap<SDValue, SDValue, 64> LegalizedNodes;
- /// \brief Adds a node to the translation cache.
+ /// Adds a node to the translation cache.
void AddLegalizedOperand(SDValue From, SDValue To) {
LegalizedNodes.insert(std::make_pair(From, To));
// If someone requests legalization of the new node, return itself.
LegalizedNodes.insert(std::make_pair(To, To));
}
- /// \brief Legalizes the given node.
+ /// Legalizes the given node.
SDValue LegalizeOp(SDValue Op);
- /// \brief Assuming the node is legal, "legalize" the results.
+ /// Assuming the node is legal, "legalize" the results.
SDValue TranslateLegalizeResults(SDValue Op, SDValue Result);
- /// \brief Implements unrolling a VSETCC.
+ /// Implements unrolling a VSETCC.
SDValue UnrollVSETCC(SDValue Op);
- /// \brief Implement expand-based legalization of vector operations.
+ /// Implement expand-based legalization of vector operations.
///
/// This is just a high-level routine to dispatch to specific code paths for
/// operations to legalize them.
SDValue Expand(SDValue Op);
- /// \brief Implements expansion for FNEG; falls back to UnrollVectorOp if
+ /// Implements expansion for FNEG; falls back to UnrollVectorOp if
/// FSUB isn't legal.
///
/// Implements expansion for UINT_TO_FLOAT; falls back to UnrollVectorOp if
/// SINT_TO_FLOAT and SHR on vectors isn't legal.
SDValue ExpandUINT_TO_FLOAT(SDValue Op);
- /// \brief Implement expansion for SIGN_EXTEND_INREG using SRL and SRA.
+ /// Implement expansion for SIGN_EXTEND_INREG using SRL and SRA.
SDValue ExpandSEXTINREG(SDValue Op);
- /// \brief Implement expansion for ANY_EXTEND_VECTOR_INREG.
+ /// Implement expansion for ANY_EXTEND_VECTOR_INREG.
///
/// Shuffles the low lanes of the operand into place and bitcasts to the proper
/// type. The contents of the bits in the extended part of each element are
/// undef.
SDValue ExpandANY_EXTEND_VECTOR_INREG(SDValue Op);
- /// \brief Implement expansion for SIGN_EXTEND_VECTOR_INREG.
+ /// Implement expansion for SIGN_EXTEND_VECTOR_INREG.
///
/// Shuffles the low lanes of the operand into place, bitcasts to the proper
/// type, then shifts left and arithmetic shifts right to introduce a sign
/// extension.
SDValue ExpandSIGN_EXTEND_VECTOR_INREG(SDValue Op);
- /// \brief Implement expansion for ZERO_EXTEND_VECTOR_INREG.
+ /// Implement expansion for ZERO_EXTEND_VECTOR_INREG.
///
/// Shuffles the low lanes of the operand into place and blends zeros into
/// the remaining lanes, finally bitcasting to the proper type.
SDValue ExpandZERO_EXTEND_VECTOR_INREG(SDValue Op);
- /// \brief Expand bswap of vectors into a shuffle if legal.
+ /// Expand bswap of vectors into a shuffle if legal.
SDValue ExpandBSWAP(SDValue Op);
- /// \brief Implement vselect in terms of XOR, AND, OR when blend is not
+ /// Implement vselect in terms of XOR, AND, OR when blend is not
/// supported by the target.
SDValue ExpandVSELECT(SDValue Op);
SDValue ExpandSELECT(SDValue Op);
SDValue ExpandCTLZ(SDValue Op);
SDValue ExpandCTTZ_ZERO_UNDEF(SDValue Op);
- /// \brief Implements vector promotion.
+ /// Implements vector promotion.
///
/// This is essentially just bitcasting the operands to a different type and
/// bitcasting the result back to the original type.
SDValue Promote(SDValue Op);
- /// \brief Implements [SU]INT_TO_FP vector promotion.
+ /// Implements [SU]INT_TO_FP vector promotion.
///
/// This is a [zs]ext of the input operand to a larger integer type.
SDValue PromoteINT_TO_FP(SDValue Op);
- /// \brief Implements FP_TO_[SU]INT vector promotion of the result type.
+ /// Implements FP_TO_[SU]INT vector promotion of the result type.
///
/// It is promoted to a larger integer type. The result is then
/// truncated back to the original type.
VectorLegalizer(SelectionDAG& dag) :
DAG(dag), TLI(dag.getTargetLoweringInfo()) {}
- /// \brief Begin legalizer the vector operations in the DAG.
+ /// Begin legalizer the vector operations in the DAG.
bool Run();
};
}
#endif // NDEBUG
-/// \brief Insert a newly allocated node into the DAG.
+/// Insert a newly allocated node into the DAG.
///
/// Handles insertion into the all nodes list and CSE map, as well as
/// verification and other common operations when a new node is allocated.
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
}
-/// \brief Lower the call to 'memset' intrinsic function into a series of store
+/// Lower the call to 'memset' intrinsic function into a series of store
/// operations.
///
/// \param DAG Selection DAG where lowered code is placed.
return true;
}
-// \brief Returns the SDNode if it is a constant integer BuildVector
+// Returns the SDNode if it is a constant integer BuildVector
// or constant integer.
SDNode *SelectionDAG::isConstantIntBuildVectorOrConstantInt(SDValue N) {
if (isa<ConstantSDNode>(N))
return DAG.getMergeValues(Ops, SL);
}
-/// \brief Populate a CallLowerinInfo (into \p CLI) based on the properties of
+/// Populate a CallLowerinInfo (into \p CLI) based on the properties of
/// the call being lowered.
///
/// This is a helper for lowering intrinsics that follow a target calling
.setIsPatchPoint(IsPatchPoint);
}
-/// \brief Add a stack map intrinsic call's live variable operands to a stackmap
+/// Add a stack map intrinsic call's live variable operands to a stackmap
/// or patchpoint target node's operand list.
///
/// Constants are converted to TargetConstants purely as an optimization to
}
}
-/// \brief Lower llvm.experimental.stackmap directly to its target opcode.
+/// Lower llvm.experimental.stackmap directly to its target opcode.
void SelectionDAGBuilder::visitStackmap(const CallInst &CI) {
// void @llvm.experimental.stackmap(i32 <id>, i32 <numShadowBytes>,
// [live variables...])
FuncInfo.MF->getFrameInfo().setHasStackMap();
}
-/// \brief Lower llvm.experimental.patchpoint directly to its target opcode.
+/// Lower llvm.experimental.patchpoint directly to its target opcode.
void SelectionDAGBuilder::visitPatchpoint(ImmutableCallSite CS,
const BasicBlock *EHPadBB) {
// void|i64 @llvm.experimental.patchpoint.void|i64(i64 <id>,
namespace llvm {
//===--------------------------------------------------------------------===//
- /// \brief This class is used by SelectionDAGISel to temporarily override
+ /// This class is used by SelectionDAGISel to temporarily override
/// the optimization level on a per-function basis.
class OptLevelChanger {
SelectionDAGISel &IS;
bool HasChainNodesMatched;
};
-/// \\brief A DAG update listener to keep the matching state
+/// \A DAG update listener to keep the matching state
/// (i.e. RecordedNodes and MatchScope) uptodate if the target is allowed to
/// change the DAG while matching. X86 addressing mode matcher is an example
/// for this.
return true;
}
-/// \brief Set CallLoweringInfo attribute flags based on a call instruction
+/// Set CallLoweringInfo attribute flags based on a call instruction
/// and called function attributes.
void TargetLoweringBase::ArgListEntry::setAttributes(ImmutableCallSite *CS,
unsigned ArgIdx) {
}
}
-/// \brief Given an exact SDIV by a constant, create a multiplication
+/// Given an exact SDIV by a constant, create a multiplication
/// with the multiplicative inverse of the constant.
static SDValue BuildExactSDIV(const TargetLowering &TLI, SDValue Op1, APInt d,
const SDLoc &dl, SelectionDAG &DAG,
return SDValue();
}
-/// \brief Given an ISD::SDIV node expressing a divide by constant,
+/// Given an ISD::SDIV node expressing a divide by constant,
/// return a DAG expression to select that will generate the same value by
/// multiplying by a magic number.
/// Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide".
return DAG.getNode(ISD::ADD, dl, VT, Q, T);
}
-/// \brief Given an ISD::UDIV node expressing a divide by constant,
+/// Given an ISD::UDIV node expressing a divide by constant,
/// return a DAG expression to select that will generate the same value by
/// multiplying by a magic number.
/// Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide".
namespace {
-/// \brief Class to determine where the safe point to insert the
+/// Class to determine where the safe point to insert the
/// prologue and epilogue are.
/// Unlike the paper from Fred C. Chow, PLDI'88, that introduces the
/// shrink-wrapping term for prologue/epilogue placement, this pass
/// Current MachineFunction.
MachineFunction *MachineFunc;
- /// \brief Check if \p MI uses or defines a callee-saved register or
+ /// Check if \p MI uses or defines a callee-saved register or
/// a frame index. If this is the case, this means \p MI must happen
/// after Save and before Restore.
bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS) const;
return CurrentCSRs;
}
- /// \brief Update the Save and Restore points such that \p MBB is in
+ /// Update the Save and Restore points such that \p MBB is in
/// the region that is dominated by Save and post-dominated by Restore
/// and Save and Restore still match the safe point definition.
/// Such point may not exist and Save and/or Restore may be null after
/// this call.
void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
- /// \brief Initialize the pass for \p MF.
+ /// Initialize the pass for \p MF.
void init(MachineFunction &MF) {
RCI.runOnMachineFunction(MF);
MDT = &getAnalysis<MachineDominatorTree>();
/// shrink-wrapping.
bool ArePointsInteresting() const { return Save != Entry && Save && Restore; }
- /// \brief Check if shrink wrapping is enabled for this target and function.
+ /// Check if shrink wrapping is enabled for this target and function.
static bool isShrinkWrapEnabled(const MachineFunction &MF);
public:
StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
- /// \brief Perform the shrink-wrapping analysis and update
+ /// Perform the shrink-wrapping analysis and update
/// the MachineFrameInfo attached to \p MF with the results.
bool runOnMachineFunction(MachineFunction &MF) override;
};
return false;
}
-/// \brief Helper function to find the immediate (post) dominator.
+/// Helper function to find the immediate (post) dominator.
template <typename ListOfBBs, typename DominanceAnalysis>
static MachineBasicBlock *FindIDom(MachineBasicBlock &Block, ListOfBBs BBs,
DominanceAnalysis &Dom) {
}
}
-/// \brief Set the threshold for a given entry frequency.
+/// Set the threshold for a given entry frequency.
///
/// Set the threshold relative to \c Entry. Since the threshold is used as a
/// bound on the open interval (-Threshold;Threshold), 1 is the minimum
STATISTIC(NumStackMaps, "Number of StackMaps visited");
namespace {
-/// \brief This pass calculates the liveness information for each basic block in
+/// This pass calculates the liveness information for each basic block in
/// a function and attaches the register live-out information to a patchpoint
/// intrinsic if present.
///
public:
static char ID;
- /// \brief Default construct and initialize the pass.
+ /// Default construct and initialize the pass.
StackMapLiveness();
- /// \brief Tell the pass manager which passes we depend on and what
+ /// Tell the pass manager which passes we depend on and what
/// information we preserve.
void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineFunctionProperties::Property::NoVRegs);
}
- /// \brief Calculate the liveness information for the given machine function.
+ /// Calculate the liveness information for the given machine function.
bool runOnMachineFunction(MachineFunction &MF) override;
private:
- /// \brief Performs the actual liveness calculation for the function.
+ /// Performs the actual liveness calculation for the function.
bool calculateLiveness(MachineFunction &MF);
- /// \brief Add the current register live set to the instruction.
+ /// Add the current register live set to the instruction.
void addLiveOutSetToMI(MachineFunction &MF, MachineInstr &MI);
- /// \brief Create a register mask and initialize it with the registers from
+ /// Create a register mask and initialize it with the registers from
/// the register live set.
uint32_t *createRegisterMask(MachineFunction &MF) const;
};
return false;
}
-/// \brief Check whether or not this function needs a stack protector based
+/// Check whether or not this function needs a stack protector based
/// upon the stack protector level.
///
/// We use two heuristics: a standard (ssp) and strong (sspstrong).
return BestRC;
}
-/// \brief Check if the registers defined by the pair (RegisterClass, SubReg)
+/// Check if the registers defined by the pair (RegisterClass, SubReg)
/// share the same register file.
static bool shareSameRegisterFile(const TargetRegisterInfo &TRI,
const TargetRegisterClass *DefRC,
}
namespace {
-/// \brief Helper class which uses a value handler to automatically deletes the
+/// Helper class which uses a value handler to automatically deletes the
/// memory block when the GlobalVariable is destroyed.
class GVMemoryBlock final : public CallbackVH {
GVMemoryBlock(const GlobalVariable *GV)
: CallbackVH(const_cast<GlobalVariable*>(GV)) {}
public:
- /// \brief Returns the address the GlobalVariable should be written into. The
+ /// Returns the address the GlobalVariable should be written into. The
/// GVMemoryBlock object prefixes that.
static char *Create(const GlobalVariable *GV, const DataLayout& TD) {
Type *ElTy = GV->getValueType();
return getPointerToGlobalIfAvailable(GV);
}
-/// \brief Converts a Constant* into a GenericValue, including handling of
+/// Converts a Constant* into a GenericValue, including handling of
/// ConstantExpr values.
GenericValue ExecutionEngine::getConstantValue(const Constant *C) {
// If its undefined, return the garbage.
uint8_t *getAddress() const { return Address; }
- /// \brief Return the address of this section with an offset.
+ /// Return the address of this section with an offset.
uint8_t *getAddressWithOffset(unsigned OffsetBytes) const {
assert(OffsetBytes <= AllocationSize && "Offset out of bounds!");
return Address + OffsetBytes;
uint64_t getLoadAddress() const { return LoadAddress; }
void setLoadAddress(uint64_t LA) { LoadAddress = LA; }
- /// \brief Return the load address of this section with an offset.
+ /// Return the load address of this section with an offset.
uint64_t getLoadAddressWithOffset(unsigned OffsetBytes) const {
assert(OffsetBytes <= AllocationSize && "Offset out of bounds!");
return LoadAddress + OffsetBytes;
return Addr;
}
- /// \brief Given the common symbols discovered in the object file, emit a
+ /// Given the common symbols discovered in the object file, emit a
/// new section for them and update the symbol mappings in the object and
/// symbol table.
Error emitCommonSymbols(const ObjectFile &Obj,
CommonSymbolList &CommonSymbols, uint64_t CommonSize,
uint32_t CommonAlign);
- /// \brief Emits section data from the object file to the MemoryManager.
+ /// Emits section data from the object file to the MemoryManager.
/// \param IsCode if it's true then allocateCodeSection() will be
/// used for emits, else allocateDataSection() will be used.
/// \return SectionID.
const SectionRef &Section,
bool IsCode);
- /// \brief Find Section in LocalSections. If the secton is not found - emit
+ /// Find Section in LocalSections. If the secton is not found - emit
/// it and store in LocalSections.
/// \param IsCode if it's true then allocateCodeSection() will be
/// used for emmits, else allocateDataSection() will be used.
const SectionRef &Section, bool IsCode,
ObjSectionToIDMap &LocalSections);
- // \brief Add a relocation entry that uses the given section.
+ // Add a relocation entry that uses the given section.
void addRelocationForSection(const RelocationEntry &RE, unsigned SectionID);
- // \brief Add a relocation entry that uses the given symbol. This symbol may
+ // Add a relocation entry that uses the given symbol. This symbol may
// be found in the global symbol table, or it may be external.
void addRelocationForSymbol(const RelocationEntry &RE, StringRef SymbolName);
- /// \brief Emits long jump instruction to Addr.
+ /// Emits long jump instruction to Addr.
/// \return Pointer to the memory area for emitting target address.
uint8_t *createStubFunction(uint8_t *Addr, unsigned AbiVariant = 0);
- /// \brief Resolves relocations from Relocs list with address from Value.
+ /// Resolves relocations from Relocs list with address from Value.
void resolveRelocationList(const RelocationList &Relocs, uint64_t Value);
- /// \brief A object file specific relocation resolver
+ /// A object file specific relocation resolver
/// \param RE The relocation to be resolved
/// \param Value Target symbol address to apply the relocation action
virtual void resolveRelocation(const RelocationEntry &RE, uint64_t Value) = 0;
- /// \brief Parses one or more object file relocations (some object files use
+ /// Parses one or more object file relocations (some object files use
/// relocation pairs) and stores it to Relocations or SymbolRelocations
/// (this depends on the object file type).
/// \return Iterator to the next relocation that needs to be parsed.
const ObjectFile &Obj, ObjSectionToIDMap &ObjSectionToID,
StubMap &Stubs) = 0;
- /// \brief Resolve relocations to external symbols.
+ /// Resolve relocations to external symbols.
Error resolveExternalSymbols();
- // \brief Compute an upper bound of the memory that is required to load all
+ // Compute an upper bound of the memory that is required to load all
// sections
Error computeTotalAllocSize(const ObjectFile &Obj,
uint64_t &CodeSize, uint32_t &CodeAlign,
uint64_t &RODataSize, uint32_t &RODataAlign,
uint64_t &RWDataSize, uint32_t &RWDataAlign);
- // \brief Compute GOT size
+ // Compute GOT size
unsigned computeGOTSize(const ObjectFile &Obj);
- // \brief Compute the stub buffer size required for a section
+ // Compute the stub buffer size required for a section
unsigned computeSectionStubBufSize(const ObjectFile &Obj,
const SectionRef &Section);
- // \brief Implementation of the generic part of the loadObject algorithm.
+ // Implementation of the generic part of the loadObject algorithm.
Expected<ObjSectionToIDMap> loadObjectImpl(const object::ObjectFile &Obj);
- // \brief Return size of Global Offset Table (GOT) entry
+ // Return size of Global Offset Table (GOT) entry
virtual size_t getGOTEntrySize() { return 0; }
- // \brief Return true if the relocation R may require allocating a GOT entry.
+ // Return true if the relocation R may require allocating a GOT entry.
virtual bool relocationNeedsGot(const RelocationRef &R) const {
return false;
}
- // \brief Return true if the relocation R may require allocating a stub.
+ // Return true if the relocation R may require allocating a stub.
virtual bool relocationNeedsStub(const RelocationRef &R) const {
return true; // Conservative answer
}
uint64_t SymOffset, SID SectionID);
private:
- /// \brief A object file specific relocation resolver
+ /// A object file specific relocation resolver
/// \param RE The relocation to be resolved
/// \param Value Target symbol address to apply the relocation action
uint64_t evaluateRelocation(const RelocationEntry &RE, uint64_t Value,
uint64_t Addend);
- /// \brief A object file specific relocation resolver
+ /// A object file specific relocation resolver
/// \param RE The relocation to be resolved
/// \param Value Target symbol address to apply the relocation action
void applyRelocation(const RelocationEntry &RE, uint64_t Value);
/// CreateFunctionSlot - Insert the specified Value* into the slot table.
void CreateFunctionSlot(const Value *V);
- /// \brief Insert the specified AttributeSet into the slot table.
+ /// Insert the specified AttributeSet into the slot table.
void CreateAttributeSetSlot(AttributeSet AS);
/// Add all of the module level global variables (and their initializers)
void printUseLists(const Function *F);
private:
- /// \brief Print out metadata attachments.
+ /// Print out metadata attachments.
void printMetadataAttachments(
const SmallVectorImpl<std::pair<unsigned, MDNode *>> &MDs,
StringRef Separator);
/*ShouldPreserveUseListOrder=*/false, /*IsForDebug=*/true);
}
-// \brief Allow printing of Comdats from the debugger.
+// Allow printing of Comdats from the debugger.
LLVM_DUMP_METHOD
void Comdat::dump() const { print(dbgs(), /*IsForDebug=*/true); }
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines various helper methods and classes used by
+/// This file defines various helper methods and classes used by
/// LLVMContextImpl for creating and managing attributes.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
/// \class
-/// \brief This class represents a single, uniqued attribute. That attribute
+/// This class represents a single, uniqued attribute. That attribute
/// could be a single enum, a tuple, or a string.
class AttributeImpl : public FoldingSetNode {
unsigned char KindID; ///< Holds the AttrEntryKind of the attribute
StringRef getKindAsString() const;
StringRef getValueAsString() const;
- /// \brief Used when sorting the attributes.
+ /// Used when sorting the attributes.
bool operator<(const AttributeImpl &AI) const;
void Profile(FoldingSetNodeID &ID) const {
//===----------------------------------------------------------------------===//
/// \class
-/// \brief A set of classes that contain the value of the
+/// A set of classes that contain the value of the
/// attribute object. There are three main categories: enum attribute entries,
/// represented by Attribute::AttrKind; alignment attribute entries; and string
/// attribute enties, which are for target-dependent attributes.
//===----------------------------------------------------------------------===//
/// \class
-/// \brief This class represents a group of attributes that apply to one
+/// This class represents a group of attributes that apply to one
/// element: function, return type, or parameter.
class AttributeSetNode final
: public FoldingSetNode,
static AttributeSetNode *get(LLVMContext &C, ArrayRef<Attribute> Attrs);
- /// \brief Return the number of attributes this AttributeList contains.
+ /// Return the number of attributes this AttributeList contains.
unsigned getNumAttributes() const { return NumAttrs; }
bool hasAttribute(Attribute::AttrKind Kind) const {
//===----------------------------------------------------------------------===//
/// \class
-/// \brief This class represents a set of attributes that apply to the function,
+/// This class represents a set of attributes that apply to the function,
/// return type, and parameters.
class AttributeListImpl final
: public FoldingSetNode,
void operator delete(void *p) { ::operator delete(p); }
- /// \brief Get the context that created this AttributeListImpl.
+ /// Get the context that created this AttributeListImpl.
LLVMContext &getContext() { return Context; }
- /// \brief Return true if the AttributeSet or the FunctionIndex has an
+ /// Return true if the AttributeSet or the FunctionIndex has an
/// enum attribute of the given kind.
bool hasFnAttribute(Attribute::AttrKind Kind) const {
return AvailableFunctionAttrs & ((uint64_t)1) << Kind;
//===----------------------------------------------------------------------===//
//
// \file
-// \brief This file implements the Attribute, AttributeImpl, AttrBuilder,
+// This file implements the Attribute, AttributeImpl, AttrBuilder,
// AttributeListImpl, and AttributeList classes.
//
//===----------------------------------------------------------------------===//
// AttributeFuncs Function Defintions
//===----------------------------------------------------------------------===//
-/// \brief Which attributes cannot be applied to a type.
+/// Which attributes cannot be applied to a type.
AttrBuilder AttributeFuncs::typeIncompatible(Type *Ty) {
AttrBuilder Incompatible;
Callee.getFnAttribute(AttrClass::getKind());
}
-/// \brief Compute the logical AND of the attributes of the caller and the
+/// Compute the logical AND of the attributes of the caller and the
/// callee.
///
/// This function sets the caller's attribute to false if the callee's attribute
AttrClass::set(Caller, AttrClass::getKind(), false);
}
-/// \brief Compute the logical OR of the attributes of the caller and the
+/// Compute the logical OR of the attributes of the caller and the
/// callee.
///
/// This function sets the caller's attribute to true if the callee's attribute
AttrClass::set(Caller, AttrClass::getKind(), true);
}
-/// \brief If the inlined function had a higher stack protection level than the
+/// If the inlined function had a higher stack protection level than the
/// calling function, then bump up the caller's stack protection level.
static void adjustCallerSSPLevel(Function &Caller, const Function &Callee) {
// If upgrading the SSP attribute, clear out the old SSP Attributes first.
Caller.addFnAttr(Attribute::StackProtect);
}
-/// \brief If the inlined function required stack probes, then ensure that
+/// If the inlined function required stack probes, then ensure that
/// the calling function has those too.
static void adjustCallerStackProbes(Function &Caller, const Function &Callee) {
if (!Caller.hasFnAttribute("probe-stack") &&
}
}
-/// \brief If the inlined function defines the size of guard region
+/// If the inlined function defines the size of guard region
/// on the stack, then ensure that the calling function defines a guard region
/// that is no larger.
static void
namespace {
-/// \brief Regular expression corresponding to the value given in one of the
+/// Regular expression corresponding to the value given in one of the
/// -pass-remarks* command line flags. Passes whose name matches this regexp
/// will emit a diagnostic when calling the associated diagnostic function
/// (emitOptimizationRemark, emitOptimizationRemarkMissed or
//
//===----------------------------------------------------------------------===//
-/// \brief Queues multiple updates and discards duplicates.
+/// Queues multiple updates and discards duplicates.
void DeferredDominance::applyUpdates(
ArrayRef<DominatorTree::UpdateType> Updates) {
SmallVector<DominatorTree::UpdateType, 8> Seen;
}
}
-/// \brief Helper method for a single edge insertion. It's almost always better
+/// Helper method for a single edge insertion. It's almost always better
/// to batch updates and call applyUpdates to quickly remove duplicate edges.
/// This is best used when there is only a single insertion needed to update
/// Dominators.
applyUpdate(DominatorTree::Insert, From, To);
}
-/// \brief Helper method for a single edge deletion. It's almost always better
+/// Helper method for a single edge deletion. It's almost always better
/// to batch updates and call applyUpdates to quickly remove duplicate edges.
/// This is best used when there is only a single deletion needed to update
/// Dominators.
applyUpdate(DominatorTree::Delete, From, To);
}
-/// \brief Delays the deletion of a basic block until a flush() event.
+/// Delays the deletion of a basic block until a flush() event.
void DeferredDominance::deleteBB(BasicBlock *DelBB) {
assert(DelBB && "Invalid push_back of nullptr DelBB.");
assert(pred_empty(DelBB) && "DelBB has one or more predecessors.");
DeletedBBs.insert(DelBB);
}
-/// \brief Returns true if DelBB is awaiting deletion at a flush() event.
+/// Returns true if DelBB is awaiting deletion at a flush() event.
bool DeferredDominance::pendingDeletedBB(BasicBlock *DelBB) {
if (DeletedBBs.empty())
return false;
return DeletedBBs.count(DelBB) != 0;
}
-/// \brief Returns true if pending DT updates are queued for a flush() event.
+/// Returns true if pending DT updates are queued for a flush() event.
bool DeferredDominance::pending() { return !PendUpdates.empty(); }
-/// \brief Flushes all pending updates and block deletions. Returns a
+/// Flushes all pending updates and block deletions. Returns a
/// correct DominatorTree reference to be used by the caller for analysis.
DominatorTree &DeferredDominance::flush() {
// Updates to DT must happen before blocks are deleted below. Otherwise the
return DT;
}
-/// \brief Drops all internal state and forces a (slow) recalculation of the
+/// Drops all internal state and forces a (slow) recalculation of the
/// DominatorTree based on the current state of the LLVM IR in F. This should
/// only be used in corner cases such as the Entry block of F being deleted.
void DeferredDominance::recalculate(Function &F) {
}
}
-/// \brief Debug method to help view the state of pending updates.
+/// Debug method to help view the state of pending updates.
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void DeferredDominance::dump() const {
raw_ostream &OS = llvm::dbgs();
return makeArrayRef(&IntrinsicNameTable[1] + TI.Offset, TI.Count);
}
-/// \brief This does the actual lookup of an intrinsic ID which
+/// This does the actual lookup of an intrinsic ID which
/// matches the given function name.
Intrinsic::ID Function::lookupIntrinsicID(StringRef Name) {
ArrayRef<const char *> NameTable = findTargetSubtable(Name);
return createCallHelper(FnAssume, Ops, this);
}
-/// \brief Create a call to a Masked Load intrinsic.
+/// Create a call to a Masked Load intrinsic.
/// \p Ptr - base pointer for the load
/// \p Align - alignment of the source location
/// \p Mask - vector of booleans which indicates what vector lanes should
OverloadedTypes, Name);
}
-/// \brief Create a call to a Masked Store intrinsic.
+/// Create a call to a Masked Store intrinsic.
/// \p Val - data to be stored,
/// \p Ptr - base pointer for the store
/// \p Align - alignment of the destination location
return createCallHelper(TheFn, Ops, this, Name);
}
-/// \brief Create a call to a Masked Gather intrinsic.
+/// Create a call to a Masked Gather intrinsic.
/// \p Ptrs - vector of pointers for loading
/// \p Align - alignment for one element
/// \p Mask - vector of booleans which indicates what vector lanes should
Name);
}
-/// \brief Create a call to a Masked Scatter intrinsic.
+/// Create a call to a Masked Scatter intrinsic.
/// \p Data - data to be stored,
/// \p Ptrs - the vector of pointers, where the \p Data elements should be
/// stored
namespace llvm {
-/// \brief Make MDOperand transparent for hashing.
+/// Make MDOperand transparent for hashing.
///
/// This overload of an implementation detail of the hashing library makes
/// MDOperand hash to the same value as a \a Metadata pointer.
}
};
-/// \brief Structure for hashing arbitrary MDNode operands.
+/// Structure for hashing arbitrary MDNode operands.
class MDNodeOpsKey {
ArrayRef<Metadata *> RawOps;
ArrayRef<MDOperand> Ops;
}
};
-/// \brief DenseMapInfo for MDTuple.
+/// DenseMapInfo for MDTuple.
///
/// Note that we don't need the is-function-local bit, since that's implicit in
/// the operands.
}
};
-/// \brief DenseMapInfo for DILocation.
+/// DenseMapInfo for DILocation.
template <> struct MDNodeKeyImpl<DILocation> {
unsigned Line;
unsigned Column;
}
};
-/// \brief DenseMapInfo for GenericDINode.
+/// DenseMapInfo for GenericDINode.
template <> struct MDNodeKeyImpl<GenericDINode> : MDNodeOpsKey {
unsigned Tag;
MDString *Header;
}
};
-/// \brief DenseMapInfo for MDNode subclasses.
+/// DenseMapInfo for MDNode subclasses.
template <class NodeTy> struct MDNodeInfo {
using KeyTy = MDNodeKeyImpl<NodeTy>;
using SubsetEqualTy = MDNodeSubsetEqualImpl<NodeTy>;
#define HANDLE_MDNODE_LEAF(CLASS) using CLASS##Info = MDNodeInfo<CLASS>;
#include "llvm/IR/Metadata.def"
-/// \brief Map-like storage for metadata attachments.
+/// Map-like storage for metadata attachments.
class MDAttachmentMap {
SmallVector<std::pair<unsigned, TrackingMDNodeRef>, 2> Attachments;
bool empty() const { return Attachments.empty(); }
size_t size() const { return Attachments.size(); }
- /// \brief Get a particular attachment (if any).
+ /// Get a particular attachment (if any).
MDNode *lookup(unsigned ID) const;
- /// \brief Set an attachment to a particular node.
+ /// Set an attachment to a particular node.
///
/// Set the \c ID attachment to \c MD, replacing the current attachment at \c
/// ID (if anyway).
void set(unsigned ID, MDNode &MD);
- /// \brief Remove an attachment.
+ /// Remove an attachment.
///
/// Remove the attachment at \c ID, if any.
void erase(unsigned ID);
- /// \brief Copy out all the attachments.
+ /// Copy out all the attachments.
///
/// Copies all the current attachments into \c Result, sorting by attachment
/// ID. This function does \em not clear \c Result.
void getAll(SmallVectorImpl<std::pair<unsigned, MDNode *>> &Result) const;
- /// \brief Erase matching attachments.
+ /// Erase matching attachments.
///
/// Erases all attachments matching the \c shouldRemove predicate.
template <class PredTy> void remove_if(PredTy shouldRemove) {
int getOrAddScopeRecordIdxEntry(MDNode *N, int ExistingIdx);
int getOrAddScopeInlinedAtIdxEntry(MDNode *Scope, MDNode *IA,int ExistingIdx);
- /// \brief A set of interned tags for operand bundles. The StringMap maps
+ /// A set of interned tags for operand bundles. The StringMap maps
/// bundle tags to their IDs.
///
/// \see LLVMContext::getOperandBundleTagID
mutable OptPassGate *OPG = nullptr;
- /// \brief Access the object which can disable optional passes and individual
+ /// Access the object which can disable optional passes and individual
/// optimizations at compile time.
OptPassGate &getOptPassGate() const;
- /// \brief Set the object which can disable optional passes and individual
+ /// Set the object which can disable optional passes and individual
/// optimizations at compile time.
///
/// The lifetime of the object must be guaranteed to extend as long as the
return MDNode::get(Context, createString(Name));
}
-/// \brief Return metadata for a non-root TBAA node with the given name,
+/// Return metadata for a non-root TBAA node with the given name,
/// parent in the TBAA tree, and value for 'pointsToConstantMemory'.
MDNode *MDBuilder::createTBAANode(StringRef Name, MDNode *Parent,
bool isConstant) {
return MDNode::get(Context, {createString(Name), Domain});
}
-/// \brief Return metadata for a tbaa.struct node with the given
+/// Return metadata for a tbaa.struct node with the given
/// struct field descriptions.
MDNode *MDBuilder::createTBAAStructNode(ArrayRef<TBAAStructField> Fields) {
SmallVector<Metadata *, 4> Vals(Fields.size() * 3);
return MDNode::get(Context, Vals);
}
-/// \brief Return metadata for a TBAA struct node in the type DAG
+/// Return metadata for a TBAA struct node in the type DAG
/// with the given name, a list of pairs (offset, field type in the type DAG).
MDNode *MDBuilder::createTBAAStructTypeNode(
StringRef Name, ArrayRef<std::pair<MDNode *, uint64_t>> Fields) {
return MDNode::get(Context, Ops);
}
-/// \brief Return metadata for a TBAA scalar type node with the
+/// Return metadata for a TBAA scalar type node with the
/// given name, an offset and a parent in the TBAA type DAG.
MDNode *MDBuilder::createTBAAScalarTypeNode(StringRef Name, MDNode *Parent,
uint64_t Offset) {
{createString(Name), Parent, createConstant(Off)});
}
-/// \brief Return metadata for a TBAA tag node with the given
+/// Return metadata for a TBAA tag node with the given
/// base type, access type and offset relative to the base type.
MDNode *MDBuilder::createTBAAStructTagNode(MDNode *BaseType, MDNode *AccessType,
uint64_t Offset, bool IsConstant) {
template <typename... Ts> void WriteTs() {}
public:
- /// \brief A check failed, so printout out the condition and the message.
+ /// A check failed, so printout out the condition and the message.
///
/// This provides a nice place to put a breakpoint if you want to see why
/// something is not correct.
Broken = true;
}
- /// \brief A check failed (with values to print).
+ /// A check failed (with values to print).
///
/// This calls the Message-only version so that the above is easier to set a
/// breakpoint on.
DominatorTree DT;
- /// \brief When verifying a basic block, keep track of all of the
+ /// When verifying a basic block, keep track of all of the
/// instructions we have seen so far.
///
/// This allows us to do efficient dominance checks for the case when an
/// instruction has an operand that is an instruction in the same block.
SmallPtrSet<Instruction *, 16> InstsInThisBlock;
- /// \brief Keep track of the metadata nodes that have been checked already.
+ /// Keep track of the metadata nodes that have been checked already.
SmallPtrSet<const Metadata *, 32> MDNodes;
/// Keep track which DISubprogram is attached to which function.
/// Track all DICompileUnits visited.
SmallPtrSet<const Metadata *, 2> CUVisited;
- /// \brief The result type for a landingpad.
+ /// The result type for a landingpad.
Type *LandingPadResultTy;
- /// \brief Whether we've seen a call to @llvm.localescape in this function
+ /// Whether we've seen a call to @llvm.localescape in this function
/// already.
bool SawFrameEscape;
};
}
-/// \brief Carefully grab the subprogram from a local scope.
+/// Carefully grab the subprogram from a local scope.
///
/// This carefully grabs the subprogram from a local scope, avoiding the
/// built-in assertions that would typically fire.
}
}
-/// \brief Write the fragment \p F to the output file.
+/// Write the fragment \p F to the output file.
static void writeFragment(const MCAssembler &Asm, const MCAsmLayout &Layout,
const MCFragment &F) {
MCObjectWriter *OW = Asm.getWriterPtr();
delete DC;
}
-/// \brief Emits the comments that are stored in \p DC comment stream.
+/// Emits the comments that are stored in \p DC comment stream.
/// Each comment in the comment stream must end with a newline.
static void emitComments(LLVMDisasmContext *DC,
formatted_raw_ostream &FormattedOS) {
DC->CommentsToEmit.clear();
}
-/// \brief Gets latency information for \p Inst from the itinerary
+/// Gets latency information for \p Inst from the itinerary
/// scheduling model, based on \p DC information.
/// \return The maximum expected latency over all the operands or -1
/// if no information is available.
return Latency;
}
-/// \brief Gets latency information for \p Inst, based on \p DC information.
+/// Gets latency information for \p Inst, based on \p DC information.
/// \return The maximum expected latency over all the definitions or -1
/// if no information is available.
static int getLatency(LLVMDisasmContext *DC, const MCInst &Inst) {
return Latency;
}
-/// \brief Emits latency information in DC->CommentStream for \p Inst, based
+/// Emits latency information in DC->CommentStream for \p Inst, based
/// on the information available in \p DC.
static void emitLatency(LLVMDisasmContext *DC, const MCInst &Inst) {
int Latency = getLatency(DC, Inst);
return IsRelocatable && Value.isAbsolute();
}
-/// \brief Helper method for \see EvaluateSymbolAdd().
+/// Helper method for \see EvaluateSymbolAdd().
static void AttemptToFoldSymbolOffsetDifference(
const MCAssembler *Asm, const MCAsmLayout *Layout,
const SectionAddrMap *Addrs, bool InSet, const MCSymbolRefExpr *&A,
A = B = nullptr;
}
-/// \brief Evaluate the result of an add between (conceptually) two MCValues.
+/// Evaluate the result of an add between (conceptually) two MCValues.
///
/// This routine conceptually attempts to construct an MCValue:
/// Result = (Result_A - Result_B + Result_Cst)
namespace {
-/// \brief Helper types for tracking macro definitions.
+/// Helper types for tracking macro definitions.
typedef std::vector<AsmToken> MCAsmMacroArgument;
typedef std::vector<MCAsmMacroArgument> MCAsmMacroArguments;
-/// \brief Helper class for storing information about an active macro
+/// Helper class for storing information about an active macro
/// instantiation.
struct MacroInstantiation {
/// The location of the instantiation.
};
struct ParseStatementInfo {
- /// \brief The parsed operands from the last parsed statement.
+ /// The parsed operands from the last parsed statement.
SmallVector<std::unique_ptr<MCParsedAsmOperand>, 8> ParsedOperands;
- /// \brief The opcode from the last parsed instruction.
+ /// The opcode from the last parsed instruction.
unsigned Opcode = ~0U;
- /// \brief Was there an error parsing the inline assembly?
+ /// Was there an error parsing the inline assembly?
bool ParseError = false;
SmallVectorImpl<AsmRewrite> *AsmRewrites = nullptr;
: AsmRewrites(rewrites) {}
};
-/// \brief The concrete assembly parser instance.
+/// The concrete assembly parser instance.
class AsmParser : public MCAsmParser {
private:
AsmLexer Lexer;
AsmCond TheCondState;
std::vector<AsmCond> TheCondStack;
- /// \brief maps directive names to handler methods in parser
+ /// maps directive names to handler methods in parser
/// extensions. Extensions register themselves in this map by calling
/// addDirectiveHandler.
StringMap<ExtensionDirectiveHandler> ExtensionDirectiveMap;
- /// \brief Stack of active macro instantiations.
+ /// Stack of active macro instantiations.
std::vector<MacroInstantiation*> ActiveMacros;
- /// \brief List of bodies of anonymous macros.
+ /// List of bodies of anonymous macros.
std::deque<MCAsmMacro> MacroLikeBodies;
/// Boolean tracking whether macro substitution is enabled.
unsigned MacrosEnabledFlag : 1;
- /// \brief Keeps track of how many .macro's have been instantiated.
+ /// Keeps track of how many .macro's have been instantiated.
unsigned NumOfMacroInstantiations;
/// The values from the last parsed cpp hash file line comment if any.
};
CppHashInfoTy CppHashInfo;
- /// \brief List of forward directional labels for diagnosis at the end.
+ /// List of forward directional labels for diagnosis at the end.
SmallVector<std::tuple<SMLoc, CppHashInfoTy, MCSymbol *>, 4> DirLabels;
/// AssemblerDialect. ~OU means unset value and use value provided by MAI.
unsigned AssemblerDialect = ~0U;
- /// \brief is Darwin compatibility enabled?
+ /// is Darwin compatibility enabled?
bool IsDarwin = false;
- /// \brief Are we parsing ms-style inline assembly?
+ /// Are we parsing ms-style inline assembly?
bool ParsingInlineAsm = false;
public:
SMLoc &EndLoc) override;
bool parseAbsoluteExpression(int64_t &Res) override;
- /// \brief Parse a floating point expression using the float \p Semantics
+ /// Parse a floating point expression using the float \p Semantics
/// and set \p Res to the value.
bool parseRealValue(const fltSemantics &Semantics, APInt &Res);
- /// \brief Parse an identifier or string (as a quoted identifier)
+ /// Parse an identifier or string (as a quoted identifier)
/// and set \p Res to the identifier contents.
bool parseIdentifier(StringRef &Res) override;
void eatToEndOfStatement() override;
ArrayRef<MCAsmMacroArgument> A, bool EnableAtPseudoVariable,
SMLoc L);
- /// \brief Are macros enabled in the parser?
+ /// Are macros enabled in the parser?
bool areMacrosEnabled() {return MacrosEnabledFlag;}
- /// \brief Control a flag in the parser that enables or disables macros.
+ /// Control a flag in the parser that enables or disables macros.
void setMacrosEnabled(bool Flag) {MacrosEnabledFlag = Flag;}
- /// \brief Are we inside a macro instantiation?
+ /// Are we inside a macro instantiation?
bool isInsideMacroInstantiation() {return !ActiveMacros.empty();}
- /// \brief Handle entry to macro instantiation.
+ /// Handle entry to macro instantiation.
///
/// \param M The macro.
/// \param NameLoc Instantiation location.
bool handleMacroEntry(const MCAsmMacro *M, SMLoc NameLoc);
- /// \brief Handle exit from macro instantiation.
+ /// Handle exit from macro instantiation.
void handleMacroExit();
- /// \brief Extract AsmTokens for a macro argument.
+ /// Extract AsmTokens for a macro argument.
bool parseMacroArgument(MCAsmMacroArgument &MA, bool Vararg);
- /// \brief Parse all macro arguments for a given macro.
+ /// Parse all macro arguments for a given macro.
bool parseMacroArguments(const MCAsmMacro *M, MCAsmMacroArguments &A);
void printMacroInstantiations();
/// info describing the assembler source itself.)
bool enabledGenDwarfForAssembly();
- /// \brief Enter the specified file. This returns true on failure.
+ /// Enter the specified file. This returns true on failure.
bool enterIncludeFile(const std::string &Filename);
- /// \brief Process the specified file for the .incbin directive.
+ /// Process the specified file for the .incbin directive.
/// This returns true on failure.
bool processIncbinFile(const std::string &Filename, int64_t Skip = 0,
const MCExpr *Count = nullptr, SMLoc Loc = SMLoc());
- /// \brief Reset the current lexer position to that given by \p Loc. The
+ /// Reset the current lexer position to that given by \p Loc. The
/// current token is not set; clients should ensure Lex() is called
/// subsequently.
///
/// location.
void jumpToLoc(SMLoc Loc, unsigned InBuffer = 0);
- /// \brief Parse up to the end of statement and a return the contents from the
+ /// Parse up to the end of statement and a return the contents from the
/// current token until the end of the statement; the current token on exit
/// will be either the EndOfStatement or EOF.
StringRef parseStringToEndOfStatement() override;
- /// \brief Parse until the end of a statement or a comma is encountered,
+ /// Parse until the end of a statement or a comma is encountered,
/// return the contents from the current token up to the end or comma.
StringRef parseStringToComma();
DK_END
};
- /// \brief Maps directive name --> DirectiveKind enum, for
+ /// Maps directive name --> DirectiveKind enum, for
/// directives parsed by this class.
StringMap<DirectiveKind> DirectiveKindMap;
// .sleb128 (Signed=true) and .uleb128 (Signed=false)
bool parseDirectiveLEB128(bool Signed);
- /// \brief Parse a directive like ".globl" which
+ /// Parse a directive like ".globl" which
/// accepts a single symbol (which should be a label or an external).
bool parseDirectiveSymbolAttribute(MCSymbolAttr Attr);
return false;
}
-/// \brief Throw away the rest of the line for testing purposes.
+/// Throw away the rest of the line for testing purposes.
void AsmParser::eatToEndOfStatement() {
while (Lexer.isNot(AsmToken::EndOfStatement) && Lexer.isNot(AsmToken::Eof))
Lexer.Lex();
return StringRef(Start, End - Start);
}
-/// \brief Parse a paren expression and return it.
+/// Parse a paren expression and return it.
/// NOTE: This assumes the leading '(' has already been consumed.
///
/// parenexpr ::= expr)
return false;
}
-/// \brief Parse a bracket expression and return it.
+/// Parse a bracket expression and return it.
/// NOTE: This assumes the leading '[' has already been consumed.
///
/// bracketexpr ::= expr]
return false;
}
-/// \brief Parse a primary expression and return it.
+/// Parse a primary expression and return it.
/// primaryexpr ::= (parenexpr
/// primaryexpr ::= symbol
/// primaryexpr ::= number
return false;
}
-/// \brief creating a string without the escape characters '!'.
+/// creating a string without the escape characters '!'.
void AsmParser::altMacroString(StringRef AltMacroStr,std::string &Res) {
for (size_t Pos = 0; Pos < AltMacroStr.size(); Pos++) {
if (AltMacroStr[Pos] == '!')
}
}
-/// \brief Parse an expression and return it.
+/// Parse an expression and return it.
///
/// expr ::= expr &&,|| expr -> lowest.
/// expr ::= expr |,^,&,! expr
: getGNUBinOpPrecedence(K, Kind, ShouldUseLogicalShr);
}
-/// \brief Parse all binary operators with precedence >= 'Precedence'.
+/// Parse all binary operators with precedence >= 'Precedence'.
/// Res contains the LHS of the expression on input.
bool AsmParser::parseBinOpRHS(unsigned Precedence, const MCExpr *&Res,
SMLoc &EndLoc) {
return false;
}
-/// \brief will use the last parsed cpp hash line filename comment
+/// will use the last parsed cpp hash line filename comment
/// for the Filename and LineNo if any in the diagnostic.
void AsmParser::DiagHandler(const SMDiagnostic &Diag, void *Context) {
const AsmParser *Parser = static_cast<const AsmParser *>(Context);
return false;
}
-/// \brief parse register name or number.
+/// parse register name or number.
bool AsmParser::parseRegisterOrRegisterNumber(int64_t &Register,
SMLoc DirectiveLoc) {
unsigned RegNo;
} // end namespace MCParserUtils
} // end namespace llvm
-/// \brief Create an MCAsmParser instance.
+/// Create an MCAsmParser instance.
MCAsmParser *llvm::createMCAsmParser(SourceMgr &SM, MCContext &C,
MCStreamer &Out, const MCAsmInfo &MAI,
unsigned CB) {
namespace {
-/// \brief Implementation of directive handling which is shared across all
+/// Implementation of directive handling which is shared across all
/// Darwin targets.
class DarwinAsmParser : public MCAsmParserExtension {
template<bool (DarwinAsmParser::*HandlerMethod)(StringRef, SMLoc)>
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief The DWARF component of yaml2obj. Provided as library code for tests.
+/// The DWARF component of yaml2obj. Provided as library code for tests.
///
//===----------------------------------------------------------------------===//
}
namespace {
-/// \brief An extension of the DWARFYAML::ConstVisitor which writes compile
+/// An extension of the DWARFYAML::ConstVisitor which writes compile
/// units and DIEs to a stream.
class DumpVisitor : public DWARFYAML::ConstVisitor {
raw_ostream &OS;
struct FormValue;
struct AttributeAbbrev;
-/// \brief A class to visits DWARFYAML Compile Units and DIEs in preorder.
+/// A class to visits DWARFYAML Compile Units and DIEs in preorder.
///
/// Extensions of this class can either maintain const or non-const references
/// to the DWARFYAML::Data object.
namespace {
-/// \brief No-op module pass which does nothing.
+/// No-op module pass which does nothing.
struct NoOpModulePass {
PreservedAnalyses run(Module &M, ModuleAnalysisManager &) {
return PreservedAnalyses::all();
static StringRef name() { return "NoOpModulePass"; }
};
-/// \brief No-op module analysis.
+/// No-op module analysis.
class NoOpModuleAnalysis : public AnalysisInfoMixin<NoOpModuleAnalysis> {
friend AnalysisInfoMixin<NoOpModuleAnalysis>;
static AnalysisKey Key;
static StringRef name() { return "NoOpModuleAnalysis"; }
};
-/// \brief No-op CGSCC pass which does nothing.
+/// No-op CGSCC pass which does nothing.
struct NoOpCGSCCPass {
PreservedAnalyses run(LazyCallGraph::SCC &C, CGSCCAnalysisManager &,
LazyCallGraph &, CGSCCUpdateResult &UR) {
static StringRef name() { return "NoOpCGSCCPass"; }
};
-/// \brief No-op CGSCC analysis.
+/// No-op CGSCC analysis.
class NoOpCGSCCAnalysis : public AnalysisInfoMixin<NoOpCGSCCAnalysis> {
friend AnalysisInfoMixin<NoOpCGSCCAnalysis>;
static AnalysisKey Key;
static StringRef name() { return "NoOpCGSCCAnalysis"; }
};
-/// \brief No-op function pass which does nothing.
+/// No-op function pass which does nothing.
struct NoOpFunctionPass {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &) {
return PreservedAnalyses::all();
static StringRef name() { return "NoOpFunctionPass"; }
};
-/// \brief No-op function analysis.
+/// No-op function analysis.
class NoOpFunctionAnalysis : public AnalysisInfoMixin<NoOpFunctionAnalysis> {
friend AnalysisInfoMixin<NoOpFunctionAnalysis>;
static AnalysisKey Key;
static StringRef name() { return "NoOpFunctionAnalysis"; }
};
-/// \brief No-op loop pass which does nothing.
+/// No-op loop pass which does nothing.
struct NoOpLoopPass {
PreservedAnalyses run(Loop &L, LoopAnalysisManager &,
LoopStandardAnalysisResults &, LPMUpdater &) {
static StringRef name() { return "NoOpLoopPass"; }
};
-/// \brief No-op loop analysis.
+/// No-op loop analysis.
class NoOpLoopAnalysis : public AnalysisInfoMixin<NoOpLoopAnalysis> {
friend AnalysisInfoMixin<NoOpLoopAnalysis>;
static AnalysisKey Key;
namespace {
-/// \brief Distributes functions into instantiation sets.
+/// Distributes functions into instantiation sets.
///
/// An instantiation set is a collection of functions that have the same source
/// code, ie, template functions specializations.
static const unsigned EncodingExpansionRegionBit = 1
<< Counter::EncodingTagBits;
-/// \brief Read the sub-array of regions for the given inferred file id.
+/// Read the sub-array of regions for the given inferred file id.
/// \param NumFileIDs the number of file ids that are defined for this
/// function.
Error RawCoverageMappingReader::readMappingRegionsSubArray(
namespace {
-/// \brief Gather only the expressions that are used by the mapping
+/// Gather only the expressions that are used by the mapping
/// regions in this function.
class CounterExpressionsMinimizer {
ArrayRef<CounterExpression> Expressions;
ArrayRef<CounterExpression> getExpressions() const { return UsedExpressions; }
- /// \brief Adjust the given counter to correctly transition from the old
+ /// Adjust the given counter to correctly transition from the old
/// expression ids to the new expression ids.
Counter adjust(Counter C) const {
if (C.isExpression())
} // end anonymous namespace
-/// \brief Encode the counter.
+/// Encode the counter.
///
/// The encoding uses the following format:
/// Low 2 bits - Tag:
#include "llvm/ProfileData/InstrProfData.inc"
/*!
- * \brief ValueProfRecordClosure Interface implementation for InstrProfRecord
+ * ValueProfRecordClosure Interface implementation for InstrProfRecord
* class. These C wrappers are used as adaptors so that C++ code can be
* invoked as callbacks.
*/
LLVM_DUMP_METHOD void LineLocation::dump() const { print(dbgs()); }
#endif
-/// \brief Print the sample record to the stream \p OS indented by \p Indent.
+/// Print the sample record to the stream \p OS indented by \p Indent.
void SampleRecord::print(raw_ostream &OS, unsigned Indent) const {
OS << NumSamples;
if (hasCalls()) {
return OS;
}
-/// \brief Print the samples collected for a function on stream \p OS.
+/// Print the samples collected for a function on stream \p OS.
void FunctionSamples::print(raw_ostream &OS, unsigned Indent) const {
OS << TotalSamples << ", " << TotalHeadSamples << ", " << BodySamples.size()
<< " sampled lines\n";
using namespace llvm;
using namespace sampleprof;
-/// \brief Dump the function profile for \p FName.
+/// Dump the function profile for \p FName.
///
/// \param FName Name of the function to print.
/// \param OS Stream to emit the output to.
OS << "Function: " << FName << ": " << Profiles[FName];
}
-/// \brief Dump all the function profiles found on stream \p OS.
+/// Dump all the function profiles found on stream \p OS.
void SampleProfileReader::dump(raw_ostream &OS) {
for (const auto &I : Profiles)
dumpFunctionProfile(I.getKey(), OS);
}
-/// \brief Parse \p Input as function head.
+/// Parse \p Input as function head.
///
/// Parse one line of \p Input, and update function name in \p FName,
/// function's total sample count in \p NumSamples, function's entry
return true;
}
-/// \brief Returns true if line offset \p L is legal (only has 16 bits).
+/// Returns true if line offset \p L is legal (only has 16 bits).
static bool isOffsetLegal(unsigned L) { return (L & 0xffff) == L; }
-/// \brief Parse \p Input as line sample.
+/// Parse \p Input as line sample.
///
/// \param Input input line.
/// \param IsCallsite true if the line represents an inlined callsite.
return true;
}
-/// \brief Load samples from a text file.
+/// Load samples from a text file.
///
/// See the documentation at the top of the file for an explanation of
/// the expected format.
return sampleprof_error::success;
}
-/// \brief Read a GCC AutoFDO profile.
+/// Read a GCC AutoFDO profile.
///
/// This format is generated by the Linux Perf conversion tool at
/// https://github.com/google/autofdo.
return Magic == "adcg*704";
}
-/// \brief Prepare a memory buffer for the contents of \p Filename.
+/// Prepare a memory buffer for the contents of \p Filename.
///
/// \returns an error code indicating the status of the buffer.
static ErrorOr<std::unique_ptr<MemoryBuffer>>
return std::move(Buffer);
}
-/// \brief Create a sample profile reader based on the format of the input file.
+/// Create a sample profile reader based on the format of the input file.
///
/// \param Filename The file to open.
///
return create(BufferOrError.get(), C);
}
-/// \brief Create a sample profile reader based on the format of the input data.
+/// Create a sample profile reader based on the format of the input data.
///
/// \param B The memory buffer to create the reader from (assumes ownership).
///
return sampleprof_error::success;
}
-/// \brief Write samples to a text file.
+/// Write samples to a text file.
///
/// Note: it may be tempting to implement this in terms of
/// FunctionSamples::print(). Please don't. The dump functionality is intended
return sampleprof_error::success;
}
-/// \brief Write samples of a top-level function to a binary file.
+/// Write samples of a top-level function to a binary file.
///
/// \returns true if the samples were written successfully, false otherwise.
std::error_code SampleProfileWriterBinary::write(const FunctionSamples &S) {
return writeBody(S);
}
-/// \brief Create a sample profile file writer based on the specified format.
+/// Create a sample profile file writer based on the specified format.
///
/// \param Filename The file to create.
///
return create(OS, Format);
}
-/// \brief Create a sample profile stream writer based on the specified format.
+/// Create a sample profile stream writer based on the specified format.
///
/// \param OS The output stream to store the profile data to.
///
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU metadata definitions and in-memory representations.
+/// AMDGPU metadata definitions and in-memory representations.
///
//
//===----------------------------------------------------------------------===//
return BinaryStreamRef(*BorrowedImpl, ViewOffset, Length);
}
-/// \brief For buffered streams, commits changes to the backing store.
+/// For buffered streams, commits changes to the backing store.
Error WritableBinaryStreamRef::commit() { return BorrowedImpl->commit(); }
return true;
}
-/// \brief Expand response files on a command line recursively using the given
+/// Expand response files on a command line recursively using the given
/// StringSaver and tokenization strategy.
bool cl::ExpandResponseFiles(StringSaver &Saver, TokenizerCallback Tokenizer,
SmallVectorImpl<const char *> &Argv,
CurrentContext->set(Next);
}
- /// \brief Called when the separate crash-recovery thread was finished, to
+ /// Called when the separate crash-recovery thread was finished, to
/// indicate that we don't need to clear the thread-local CurrentContext.
void setSwitchedThread() {
#if defined(LLVM_ENABLE_THREADS) && LLVM_ENABLE_THREADS != 0
return Str;
}
-/// \brief Get a color string for this node number. Simply round-robin selects
+/// Get a color string for this node number. Simply round-robin selects
/// from a reasonable number of colors.
StringRef llvm::DOT::getColorString(unsigned ColorNumber) {
static const int NumColors = 20;
using namespace llvm;
-/// \brief Attempt to read the lock file with the given name, if it exists.
+/// Attempt to read the lock file with the given name, if it exists.
///
/// \param LockFileName The name of the lock file to read.
///
using namespace llvm;
-/// \brief This processes one or more 64-byte data blocks, but does NOT update
+/// This processes one or more 64-byte data blocks, but does NOT update
///the bit counters. There are no alignment requirements.
const uint8_t *MD5::body(ArrayRef<uint8_t> Data) {
const uint8_t *ptr;
update(SVal);
}
-/// \brief Finish the hash and place the resulting hash into \p result.
+/// Finish the hash and place the resulting hash into \p result.
/// \param Result is assumed to be a minimum of 16-bytes in size.
void MD5::final(MD5Result &Result) {
unsigned long used, free;
//===----------------------------------------------------------------------===//
namespace {
-/// \brief Memory maps a file descriptor using sys::fs::mapped_file_region.
+/// Memory maps a file descriptor using sys::fs::mapped_file_region.
///
/// This handles converting the offset into a legal offset on the platform.
template<typename MB>
namespace {
-/// \brief An abstract class that takes closures and runs them asynchronously.
+/// An abstract class that takes closures and runs them asynchronously.
class Executor {
public:
virtual ~Executor() = default;
}
#elif defined(_MSC_VER)
-/// \brief An Executor that runs tasks via ConcRT.
+/// An Executor that runs tasks via ConcRT.
class ConcRTExecutor : public Executor {
struct Taskish {
Taskish(std::function<void()> Task) : Task(Task) {}
}
#else
-/// \brief An implementation of an Executor that runs closures on a thread pool
+/// An implementation of an Executor that runs closures on a thread pool
/// in filo order.
class ThreadPoolExecutor : public Executor {
public:
llvm_unreachable("unknown architecture");
}
-/// \brief Construct a triple from the string representation provided.
+/// Construct a triple from the string representation provided.
///
/// This stores the string representation and parses the various pieces into
/// enum members.
ObjectFormat = getDefaultFormat(*this);
}
-/// \brief Construct a triple from string representations of the architecture,
+/// Construct a triple from string representations of the architecture,
/// vendor, and OS.
///
/// This joins each argument into a canonical string representation and parses
ObjectFormat = getDefaultFormat(*this);
}
-/// \brief Construct a triple from string representations of the architecture,
+/// Construct a triple from string representations of the architecture,
/// vendor, OS, and environment.
///
/// This joins each argument into a canonical string representation and parses
return std::error_code();
}
-/// \brief Perform wildcard expansion of Arg, or just push it into Args if it
+/// Perform wildcard expansion of Arg, or just push it into Args if it
/// doesn't have wildcards or doesn't match any files.
static std::error_code WildcardExpand(const wchar_t *Arg,
SmallVectorImpl<const char *> &Args,
Cleanup();
}
-/// \brief Find the Windows Registry Key for a given location.
+/// Find the Windows Registry Key for a given location.
///
/// \returns a valid HKEY if the location exists, else NULL.
static HKEY FindWERKey(const llvm::Twine &RegistryLocation) {
return Key;
}
-/// \brief Populate ResultDirectory with the value for "DumpFolder" for a given
+/// Populate ResultDirectory with the value for "DumpFolder" for a given
/// Windows Registry key.
///
/// \returns true if a valid value for DumpFolder exists, false otherwise.
return true;
}
-/// \brief Populate ResultType with a valid MINIDUMP_TYPE based on the value of
+/// Populate ResultType with a valid MINIDUMP_TYPE based on the value of
/// "DumpType" for a given Windows Registry key.
///
/// According to
return true;
}
-/// \brief Write a Windows dump file containing process information that can be
+/// Write a Windows dump file containing process information that can be
/// used for post-mortem debugging.
///
/// \returns zero error code if a mini dump created, actual error code
return 1;
}
-/// \brief Create a dependency file for `-d` option.
+/// Create a dependency file for `-d` option.
///
/// This functionality is really only for the benefit of the build system.
/// It is similar to GCC's `-M*` family of options.
return false;
}
-/// \brief Apply the current let bindings to \a CurRec.
+/// Apply the current let bindings to \a CurRec.
/// \returns true on error, false otherwise.
bool TGParser::ApplyLetStack(Record *CurRec) {
for (SmallVectorImpl<LetRecord> &LetInfo : LetStack)
StringRef getPassName() const override { return "AArch64 Assembly Printer"; }
- /// \brief Wrapper for MCInstLowering.lowerOperand() for the
+ /// Wrapper for MCInstLowering.lowerOperand() for the
/// tblgen'erated pseudo lowering.
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const {
return MCInstLowering.lowerOperand(MO, MCOp);
void EmitSled(const MachineInstr &MI, SledKind Kind);
- /// \brief tblgen'erated driver function for lowering simple MI->MC
+ /// tblgen'erated driver function for lowering simple MI->MC
/// pseudo instructions.
bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
const MachineInstr *MI);
AArch64FunctionInfo *AArch64FI = nullptr;
- /// \brief Emit the LOHs contained in AArch64FI.
+ /// Emit the LOHs contained in AArch64FI.
void EmitLOHs();
/// Emit instruction to set float register to zero.
INITIALIZE_PASS(AArch64ExpandPseudo, "aarch64-expand-pseudo",
AARCH64_EXPAND_PSEUDO_NAME, false, false)
-/// \brief Transfer implicit operands on the pseudo instruction to the
+/// Transfer implicit operands on the pseudo instruction to the
/// instructions created from the expansion.
static void transferImpOps(MachineInstr &OldMI, MachineInstrBuilder &UseMI,
MachineInstrBuilder &DefMI) {
}
}
-/// \brief Helper function which extracts the specified 16-bit chunk from a
+/// Helper function which extracts the specified 16-bit chunk from a
/// 64-bit value.
static uint64_t getChunk(uint64_t Imm, unsigned ChunkIdx) {
assert(ChunkIdx < 4 && "Out of range chunk index specified!");
return (Imm >> (ChunkIdx * 16)) & 0xFFFF;
}
-/// \brief Helper function which replicates a 16-bit chunk within a 64-bit
+/// Helper function which replicates a 16-bit chunk within a 64-bit
/// value. Indices correspond to element numbers in a v4i16.
static uint64_t replicateChunk(uint64_t Imm, unsigned FromIdx, unsigned ToIdx) {
assert((FromIdx < 4) && (ToIdx < 4) && "Out of range chunk index specified!");
return Imm | Chunk;
}
-/// \brief Helper function which tries to materialize a 64-bit value with an
+/// Helper function which tries to materialize a 64-bit value with an
/// ORR + MOVK instruction sequence.
static bool tryOrrMovk(uint64_t UImm, uint64_t OrrImm, MachineInstr &MI,
MachineBasicBlock &MBB,
return false;
}
-/// \brief Check whether the given 16-bit chunk replicated to full 64-bit width
+/// Check whether the given 16-bit chunk replicated to full 64-bit width
/// can be materialized with an ORR instruction.
static bool canUseOrr(uint64_t Chunk, uint64_t &Encoding) {
Chunk = (Chunk << 48) | (Chunk << 32) | (Chunk << 16) | Chunk;
return AArch64_AM::processLogicalImmediate(Chunk, 64, Encoding);
}
-/// \brief Check for identical 16-bit chunks within the constant and if so
+/// Check for identical 16-bit chunks within the constant and if so
/// materialize them with a single ORR instruction. The remaining one or two
/// 16-bit chunks will be materialized with MOVK instructions.
///
return false;
}
-/// \brief Check whether this chunk matches the pattern '1...0...'. This pattern
+/// Check whether this chunk matches the pattern '1...0...'. This pattern
/// starts a contiguous sequence of ones if we look at the bits from the LSB
/// towards the MSB.
static bool isStartChunk(uint64_t Chunk) {
return isMask_64(~Chunk);
}
-/// \brief Check whether this chunk matches the pattern '0...1...' This pattern
+/// Check whether this chunk matches the pattern '0...1...' This pattern
/// ends a contiguous sequence of ones if we look at the bits from the LSB
/// towards the MSB.
static bool isEndChunk(uint64_t Chunk) {
return isMask_64(Chunk);
}
-/// \brief Clear or set all bits in the chunk at the given index.
+/// Clear or set all bits in the chunk at the given index.
static uint64_t updateImm(uint64_t Imm, unsigned Idx, bool Clear) {
const uint64_t Mask = 0xFFFF;
return Imm;
}
-/// \brief Check whether the constant contains a sequence of contiguous ones,
+/// Check whether the constant contains a sequence of contiguous ones,
/// which might be interrupted by one or two chunks. If so, materialize the
/// sequence of contiguous ones with an ORR instruction.
/// Materialize the chunks which are either interrupting the sequence or outside
return true;
}
-/// \brief Expand a MOVi32imm or MOVi64imm pseudo instruction to one or more
+/// Expand a MOVi32imm or MOVi64imm pseudo instruction to one or more
/// real move-immediate instructions to synthesize the immediate.
bool AArch64ExpandPseudo::expandMOVImm(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
return true;
}
-/// \brief If MBBI references a pseudo instruction that should be expanded here,
+/// If MBBI references a pseudo instruction that should be expanded here,
/// do the expansion and return true. Otherwise return false.
bool AArch64ExpandPseudo::expandMI(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
return false;
}
-/// \brief Iterate over the instructions in basic block MBB and expand any
+/// Iterate over the instructions in basic block MBB and expand any
/// pseudo instructions. Return true if anything was modified.
bool AArch64ExpandPseudo::expandMBB(MachineBasicBlock &MBB) {
bool Modified = false;
return Modified;
}
-/// \brief Returns an instance of the pseudo instruction expansion pass.
+/// Returns an instance of the pseudo instruction expansion pass.
FunctionPass *llvm::createAArch64ExpandPseudoPass() {
return new AArch64ExpandPseudo();
}
#include "AArch64GenCallingConv.inc"
-/// \brief Check if the sign-/zero-extend will be a noop.
+/// Check if the sign-/zero-extend will be a noop.
static bool isIntExtFree(const Instruction *I) {
assert((isa<ZExtInst>(I) || isa<SExtInst>(I)) &&
"Unexpected integer extend instruction.");
return false;
}
-/// \brief Determine the implicit scale factor that is applied by a memory
+/// Determine the implicit scale factor that is applied by a memory
/// operation for a given value type.
static unsigned getImplicitScaleFactor(MVT VT) {
switch (VT.SimpleTy) {
return fastEmitInst_r(Opc, TLI.getRegClassFor(VT), ZReg, /*IsKill=*/true);
}
-/// \brief Check if the multiply is by a power-of-2 constant.
+/// Check if the multiply is by a power-of-2 constant.
static bool isMulPowOf2(const Value *I) {
if (const auto *MI = dyn_cast<MulOperator>(I)) {
if (const auto *C = dyn_cast<ConstantInt>(MI->getOperand(0)))
return TLI.isTypeLegal(VT);
}
-/// \brief Determine if the value type is supported by FastISel.
+/// Determine if the value type is supported by FastISel.
///
/// FastISel for AArch64 can handle more value types than are legal. This adds
/// simple value type such as i1, i8, and i16.
IsZExt);
}
-/// \brief This method is a wrapper to simplify add emission.
+/// This method is a wrapper to simplify add emission.
///
/// First try to emit an add with an immediate operand using emitAddSub_ri. If
/// that fails, then try to materialize the immediate into a register and use
}
}
-/// \brief Try to emit a combined compare-and-branch instruction.
+/// Try to emit a combined compare-and-branch instruction.
bool AArch64FastISel::emitCompareAndBranch(const BranchInst *BI) {
assert(isa<CmpInst>(BI->getCondition()) && "Expected cmp instruction");
const CmpInst *CI = cast<CmpInst>(BI->getCondition());
return true;
}
-/// \brief Optimize selects of i1 if one of the operands has a 'true' or 'false'
+/// Optimize selects of i1 if one of the operands has a 'true' or 'false'
/// value.
bool AArch64FastISel::optimizeSelect(const SelectInst *SI) {
if (!SI->getType()->isIntegerTy(1))
return true;
}
-/// \brief Check if it is possible to fold the condition from the XALU intrinsic
+/// Check if it is possible to fold the condition from the XALU intrinsic
/// into the user. The condition code will only be updated on success.
bool AArch64FastISel::foldXALUIntrinsic(AArch64CC::CondCode &CC,
const Instruction *I,
std::vector<CalleeSavedInfo> &CSI,
const TargetRegisterInfo *TRI) const override;
- /// \brief Can this function use the red zone for local allocations.
+ /// Can this function use the red zone for local allocations.
bool canUseRedZone(const MachineFunction &MF) const;
bool hasFP(const MachineFunction &MF) const override;
}
}
-/// \brief Determine whether it is worth it to fold SHL into the addressing
+/// Determine whether it is worth it to fold SHL into the addressing
/// mode.
static bool isWorthFoldingSHL(SDValue V) {
assert(V.getOpcode() == ISD::SHL && "invalid opcode");
return true;
}
-/// \brief Determine whether it is worth to fold V into an extended register.
+/// Determine whether it is worth to fold V into an extended register.
bool AArch64DAGToDAGISel::isWorthFolding(SDValue V) const {
// Trivial if we are optimizing for code size or if there is only
// one use of the value.
return SDValue(Node, 0);
}
-/// \brief Check if the given SHL node (\p N), can be used to form an
+/// Check if the given SHL node (\p N), can be used to form an
/// extended register for an addressing mode.
bool AArch64DAGToDAGISel::SelectExtendedSHL(SDValue N, unsigned Size,
bool WantExtend, SDValue &Offset,
return Result;
}
-/// \brief Convert a TLS address reference into the correct sequence of loads
+/// Convert a TLS address reference into the correct sequence of loads
/// and calls to compute the variable's address (for Darwin, currently) and
/// return an SDValue containing the final node.
return VecSize == 64 || VecSize % 128 == 0;
}
-/// \brief Lower an interleaved load into a ldN intrinsic.
+/// Lower an interleaved load into a ldN intrinsic.
///
/// E.g. Lower an interleaved load (Factor = 2):
/// %wide.vec = load <8 x i32>, <8 x i32>* %ptr
return true;
}
-/// \brief Lower an interleaved store into a stN intrinsic.
+/// Lower an interleaved store into a stN intrinsic.
///
/// E.g. Lower an interleaved store (Factor = 3):
/// %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1,
N.getOperand(0).getOpcode() == ISD::EXTRACT_SUBVECTOR;
}
-/// \brief Helper structure to keep track of ISD::SET_CC operands.
+/// Helper structure to keep track of ISD::SET_CC operands.
struct GenericSetCCInfo {
const SDValue *Opnd0;
const SDValue *Opnd1;
ISD::CondCode CC;
};
-/// \brief Helper structure to keep track of a SET_CC lowered into AArch64 code.
+/// Helper structure to keep track of a SET_CC lowered into AArch64 code.
struct AArch64SetCCInfo {
const SDValue *Cmp;
AArch64CC::CondCode CC;
};
-/// \brief Helper structure to keep track of SetCC information.
+/// Helper structure to keep track of SetCC information.
union SetCCInfo {
GenericSetCCInfo Generic;
AArch64SetCCInfo AArch64;
};
-/// \brief Helper structure to be able to read SetCC information. If set to
+/// Helper structure to be able to read SetCC information. If set to
/// true, IsAArch64 field, Info is a AArch64SetCCInfo, otherwise Info is a
/// GenericSetCCInfo.
struct SetCCInfoAndKind {
bool IsAArch64;
};
-/// \brief Check whether or not \p Op is a SET_CC operation, either a generic or
+/// Check whether or not \p Op is a SET_CC operation, either a generic or
/// an
/// AArch64 lowered one.
/// \p SetCCInfo is filled accordingly.
unsigned AS,
Instruction *I = nullptr) const override;
- /// \brief Return the cost of the scaling factor used in the addressing
+ /// Return the cost of the scaling factor used in the addressing
/// mode represented by AM for this target, for a load/store
/// of the specified type.
/// If the AM is supported, the return value must be >= 0.
const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const override;
- /// \brief Returns false if N is a bit extraction pattern of (X >> C) & Mask.
+ /// Returns false if N is a bit extraction pattern of (X >> C) & Mask.
bool isDesirableToCommuteWithShift(const SDNode *N) const override;
- /// \brief Returns true if it is beneficial to convert a load of a constant
+ /// Returns true if it is beneficial to convert a load of a constant
/// to just the constant itself.
bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
Type *Ty) const override;
return true;
}
-/// \brief Return the opcode that does not set flags when possible - otherwise
+/// Return the opcode that does not set flags when possible - otherwise
/// return the original opcode. The caller is responsible to do the actual
/// substitution and legality checking.
static unsigned convertToNonFlagSettingOpc(const MachineInstr &MI) {
DelInstrs.push_back(&Root);
}
-/// \brief Replace csincr-branch sequence by simple conditional branch
+/// Replace csincr-branch sequence by simple conditional branch
///
/// Examples:
/// 1. \code
/// value is non-zero.
static bool hasExtendedReg(const MachineInstr &MI);
- /// \brief Does this instruction set its full destination register to zero?
+ /// Does this instruction set its full destination register to zero?
static bool isGPRZero(const MachineInstr &MI);
- /// \brief Does this instruction rename a GPR without modifying bits?
+ /// Does this instruction rename a GPR without modifying bits?
static bool isGPRCopy(const MachineInstr &MI);
- /// \brief Does this instruction rename an FPR without modifying bits?
+ /// Does this instruction rename an FPR without modifying bits?
static bool isFPRCopy(const MachineInstr &MI);
/// Return true if this is load/store scales or extends its register offset.
/// Return true if pairing the given load or store may be paired with another.
static bool isPairableLdStInst(const MachineInstr &MI);
- /// \brief Return the opcode that set flags when possible. The caller is
+ /// Return the opcode that set flags when possible. The caller is
/// responsible for ensuring the opc has a flag setting equivalent.
static unsigned convertToFlagSettingOpc(unsigned Opc, bool &Is64Bit);
/// Return the immediate offset of the base register in a load/store \p LdSt.
MachineOperand &getMemOpBaseRegImmOfsOffsetOperand(MachineInstr &LdSt) const;
- /// \brief Returns true if opcode \p Opc is a memory operation. If it is, set
+ /// Returns true if opcode \p Opc is a memory operation. If it is, set
/// \p Scale, \p Width, \p MinOffset, and \p MaxOffset accordingly.
///
/// For unscaled instructions, \p Scale is set to 1.
bool isFalkorShiftExtFast(const MachineInstr &MI) const;
private:
- /// \brief Sets the offsets on outlined instructions in \p MBB which use SP
+ /// Sets the offsets on outlined instructions in \p MBB which use SP
/// so that they will be valid post-outlining.
///
/// \param MBB A \p MachineBasicBlock in an outlined function.
unsigned FrameReg, int &Offset,
const AArch64InstrInfo *TII);
-/// \brief Use to report the frame offset status in isAArch64FrameOffsetLegal.
+/// Use to report the frame offset status in isAArch64FrameOffsetLegal.
enum AArch64FrameOffsetStatus {
AArch64FrameOffsetCannotUpdate = 0x0, ///< Offset cannot apply.
AArch64FrameOffsetIsLegal = 0x1, ///< Offset is legal.
AArch64FrameOffsetCanUpdate = 0x2 ///< Offset can apply, at least partly.
};
-/// \brief Check if the @p Offset is a valid frame offset for @p MI.
+/// Check if the @p Offset is a valid frame offset for @p MI.
/// The returned value reports the validity of the frame offset for @p MI.
/// It uses the values defined by AArch64FrameOffsetStatus for that.
/// If result == AArch64FrameOffsetCannotUpdate, @p MI cannot be updated to
/// determineCalleeSaves().
bool HasStackFrame = false;
- /// \brief Amount of stack frame size, not including callee-saved registers.
+ /// Amount of stack frame size, not including callee-saved registers.
unsigned LocalStackSize;
- /// \brief Amount of stack frame size used for saving callee-saved registers.
+ /// Amount of stack frame size used for saving callee-saved registers.
unsigned CalleeSavedStackSize;
- /// \brief Number of TLS accesses using the special (combinable)
+ /// Number of TLS accesses using the special (combinable)
/// _TLS_MODULE_BASE_ symbol.
unsigned NumLocalDynamicTLSAccesses = 0;
- /// \brief FrameIndex for start of varargs area for arguments passed on the
+ /// FrameIndex for start of varargs area for arguments passed on the
/// stack.
int VarArgsStackIndex = 0;
- /// \brief FrameIndex for start of varargs area for arguments passed in
+ /// FrameIndex for start of varargs area for arguments passed in
/// general purpose registers.
int VarArgsGPRIndex = 0;
- /// \brief Size of the varargs area for arguments passed in general purpose
+ /// Size of the varargs area for arguments passed in general purpose
/// registers.
unsigned VarArgsGPRSize = 0;
- /// \brief FrameIndex for start of varargs area for arguments passed in
+ /// FrameIndex for start of varargs area for arguments passed in
/// floating-point registers.
int VarArgsFPRIndex = 0;
- /// \brief Size of the varargs area for arguments passed in floating-point
+ /// Size of the varargs area for arguments passed in floating-point
/// registers.
unsigned VarArgsFPRSize = 0;
/// other stack allocations.
bool CalleeSaveStackHasFreeSpace = false;
- /// \brief Has a value when it is known whether or not the function uses a
+ /// Has a value when it is known whether or not the function uses a
/// redzone, and no value otherwise.
/// Initialized during frame lowering, unless the function has the noredzone
/// attribute, in which case it is set to false at construction.
return false;
}
-/// \brief Check if the instr pair, FirstMI and SecondMI, should be fused
+/// Check if the instr pair, FirstMI and SecondMI, should be fused
/// together. Given SecondMI, when FirstMI is unspecified, then check if
/// SecondMI may be part of a fused pair at all.
static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
bool hasFuseCCSelect() const { return HasFuseCCSelect; }
bool hasFuseLiterals() const { return HasFuseLiterals; }
- /// \brief Return true if the CPU supports any kind of instruction fusion.
+ /// Return true if the CPU supports any kind of instruction fusion.
bool hasFusion() const {
return hasArithmeticBccFusion() || hasArithmeticCbzFusion() ||
hasFuseAES() || hasFuseCCSelect() || hasFuseLiterals();
return (CallerBits & CalleeBits) == CalleeBits;
}
-/// \brief Calculate the cost of materializing a 64-bit value. This helper
+/// Calculate the cost of materializing a 64-bit value. This helper
/// method might only calculate a fraction of a larger immediate. Therefore it
/// is valid to return a cost of ZERO.
int AArch64TTIImpl::getIntImmCost(int64_t Val) {
return (64 - LZ + 15) / 16;
}
-/// \brief Calculate the cost of materializing the given constant.
+/// Calculate the cost of materializing the given constant.
int AArch64TTIImpl::getIntImmCost(const APInt &Imm, Type *Ty) {
assert(Ty->isIntegerTy());
} // end anonymous namespace
-/// \brief The number of bytes the fixup may change.
+/// The number of bytes the fixup may change.
static unsigned getFixupKindNumBytes(unsigned Kind) {
switch (Kind) {
default:
namespace CU {
-/// \brief Compact unwind encoding values.
+/// Compact unwind encoding values.
enum CompactUnwindEncodings {
- /// \brief A "frameless" leaf function, where no non-volatile registers are
+ /// A "frameless" leaf function, where no non-volatile registers are
/// saved. The return remains in LR throughout the function.
UNWIND_ARM64_MODE_FRAMELESS = 0x02000000,
- /// \brief No compact unwind encoding available. Instead the low 23-bits of
+ /// No compact unwind encoding available. Instead the low 23-bits of
/// the compact unwind encoding is the offset of the DWARF FDE in the
/// __eh_frame section. This mode is never used in object files. It is only
/// generated by the linker in final linked images, which have only DWARF info
/// for a function.
UNWIND_ARM64_MODE_DWARF = 0x03000000,
- /// \brief This is a standard arm64 prologue where FP/LR are immediately
+ /// This is a standard arm64 prologue where FP/LR are immediately
/// pushed on the stack, then SP is copied to FP. If there are any
/// non-volatile register saved, they are copied into the stack fame in pairs
/// in a contiguous ranger right below the saved FP/LR pair. Any subset of the
/// in register number order.
UNWIND_ARM64_MODE_FRAME = 0x04000000,
- /// \brief Frame register pair encodings.
+ /// Frame register pair encodings.
UNWIND_ARM64_FRAME_X19_X20_PAIR = 0x00000001,
UNWIND_ARM64_FRAME_X21_X22_PAIR = 0x00000002,
UNWIND_ARM64_FRAME_X23_X24_PAIR = 0x00000004,
class DarwinAArch64AsmBackend : public AArch64AsmBackend {
const MCRegisterInfo &MRI;
- /// \brief Encode compact unwind stack adjustment for frameless functions.
+ /// Encode compact unwind stack adjustment for frameless functions.
/// See UNWIND_ARM64_FRAMELESS_STACK_SIZE_MASK in compact_unwind_encoding.h.
/// The stack size always needs to be 16 byte aligned.
uint32_t encodeStackAdjustment(uint32_t StackSize) const {
MachO::CPU_SUBTYPE_ARM64_ALL);
}
- /// \brief Generate the compact unwind encoding from the CFI directives.
+ /// Generate the compact unwind encoding from the CFI directives.
uint32_t generateCompactUnwindEncoding(
ArrayRef<MCCFIInstruction> Instrs) const override {
if (Instrs.empty())
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU Assembly printer class.
+/// AMDGPU Assembly printer class.
//
//===----------------------------------------------------------------------===//
const MachineFunction &MF,
const SIProgramInfo &ProgramInfo) const;
- /// \brief Emit register usage information so that the GPU driver
+ /// Emit register usage information so that the GPU driver
/// can correctly setup the GPU state.
void EmitProgramInfoR600(const MachineFunction &MF);
void EmitProgramInfoSI(const MachineFunction &MF,
bool doFinalization(Module &M) override;
bool runOnMachineFunction(MachineFunction &MF) override;
- /// \brief Wrapper for MCInstLowering.lowerOperand() for the tblgen'erated
+ /// Wrapper for MCInstLowering.lowerOperand() for the tblgen'erated
/// pseudo lowering.
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
- /// \brief Lower the specified LLVM Constant to an MCExpr.
+ /// Lower the specified LLVM Constant to an MCExpr.
/// The AsmPrinter::lowerConstantof does not know how to lower
/// addrspacecast, therefore they should be lowered by this function.
const MCExpr *lowerConstant(const Constant *CV) override;
- /// \brief tblgen'erated driver function for lowering simple MI->MC pseudo
+ /// tblgen'erated driver function for lowering simple MI->MC pseudo
/// instructions.
bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
const MachineInstr *MI);
bool HasUnsafeFPMath = false;
AMDGPUAS AMDGPUASI;
- /// \brief Copies exact/nsw/nuw flags (if any) from binary operation \p I to
+ /// Copies exact/nsw/nuw flags (if any) from binary operation \p I to
/// binary operation \p V.
///
/// \returns Binary operation \p V.
/// false otherwise.
bool needsPromotionToI32(const Type *T) const;
- /// \brief Promotes uniform binary operation \p I to equivalent 32 bit binary
+ /// Promotes uniform binary operation \p I to equivalent 32 bit binary
/// operation.
///
/// \details \p I's base element bit width must be greater than 1 and less
/// false otherwise.
bool promoteUniformOpToI32(BinaryOperator &I) const;
- /// \brief Promotes uniform 'icmp' operation \p I to 32 bit 'icmp' operation.
+ /// Promotes uniform 'icmp' operation \p I to 32 bit 'icmp' operation.
///
/// \details \p I's base element bit width must be greater than 1 and less
/// than or equal 16. Promotion is done by sign or zero extending operands to
/// \returns True.
bool promoteUniformOpToI32(ICmpInst &I) const;
- /// \brief Promotes uniform 'select' operation \p I to 32 bit 'select'
+ /// Promotes uniform 'select' operation \p I to 32 bit 'select'
/// operation.
///
/// \details \p I's base element bit width must be greater than 1 and less
/// \returns True.
bool promoteUniformOpToI32(SelectInst &I) const;
- /// \brief Promotes uniform 'bitreverse' intrinsic \p I to 32 bit 'bitreverse'
+ /// Promotes uniform 'bitreverse' intrinsic \p I to 32 bit 'bitreverse'
/// intrinsic.
///
/// \details \p I's base element bit width must be greater than 1 and less
///
/// \returns True.
bool promoteUniformBitreverseToI32(IntrinsicInst &I) const;
- /// \brief Widen a scalar load.
+ /// Widen a scalar load.
///
/// \details \p Widen scalar load for uniform, small type loads from constant
// memory / to a full 32-bits and then truncate the input to allow a scalar
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Interface to describe a layout of a stack frame on an AMDGPU target.
+/// Interface to describe a layout of a stack frame on an AMDGPU target.
//
//===----------------------------------------------------------------------===//
namespace llvm {
-/// \brief Information about the stack frame layout on the AMDGPU targets.
+/// Information about the stack frame layout on the AMDGPU targets.
///
/// It holds the direction of the stack growth, the known stack alignment on
/// entry to each function, and the offset to the locals area.
//==-----------------------------------------------------------------------===//
//
/// \file
-/// \brief Defines an instruction selector for the AMDGPU target.
+/// Defines an instruction selector for the AMDGPU target.
//
//===----------------------------------------------------------------------===//
INITIALIZE_PASS_END(AMDGPUDAGToDAGISel, "isel",
"AMDGPU DAG->DAG Pattern Instruction Selection", false, false)
-/// \brief This pass converts a legalized DAG into a AMDGPU-specific
+/// This pass converts a legalized DAG into a AMDGPU-specific
// DAG, ready for instruction scheduling.
FunctionPass *llvm::createAMDGPUISelDag(TargetMachine *TM,
CodeGenOpt::Level OptLevel) {
return new AMDGPUDAGToDAGISel(TM, OptLevel);
}
-/// \brief This pass converts a legalized DAG into a R600-specific
+/// This pass converts a legalized DAG into a R600-specific
// DAG, ready for instruction scheduling.
FunctionPass *llvm::createR600ISelDag(TargetMachine *TM,
CodeGenOpt::Level OptLevel) {
return false;
}
-/// \brief Determine the register class for \p OpNo
+/// Determine the register class for \p OpNo
/// \returns The register class of the virtual register that will be used for
/// the given operand number \OpNo or NULL if the register class cannot be
/// determined.
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This is the parent TargetLowering class for hardware code gen
+/// This is the parent TargetLowering class for hardware code gen
/// targets.
//
//===----------------------------------------------------------------------===//
return DAG.getBuildVector(Op.getValueType(), SDLoc(Op), Args);
}
-/// \brief Generate Min/Max node
+/// Generate Min/Max node
SDValue AMDGPUTargetLowering::combineFMinMaxLegacy(const SDLoc &DL, EVT VT,
SDValue LHS, SDValue RHS,
SDValue True, SDValue False,
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Interface definition of the TargetLowering class that is common
+/// Interface definition of the TargetLowering class that is common
/// to all AMD GPUs.
//
//===----------------------------------------------------------------------===//
SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
- /// \brief Split a vector store into multiple scalar stores.
+ /// Split a vector store into multiple scalar stores.
/// \returns The resulting chain.
SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
SDValue getLoHalf64(SDValue Op, SelectionDAG &DAG) const;
SDValue getHiHalf64(SDValue Op, SelectionDAG &DAG) const;
- /// \brief Split a vector load into 2 loads of half the vector.
+ /// Split a vector load into 2 loads of half the vector.
SDValue SplitVectorLoad(SDValue Op, SelectionDAG &DAG) const;
- /// \brief Split a vector store into 2 stores of half the vector.
+ /// Split a vector store into 2 stores of half the vector.
SDValue SplitVectorStore(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
virtual SDNode *PostISelFolding(MachineSDNode *N,
SelectionDAG &DAG) const = 0;
- /// \brief Determine which of the bits specified in \p Mask are known to be
+ /// Determine which of the bits specified in \p Mask are known to be
/// either zero or one and return them in the \p KnownZero and \p KnownOne
/// bitsets.
void computeKnownBitsForTargetNode(const SDValue Op,
const SelectionDAG &DAG,
unsigned Depth = 0) const override;
- /// \brief Helper function that adds Reg to the LiveIn list of the DAG's
+ /// Helper function that adds Reg to the LiveIn list of the DAG's
/// MachineFunction.
///
/// \returns a RegisterSDNode representing Reg if \p RawReg is true, otherwise
GRID_OFFSET,
};
- /// \brief Helper function that returns the byte offset of the given
+ /// Helper function that returns the byte offset of the given
/// type of implicit parameter.
uint32_t getImplicitParameterOffset(const AMDGPUMachineFunction *MFI,
const ImplicitParameter Param) const;
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This is AMDGPU specific replacement of the standard inliner.
+/// This is AMDGPU specific replacement of the standard inliner.
/// The main purpose is to account for the fact that calls not only expensive
/// on the AMDGPU, but much more expensive if a private memory pointer is
/// passed to a function as an argument. In this situation, we are unable to
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Implementation of the TargetInstrInfo class that is common to all
+/// Implementation of the TargetInstrInfo class that is common to all
/// AMD GPUs.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Contains the definition of a TargetInstrInfo class that is common
+/// Contains the definition of a TargetInstrInfo class that is common
/// to all AMD GPUs.
//
//===----------------------------------------------------------------------===//
int64_t Offset1, int64_t Offset2,
unsigned NumLoads) const override;
- /// \brief Return a target-specific opcode if Opcode is a pseudo instruction.
+ /// Return a target-specific opcode if Opcode is a pseudo instruction.
/// Return -1 if the target-specific opcode for the pseudo instruction does
/// not exist. If Opcode is not a pseudo instruction, this is identity.
int pseudoToMCOpcode(int Opcode) const;
//==-----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU Implementation of the IntrinsicInfo class.
+/// AMDGPU Implementation of the IntrinsicInfo class.
//
//===-----------------------------------------------------------------------===//
//==-----------------------------------------------------------------------===//
//
/// \file
-/// \brief Interface for the AMDGPU Implementation of the Intrinsic Info class.
+/// Interface for the AMDGPU Implementation of the Intrinsic Info class.
//
//===-----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINTRINSICINFO_H
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This file does AMD library function optimizations.
+/// This file does AMD library function optimizations.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Code to lower AMDGPU MachineInstrs to their corresponding MCInst.
+/// Code to lower AMDGPU MachineInstrs to their corresponding MCInst.
//
//===----------------------------------------------------------------------===//
//
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
- /// \brief Lower a MachineInstr to an MCInst
+ /// Lower a MachineInstr to an MCInst
void lower(const MachineInstr *MI, MCInst &OutMI) const;
};
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU Machine Module Info.
+/// AMDGPU Machine Module Info.
///
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU Machine Module Info.
+/// AMDGPU Machine Module Info.
///
//
//===----------------------------------------------------------------------===//
// All supported memory/synchronization scopes can be found here:
// http://llvm.org/docs/AMDGPUUsage.html#memory-scopes
- /// \brief Agent synchronization scope ID.
+ /// Agent synchronization scope ID.
SyncScope::ID AgentSSID;
- /// \brief Workgroup synchronization scope ID.
+ /// Workgroup synchronization scope ID.
SyncScope::ID WorkgroupSSID;
- /// \brief Wavefront synchronization scope ID.
+ /// Wavefront synchronization scope ID.
SyncScope::ID WavefrontSSID;
- /// \brief In AMDGPU target synchronization scopes are inclusive, meaning a
+ /// In AMDGPU target synchronization scopes are inclusive, meaning a
/// larger synchronization scope is inclusive of a smaller synchronization
/// scope.
///
return WavefrontSSID;
}
- /// \brief In AMDGPU target synchronization scopes are inclusive, meaning a
+ /// In AMDGPU target synchronization scopes are inclusive, meaning a
/// larger synchronization scope is inclusive of a smaller synchronization
/// scope.
///
namespace {
-/// \brief Check if the instr pair, FirstMI and SecondMI, should be fused
+/// Check if the instr pair, FirstMI and SecondMI, should be fused
/// together. Given SecondMI, when FirstMI is unspecified, then check if
/// SecondMI may be part of a fused pair at all.
static bool shouldScheduleAdjacent(const TargetInstrInfo &TII_,
//===----------------------------------------------------------------------===//
//
// \file
-// \brief This post-linking pass replaces the function pointer of enqueued
+// This post-linking pass replaces the function pointer of enqueued
// block kernel with a global variable (runtime handle) and adds
// "runtime-handle" attribute to the enqueued block kernel.
//
namespace {
-/// \brief Lower enqueued blocks.
+/// Lower enqueued blocks.
class AMDGPUOpenCLEnqueuedBlockLowering : public ModulePass {
public:
static char ID;
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Parent TargetRegisterInfo class common to all hw codegen targets.
+/// Parent TargetRegisterInfo class common to all hw codegen targets.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief TargetRegisterInfo interface that is implemented by all hw codegen
+/// TargetRegisterInfo interface that is implemented by all hw codegen
/// targets.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Implements the AMDGPU specific subclass of TargetSubtarget.
+/// Implements the AMDGPU specific subclass of TargetSubtarget.
//
//===----------------------------------------------------------------------===//
//==-----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU specific subclass of TargetSubtarget.
+/// AMDGPU specific subclass of TargetSubtarget.
//
//===----------------------------------------------------------------------===//
return HasDLInsts;
}
- /// \brief Returns the offset in bytes from the start of the input buffer
+ /// Returns the offset in bytes from the start of the input buffer
/// of the first explicit kernel argument.
unsigned getExplicitKernelArgOffset(const MachineFunction &MF) const {
return isAmdCodeObjectV2(MF) ? 0 : 36;
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief The AMDGPU target machine contains all of the hardware specific
+/// The AMDGPU target machine contains all of the hardware specific
/// information needed to emit code for R600 and SI GPUs.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
+/// The AMDGPU TargetMachine interface definition for hw codgen targets.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares the AMDGPU-specific subclass of
+/// This file declares the AMDGPU-specific subclass of
/// TargetLoweringObjectFile.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
// \file
-// \brief This pass that unifies multiple OpenCL metadata due to linking.
+// This pass that unifies multiple OpenCL metadata due to linking.
//
//===----------------------------------------------------------------------===//
} // end namespace kOCLMD
- /// \brief Unify multiple OpenCL metadata due to linking.
+ /// Unify multiple OpenCL metadata due to linking.
class AMDGPUUnifyMetadata : public ModulePass {
public:
static char ID;
private:
bool runOnModule(Module &M) override;
- /// \brief Unify version metadata.
+ /// Unify version metadata.
/// \return true if changes are made.
/// Assume the named metadata has operands each of which is a pair of
/// integer constant, e.g.
return true;
}
- /// \brief Unify version metadata.
+ /// Unify version metadata.
/// \return true if changes are made.
/// Assume the named metadata has operands each of which is a list e.g.
/// !Name = {!n1, !n2}
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU HSA Metadata Streamer.
+/// AMDGPU HSA Metadata Streamer.
///
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief AMDGPU HSA Metadata Streamer.
+/// AMDGPU HSA Metadata Streamer.
///
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief CodeEmitter interface for R600 and SI codegen.
+/// CodeEmitter interface for R600 and SI codegen.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief CodeEmitter interface for R600 and SI codegen.
+/// CodeEmitter interface for R600 and SI codegen.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This file provides AMDGPU specific target descriptions.
+/// This file provides AMDGPU specific target descriptions.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Provides AMDGPU specific target descriptions.
+/// Provides AMDGPU specific target descriptions.
//
//===----------------------------------------------------------------------===//
//
//
/// \file
///
-/// \brief The R600 code emitter produces machine code that can be executed
+/// The R600 code emitter produces machine code that can be executed
/// directly on the GPU device.
//
//===----------------------------------------------------------------------===//
R600MCCodeEmitter(const R600MCCodeEmitter &) = delete;
R600MCCodeEmitter &operator=(const R600MCCodeEmitter &) = delete;
- /// \brief Encode the instruction and write it to the OS.
+ /// Encode the instruction and write it to the OS.
void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief The SI code emitter produces machine code that can be executed
+/// The SI code emitter produces machine code that can be executed
/// directly on the GPU device.
//
//===----------------------------------------------------------------------===//
class SIMCCodeEmitter : public AMDGPUMCCodeEmitter {
const MCRegisterInfo &MRI;
- /// \brief Encode an fp or int literal
+ /// Encode an fp or int literal
uint32_t getLitEncoding(const MCOperand &MO, const MCOperandInfo &OpInfo,
const MCSubtargetInfo &STI) const;
SIMCCodeEmitter(const SIMCCodeEmitter &) = delete;
SIMCCodeEmitter &operator=(const SIMCCodeEmitter &) = delete;
- /// \brief Encode the instruction and write it to the OS.
+ /// Encode the instruction and write it to the OS.
void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
- /// \brief Use a fixup to encode the simm16 field for SOPP branch
+ /// Use a fixup to encode the simm16 field for SOPP branch
/// instructions.
unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups,
#define MO_FLAG_LAST (1 << 6)
#define NUM_MO_FLAGS 7
-/// \brief Helper for getting the operand index for the instruction flags
+/// Helper for getting the operand index for the instruction flags
/// operand.
#define GET_FLAG_OPERAND_IDX(Flags) (((Flags) >> 7) & 0x3)
#define HAS_NATIVE_OPERANDS(Flags) ((Flags) & R600_InstFlag::NATIVE_OPERANDS)
-/// \brief Defines for extracting register information from register encoding
+/// Defines for extracting register information from register encoding
#define HW_REG_MASK 0x1ff
#define HW_CHAN_SHIFT 9
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Custom DAG lowering for R600
+/// Custom DAG lowering for R600
//
//===----------------------------------------------------------------------===//
}
}
-/// \brief Fold the instructions after selecting them
+/// Fold the instructions after selecting them
SDNode *R600TargetLowering::PostISelFolding(MachineSDNode *Node,
SelectionDAG &DAG) const {
const R600InstrInfo *TII = getSubtarget()->getInstrInfo();
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief R600 DAG Lowering interface definition
+/// R600 DAG Lowering interface definition
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief R600 Implementation of TargetInstrInfo.
+/// R600 Implementation of TargetInstrInfo.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Interface definition for R600InstrInfo
+/// Interface definition for R600InstrInfo
//
//===----------------------------------------------------------------------===//
/// Same but using const index set instead of MI set.
bool fitsConstReadLimitations(const std::vector<unsigned>&) const;
- /// \brief Vector instructions are instructions that must fill all
+ /// Vector instructions are instructions that must fill all
/// instruction slots within an instruction group.
bool isVector(const MachineInstr &MI) const;
bool expandPostRAPseudo(MachineInstr &MI) const override;
- /// \brief Reserve the registers that may be accesed using indirect addressing.
+ /// Reserve the registers that may be accesed using indirect addressing.
void reserveIndirectRegisters(BitVector &Reserved,
const MachineFunction &MF,
const R600RegisterInfo &TRI) const;
/// read or write or -1 if indirect addressing is not used by this program.
int getIndirectIndexEnd(const MachineFunction &MF) const;
- /// \brief Build instruction(s) for an indirect register write.
+ /// Build instruction(s) for an indirect register write.
///
/// \returns The instruction that performs the indirect register write
MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
unsigned ValueReg, unsigned Address,
unsigned OffsetReg) const;
- /// \brief Build instruction(s) for an indirect register read.
+ /// Build instruction(s) for an indirect register read.
///
/// \returns The instruction that performs the indirect register read
MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
MachineBasicBlock::iterator I,
unsigned DstReg, unsigned SrcReg) const;
- /// \brief Get the index of Op in the MachineInstr.
+ /// Get the index of Op in the MachineInstr.
///
/// \returns -1 if the Instruction does not contain the specified \p Op.
int getOperandIdx(const MachineInstr &MI, unsigned Op) const;
- /// \brief Get the index of \p Op for the given Opcode.
+ /// Get the index of \p Op for the given Opcode.
///
/// \returns -1 if the Instruction does not contain the specified \p Op.
int getOperandIdx(unsigned Opcode, unsigned Op) const;
- /// \brief Helper function for setting instruction flag values.
+ /// Helper function for setting instruction flag values.
void setImmOperand(MachineInstr &MI, unsigned Op, int64_t Imm) const;
- ///\brief Add one of the MO_FLAG* flags to the specified \p Operand.
+ ///Add one of the MO_FLAG* flags to the specified \p Operand.
void addFlag(MachineInstr &MI, unsigned Operand, unsigned Flag) const;
- ///\brief Determine if the specified \p Flag is set on this \p Operand.
+ ///Determine if the specified \p Flag is set on this \p Operand.
bool isFlagSet(const MachineInstr &MI, unsigned Operand, unsigned Flag) const;
/// \param SrcIdx The register source to set the flag on (e.g src0, src1, src2)
MachineOperand &getFlagOp(MachineInstr &MI, unsigned SrcIdx = 0,
unsigned Flag = 0) const;
- /// \brief Clear the specified flag on the instruction.
+ /// Clear the specified flag on the instruction.
void clearFlag(MachineInstr &MI, unsigned Operand, unsigned Flag) const;
// Helper functions that check the opcode for status information
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief R600 Machine Scheduler interface
+/// R600 Machine Scheduler interface
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief R600 Machine Scheduler interface
+/// R600 Machine Scheduler interface
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief R600 implementation of the TargetRegisterInfo class.
+/// R600 implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Interface definition for R600RegisterInfo
+/// Interface definition for R600RegisterInfo
//
//===----------------------------------------------------------------------===//
const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
unsigned getFrameRegister(const MachineFunction &MF) const override;
- /// \brief get the HW encoding for a register's channel.
+ /// get the HW encoding for a register's channel.
unsigned getHWRegChan(unsigned reg) const;
unsigned getHWRegIndex(unsigned Reg) const;
- /// \brief get the register class of the specified type to use in the
+ /// get the register class of the specified type to use in the
/// CFGStructurizer
const TargetRegisterClass *getCFGStructurizerRegClass(MVT VT) const;
char SIAnnotateControlFlow::ID = 0;
-/// \brief Initialize all the types and constants used in the pass
+/// Initialize all the types and constants used in the pass
bool SIAnnotateControlFlow::doInitialization(Module &M) {
LLVMContext &Context = M.getContext();
return false;
}
-/// \brief Is the branch condition uniform or did the StructurizeCFG pass
+/// Is the branch condition uniform or did the StructurizeCFG pass
/// consider it as such?
bool SIAnnotateControlFlow::isUniform(BranchInst *T) {
return DA->isUniform(T->getCondition()) ||
T->getMetadata("structurizecfg.uniform") != nullptr;
}
-/// \brief Is BB the last block saved on the stack ?
+/// Is BB the last block saved on the stack ?
bool SIAnnotateControlFlow::isTopOfStack(BasicBlock *BB) {
return !Stack.empty() && Stack.back().first == BB;
}
-/// \brief Pop the last saved value from the control flow stack
+/// Pop the last saved value from the control flow stack
Value *SIAnnotateControlFlow::popSaved() {
return Stack.pop_back_val().second;
}
-/// \brief Push a BB and saved value to the control flow stack
+/// Push a BB and saved value to the control flow stack
void SIAnnotateControlFlow::push(BasicBlock *BB, Value *Saved) {
Stack.push_back(std::make_pair(BB, Saved));
}
-/// \brief Can the condition represented by this PHI node treated like
+/// Can the condition represented by this PHI node treated like
/// an "Else" block?
bool SIAnnotateControlFlow::isElse(PHINode *Phi) {
BasicBlock *IDom = DT->getNode(Phi->getParent())->getIDom()->getBlock();
return true;
}
-// \brief Erase "Phi" if it is not used any more
+// Erase "Phi" if it is not used any more
void SIAnnotateControlFlow::eraseIfUnused(PHINode *Phi) {
if (RecursivelyDeleteDeadPHINode(Phi)) {
DEBUG(dbgs() << "Erased unused condition phi\n");
}
}
-/// \brief Open a new "If" block
+/// Open a new "If" block
void SIAnnotateControlFlow::openIf(BranchInst *Term) {
if (isUniform(Term))
return;
push(Term->getSuccessor(1), ExtractValueInst::Create(Ret, 1, "", Term));
}
-/// \brief Close the last "If" block and open a new "Else" block
+/// Close the last "If" block and open a new "Else" block
void SIAnnotateControlFlow::insertElse(BranchInst *Term) {
if (isUniform(Term)) {
return;
push(Term->getSuccessor(1), ExtractValueInst::Create(Ret, 1, "", Term));
}
-/// \brief Recursively handle the condition leading to a loop
+/// Recursively handle the condition leading to a loop
Value *SIAnnotateControlFlow::handleLoopCondition(
Value *Cond, PHINode *Broken, llvm::Loop *L, BranchInst *Term,
SmallVectorImpl<WeakTrackingVH> &LoopPhiConditions) {
llvm_unreachable("Unhandled loop condition!");
}
-/// \brief Handle a back edge (loop)
+/// Handle a back edge (loop)
void SIAnnotateControlFlow::handleLoop(BranchInst *Term) {
if (isUniform(Term))
return;
push(Term->getSuccessor(0), Arg);
}
-/// \brief Close the last opened control flow
+/// Close the last opened control flow
void SIAnnotateControlFlow::closeControlFlow(BasicBlock *BB) {
llvm::Loop *L = LI->getLoopFor(BB);
CallInst::Create(EndCf, Exec, "", FirstInsertionPt);
}
-/// \brief Annotate the control flow with intrinsics so the backend can
+/// Annotate the control flow with intrinsics so the backend can
/// recognize if/then/else and loops.
bool SIAnnotateControlFlow::runOnFunction(Function &F) {
DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
return true;
}
-/// \brief Create the annotation pass
+/// Create the annotation pass
FunctionPass *llvm::createSIAnnotateControlFlowPass() {
return new SIAnnotateControlFlow();
}
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Inserts one nop instruction for each high level source statement for
+/// Inserts one nop instruction for each high level source statement for
/// debugger usage.
///
/// Tools, such as a debugger, need to pause execution based on user input (i.e.
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Add implicit use of exec to vector register copies.
+/// Add implicit use of exec to vector register copies.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Computations in WWM can overwrite values in inactive channels for
+/// Computations in WWM can overwrite values in inactive channels for
/// variables that the register allocator thinks are dead. This pass adds fake
/// uses of those variables to WWM instructions to make sure that they aren't
/// overwritten.
SIMachineFunctionInfo *MFI,
MachineFunction &MF) const;
- /// \brief Emits debugger prologue.
+ /// Emits debugger prologue.
void emitDebuggerPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const;
// Emit scratch setup code for AMDPAL or Mesa, assuming ResourceRegUsed is set.
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Custom DAG lowering for SI
+/// Custom DAG lowering for SI
//
//===----------------------------------------------------------------------===//
}
}
-/// \brief Helper function for LowerBRCOND
+/// Helper function for LowerBRCOND
static SDNode *findUser(SDValue Value, unsigned Opcode) {
SDNode *Parent = Value.getNode();
return AMDGPUTargetLowering::PerformDAGCombine(N, DCI);
}
-/// \brief Helper function for adjustWritemask
+/// Helper function for adjustWritemask
static unsigned SubIdx2Lane(unsigned Idx) {
switch (Idx) {
default: return 0;
}
}
-/// \brief Adjust the writemask of MIMG instructions
+/// Adjust the writemask of MIMG instructions
SDNode *SITargetLowering::adjustWritemask(MachineSDNode *&Node,
SelectionDAG &DAG) const {
SDNode *Users[4] = { nullptr };
return isa<FrameIndexSDNode>(Op);
}
-/// \brief Legalize target independent instructions (e.g. INSERT_SUBREG)
+/// Legalize target independent instructions (e.g. INSERT_SUBREG)
/// with frame index operands.
/// LLVM assumes that inputs are to these instructions are registers.
SDNode *SITargetLowering::legalizeTargetIndependentNode(SDNode *Node,
return DAG.UpdateNodeOperands(Node, Ops);
}
-/// \brief Fold the instructions after selecting them.
+/// Fold the instructions after selecting them.
/// Returns null if users were already updated.
SDNode *SITargetLowering::PostISelFolding(MachineSDNode *Node,
SelectionDAG &DAG) const {
return Node;
}
-/// \brief Assign the register class depending on the number of
+/// Assign the register class depending on the number of
/// bits set in the writemask
void SITargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
SDNode *Node) const {
return DAG.getMachineNode(AMDGPU::REG_SEQUENCE, DL, MVT::v4i32, Ops1);
}
-/// \brief Return a resource descriptor with the 'Add TID' bit enabled
+/// Return a resource descriptor with the 'Add TID' bit enabled
/// The TID (Thread ID) is multiplied by the stride value (bits [61:48]
/// of the resource descriptor) to create an offset, which is added to
/// the resource pointer.
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief SI DAG Lowering interface definition
+/// SI DAG Lowering interface definition
//
//===----------------------------------------------------------------------===//
SelectionDAG &DAG) const;
SDValue handleD16VData(SDValue VData, SelectionDAG &DAG) const;
- /// \brief Converts \p Op, which must be of floating point type, to the
+ /// Converts \p Op, which must be of floating point type, to the
/// floating point type \p VT, by either extending or truncating it.
SDValue getFPExtOrFPTrunc(SelectionDAG &DAG,
SDValue Op,
SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Val,
bool Signed, const ISD::InputArg *Arg = nullptr) const;
- /// \brief Custom lowering for ISD::FP_ROUND for MVT::f16.
+ /// Custom lowering for ISD::FP_ROUND for MVT::f16.
SDValue lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;
SDValue getSegmentAperture(unsigned AS, const SDLoc &DL,
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This pass inserts branches on the 0 exec mask over divergent branches
+/// This pass inserts branches on the 0 exec mask over divergent branches
/// branches when it's expected that jumping over the untaken control flow will
/// be cheaper than having every workitem no-op through it.
//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Insert wait instructions for memory reads and writes.
+/// Insert wait instructions for memory reads and writes.
///
/// Memory reads and writes are issued asynchronously, so we need to insert
/// S_WAITCNT instructions when we want to access any of their results or
!MI.getOperand(1).isUndef();
}
-/// \brief Given wait count encodings checks if LHS is stronger than RHS.
+/// Given wait count encodings checks if LHS is stronger than RHS.
bool SIInsertWaitcnts::isWaitcntStronger(unsigned LHS, unsigned RHS) {
if (AMDGPU::decodeVmcnt(IV, LHS) > AMDGPU::decodeVmcnt(IV, RHS))
return false;
return true;
}
-/// \brief Given wait count encodings create a new encoding which is stronger
+/// Given wait count encodings create a new encoding which is stronger
/// or equal to both.
unsigned SIInsertWaitcnts::combineWaitcnt(unsigned LHS, unsigned RHS) {
unsigned VmCnt = std::min(AMDGPU::decodeVmcnt(IV, LHS),
return AMDGPU::encodeWaitcnt(IV, VmCnt, ExpCnt, LgkmCnt);
}
-/// \brief Generate s_waitcnt instruction to be placed before cur_Inst.
+/// Generate s_waitcnt instruction to be placed before cur_Inst.
/// Instructions of a given type are returned in order,
/// but instructions of different types can complete out of order.
/// We rely on this in-order completion
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Insert wait instructions for memory reads and writes.
+/// Insert wait instructions for memory reads and writes.
///
/// Memory reads and writes are issued asynchronously, so we need to insert
/// S_WAITCNT instructions when we want to access any of their results or
namespace {
-/// \brief One variable for each of the hardware counters
+/// One variable for each of the hardware counters
using Counters = union {
struct {
unsigned VM;
const MachineRegisterInfo *MRI;
AMDGPU::IsaInfo::IsaVersion ISA;
- /// \brief Constant zero value
+ /// Constant zero value
static const Counters ZeroCounts;
- /// \brief Hardware limits
+ /// Hardware limits
Counters HardwareLimits;
- /// \brief Counter values we have already waited on.
+ /// Counter values we have already waited on.
Counters WaitedOn;
- /// \brief Counter values that we must wait on before the next counter
+ /// Counter values that we must wait on before the next counter
/// increase.
Counters DelayedWaitOn;
- /// \brief Counter values for last instruction issued.
+ /// Counter values for last instruction issued.
Counters LastIssued;
- /// \brief Registers used by async instructions.
+ /// Registers used by async instructions.
RegCounters UsedRegs;
- /// \brief Registers defined by async instructions.
+ /// Registers defined by async instructions.
RegCounters DefinedRegs;
- /// \brief Different export instruction types seen since last wait.
+ /// Different export instruction types seen since last wait.
unsigned ExpInstrTypesSeen = 0;
- /// \brief Type of the last opcode.
+ /// Type of the last opcode.
InstType LastOpcodeType;
bool LastInstWritesM0;
/// Whether or not we have flat operations outstanding.
bool IsFlatOutstanding;
- /// \brief Whether the machine function returns void
+ /// Whether the machine function returns void
bool ReturnsVoid;
/// Whether the VCCZ bit is possibly corrupt
bool VCCZCorrupt = false;
- /// \brief Get increment/decrement amount for this instruction.
+ /// Get increment/decrement amount for this instruction.
Counters getHwCounts(MachineInstr &MI);
- /// \brief Is operand relevant for async execution?
+ /// Is operand relevant for async execution?
bool isOpRelevant(MachineOperand &Op);
- /// \brief Get register interval an operand affects.
+ /// Get register interval an operand affects.
RegInterval getRegInterval(const TargetRegisterClass *RC,
const MachineOperand &Reg) const;
- /// \brief Handle instructions async components
+ /// Handle instructions async components
void pushInstruction(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
const Counters& Increment);
- /// \brief Insert the actual wait instruction
+ /// Insert the actual wait instruction
bool insertWait(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
const Counters &Counts);
- /// \brief Handle existing wait instructions (from intrinsics)
+ /// Handle existing wait instructions (from intrinsics)
void handleExistingWait(MachineBasicBlock::iterator I);
- /// \brief Do we need def2def checks?
+ /// Do we need def2def checks?
bool unorderedDefines(MachineInstr &MI);
- /// \brief Resolve all operand dependencies to counter requirements
+ /// Resolve all operand dependencies to counter requirements
Counters handleOperands(MachineInstr &MI);
- /// \brief Insert S_NOP between an instruction writing M0 and S_SENDMSG.
+ /// Insert S_NOP between an instruction writing M0 and S_SENDMSG.
void handleSendMsg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I);
/// Return true if there are LGKM instrucitons that haven't been waited on
return true;
}
-/// \brief helper function for handleOperands
+/// helper function for handleOperands
static void increaseCounters(Counters &Dst, const Counters &Src) {
for (unsigned i = 0; i < 3; ++i)
Dst.Array[i] = std::max(Dst.Array[i], Src.Array[i]);
}
-/// \brief check whether any of the counters is non-zero
+/// check whether any of the counters is non-zero
static bool countersNonZero(const Counters &Counter) {
for (unsigned i = 0; i < 3; ++i)
if (Counter.Array[i])
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief SI Implementation of TargetInstrInfo.
+/// SI Implementation of TargetInstrInfo.
//
//===----------------------------------------------------------------------===//
return LastOp;
}
-/// \brief Returns true if both nodes have the same value for the given
+/// Returns true if both nodes have the same value for the given
/// operand \p Op, or if both nodes do not have this operand.
static bool nodesHaveSameOperandValue(SDNode *N0, SDNode* N1, unsigned OpName) {
unsigned Opc0 = N0->getMachineOpcode();
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Interface definition for SIInstrInfo.
+/// Interface definition for SIInstrInfo.
//
//===----------------------------------------------------------------------===//
bool expandPostRAPseudo(MachineInstr &MI) const override;
- // \brief Returns an opcode that can be used to move a value to a \p DstRC
+ // Returns an opcode that can be used to move a value to a \p DstRC
// register. If there is no hardware instruction that can store to \p
// DstRC, then AMDGPU::COPY is returned.
unsigned getMovOpcode(const TargetRegisterClass *DstRC) const;
bool isImmOperandLegal(const MachineInstr &MI, unsigned OpNo,
const MachineOperand &MO) const;
- /// \brief Return true if this 64-bit VALU instruction has a 32-bit encoding.
+ /// Return true if this 64-bit VALU instruction has a 32-bit encoding.
/// This function will return false if you pass it a 32-bit instruction.
bool hasVALU32BitEncoding(unsigned Opcode) const;
- /// \brief Returns true if this operand uses the constant bus.
+ /// Returns true if this operand uses the constant bus.
bool usesConstantBus(const MachineRegisterInfo &MRI,
const MachineOperand &MO,
const MCOperandInfo &OpInfo) const;
- /// \brief Return true if this instruction has any modifiers.
+ /// Return true if this instruction has any modifiers.
/// e.g. src[012]_mod, omod, clamp.
bool hasModifiers(unsigned Opcode) const;
unsigned getVALUOp(const MachineInstr &MI) const;
- /// \brief Return the correct register class for \p OpNo. For target-specific
+ /// Return the correct register class for \p OpNo. For target-specific
/// instructions, this will return the register class that has been defined
/// in tablegen. For generic instructions, like REG_SEQUENCE it will return
/// the register class of its machine operand.
const TargetRegisterClass *getOpRegClass(const MachineInstr &MI,
unsigned OpNo) const;
- /// \brief Return the size in bytes of the operand OpNo on the given
+ /// Return the size in bytes of the operand OpNo on the given
// instruction opcode.
unsigned getOpSize(uint16_t Opcode, unsigned OpNo) const {
const MCOperandInfo &OpInfo = get(Opcode).OpInfo[OpNo];
return RI.getRegSizeInBits(*RI.getRegClass(OpInfo.RegClass)) / 8;
}
- /// \brief This form should usually be preferred since it handles operands
+ /// This form should usually be preferred since it handles operands
/// with unknown register classes.
unsigned getOpSize(const MachineInstr &MI, unsigned OpNo) const {
return RI.getRegSizeInBits(*getOpRegClass(MI, OpNo)) / 8;
/// to read a VGPR.
bool canReadVGPR(const MachineInstr &MI, unsigned OpNo) const;
- /// \brief Legalize the \p OpIndex operand of this instruction by inserting
+ /// Legalize the \p OpIndex operand of this instruction by inserting
/// a MOV. For example:
/// ADD_I32_e32 VGPR0, 15
/// to
/// instead of MOV.
void legalizeOpWithMove(MachineInstr &MI, unsigned OpIdx) const;
- /// \brief Check if \p MO is a legal operand if it was the \p OpIdx Operand
+ /// Check if \p MO is a legal operand if it was the \p OpIdx Operand
/// for \p MI.
bool isOperandLegal(const MachineInstr &MI, unsigned OpIdx,
const MachineOperand *MO = nullptr) const;
- /// \brief Check if \p MO would be a valid operand for the given operand
+ /// Check if \p MO would be a valid operand for the given operand
/// definition \p OpInfo. Note this does not attempt to validate constant bus
/// restrictions (e.g. literal constant usage).
bool isLegalVSrcOperand(const MachineRegisterInfo &MRI,
const MCOperandInfo &OpInfo,
const MachineOperand &MO) const;
- /// \brief Check if \p MO (a register operand) is a legal register for the
+ /// Check if \p MO (a register operand) is a legal register for the
/// given operand description.
bool isLegalRegOperand(const MachineRegisterInfo &MRI,
const MCOperandInfo &OpInfo,
const MachineOperand &MO) const;
- /// \brief Legalize operands in \p MI by either commuting it or inserting a
+ /// Legalize operands in \p MI by either commuting it or inserting a
/// copy of src1.
void legalizeOperandsVOP2(MachineRegisterInfo &MRI, MachineInstr &MI) const;
- /// \brief Fix operands in \p MI to satisfy constant bus requirements.
+ /// Fix operands in \p MI to satisfy constant bus requirements.
void legalizeOperandsVOP3(MachineRegisterInfo &MRI, MachineInstr &MI) const;
/// Copy a value from a VGPR (\p SrcReg) to SGPR. This function can only
MachineOperand &Op, MachineRegisterInfo &MRI,
const DebugLoc &DL) const;
- /// \brief Legalize all operands in this instruction. This function may
+ /// Legalize all operands in this instruction. This function may
/// create new instruction and insert them before \p MI.
void legalizeOperands(MachineInstr &MI) const;
- /// \brief Replace this instruction's opcode with the equivalent VALU
+ /// Replace this instruction's opcode with the equivalent VALU
/// opcode. This function will also move the users of \p MI to the
/// VALU if necessary.
void moveToVALU(MachineInstr &MI) const;
MachineBasicBlock::iterator MI) const override;
void insertReturn(MachineBasicBlock &MBB) const;
- /// \brief Return the number of wait states that result from executing this
+ /// Return the number of wait states that result from executing this
/// instruction.
unsigned getNumWaitStates(const MachineInstr &MI) const;
- /// \brief Returns the operand named \p Op. If \p MI does not have an
+ /// Returns the operand named \p Op. If \p MI does not have an
/// operand named \c Op, this function returns nullptr.
LLVM_READONLY
MachineOperand *getNamedOperand(MachineInstr &MI, unsigned OperandName) const;
bool isLowLatencyInstruction(const MachineInstr &MI) const;
bool isHighLatencyInstruction(const MachineInstr &MI) const;
- /// \brief Return the descriptor of the target-specific machine instruction
+ /// Return the descriptor of the target-specific machine instruction
/// that corresponds to the specified pseudo or native opcode.
const MCInstrDesc &getMCOpcodeFromPseudo(unsigned Opcode) const {
return get(pseudoToMCOpcode(Opcode));
bool isBasicBlockPrologue(const MachineInstr &MI) const override;
- /// \brief Return a partially built integer add instruction without carry.
+ /// Return a partially built integer add instruction without carry.
/// Caller must add source operands.
/// For pre-GFX9 it will generate unused carry destination operand.
/// TODO: After GFX9 it should return a no-carry operation.
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This pass lowers the pseudo control flow instructions to real
+/// This pass lowers the pseudo control flow instructions to real
/// machine instructions.
///
/// All control flow is handled using predicated instructions and
return ArgInfo.PrivateSegmentWaveByteOffset.getRegister();
}
- /// \brief Returns the physical register reserved for use as the resource
+ /// Returns the physical register reserved for use as the resource
/// descriptor for scratch accesses.
unsigned getScratchRSrcReg() const {
return ScratchRSrcReg;
return DebuggerWorkGroupIDStackObjectIndices[Dim];
}
- /// \brief Sets stack object index for \p Dim's work group ID to \p ObjectIdx.
+ /// Sets stack object index for \p Dim's work group ID to \p ObjectIdx.
void setDebuggerWorkGroupIDStackObjectIndex(unsigned Dim, int ObjectIdx) {
assert(Dim < 3);
DebuggerWorkGroupIDStackObjectIndices[Dim] = ObjectIdx;
return DebuggerWorkItemIDStackObjectIndices[Dim];
}
- /// \brief Sets stack object index for \p Dim's work item ID to \p ObjectIdx.
+ /// Sets stack object index for \p Dim's work item ID to \p ObjectIdx.
void setDebuggerWorkItemIDStackObjectIndex(unsigned Dim, int ObjectIdx) {
assert(Dim < 3);
DebuggerWorkItemIDStackObjectIndices[Dim] = ObjectIdx;
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief SI Machine Scheduler interface
+/// SI Machine Scheduler interface
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief SI Machine Scheduler interface
+/// SI Machine Scheduler interface
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Memory legalizer - implements memory model. More information can be
+/// Memory legalizer - implements memory model. More information can be
/// found here:
/// http://llvm.org/docs/AMDGPUUsage.html#memory-model
//
static Optional<SIMemOpInfo> getAtomicCmpxchgOrRmwInfo(
const MachineBasicBlock::iterator &MI);
- /// \brief Reports unknown synchronization scope used in \p MI to LLVM
+ /// Reports unknown synchronization scope used in \p MI to LLVM
/// context.
static void reportUnknownSyncScope(
const MachineBasicBlock::iterator &MI);
class SIMemoryLegalizer final : public MachineFunctionPass {
private:
- /// \brief Machine module info.
+ /// Machine module info.
const AMDGPUMachineModuleInfo *MMI = nullptr;
- /// \brief Instruction info.
+ /// Instruction info.
const SIInstrInfo *TII = nullptr;
- /// \brief Immediate for "vmcnt(0)".
+ /// Immediate for "vmcnt(0)".
unsigned Vmcnt0Immediate = 0;
- /// \brief Opcode for cache invalidation instruction (L1).
+ /// Opcode for cache invalidation instruction (L1).
unsigned VmemSIMDCacheInvalidateOpc = 0;
- /// \brief List of atomic pseudo instructions.
+ /// List of atomic pseudo instructions.
std::list<MachineBasicBlock::iterator> AtomicPseudoMIs;
- /// \brief Sets named bit (BitName) to "true" if present in \p MI. Returns
+ /// Sets named bit (BitName) to "true" if present in \p MI. Returns
/// true if \p MI is modified, false otherwise.
template <uint16_t BitName>
bool enableNamedBit(const MachineBasicBlock::iterator &MI) const {
return true;
}
- /// \brief Sets GLC bit to "true" if present in \p MI. Returns true if \p MI
+ /// Sets GLC bit to "true" if present in \p MI. Returns true if \p MI
/// is modified, false otherwise.
bool enableGLCBit(const MachineBasicBlock::iterator &MI) const {
return enableNamedBit<AMDGPU::OpName::glc>(MI);
}
- /// \brief Sets SLC bit to "true" if present in \p MI. Returns true if \p MI
+ /// Sets SLC bit to "true" if present in \p MI. Returns true if \p MI
/// is modified, false otherwise.
bool enableSLCBit(const MachineBasicBlock::iterator &MI) const {
return enableNamedBit<AMDGPU::OpName::slc>(MI);
}
- /// \brief Inserts "buffer_wbinvl1_vol" instruction \p Before or after \p MI.
+ /// Inserts "buffer_wbinvl1_vol" instruction \p Before or after \p MI.
/// Always returns true.
bool insertVmemSIMDCacheInvalidate(MachineBasicBlock::iterator &MI,
bool Before = true) const;
- /// \brief Inserts "s_waitcnt vmcnt(0)" instruction \p Before or after \p MI.
+ /// Inserts "s_waitcnt vmcnt(0)" instruction \p Before or after \p MI.
/// Always returns true.
bool insertWaitcntVmcnt0(MachineBasicBlock::iterator &MI,
bool Before = true) const;
- /// \brief Removes all processed atomic pseudo instructions from the current
+ /// Removes all processed atomic pseudo instructions from the current
/// function. Returns true if current function is modified, false otherwise.
bool removeAtomicPseudoMIs();
- /// \brief Expands load operation \p MI. Returns true if instructions are
+ /// Expands load operation \p MI. Returns true if instructions are
/// added/deleted or \p MI is modified, false otherwise.
bool expandLoad(const SIMemOpInfo &MOI,
MachineBasicBlock::iterator &MI);
- /// \brief Expands store operation \p MI. Returns true if instructions are
+ /// Expands store operation \p MI. Returns true if instructions are
/// added/deleted or \p MI is modified, false otherwise.
bool expandStore(const SIMemOpInfo &MOI,
MachineBasicBlock::iterator &MI);
- /// \brief Expands atomic fence operation \p MI. Returns true if
+ /// Expands atomic fence operation \p MI. Returns true if
/// instructions are added/deleted or \p MI is modified, false otherwise.
bool expandAtomicFence(const SIMemOpInfo &MOI,
MachineBasicBlock::iterator &MI);
- /// \brief Expands atomic cmpxchg or rmw operation \p MI. Returns true if
+ /// Expands atomic cmpxchg or rmw operation \p MI. Returns true if
/// instructions are added/deleted or \p MI is modified, false otherwise.
bool expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI,
MachineBasicBlock::iterator &MI);
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This pass removes redundant S_OR_B64 instructions enabling lanes in
+/// This pass removes redundant S_OR_B64 instructions enabling lanes in
/// the exec. If two SI_END_CF (lowered as S_OR_B64) come together without any
/// vector instructions between them we can only keep outer SI_END_CF, given
/// that CFG is structured and exec bits of the outer end statement are always
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief SI implementation of the TargetRegisterInfo class.
+/// SI implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//
return getCommonSubClass(DefRC, SrcRC) != nullptr;
}
-/// \brief Returns a register that is not used at any point in the function.
+/// Returns a register that is not used at any point in the function.
/// If all registers are used, then this function will return
// AMDGPU::NoRegister.
unsigned
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief Interface definition for SIRegisterInfo
+/// Interface definition for SIRegisterInfo
//
//===----------------------------------------------------------------------===//
return getEncodingValue(Reg) & 0xff;
}
- /// \brief Return the 'base' register class for this register.
+ /// Return the 'base' register class for this register.
/// e.g. SGPR0 => SReg_32, VGPR => VGPR_32 SGPR0_SGPR1 -> SReg_32, etc.
const TargetRegisterClass *getPhysRegClass(unsigned Reg) const;
!TII->hasModifiersSet(MI, AMDGPU::OpName::clamp);
}
-/// \brief This function checks \p MI for operands defined by a move immediate
+/// This function checks \p MI for operands defined by a move immediate
/// instruction and then folds the literal constant into the instruction if it
/// can. This function assumes that \p MI is a VOP1, VOP2, or VOPC instructions.
static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII,
//===----------------------------------------------------------------------===//
//
/// \file
-/// \brief This pass adds instructions to enable whole quad mode for pixel
+/// This pass adds instructions to enable whole quad mode for pixel
/// shaders, and whole wavefront mode for all programs.
///
/// Whole quad mode is required for derivative computations, but it interferes
using namespace llvm;
-/// \brief The target which supports all AMD GPUs. This will eventually
+/// The target which supports all AMD GPUs. This will eventually
/// be deprecated and there will be a R600 target and a GCN target.
Target &llvm::getTheAMDGPUTarget() {
static Target TheAMDGPUTarget;
return TheAMDGPUTarget;
}
-/// \brief The target for GCN GPUs
+/// The target for GCN GPUs
Target &llvm::getTheGCNTarget() {
static Target TheGCNTarget;
return TheGCNTarget;
}
-/// \brief Extern function to initialize the targets for the AMDGPU backend
+/// Extern function to initialize the targets for the AMDGPU backend
extern "C" void LLVMInitializeAMDGPUTargetInfo() {
RegisterTarget<Triple::r600, false> R600(getTheAMDGPUTarget(), "r600",
"AMD GPUs HD2XXX-HD6XXX", "AMDGPU");
return ((1 << Width) - 1) << Shift;
}
-/// \brief Packs \p Src into \p Dst for given bit \p Shift and bit \p Width.
+/// Packs \p Src into \p Dst for given bit \p Shift and bit \p Width.
///
/// \returns Packed \p Dst.
unsigned packBits(unsigned Src, unsigned Dst, unsigned Shift, unsigned Width) {
return Dst;
}
-/// \brief Unpacks bits from \p Src for given bit \p Shift and bit \p Width.
+/// Unpacks bits from \p Src for given bit \p Shift and bit \p Width.
///
/// \returns Unpacked bits.
unsigned unpackBits(unsigned Src, unsigned Shift, unsigned Width) {
FIXED_NUM_SGPRS_FOR_INIT_BUG = 96
};
-/// \brief Instruction set architecture version.
+/// Instruction set architecture version.
struct IsaVersion {
unsigned Major;
unsigned Minor;
/// \returns Isa version for given subtarget \p Features.
IsaVersion getIsaVersion(const FeatureBitset &Features);
-/// \brief Streams isa version string for given subtarget \p STI into \p Stream.
+/// Streams isa version string for given subtarget \p STI into \p Stream.
void streamIsaVersion(const MCSubtargetInfo *STI, raw_ostream &Stream);
/// \returns True if given subtarget \p Features support code object version 3,
/// \returns Decoded Lgkmcnt from given \p Waitcnt for given isa \p Version.
unsigned decodeLgkmcnt(const IsaInfo::IsaVersion &Version, unsigned Waitcnt);
-/// \brief Decodes Vmcnt, Expcnt and Lgkmcnt from given \p Waitcnt for given isa
+/// Decodes Vmcnt, Expcnt and Lgkmcnt from given \p Waitcnt for given isa
/// \p Version, and writes decoded values into \p Vmcnt, \p Expcnt and
/// \p Lgkmcnt respectively.
///
unsigned encodeLgkmcnt(const IsaInfo::IsaVersion &Version, unsigned Waitcnt,
unsigned Lgkmcnt);
-/// \brief Encodes \p Vmcnt, \p Expcnt and \p Lgkmcnt into Waitcnt for given isa
+/// Encodes \p Vmcnt, \p Expcnt and \p Lgkmcnt into Waitcnt for given isa
/// \p Version.
///
/// \details \p Vmcnt, \p Expcnt and \p Lgkmcnt are encoded as follows:
bool isVI(const MCSubtargetInfo &STI);
bool isGFX9(const MCSubtargetInfo &STI);
-/// \brief Is Reg - scalar register
+/// Is Reg - scalar register
bool isSGPR(unsigned Reg, const MCRegisterInfo* TRI);
-/// \brief Is there any intersection between registers
+/// Is there any intersection between registers
bool isRegIntersect(unsigned Reg0, unsigned Reg1, const MCRegisterInfo* TRI);
/// If \p Reg is a pseudo reg, return the correct hardware register given
/// \p STI otherwise return \p Reg.
unsigned getMCReg(unsigned Reg, const MCSubtargetInfo &STI);
-/// \brief Convert hardware register \p Reg to a pseudo register
+/// Convert hardware register \p Reg to a pseudo register
LLVM_READNONE
unsigned mc2PseudoReg(unsigned Reg);
-/// \brief Can this operand also contain immediate values?
+/// Can this operand also contain immediate values?
bool isSISrcOperand(const MCInstrDesc &Desc, unsigned OpNo);
-/// \brief Is this floating-point operand?
+/// Is this floating-point operand?
bool isSISrcFPOperand(const MCInstrDesc &Desc, unsigned OpNo);
-/// \brief Does this opearnd support only inlinable literals?
+/// Does this opearnd support only inlinable literals?
bool isSISrcInlinableOperand(const MCInstrDesc &Desc, unsigned OpNo);
-/// \brief Get the size in bits of a register from the register class \p RC.
+/// Get the size in bits of a register from the register class \p RC.
unsigned getRegBitWidth(unsigned RCID);
-/// \brief Get the size in bits of a register from the register class \p RC.
+/// Get the size in bits of a register from the register class \p RC.
unsigned getRegBitWidth(const MCRegisterClass &RC);
-/// \brief Get size of register operand
+/// Get size of register operand
unsigned getRegOperandSize(const MCRegisterInfo *MRI, const MCInstrDesc &Desc,
unsigned OpNo);
return getOperandSize(Desc.OpInfo[OpNo]);
}
-/// \brief Is this literal inlinable
+/// Is this literal inlinable
LLVM_READNONE
bool isInlinableLiteral64(int64_t Literal, bool HasInv2Pi);
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains code to lower ARC MachineInstrs to their
+/// This file contains code to lower ARC MachineInstrs to their
/// corresponding MCInst records.
///
//===----------------------------------------------------------------------===//
class Mangler;
class AsmPrinter;
-/// \brief This class is used to lower an MachineInstr into an MCInst.
+/// This class is used to lower an MachineInstr into an MCInst.
class LLVM_LIBRARY_VISIBILITY ARCMCInstLower {
using MachineOperandType = MachineOperand::MachineOperandType;
MCContext *Ctx;
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file is part of the ARC Disassembler.
+/// This file is part of the ARC Disassembler.
///
//===----------------------------------------------------------------------===//
namespace {
-/// \brief A disassembler class for ARC.
+/// A disassembler class for ARC.
class ARCDisassembler : public MCDisassembler {
public:
std::unique_ptr<MCInstrInfo const> const MCII;
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the declaration of the ARCInstPrinter class,
+/// This file contains the declaration of the ARCInstPrinter class,
/// which is used to print ARC MCInst to a .s file.
///
//===----------------------------------------------------------------------===//
return MI.mayLoad() && hasLoadFromStackSlot(MI, Dummy, FrameIndex);
}
-/// \brief Expands MEMCPY to either LDMIA/STMIA or LDMIA_UPD/STMID_UPD
+/// Expands MEMCPY to either LDMIA/STMIA or LDMIA_UPD/STMID_UPD
/// depending on whether the result is used.
void ARMBaseInstrInfo::expandMEMCPY(MachineBasicBlock::iterator MI) const {
bool isThumb1 = Subtarget.isThumb1Only();
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS = nullptr) const override;
- /// \brief SrcRC and DstRC will be morphed into NewRC if this returns true
+ /// SrcRC and DstRC will be morphed into NewRC if this returns true
bool shouldCoalesce(MachineInstr *MI,
const TargetRegisterClass *SrcRC,
unsigned SubReg,
return MadeChange;
}
-/// \brief Perform the initial placement of the regular constant pool entries.
+/// Perform the initial placement of the regular constant pool entries.
/// To start with, we put them all at the end of the function.
void
ARMConstantIslands::doInitialConstPlacement(std::vector<MachineInstr*> &CPEMIs) {
DEBUG(BB->dump());
}
-/// \brief Do initial placement of the jump tables. Because Thumb2's TBB and TBH
+/// Do initial placement of the jump tables. Because Thumb2's TBB and TBH
/// instructions can be made more efficient if the jump table immediately
/// follows the instruction, it's best to place them immediately next to their
/// jumps to begin with. In almost all cases they'll never be moved from that
return true;
}
-/// \brief While trying to form a TBB/TBH instruction, we may (if the table
+/// While trying to form a TBB/TBH instruction, we may (if the table
/// doesn't immediately follow the BR_JT) need access to the start of the
/// jump-table. We know one instruction that produces such a register; this
/// function works out whether that definition can be preserved to the BR_JT,
return true;
}
-/// \brief Returns whether CPEMI is the first instruction in the block
+/// Returns whether CPEMI is the first instruction in the block
/// immediately following JTMI (assumed to be a TBB or TBH terminator). If so,
/// we can switch the first register to PC and usually remove the address
/// calculation that preceded it.
{ { ARM::UXTB, ARM::t2UXTB }, 0, 1, MVT::i8 }
};
-/// \brief The specified machine instr operand is a vreg, and that
+/// The specified machine instr operand is a vreg, and that
/// vreg is being provided by the specified load instruction. If possible,
/// try to fold the load as an operand to the instruction, returning true if
/// successful.
isInt32Immediate(N->getOperand(1).getNode(), Imm);
}
-/// \brief Check whether a particular node is a constant value representable as
+/// Check whether a particular node is a constant value representable as
/// (N * Scale) where (N in [\p RangeMin, \p RangeMax).
///
/// \param ScaledConstant [out] - On success, the pre-scaled constant value.
return false;
}
-/// \brief Form a GPRPair pseudo register from a pair of GPR regs.
+/// Form a GPRPair pseudo register from a pair of GPR regs.
SDNode *ARMDAGToDAGISel::createGPRPairNode(EVT VT, SDValue V0, SDValue V1) {
SDLoc dl(V0.getNode());
SDValue RegClass =
return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops);
}
-/// \brief Form a D register from a pair of S registers.
+/// Form a D register from a pair of S registers.
SDNode *ARMDAGToDAGISel::createSRegPairNode(EVT VT, SDValue V0, SDValue V1) {
SDLoc dl(V0.getNode());
SDValue RegClass =
return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops);
}
-/// \brief Form a quad register from a pair of D registers.
+/// Form a quad register from a pair of D registers.
SDNode *ARMDAGToDAGISel::createDRegPairNode(EVT VT, SDValue V0, SDValue V1) {
SDLoc dl(V0.getNode());
SDValue RegClass = CurDAG->getTargetConstant(ARM::QPRRegClassID, dl,
return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops);
}
-/// \brief Form 4 consecutive D registers from a pair of Q registers.
+/// Form 4 consecutive D registers from a pair of Q registers.
SDNode *ARMDAGToDAGISel::createQRegPairNode(EVT VT, SDValue V0, SDValue V1) {
SDLoc dl(V0.getNode());
SDValue RegClass = CurDAG->getTargetConstant(ARM::QQPRRegClassID, dl,
return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops);
}
-/// \brief Form 4 consecutive S registers.
+/// Form 4 consecutive S registers.
SDNode *ARMDAGToDAGISel::createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1,
SDValue V2, SDValue V3) {
SDLoc dl(V0.getNode());
return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops);
}
-/// \brief Form 4 consecutive D registers.
+/// Form 4 consecutive D registers.
SDNode *ARMDAGToDAGISel::createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1,
SDValue V2, SDValue V3) {
SDLoc dl(V0.getNode());
return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops);
}
-/// \brief Form 4 consecutive Q registers.
+/// Form 4 consecutive Q registers.
SDNode *ARMDAGToDAGISel::createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1,
SDValue V2, SDValue V3) {
SDLoc dl(V0.getNode());
return DAG.getNode(ARMISD::PIC_ADD, DL, PtrVT, Result, PICLabel);
}
-/// \brief Convert a TLS address reference into the correct sequence of loads
+/// Convert a TLS address reference into the correct sequence of loads
/// and calls to compute the variable's address for Darwin, and return an
/// SDValue containing the final node.
}
}
-/// \brief Attaches vregs to MEMCPY that it will use as scratch registers
+/// Attaches vregs to MEMCPY that it will use as scratch registers
/// when it is expanded into LDM/STM. This is done as a post-isel lowering
/// instead of as a custom inserter because we need the use list from the SDNode.
static void attachMEMCPYScratchRegs(const ARMSubtarget *Subtarget,
return DAG.getNode(ISD::BITCAST, dl, VT, BV);
}
-/// \brief Target-specific dag combine xforms for ARMISD::BUILD_VECTOR.
+/// Target-specific dag combine xforms for ARMISD::BUILD_VECTOR.
static SDValue
PerformARMBUILD_VECTORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
// ARMISD::BUILD_VECTOR is introduced when legalizing ISD::BUILD_VECTOR.
return false;
}
-/// \brief Returns true if it is beneficial to convert a load of a constant
+/// Returns true if it is beneficial to convert a load of a constant
/// to just the constant itself.
bool ARMTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
Type *Ty) const {
return VecSize == 64 || VecSize % 128 == 0;
}
-/// \brief Lower an interleaved load into a vldN intrinsic.
+/// Lower an interleaved load into a vldN intrinsic.
///
/// E.g. Lower an interleaved load (Factor = 2):
/// %wide.vec = load <8 x i32>, <8 x i32>* %ptr, align 4
return true;
}
-/// \brief Lower an interleaved store into a vstN intrinsic.
+/// Lower an interleaved store into a vstN intrinsic.
///
/// E.g. Lower an interleaved store (Factor = 3):
/// %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1,
return (Members > 0 && Members <= 4);
}
-/// \brief Return true if a type is an AAPCS-VFP homogeneous aggregate or one of
+/// Return true if a type is an AAPCS-VFP homogeneous aggregate or one of
/// [N x i32] or [N x i64]. This allows front-ends to skip emitting padding when
/// passing according to AAPCS rules.
bool ARMTargetLowering::functionArgumentNeedsConsecutiveRegisters(
bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
- /// \brief Returns true if the addresing mode representing by AM is legal
+ /// Returns true if the addresing mode representing by AM is legal
/// for the Thumb1 target, for a load/store of the specified type.
bool isLegalT1ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
MachineFunction &MF,
unsigned Intrinsic) const override;
- /// \brief Returns true if it is beneficial to convert a load of a constant
+ /// Returns true if it is beneficial to convert a load of a constant
/// to just the constant itself.
bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
Type *Ty) const override;
bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
unsigned Index) const override;
- /// \brief Returns true if an argument of type Ty needs to be passed in a
+ /// Returns true if an argument of type Ty needs to be passed in a
/// contiguous block of registers in calling convention CallConv.
bool functionArgumentNeedsConsecutiveRegisters(
Type *Ty, CallingConv::ID CallConv, bool isVarArg) const override;
namespace llvm {
-/// \brief Check if the instr pair, FirstMI and SecondMI, should be fused
+/// Check if the instr pair, FirstMI and SecondMI, should be fused
/// together. Given SecondMI, when FirstMI is unspecified, then check if
/// SecondMI may be part of a fused pair at all.
static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
bool hasFullFP16() const { return HasFullFP16; }
bool hasFuseAES() const { return HasFuseAES; }
- /// \brief Return true if the CPU supports any kind of instruction fusion.
+ /// Return true if the CPU supports any kind of instruction fusion.
bool hasFusion() const { return hasFuseAES(); }
const Triple &getTargetTriple() const { return TargetTriple; }
MachineModuleInfo *MMI,
MCStreamer &Streamer) const override;
- /// \brief Describe a TLS variable address within debug info.
+ /// Describe a TLS variable address within debug info.
const MCExpr *getDebugThreadLocalSymbol(const MCSymbol *Sym) const override;
MCSection *getExplicitSectionGlobal(const GlobalObject *GO, SectionKind Kind,
return false;
}
-/// \brief Given a mnemonic, split out possible predication code and carry
+/// Given a mnemonic, split out possible predication code and carry
/// setting letters to form a canonical mnemonic and flags.
//
// FIXME: Would be nice to autogen this.
return Mnemonic;
}
-/// \brief Given a canonical mnemonic, determine if the instruction ever allows
+/// Given a canonical mnemonic, determine if the instruction ever allows
/// inclusion of carry set or predication code operands.
//
// FIXME: It would be nice to autogen this.
CanAcceptPredicationCode = true;
}
-// \brief Some Thumb instructions have two operand forms that are not
+// Some Thumb instructions have two operand forms that are not
// available as three operand, convert to two operand form if possible.
//
// FIXME: We would really like to be able to tablegen'erate this.
namespace CU {
-/// \brief Compact unwind encoding values.
+/// Compact unwind encoding values.
enum CompactUnwindEncodings {
UNWIND_ARM_MODE_MASK = 0x0F000000,
UNWIND_ARM_MODE_FRAME = 0x01000000,
namespace {
-/// \brief Hexagon disassembler for all Hexagon platforms.
+/// Hexagon disassembler for all Hexagon platforms.
class HexagonDisassembler : public MCDisassembler {
public:
std::unique_ptr<MCInstrInfo const> const MCII;
namespace llvm {
class HexagonTargetMachine;
- /// \brief Creates a Hexagon-specific Target Transformation Info pass.
+ /// Creates a Hexagon-specific Target Transformation Info pass.
ImmutablePass *createHexagonTargetTransformInfoPass(const HexagonTargetMachine *TM);
} // end namespace llvm;
}
}
-// \brief Starting at a given branch, visit remaining branches in the block.
+// Starting at a given branch, visit remaining branches in the block.
// Traverse over the subsequent branches for as long as the preceding one
// can fall through. Add all the possible targets to the flow work queue,
// including the potential fall-through to the layout-successor block.
}
private:
- /// \brief Check the offset between each loop instruction and
+ /// Check the offset between each loop instruction and
/// the loop basic block to determine if we can use the LOOP instruction
/// or if we need to set the LC/SA registers explicitly.
bool fixupLoopInstrs(MachineFunction &MF);
- /// \brief Replace loop instruction with the constant extended
+ /// Replace loop instruction with the constant extended
/// version if the loop label is too far from the loop instruction.
void useExtLoopInstr(MachineFunction &MF,
MachineBasicBlock::iterator &MII);
return new HexagonFixupHwLoops();
}
-/// \brief Returns true if the instruction is a hardware loop instruction.
+/// Returns true if the instruction is a hardware loop instruction.
static bool isHardwareLoop(const MachineInstr &MI) {
return MI.getOpcode() == Hexagon::J2_loop0r ||
MI.getOpcode() == Hexagon::J2_loop0i ||
return fixupLoopInstrs(MF);
}
-/// \brief For Hexagon, if the loop label is to far from the
+/// For Hexagon, if the loop label is to far from the
/// loop instruction then we need to set the LC0 and SA0 registers
/// explicitly instead of using LOOP(start,count). This function
/// checks the distance, and generates register assignments if needed.
return Changed;
}
-/// \brief Replace loop instructions with the constant extended version.
+/// Replace loop instructions with the constant extended version.
void HexagonFixupHwLoops::useExtLoopInstr(MachineFunction &MF,
MachineBasicBlock::iterator &MII) {
const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
}
};
- /// \brief Find the register that contains the loop controlling
+ /// Find the register that contains the loop controlling
/// induction variable.
/// If successful, it will return true and set the \p Reg, \p IVBump
/// and \p IVOp arguments. Otherwise it will return false.
bool findInductionRegister(MachineLoop *L, unsigned &Reg,
int64_t &IVBump, MachineInstr *&IVOp) const;
- /// \brief Return the comparison kind for the specified opcode.
+ /// Return the comparison kind for the specified opcode.
Comparison::Kind getComparisonKind(unsigned CondOpc,
MachineOperand *InitialValue,
const MachineOperand *Endvalue,
int64_t IVBump) const;
- /// \brief Analyze the statements in a loop to determine if the loop
+ /// Analyze the statements in a loop to determine if the loop
/// has a computable trip count and, if so, return a value that represents
/// the trip count expression.
CountValue *getLoopTripCount(MachineLoop *L,
SmallVectorImpl<MachineInstr *> &OldInsts);
- /// \brief Return the expression that represents the number of times
+ /// Return the expression that represents the number of times
/// a loop iterates. The function takes the operands that represent the
/// loop start value, loop end value, and induction value. Based upon
/// these operands, the function attempts to compute the trip count.
const MachineOperand *End, unsigned IVReg,
int64_t IVBump, Comparison::Kind Cmp) const;
- /// \brief Return true if the instruction is not valid within a hardware
+ /// Return true if the instruction is not valid within a hardware
/// loop.
bool isInvalidLoopOperation(const MachineInstr *MI,
bool IsInnerHWLoop) const;
- /// \brief Return true if the loop contains an instruction that inhibits
+ /// Return true if the loop contains an instruction that inhibits
/// using the hardware loop.
bool containsInvalidInstruction(MachineLoop *L, bool IsInnerHWLoop) const;
- /// \brief Given a loop, check if we can convert it to a hardware loop.
+ /// Given a loop, check if we can convert it to a hardware loop.
/// If so, then perform the conversion and return true.
bool convertToHardwareLoop(MachineLoop *L, bool &L0used, bool &L1used);
- /// \brief Return true if the instruction is now dead.
+ /// Return true if the instruction is now dead.
bool isDead(const MachineInstr *MI,
SmallVectorImpl<MachineInstr *> &DeadPhis) const;
- /// \brief Remove the instruction if it is now dead.
+ /// Remove the instruction if it is now dead.
void removeIfDead(MachineInstr *MI);
- /// \brief Make sure that the "bump" instruction executes before the
+ /// Make sure that the "bump" instruction executes before the
/// compare. We need that for the IV fixup, so that the compare
/// instruction would not use a bumped value that has not yet been
/// defined. If the instructions are out of order, try to reorder them.
bool orderBumpCompare(MachineInstr *BumpI, MachineInstr *CmpI);
- /// \brief Return true if MO and MI pair is visited only once. If visited
+ /// Return true if MO and MI pair is visited only once. If visited
/// more than once, this indicates there is recursion. In such a case,
/// return false.
bool isLoopFeeder(MachineLoop *L, MachineBasicBlock *A, MachineInstr *MI,
const MachineOperand *MO,
LoopFeederMap &LoopFeederPhi) const;
- /// \brief Return true if the Phi may generate a value that may underflow,
+ /// Return true if the Phi may generate a value that may underflow,
/// or may wrap.
bool phiMayWrapOrUnderflow(MachineInstr *Phi, const MachineOperand *EndVal,
MachineBasicBlock *MBB, MachineLoop *L,
LoopFeederMap &LoopFeederPhi) const;
- /// \brief Return true if the induction variable may underflow an unsigned
+ /// Return true if the induction variable may underflow an unsigned
/// value in the first iteration.
bool loopCountMayWrapOrUnderFlow(const MachineOperand *InitVal,
const MachineOperand *EndVal,
MachineBasicBlock *MBB, MachineLoop *L,
LoopFeederMap &LoopFeederPhi) const;
- /// \brief Check if the given operand has a compile-time known constant
+ /// Check if the given operand has a compile-time known constant
/// value. Return true if yes, and false otherwise. When returning true, set
/// Val to the corresponding constant value.
bool checkForImmediate(const MachineOperand &MO, int64_t &Val) const;
- /// \brief Check if the operand has a compile-time known constant value.
+ /// Check if the operand has a compile-time known constant value.
bool isImmediate(const MachineOperand &MO) const {
int64_t V;
return checkForImmediate(MO, V);
}
- /// \brief Return the immediate for the specified operand.
+ /// Return the immediate for the specified operand.
int64_t getImmediate(const MachineOperand &MO) const {
int64_t V;
if (!checkForImmediate(MO, V))
return V;
}
- /// \brief Reset the given machine operand to now refer to a new immediate
+ /// Reset the given machine operand to now refer to a new immediate
/// value. Assumes that the operand was already referencing an immediate
/// value, either directly, or via a register.
void setImmediate(MachineOperand &MO, int64_t Val);
- /// \brief Fix the data flow of the induction variable.
+ /// Fix the data flow of the induction variable.
/// The desired flow is: phi ---> bump -+-> comparison-in-latch.
/// |
/// +-> back to phi
/// cannot be adjusted to reflect the post-bump value.
bool fixupInductionVariable(MachineLoop *L);
- /// \brief Given a loop, if it does not have a preheader, create one.
+ /// Given a loop, if it does not have a preheader, create one.
/// Return the block that is the preheader.
MachineBasicBlock *createPreheaderForLoop(MachineLoop *L);
};
int HexagonHardwareLoops::Counter = 0;
#endif
- /// \brief Abstraction for a trip count of a loop. A smaller version
+ /// Abstraction for a trip count of a loop. A smaller version
/// of the MachineOperand class without the concerns of changing the
/// operand representation.
class CountValue {
return Cmp;
}
-/// \brief Analyze the statements in a loop to determine if the loop has
+/// Analyze the statements in a loop to determine if the loop has
/// a computable trip count and, if so, return a value that represents
/// the trip count expression.
///
return computeCount(L, InitialValue, EndValue, IVReg, IVBump, Cmp);
}
-/// \brief Helper function that returns the expression that represents the
+/// Helper function that returns the expression that represents the
/// number of times a loop iterates. The function takes the operands that
/// represent the loop start value, loop end value, and induction value.
/// Based upon these operands, the function attempts to compute the trip count.
return new CountValue(CountValue::CV_Register, CountR, CountSR);
}
-/// \brief Return true if the operation is invalid within hardware loop.
+/// Return true if the operation is invalid within hardware loop.
bool HexagonHardwareLoops::isInvalidLoopOperation(const MachineInstr *MI,
bool IsInnerHWLoop) const {
// Call is not allowed because the callee may use a hardware loop except for
return false;
}
-/// \brief Return true if the loop contains an instruction that inhibits
+/// Return true if the loop contains an instruction that inhibits
/// the use of the hardware loop instruction.
bool HexagonHardwareLoops::containsInvalidInstruction(MachineLoop *L,
bool IsInnerHWLoop) const {
return false;
}
-/// \brief Returns true if the instruction is dead. This was essentially
+/// Returns true if the instruction is dead. This was essentially
/// copied from DeadMachineInstructionElim::isDead, but with special cases
/// for inline asm, physical registers and instructions with side effects
/// removed.
}
}
-/// \brief Check if the loop is a candidate for converting to a hardware
+/// Check if the loop is a candidate for converting to a hardware
/// loop. If so, then perform the transformation.
///
/// This function works on innermost loops first. A loop can be converted
}
}
-/// \brief Return the weight of an SDNode
+/// Return the weight of an SDNode
int HexagonDAGToDAGISel::getWeight(SDNode *N) {
if (!isOpcodeHandled(N))
return 1;
return TargetInstrInfo::CreateTargetPostRAHazardRecognizer(II, DAG);
}
-/// \brief For a comparison instruction, return the source registers in
+/// For a comparison instruction, return the source registers in
/// \p SrcReg and \p SrcReg2 if having two register operands, and the value it
/// compares against in CmpValue. Return true if the comparison instruction
/// can be analyzed.
return false;
}
-/// \brief Get the base register and byte offset of a load/store instr.
+/// Get the base register and byte offset of a load/store instr.
bool HexagonInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt,
unsigned &BaseReg, int64_t &Offset, const TargetRegisterInfo *TRI)
const {
return BaseReg != 0;
}
-/// \brief Can these instructions execute at the same time in a bundle.
+/// Can these instructions execute at the same time in a bundle.
bool HexagonInstrInfo::canExecuteInBundle(const MachineInstr &First,
const MachineInstr &Second) const {
if (Second.mayStore() && First.getOpcode() == Hexagon::S2_allocframe) {
/// anything was changed.
bool expandPostRAPseudo(MachineInstr &MI) const override;
- /// \brief Get the base register and byte offset of a load/store instr.
+ /// Get the base register and byte offset of a load/store instr.
bool getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg,
int64_t &Offset,
const TargetRegisterInfo *TRI) const override;
return true;
}
-// \brief Check if the instructions in Insts, together with their dependencies
+// Check if the instructions in Insts, together with their dependencies
// cover the loop in the sense that the loop could be safely eliminated once
// the instructions in Insts are removed.
bool HexagonLoopIdiomRecognize::coverLoop(Loop *L,
const HexagonInstrInfo *QII;
const HexagonRegisterInfo *QRI;
- /// \brief A handle to the branch probability pass.
+ /// A handle to the branch probability pass.
const MachineBranchProbabilityInfo *MBPI;
bool isNewValueJumpCandidate(const MachineInstr &MI) const;
}
}
-/// \brief Enable use of alias analysis during code generation (during MI
+/// Enable use of alias analysis during code generation (during MI
/// scheduling, DAGCombine, etc.).
bool HexagonSubtarget::useAA() const {
if (OptLevel != CodeGenOpt::None)
return false;
}
-/// \brief Perform target specific adjustments to the latency of a schedule
+/// Perform target specific adjustments to the latency of a schedule
/// dependency.
void HexagonSubtarget::adjustSchedDependency(SUnit *Src, SUnit *Dst,
SDep &Dep) const {
std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations)
const override;
- /// \brief Enable use of alias analysis during code generation (during MI
+ /// Enable use of alias analysis during code generation (during MI
/// scheduling, DAGCombine, etc.).
bool useAA() const override;
- /// \brief Perform target specific adjustments to the latency of a schedule
+ /// Perform target specific adjustments to the latency of a schedule
/// dependency.
void adjustSchedDependency(SUnit *def, SUnit *use, SDep& dep) const override;
bool PacketStalls = false;
protected:
- /// \brief A handle to the branch probability pass.
+ /// A handle to the branch probability pass.
const MachineBranchProbabilityInfo *MBPI;
const MachineLoopInfo *MLI;
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Definition for classes that emit Hexagon machine code from MCInsts
+/// Definition for classes that emit Hexagon machine code from MCInsts
///
//===----------------------------------------------------------------------===//
const MCSubtargetInfo &STI,
uint32_t Parse) const;
- // \brief TableGen'erated function for getting the
+ // TableGen'erated function for getting the
// binary encoding for an instruction.
uint64_t getBinaryCodeForInstr(MCInst const &MI,
SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const;
- /// \brief Return binary encoding of operand.
+ /// Return binary encoding of operand.
unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const;
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines the MIPS-specific support for the FastISel class.
+/// This file defines the MIPS-specific support for the FastISel class.
/// Some of the target-specific code is generated by tablegen in the file
/// MipsGenFastISel.inc, which is #included here.
///
virtual bool selectAddr16(SDValue Addr, SDValue &Base, SDValue &Offset);
virtual bool selectAddr16SP(SDValue Addr, SDValue &Base, SDValue &Offset);
- /// \brief Select constant vector splats.
+ /// Select constant vector splats.
virtual bool selectVSplat(SDNode *N, APInt &Imm,
unsigned MinSizeInBits) const;
- /// \brief Select constant vector splats whose value fits in a uimm1.
+ /// Select constant vector splats whose value fits in a uimm1.
virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value fits in a uimm2.
+ /// Select constant vector splats whose value fits in a uimm2.
virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value fits in a uimm3.
+ /// Select constant vector splats whose value fits in a uimm3.
virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value fits in a uimm4.
+ /// Select constant vector splats whose value fits in a uimm4.
virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value fits in a uimm5.
+ /// Select constant vector splats whose value fits in a uimm5.
virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value fits in a uimm6.
+ /// Select constant vector splats whose value fits in a uimm6.
virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value fits in a uimm8.
+ /// Select constant vector splats whose value fits in a uimm8.
virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value fits in a simm5.
+ /// Select constant vector splats whose value fits in a simm5.
virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value is a power of 2.
+ /// Select constant vector splats whose value is a power of 2.
virtual bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value is the inverse of a
+ /// Select constant vector splats whose value is the inverse of a
/// power of 2.
virtual bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value is a run of set bits
+ /// Select constant vector splats whose value is a run of set bits
/// ending at the most significant bit
virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const;
- /// \brief Select constant vector splats whose value is a run of set bits
+ /// Select constant vector splats whose value is a run of set bits
/// starting at bit zero.
virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const;
}
private:
- /// \brief Visit MBB.
+ /// Visit MBB.
bool visitNode(MBBInfo &MBBI);
- /// \brief Test if MI jumps to a function via a register.
+ /// Test if MI jumps to a function via a register.
///
/// Also, return the virtual register containing the target function's address
/// and the underlying object in Reg and Val respectively, if the function's
bool isCallViaRegister(MachineInstr &MI, unsigned &Reg,
ValueType &Val) const;
- /// \brief Return the number of instructions that dominate the current
+ /// Return the number of instructions that dominate the current
/// instruction and load the function address from object Entry.
unsigned getCount(ValueType Entry);
- /// \brief Return the destination virtual register of the last instruction
+ /// Return the destination virtual register of the last instruction
/// that loads from object Entry.
unsigned getReg(ValueType Entry);
- /// \brief Update ScopedHT.
+ /// Update ScopedHT.
void incCntAndSetReg(ValueType Entry, unsigned Reg);
ScopedHTType ScopedHT;
/// Debug information queries.
unsigned getFrameRegister(const MachineFunction &MF) const override;
- /// \brief Return GPR register class.
+ /// Return GPR register class.
virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
private:
bool selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base,
SDValue &Offset) const override;
- /// \brief Select constant vector splats.
+ /// Select constant vector splats.
bool selectVSplat(SDNode *N, APInt &Imm,
unsigned MinSizeInBits) const override;
- /// \brief Select constant vector splats whose value fits in a given integer.
+ /// Select constant vector splats whose value fits in a given integer.
bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed,
unsigned ImmBitSize) const;
- /// \brief Select constant vector splats whose value fits in a uimm1.
+ /// Select constant vector splats whose value fits in a uimm1.
bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value fits in a uimm2.
+ /// Select constant vector splats whose value fits in a uimm2.
bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value fits in a uimm3.
+ /// Select constant vector splats whose value fits in a uimm3.
bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value fits in a uimm4.
+ /// Select constant vector splats whose value fits in a uimm4.
bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value fits in a uimm5.
+ /// Select constant vector splats whose value fits in a uimm5.
bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value fits in a uimm6.
+ /// Select constant vector splats whose value fits in a uimm6.
bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value fits in a uimm8.
+ /// Select constant vector splats whose value fits in a uimm8.
bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value fits in a simm5.
+ /// Select constant vector splats whose value fits in a simm5.
bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value is a power of 2.
+ /// Select constant vector splats whose value is a power of 2.
bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value is the inverse of a
+ /// Select constant vector splats whose value is the inverse of a
/// power of 2.
bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value is a run of set bits
+ /// Select constant vector splats whose value is a run of set bits
/// ending at the most significant bit
bool selectVSplatMaskL(SDValue N, SDValue &Imm) const override;
- /// \brief Select constant vector splats whose value is a run of set bits
+ /// Select constant vector splats whose value is a run of set bits
/// starting at bit zero.
bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override;
}
}
-/// \brief Check if the given BuildVectorSDNode is a splat.
+/// Check if the given BuildVectorSDNode is a splat.
/// This method currently relies on DAG nodes being reused when equivalent,
/// so it's possible for this to return false even when isConstantSplat returns
/// true.
explicit MipsSETargetLowering(const MipsTargetMachine &TM,
const MipsSubtarget &STI);
- /// \brief Enable MSA support for the given integer type and Register
+ /// Enable MSA support for the given integer type and Register
/// class.
void addMSAIntType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC);
- /// \brief Enable MSA support for the given floating-point type and
+ /// Enable MSA support for the given floating-point type and
/// Register class.
void addMSAFloatType(MVT::SimpleValueType Ty,
const TargetRegisterClass *RC);
SDValue lowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
- /// \brief Lower VECTOR_SHUFFLE into one of a number of instructions
+ /// Lower VECTOR_SHUFFLE into one of a number of instructions
/// depending on the indices in the shuffle.
SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerSELECT(SDValue Op, SelectionDAG &DAG) const;
MachineBasicBlock *emitMSACBranchPseudo(MachineInstr &MI,
MachineBasicBlock *BB,
unsigned BranchOp) const;
- /// \brief Emit the COPY_FW pseudo instruction
+ /// Emit the COPY_FW pseudo instruction
MachineBasicBlock *emitCOPY_FW(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the COPY_FD pseudo instruction
+ /// Emit the COPY_FD pseudo instruction
MachineBasicBlock *emitCOPY_FD(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the INSERT_FW pseudo instruction
+ /// Emit the INSERT_FW pseudo instruction
MachineBasicBlock *emitINSERT_FW(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the INSERT_FD pseudo instruction
+ /// Emit the INSERT_FD pseudo instruction
MachineBasicBlock *emitINSERT_FD(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the INSERT_([BHWD]|F[WD])_VIDX pseudo instruction
+ /// Emit the INSERT_([BHWD]|F[WD])_VIDX pseudo instruction
MachineBasicBlock *emitINSERT_DF_VIDX(MachineInstr &MI,
MachineBasicBlock *BB,
unsigned EltSizeInBytes,
bool IsFP) const;
- /// \brief Emit the FILL_FW pseudo instruction
+ /// Emit the FILL_FW pseudo instruction
MachineBasicBlock *emitFILL_FW(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the FILL_FD pseudo instruction
+ /// Emit the FILL_FD pseudo instruction
MachineBasicBlock *emitFILL_FD(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the FEXP2_W_1 pseudo instructions.
+ /// Emit the FEXP2_W_1 pseudo instructions.
MachineBasicBlock *emitFEXP2_W_1(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the FEXP2_D_1 pseudo instructions.
+ /// Emit the FEXP2_D_1 pseudo instructions.
MachineBasicBlock *emitFEXP2_D_1(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the FILL_FW pseudo instruction
+ /// Emit the FILL_FW pseudo instruction
MachineBasicBlock *emitLD_F16_PSEUDO(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the FILL_FD pseudo instruction
+ /// Emit the FILL_FD pseudo instruction
MachineBasicBlock *emitST_F16_PSEUDO(MachineInstr &MI,
MachineBasicBlock *BB) const;
- /// \brief Emit the FEXP2_W_1 pseudo instructions.
+ /// Emit the FEXP2_W_1 pseudo instructions.
MachineBasicBlock *emitFPEXTEND_PSEUDO(MachineInstr &MI,
MachineBasicBlock *BB,
bool IsFGR64) const;
- /// \brief Emit the FEXP2_D_1 pseudo instructions.
+ /// Emit the FEXP2_D_1 pseudo instructions.
MachineBasicBlock *emitFPROUND_PSEUDO(MachineInstr &MI,
MachineBasicBlock *BBi,
bool IsFGR64) const;
const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
- /// \brief Reset the subtarget for the Mips target.
+ /// Reset the subtarget for the Mips target.
void resetSubtarget(MachineFunction *MF);
// Pass Pipeline Configuration
using namespace llvm;
namespace {
-/// \brief NVPTXAssignValidGlobalNames
+/// NVPTXAssignValidGlobalNames
class NVPTXAssignValidGlobalNames : public ModulePass {
public:
static char ID;
bool runOnModule(Module &M) override;
- /// \brief Clean up the name to remove symbols invalid in PTX.
+ /// Clean up the name to remove symbols invalid in PTX.
std::string cleanUpName(StringRef Name);
};
}
const unsigned BasePointerSaveOffset;
/**
- * \brief Find register[s] that can be used in function prologue and epilogue
+ * Find register[s] that can be used in function prologue and epilogue
*
* Find register[s] that can be use as scratch register[s] in function
* prologue and epilogue to save various registers (Link Register, Base
bool twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const;
/**
- * \brief Create branch instruction for PPC::TCRETURN* (tail call return)
+ * Create branch instruction for PPC::TCRETURN* (tail call return)
*
* \param[in] MBB that is terminated by PPC::TCRETURN*
*/
}
/**
- * \brief Common function used to match vmrgew and vmrgow shuffles
+ * Common function used to match vmrgew and vmrgow shuffles
*
* The indexOffset determines whether to look for even or odd words in
* the shuffle mask. This is based on the of the endianness of the target
}
/**
- * \brief Determine if the specified shuffle mask is suitable for the vmrgew or
+ * Determine if the specified shuffle mask is suitable for the vmrgew or
* vmrgow instructions.
*
* \param[in] N The shuffle vector SD Node to analyze
RLI.MPI = MPI;
}
-/// \brief Custom lowers floating point to integer conversions to use
+/// Custom lowers floating point to integer conversions to use
/// the direct move instructions available in ISA 2.07 to avoid the
/// need for load/store combinations.
SDValue PPCTargetLowering::LowerFP_TO_INTDirectMove(SDValue Op,
DAG.UpdateNodeOperands(TF.getNode(), ResChain, NewResChain);
}
-/// \brief Analyze profitability of direct move
+/// Analyze profitability of direct move
/// prefer float load to int load plus direct move
/// when there is no integer use of int load
bool PPCTargetLowering::directMoveIsProfitable(const SDValue &Op) const {
return false;
}
-/// \brief Custom lowers integer to floating point conversions to use
+/// Custom lowers integer to floating point conversions to use
/// the direct move instructions available in ISA 2.07 to avoid the
/// need for load/store combinations.
SDValue PPCTargetLowering::LowerINT_TO_FPDirectMove(SDValue Op,
ShiftCst);
}
-/// \brief Reduces the number of fp-to-int conversion when building a vector.
+/// Reduces the number of fp-to-int conversion when building a vector.
///
/// If this vector is built out of floating to integer conversions,
/// transform it to a vector built out of floating point values followed by a
return SDValue();
}
-/// \brief Reduce the number of loads when building a vector.
+/// Reduce the number of loads when building a vector.
///
/// Building a vector out of multiple loads can be converted to a load
/// of the vector type if the loads are consecutive. If the loads are
return MVT::i32;
}
-/// \brief Returns true if it is beneficial to convert a load of a constant
+/// Returns true if it is beneficial to convert a load of a constant
/// to just the constant itself.
bool PPCTargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
Type *Ty) const {
bool isFPExtFree(EVT DestVT, EVT SrcVT) const override;
- /// \brief Returns true if it is beneficial to convert a load of a constant
+ /// Returns true if it is beneficial to convert a load of a constant
/// to just the constant itself.
bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
Type *Ty) const override;
FastISel *createFastISel(FunctionLoweringInfo &FuncInfo,
const TargetLibraryInfo *LibInfo) const override;
- /// \brief Returns true if an argument of type Ty needs to be passed in a
+ /// Returns true if an argument of type Ty needs to be passed in a
/// contiguous block of registers in calling convention CallConv.
bool functionArgumentNeedsConsecutiveRegisters(
Type *Ty, CallingConv::ID CallConv, bool isVarArg) const override {
MCSection *SelectSectionForGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
- /// \brief Describe a TLS variable address within debug info.
+ /// Describe a TLS variable address within debug info.
const MCExpr *getDebugThreadLocalSymbol(const MCSymbol *Sym) const override;
};
INITIALIZE_PASS(SystemZExpandPseudo, "systemz-expand-pseudo",
SYSTEMZ_EXPAND_PSEUDO_NAME, false, false)
-/// \brief Returns an instance of the pseudo instruction expansion pass.
+/// Returns an instance of the pseudo instruction expansion pass.
FunctionPass *llvm::createSystemZExpandPseudoPass(SystemZTargetMachine &TM) {
return new SystemZExpandPseudo();
}
return true;
}
-/// \brief If MBBI references a pseudo instruction that should be expanded here,
+/// If MBBI references a pseudo instruction that should be expanded here,
/// do the expansion and return true. Otherwise return false.
bool SystemZExpandPseudo::expandMI(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
return false;
}
-/// \brief Iterate over the instructions in basic block MBB and expand any
+/// Iterate over the instructions in basic block MBB and expand any
/// pseudo instructions. Return true if anything was modified.
bool SystemZExpandPseudo::expandMBB(MachineBasicBlock &MBB) {
bool Modified = false;
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS) const override;
- /// \brief SrcRC and DstRC will be morphed into NewRC if this returns true.
+ /// SrcRC and DstRC will be morphed into NewRC if this returns true.
bool shouldCoalesce(MachineInstr *MI,
const TargetRegisterClass *SrcRC,
unsigned SubReg,
return getRelocationModel() == Reloc::PIC_;
}
-/// \brief Reset the target options based on the function's attributes.
+/// Reset the target options based on the function's attributes.
// FIXME: This function needs to go away for a number of reasons:
// a) global state on the TargetMachine is terrible in general,
// b) these target options should be passed only on the function
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file is part of the WebAssembly Assembler.
+/// This file is part of the WebAssembly Assembler.
///
/// It contains code to translate a parsed .s file into MCInsts.
///
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file is part of the WebAssembly Disassembler.
+/// This file is part of the WebAssembly Disassembler.
///
/// It contains code to translate the data produced by the decoder into
/// MCInsts.
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Print MCInst instructions to wasm format.
+/// Print MCInst instructions to wasm format.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This class prints an WebAssembly MCInst to wasm file syntax.
+/// This class prints an WebAssembly MCInst to wasm file syntax.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the WebAssemblyAsmBackend class.
+/// This file implements the WebAssemblyAsmBackend class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file handles ELF-specific object emission, converting LLVM's
+/// This file handles ELF-specific object emission, converting LLVM's
/// internal fixups into the appropriate relocations.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the declarations of the WebAssemblyMCAsmInfo
+/// This file contains the declarations of the WebAssemblyMCAsmInfo
/// properties.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the declaration of the WebAssemblyMCAsmInfo class.
+/// This file contains the declaration of the WebAssemblyMCAsmInfo class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the WebAssemblyMCCodeEmitter class.
+/// This file implements the WebAssemblyMCCodeEmitter class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file provides WebAssembly-specific target descriptions.
+/// This file provides WebAssembly-specific target descriptions.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file provides WebAssembly-specific target descriptions.
+/// This file provides WebAssembly-specific target descriptions.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines WebAssembly-specific target streamer classes.
+/// This file defines WebAssembly-specific target streamer classes.
/// These are for implementing support for target-specific assembly directives.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares WebAssembly-specific target streamer classes.
+/// This file declares WebAssembly-specific target streamer classes.
/// These are for implementing support for target-specific assembly directives.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file handles Wasm-specific object emission, converting LLVM's
+/// This file handles Wasm-specific object emission, converting LLVM's
/// internal fixups into the appropriate relocations.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file registers the WebAssembly target.
+/// This file registers the WebAssembly target.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the entry points for global functions defined in
+/// This file contains the entry points for global functions defined in
/// the LLVM WebAssembly back-end.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This is a target description file for the WebAssembly architecture,
+/// This is a target description file for the WebAssembly architecture,
/// which is also known as "wasm".
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file moves ARGUMENT instructions after ScheduleDAG scheduling.
+/// This file moves ARGUMENT instructions after ScheduleDAG scheduling.
///
/// Arguments are really live-in registers, however, since we use virtual
/// registers and LLVM doesn't support live-in virtual registers, we're
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains a printer that converts from our internal
+/// This file contains a printer that converts from our internal
/// representation of machine-dependent LLVM code to the WebAssembly assembly
/// language.
///
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a CFG sorting pass.
+/// This file implements a CFG sorting pass.
///
/// This pass reorders the blocks in a function to put them into topological
/// order, ignoring loop backedges, and without any loop being interrupted
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a CFG stacking pass.
+/// This file implements a CFG stacking pass.
///
/// This pass inserts BLOCK and LOOP markers to mark the start of scopes, since
/// scope boundaries serve as the labels for WebAssembly's control transfers.
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file converts pseudo call_indirect instructions into real
+/// This file converts pseudo call_indirect instructions into real
/// call_indirects.
///
/// The order of arguments for a call_indirect is the arguments to the function
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file converts any remaining registers into WebAssembly locals.
+/// This file converts any remaining registers into WebAssembly locals.
///
/// After register stackification and register coloring, convert non-stackified
/// registers into locals, inserting explicit get_local and set_local
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines the WebAssembly-specific support for the FastISel
+/// This file defines the WebAssembly-specific support for the FastISel
/// class. Some of the target-specific code is generated by tablegen in the file
/// WebAssemblyGenFastISel.inc, which is #included here.
///
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Fix bitcasted functions.
+/// Fix bitcasted functions.
///
/// WebAssembly requires caller and callee signatures to match, however in LLVM,
/// some amount of slop is vaguely permitted. Detect mismatch by looking for
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a pass that transforms irreducible control flow
+/// This file implements a pass that transforms irreducible control flow
/// into reducible control flow. Irreducible control flow means multiple-entry
/// loops; they appear as CFG cycles that are not recorded in MachineLoopInfo
/// due to being unnatural.
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the WebAssembly implementation of
+/// This file contains the WebAssembly implementation of
/// TargetFrameLowering class.
///
/// On WebAssembly, there aren't a lot of things to do here. There are no
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This class implements WebAssembly-specific bits of
+/// This class implements WebAssembly-specific bits of
/// TargetFrameLowering class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file describes the various WebAssembly ISD node types.
+/// This file describes the various WebAssembly ISD node types.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines an instruction selector for the WebAssembly target.
+/// This file defines an instruction selector for the WebAssembly target.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the WebAssemblyTargetLowering class.
+/// This file implements the WebAssemblyTargetLowering class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines the interfaces that WebAssembly uses to lower LLVM
+/// This file defines the interfaces that WebAssembly uses to lower LLVM
/// code into a selection DAG.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly Atomic operand code-gen constructs.
+/// WebAssembly Atomic operand code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly Call operand code-gen constructs.
+/// WebAssembly Call operand code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly control-flow code-gen constructs.
+/// WebAssembly control-flow code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly datatype conversions, truncations, reinterpretations,
+/// WebAssembly datatype conversions, truncations, reinterpretations,
/// promotions, and demotions operand code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly except_ref operand code-gen constructs.
+/// WebAssembly except_ref operand code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly Floating-point operand code-gen constructs.
+/// WebAssembly Floating-point operand code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly instruction format definitions.
+/// WebAssembly instruction format definitions.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the WebAssembly implementation of the
+/// This file contains the WebAssembly implementation of the
/// TargetInstrInfo class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the WebAssembly implementation of the
+/// This file contains the WebAssembly implementation of the
/// TargetInstrInfo class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly Instruction definitions.
+/// WebAssembly Instruction definitions.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly Integer operand code-gen constructs.
+/// WebAssembly Integer operand code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly Memory operand code-gen constructs.
+/// WebAssembly Memory operand code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief WebAssembly SIMD operand code-gen constructs.
+/// WebAssembly SIMD operand code-gen constructs.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file lowers br_unless into br_if with an inverted condition.
+/// This file lowers br_unless into br_if with an inverted condition.
///
/// br_unless is not currently in the spec, but it's very convenient for LLVM
/// to use. This pass allows LLVM to use it, for now.
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file lowers exception-related instructions and setjmp/longjmp
+/// This file lowers exception-related instructions and setjmp/longjmp
/// function calls in order to use Emscripten's JavaScript try and catch
/// mechanism.
///
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Lower @llvm.global_dtors.
+/// Lower @llvm.global_dtors.
///
/// WebAssembly doesn't have a builtin way to invoke static destructors.
/// Implement @llvm.global_dtors by creating wrapper functions that are
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains code to lower WebAssembly MachineInstrs to their
+/// This file contains code to lower WebAssembly MachineInstrs to their
/// corresponding MCInst records.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares the class to lower WebAssembly MachineInstrs to
+/// This file declares the class to lower WebAssembly MachineInstrs to
/// their corresponding MCInst records.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements WebAssembly-specific per-machine-function
+/// This file implements WebAssembly-specific per-machine-function
/// information.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares WebAssembly-specific per-machine-function
+/// This file declares WebAssembly-specific per-machine-function
/// information.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Optimize LiveIntervals for use in a post-RA context.
+/// Optimize LiveIntervals for use in a post-RA context.
//
/// LiveIntervals normally runs before register allocation when the code is
/// only recently lowered out of SSA form, so it's uncommon for registers to
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Optimize calls with "returned" attributes for WebAssembly.
+/// Optimize calls with "returned" attributes for WebAssembly.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Late peephole optimizations for WebAssembly.
+/// Late peephole optimizations for WebAssembly.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Fix up code to meet LiveInterval's requirements.
+/// Fix up code to meet LiveInterval's requirements.
///
/// Some CodeGen passes don't preserve LiveInterval's requirements, because
/// they run after register allocation and it isn't important. However,
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a virtual register coloring pass.
+/// This file implements a virtual register coloring pass.
///
/// WebAssembly doesn't have a fixed number of registers, but it is still
/// desirable to minimize the total number of registers used in each function.
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a pass which assigns WebAssembly register
+/// This file implements a pass which assigns WebAssembly register
/// numbers for CodeGen virtual registers.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a register stacking pass.
+/// This file implements a register stacking pass.
///
/// This pass reorders instructions to put register uses and defs in an order
/// such that they form single-use expression trees. Registers fitting this form
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the WebAssembly implementation of the
+/// This file contains the WebAssembly implementation of the
/// TargetRegisterInfo class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the WebAssembly implementation of the
+/// This file contains the WebAssembly implementation of the
/// WebAssemblyRegisterInfo class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file describes the WebAssembly register classes and some nominal
+/// This file describes the WebAssembly register classes and some nominal
/// physical registers.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a pass that replaces physical registers with
+/// This file implements a pass that replaces physical registers with
/// virtual registers.
///
/// LLVM expects certain physical registers, such as a stack pointer. However,
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains signature information for runtime libcalls.
+/// This file contains signature information for runtime libcalls.
///
/// CodeGen uses external symbols, which it refers to by name. The WebAssembly
/// target needs type information for all functions. This file contains a big
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file provides signature information for runtime libcalls.
+/// This file provides signature information for runtime libcalls.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the WebAssemblySelectionDAGInfo class.
+/// This file implements the WebAssemblySelectionDAGInfo class.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines the WebAssembly subclass for
+/// This file defines the WebAssembly subclass for
/// SelectionDAGTargetInfo.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file sets the p2align operands on load and store instructions.
+/// This file sets the p2align operands on load and store instructions.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements an optimization pass using store result values.
+/// This file implements an optimization pass using store result values.
///
/// WebAssembly's store instructions return the stored value. This is to enable
/// an optimization wherein uses of the stored value can be replaced by uses of
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the WebAssembly-specific subclass of
+/// This file implements the WebAssembly-specific subclass of
/// TargetSubtarget.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares the WebAssembly-specific subclass of
+/// This file declares the WebAssembly-specific subclass of
/// TargetSubtarget.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines the WebAssembly-specific subclass of TargetMachine.
+/// This file defines the WebAssembly-specific subclass of TargetMachine.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares the WebAssembly-specific subclass of
+/// This file declares the WebAssembly-specific subclass of
/// TargetMachine.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines the functions of the WebAssembly-specific subclass
+/// This file defines the functions of the WebAssembly-specific subclass
/// of TargetLoweringObjectFile.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file declares the WebAssembly-specific subclass of
+/// This file declares the WebAssembly-specific subclass of
/// TargetLoweringObjectFile.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file defines the WebAssembly-specific TargetTransformInfo
+/// This file defines the WebAssembly-specific TargetTransformInfo
/// implementation.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file a TargetTransformInfo::Concept conforming object specific
+/// This file a TargetTransformInfo::Concept conforming object specific
/// to the WebAssembly target machine.
///
/// It uses the target's detailed information to provide more precise answers to
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements several utility functions for WebAssembly.
+/// This file implements several utility functions for WebAssembly.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the declaration of the WebAssembly-specific
+/// This file contains the declaration of the WebAssembly-specific
/// utility functions.
///
//===----------------------------------------------------------------------===//
REGS_BOUND \
ENTRY(RIP)
-/// \brief All possible values of the base field for effective-address
+/// All possible values of the base field for effective-address
/// computations, a.k.a. the Mod and R/M fields of the ModR/M byte.
/// We distinguish between bases (EA_BASE_*) and registers that just happen
/// to be referred to when Mod == 0b11 (EA_REG_*).
EA_max
};
-/// \brief All possible values of the SIB index field.
+/// All possible values of the SIB index field.
/// borrows entries from ALL_EA_BASES with the special case that
/// sib is synonymous with NONE.
/// Vector SIB: index can be XMM or YMM.
SIB_INDEX_max
};
-/// \brief All possible values of the SIB base field.
+/// All possible values of the SIB base field.
enum SIBBase {
SIB_BASE_NONE,
#define ENTRY(x) SIB_BASE_##x,
SIB_BASE_max
};
-/// \brief Possible displacement types for effective-address computations.
+/// Possible displacement types for effective-address computations.
typedef enum {
EA_DISP_NONE,
EA_DISP_8,
EA_DISP_32
} EADisplacement;
-/// \brief All possible values of the reg field in the ModR/M byte.
+/// All possible values of the reg field in the ModR/M byte.
enum Reg {
#define ENTRY(x) MODRM_REG_##x,
ALL_REGS
MODRM_REG_max
};
-/// \brief All possible segment overrides.
+/// All possible segment overrides.
enum SegmentOverride {
SEG_OVERRIDE_NONE,
SEG_OVERRIDE_CS,
SEG_OVERRIDE_max
};
-/// \brief Possible values for the VEX.m-mmmm field
+/// Possible values for the VEX.m-mmmm field
enum VEXLeadingOpcodeByte {
VEX_LOB_0F = 0x1,
VEX_LOB_0F38 = 0x2,
XOP_MAP_SELECT_A = 0xA
};
-/// \brief Possible values for the VEX.pp/EVEX.pp field
+/// Possible values for the VEX.pp/EVEX.pp field
enum VEXPrefixCode {
VEX_PREFIX_NONE = 0x0,
VEX_PREFIX_66 = 0x1,
TYPE_XOP = 0x4
};
-/// \brief Type for the byte reader that the consumer must provide to
+/// Type for the byte reader that the consumer must provide to
/// the decoder. Reads a single byte from the instruction's address space.
/// \param arg A baton that the consumer can associate with any internal
/// state that it needs.
/// \return -1 if the byte cannot be read for any reason; 0 otherwise.
typedef int (*byteReader_t)(const void *arg, uint8_t *byte, uint64_t address);
-/// \brief Type for the logging function that the consumer can provide to
+/// Type for the logging function that the consumer can provide to
/// get debugging output from the decoder.
/// \param arg A baton that the consumer can associate with any internal
/// state that it needs.
ArrayRef<OperandSpecifier> operands;
};
-/// \brief Decode one instruction and store the decoding results in
+/// Decode one instruction and store the decoding results in
/// a buffer provided by the consumer.
/// \param insn The buffer to store the instruction in. Allocated by the
/// consumer.
uint64_t startLoc,
DisassemblerMode mode);
-/// \brief Print a message to debugs()
+/// Print a message to debugs()
/// \param file The name of the file printing the debug message.
/// \param line The line number that printed the debug message.
/// \param s The message to print.
Res.setOpcode(RelaxedOp);
}
-/// \brief Write a sequence of optimal nops to the output, covering \p Count
+/// Write a sequence of optimal nops to the output, covering \p Count
/// bytes.
/// \return - true on success, false on failure
bool X86AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
class DarwinX86AsmBackend : public X86AsmBackend {
const MCRegisterInfo &MRI;
- /// \brief Number of registers that can be saved in a compact unwind encoding.
+ /// Number of registers that can be saved in a compact unwind encoding.
enum { CU_NUM_SAVED_REGS = 6 };
mutable unsigned SavedRegs[CU_NUM_SAVED_REGS];
unsigned MoveInstrSize; ///< Size of a "move" instruction.
unsigned StackDivide; ///< Amount to adjust stack size by.
protected:
- /// \brief Size of a "push" instruction for the given register.
+ /// Size of a "push" instruction for the given register.
unsigned PushInstrSize(unsigned Reg) const {
switch (Reg) {
case X86::EBX:
return 1;
}
- /// \brief Implementation of algorithm to generate the compact unwind encoding
+ /// Implementation of algorithm to generate the compact unwind encoding
/// for the CFI instructions.
uint32_t
generateCompactUnwindEncodingImpl(ArrayRef<MCCFIInstruction> Instrs) const {
}
private:
- /// \brief Get the compact unwind number for a given register. The number
+ /// Get the compact unwind number for a given register. The number
/// corresponds to the enum lists in compact_unwind_encoding.h.
int getCompactUnwindRegNum(unsigned Reg) const {
static const MCPhysReg CU32BitRegs[7] = {
return -1;
}
- /// \brief Return the registers encoded for a compact encoding with a frame
+ /// Return the registers encoded for a compact encoding with a frame
/// pointer.
uint32_t encodeCompactUnwindRegistersWithFrame() const {
// Encode the registers in the order they were saved --- 3-bits per
return RegEnc;
}
- /// \brief Create the permutation encoding used with frameless stacks. It is
+ /// Create the permutation encoding used with frameless stacks. It is
/// passed the number of registers to be saved and an array of the registers
/// saved.
uint32_t encodeCompactUnwindRegistersWithoutFrame(unsigned RegCount) const {
MachO::CPU_SUBTYPE_I386_ALL);
}
- /// \brief Generate the compact unwind encoding for the CFI instructions.
+ /// Generate the compact unwind encoding for the CFI instructions.
uint32_t generateCompactUnwindEncoding(
ArrayRef<MCCFIInstruction> Instrs) const override {
return generateCompactUnwindEncodingImpl(Instrs);
MachO::CPU_TYPE_X86_64, Subtype);
}
- /// \brief Generate the compact unwind encoding for the CFI instructions.
+ /// Generate the compact unwind encoding for the CFI instructions.
uint32_t generateCompactUnwindEncoding(
ArrayRef<MCCFIInstruction> Instrs) const override {
return generateCompactUnwindEncodingImpl(Instrs);
ShuffleMask.push_back(j);
}
-/// \brief Decode a shuffle packed values at 128-bit granularity
+/// Decode a shuffle packed values at 128-bit granularity
/// (SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2)
/// immediate mask into a shuffle mask.
void decodeVSHUF64x2FamilyMask(unsigned NumElts, unsigned ScalarSize,
unsigned AsmVariant, const char *ExtraCode,
raw_ostream &OS) override;
- /// \brief Return the symbol for the specified constant pool entry.
+ /// Return the symbol for the specified constant pool entry.
MCSymbol *GetCPISymbol(unsigned CPID) const override;
bool doInitialization(Module &M) override {
SmallVector<MachineInstr *, 2> ForRemoval;
AliasAnalysis *AA;
- /// \brief Returns couples of Load then Store to memory which look
+ /// Returns couples of Load then Store to memory which look
/// like a memcpy.
void findPotentiallylBlockedCopies(MachineFunction &MF);
- /// \brief Break the memcpy's load and store into smaller copies
+ /// Break the memcpy's load and store into smaller copies
/// such that each memory load that was blocked by a smaller store
/// would now be copied separately.
void breakBlockedCopies(MachineInstr *LoadInst, MachineInstr *StoreInst,
const DisplacementSizeMap &BlockingStoresDispSizeMap);
- /// \brief Break a copy of size Size to smaller copies.
+ /// Break a copy of size Size to smaller copies.
void buildCopies(int Size, MachineInstr *LoadInst, int64_t LdDispImm,
MachineInstr *StoreInst, int64_t StDispImm,
int64_t LMMOffset, int64_t SMMOffset);
bool fastSelectInstruction(const Instruction *I) override;
- /// \brief The specified machine instr operand is a vreg, and that
+ /// The specified machine instr operand is a vreg, and that
/// vreg is being provided by the specified load instruction. If possible,
/// try to fold the load as an operand to the instruction, returning true if
/// possible.
return std::make_pair(CC, NeedSwap);
}
-/// \brief Adds a complex addressing mode to the given machine instr builder.
+/// Adds a complex addressing mode to the given machine instr builder.
/// Note, this will constrain the index register. If its not possible to
/// constrain the given index register, then a new one will be created. The
/// IndexReg field of the addressing mode will be updated to match in this case.
return ::addFullAddress(MIB, AM);
}
-/// \brief Check if it is possible to fold the condition from the XALU intrinsic
+/// Check if it is possible to fold the condition from the XALU intrinsic
/// into the user. The condition code will only be updated on success.
bool X86FastISel::foldX86XALUIntrinsic(X86::CondCode &CC, const Instruction *I,
const Value *Cond) {
return true;
}
-/// \brief Emit a conditional move instruction (if the are supported) to lower
+/// Emit a conditional move instruction (if the are supported) to lower
/// the select.
bool X86FastISel::X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I) {
// Check if the subtarget supports these instructions.
return true;
}
-/// \brief Emit SSE or AVX instructions to lower the select.
+/// Emit SSE or AVX instructions to lower the select.
///
/// Try to use SSE1/SSE2 instructions to simulate a select without branches.
/// This lowers fp selects into a CMP/AND/ANDN/OR sequence when the necessary
return true;
}
-/// \brief Check if after \p OrigMI the only portion of super register
+/// Check if after \p OrigMI the only portion of super register
/// of the destination register of \p OrigMI that is alive is that
/// destination register.
///
class FixupLEAPass : public MachineFunctionPass {
enum RegUsageState { RU_NotUsed, RU_Write, RU_Read };
- /// \brief Loop over all of the instructions in the basic block
+ /// Loop over all of the instructions in the basic block
/// replacing applicable instructions with LEA instructions,
/// where appropriate.
bool processBasicBlock(MachineFunction &MF, MachineFunction::iterator MFI);
- /// \brief Given a machine register, look for the instruction
+ /// Given a machine register, look for the instruction
/// which writes it in the current basic block. If found,
/// try to replace it with an equivalent LEA instruction.
/// If replacement succeeds, then also process the newly created
void seekLEAFixup(MachineOperand &p, MachineBasicBlock::iterator &I,
MachineFunction::iterator MFI);
- /// \brief Given a memory access or LEA instruction
+ /// Given a memory access or LEA instruction
/// whose address mode uses a base and/or index register, look for
/// an opportunity to replace the instruction which sets the base or index
/// register with an equivalent LEA instruction.
void processInstruction(MachineBasicBlock::iterator &I,
MachineFunction::iterator MFI);
- /// \brief Given a LEA instruction which is unprofitable
+ /// Given a LEA instruction which is unprofitable
/// on Silvermont try to replace it with an equivalent ADD instruction
void processInstructionForSLM(MachineBasicBlock::iterator &I,
MachineFunction::iterator MFI);
- /// \brief Given a LEA instruction which is unprofitable
+ /// Given a LEA instruction which is unprofitable
/// on SNB+ try to replace it with other instructions.
/// According to Intel's Optimization Reference Manual:
/// " For LEA instructions with three source operands and some specific
MachineInstr *processInstrForSlow3OpLEA(MachineInstr &MI,
MachineFunction::iterator MFI);
- /// \brief Look for LEAs that add 1 to reg or subtract 1 from reg
+ /// Look for LEAs that add 1 to reg or subtract 1 from reg
/// and convert them to INC or DEC respectively.
bool fixupIncDec(MachineBasicBlock::iterator &I,
MachineFunction::iterator MFI) const;
- /// \brief Determine if an instruction references a machine register
+ /// Determine if an instruction references a machine register
/// and, if so, whether it reads or writes the register.
RegUsageState usesRegister(MachineOperand &p, MachineBasicBlock::iterator I);
- /// \brief Step backwards through a basic block, looking
+ /// Step backwards through a basic block, looking
/// for an instruction which writes a register within
/// a maximum of INSTR_DISTANCE_THRESHOLD instruction latency cycles.
MachineBasicBlock::iterator searchBackwards(MachineOperand &p,
MachineBasicBlock::iterator &I,
MachineFunction::iterator MFI);
- /// \brief if an instruction can be converted to an
+ /// if an instruction can be converted to an
/// equivalent LEA, insert the new instruction into the basic block
/// and return a pointer to it. Otherwise, return zero.
MachineInstr *postRAConvertToLEA(MachineFunction::iterator &MFI,
initializeFixupLEAPassPass(*PassRegistry::getPassRegistry());
}
- /// \brief Loop over all of the basic blocks,
+ /// Loop over all of the basic blocks,
/// replacing instructions by equivalent LEA instructions
/// if needed and when possible.
bool runOnMachineFunction(MachineFunction &MF) override;
return Subtarget->getInstrInfo();
}
- /// \brief Address-mode matching performs shift-of-and to and-of-shift
+ /// Address-mode matching performs shift-of-and to and-of-shift
/// reassociation in order to expose more scaled addressing
/// opportunities.
bool ComplexPatternFuncMutatesDAG() const override {
}
}
-/// \brief Return true if the condition is an unsigned comparison operation.
+/// Return true if the condition is an unsigned comparison operation.
static bool isX86CCUnsigned(unsigned X86CC) {
switch (X86CC) {
default:
return true;
}
-/// \brief Returns true if it is beneficial to convert a load of a constant
+/// Returns true if it is beneficial to convert a load of a constant
/// to just the constant itself.
bool X86TargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
Type *Ty) const {
return true;
}
-/// \brief Helper function to test whether a shuffle mask could be
+/// Helper function to test whether a shuffle mask could be
/// simplified by widening the elements being shuffled.
///
/// Appends the mask for wider elements in WidenedMask if valid. Otherwise
return SDValue();
}
-/// \brief For an EXTRACT_VECTOR_ELT with a constant index return the real
+/// For an EXTRACT_VECTOR_ELT with a constant index return the real
/// underlying vector and index.
///
/// Modifies \p ExtractedFromVec to the real vector and returns the real
return DstVec;
}
-/// \brief Return true if \p N implements a horizontal binop and return the
+/// Return true if \p N implements a horizontal binop and return the
/// operands for the horizontal binop into V0 and V1.
///
/// This is a helper function of LowerToHorizontalOp().
return CanFold;
}
-/// \brief Emit a sequence of two 128-bit horizontal add/sub followed by
+/// Emit a sequence of two 128-bit horizontal add/sub followed by
/// a concat_vector.
///
/// This is a helper function of LowerToHorizontalOp().
// patterns.
//===----------------------------------------------------------------------===//
-/// \brief Tiny helper function to identify a no-op mask.
+/// Tiny helper function to identify a no-op mask.
///
/// This is a somewhat boring predicate function. It checks whether the mask
/// array input, which is assumed to be a single-input shuffle mask of the kind
return true;
}
-/// \brief Test whether there are elements crossing 128-bit lanes in this
+/// Test whether there are elements crossing 128-bit lanes in this
/// shuffle mask.
///
/// X86 divides up its shuffles into in-lane and cross-lane shuffle operations
return false;
}
-/// \brief Test whether a shuffle mask is equivalent within each sub-lane.
+/// Test whether a shuffle mask is equivalent within each sub-lane.
///
/// This checks a shuffle mask to see if it is performing the same
/// lane-relative shuffle in each sub-lane. This trivially implies
return true;
}
-/// \brief Checks whether a shuffle mask is equivalent to an explicit list of
+/// Checks whether a shuffle mask is equivalent to an explicit list of
/// arguments.
///
/// This is a fast way to test a shuffle mask against a fixed pattern:
return IsUnpackwdMask;
}
-/// \brief Get a 4-lane 8-bit shuffle immediate for a mask.
+/// Get a 4-lane 8-bit shuffle immediate for a mask.
///
/// This helper function produces an 8-bit shuffle immediate corresponding to
/// the ubiquitous shuffle encoding scheme used in x86 instructions for
return DAG.getConstant(getV4X86ShuffleImm(Mask), DL, MVT::i8);
}
-/// \brief Compute whether each element of a shuffle is zeroable.
+/// Compute whether each element of a shuffle is zeroable.
///
/// A "zeroable" vector shuffle element is one which can be lowered to zero.
/// Either it is an undef element in the shuffle mask, the element of the input
return SDValue();
}
-/// \brief Try to emit a bitmask instruction for a shuffle.
+/// Try to emit a bitmask instruction for a shuffle.
///
/// This handles cases where we can model a blend exactly as a bitmask due to
/// one of the inputs being zeroable.
return DAG.getNode(ISD::AND, DL, VT, V, VMask);
}
-/// \brief Try to emit a blend instruction for a shuffle using bit math.
+/// Try to emit a blend instruction for a shuffle using bit math.
///
/// This is used as a fallback approach when first class blend instructions are
/// unavailable. Currently it is only suitable for integer vectors, but could
return ScaledMask;
}
-/// \brief Try to emit a blend instruction for a shuffle.
+/// Try to emit a blend instruction for a shuffle.
///
/// This doesn't do any checks for the availability of instructions for blending
/// these values. It relies on the availability of the X86ISD::BLENDI pattern to
}
}
-/// \brief Try to lower as a blend of elements from two inputs followed by
+/// Try to lower as a blend of elements from two inputs followed by
/// a single-input permutation.
///
/// This matches the pattern where we can blend elements from two inputs and
return DAG.getVectorShuffle(VT, DL, V, DAG.getUNDEF(VT), PermuteMask);
}
-/// \brief Generic routine to decompose a shuffle and blend into independent
+/// Generic routine to decompose a shuffle and blend into independent
/// blends and permutes.
///
/// This matches the extremely common pattern for handling combined
return DAG.getVectorShuffle(VT, DL, V1, V2, BlendMask);
}
-/// \brief Try to lower a vector shuffle as a rotation.
+/// Try to lower a vector shuffle as a rotation.
///
/// This is used for support PALIGNR for SSSE3 or VALIGND/Q for AVX512.
static int matchVectorShuffleAsRotate(SDValue &V1, SDValue &V2,
return Rotation;
}
-/// \brief Try to lower a vector shuffle as a byte rotation.
+/// Try to lower a vector shuffle as a byte rotation.
///
/// SSSE3 has a generic PALIGNR instruction in x86 that will do an arbitrary
/// byte-rotation of the concatenation of two vectors; pre-SSSE3 can use
DAG.getNode(ISD::OR, DL, MVT::v16i8, LoShift, HiShift));
}
-/// \brief Try to lower a vector shuffle as a dword/qword rotation.
+/// Try to lower a vector shuffle as a dword/qword rotation.
///
/// AVX512 has a VALIGND/VALIGNQ instructions that will do an arbitrary
/// rotation of the concatenation of two vectors; This routine will
DAG.getConstant(Rotation, DL, MVT::i8));
}
-/// \brief Try to lower a vector shuffle as a bit shift (shifts in zeros).
+/// Try to lower a vector shuffle as a bit shift (shifts in zeros).
///
/// Attempts to match a shuffle mask against the PSLL(W/D/Q/DQ) and
/// PSRL(W/D/Q/DQ) SSE2 and AVX2 logical bit-shift instructions. The function
return false;
}
-/// \brief Try to lower a vector shuffle using SSE4a EXTRQ/INSERTQ.
+/// Try to lower a vector shuffle using SSE4a EXTRQ/INSERTQ.
static SDValue lowerVectorShuffleWithSSE4A(const SDLoc &DL, MVT VT, SDValue V1,
SDValue V2, ArrayRef<int> Mask,
const APInt &Zeroable,
return SDValue();
}
-/// \brief Lower a vector shuffle as a zero or any extension.
+/// Lower a vector shuffle as a zero or any extension.
///
/// Given a specific number of elements, element bit width, and extension
/// stride, produce either a zero or any extension based on the available
return DAG.getBitcast(VT, InputV);
}
-/// \brief Try to lower a vector shuffle as a zero extension on any microarch.
+/// Try to lower a vector shuffle as a zero extension on any microarch.
///
/// This routine will try to do everything in its power to cleverly lower
/// a shuffle which happens to match the pattern of a zero extend. It doesn't
return SDValue();
}
-/// \brief Try to get a scalar value for a specific element of a vector.
+/// Try to get a scalar value for a specific element of a vector.
///
/// Looks through BUILD_VECTOR and SCALAR_TO_VECTOR nodes to find a scalar.
static SDValue getScalarValueForVectorElement(SDValue V, int Idx,
return SDValue();
}
-/// \brief Helper to test for a load that can be folded with x86 shuffles.
+/// Helper to test for a load that can be folded with x86 shuffles.
///
/// This is particularly important because the set of instructions varies
/// significantly based on whether the operand is a load or not.
return ISD::isNON_EXTLoad(V.getNode());
}
-/// \brief Try to lower insertion of a single element into a zero vector.
+/// Try to lower insertion of a single element into a zero vector.
///
/// This is a common pattern that we have especially efficient patterns to lower
/// across all subtarget feature sets.
DAG.getNode(ISD::TRUNCATE, DL, EltVT, Scalar));
}
-/// \brief Try to lower broadcast of a single element.
+/// Try to lower broadcast of a single element.
///
/// For convenience, this code also bundles all of the subtarget feature set
/// filtering. While a little annoying to re-dispatch on type here, there isn't
DAG.getConstant(InsertPSMask, DL, MVT::i8));
}
-/// \brief Try to lower a shuffle as a permute of the inputs followed by an
+/// Try to lower a shuffle as a permute of the inputs followed by an
/// UNPCK instruction.
///
/// This specifically targets cases where we end up with alternating between
return SDValue();
}
-/// \brief Handle lowering of 2-lane 64-bit floating point shuffles.
+/// Handle lowering of 2-lane 64-bit floating point shuffles.
///
/// This is the basis function for the 2-lane 64-bit shuffles as we have full
/// support for floating point shuffles but not integer shuffles. These
DAG.getConstant(SHUFPDMask, DL, MVT::i8));
}
-/// \brief Handle lowering of 2-lane 64-bit integer shuffles.
+/// Handle lowering of 2-lane 64-bit integer shuffles.
///
/// Tries to lower a 2-lane 64-bit shuffle using shuffle operations provided by
/// the integer unit to minimize domain crossing penalties. However, for blends
DAG.getVectorShuffle(MVT::v2f64, DL, V1, V2, Mask));
}
-/// \brief Test whether this can be lowered with a single SHUFPS instruction.
+/// Test whether this can be lowered with a single SHUFPS instruction.
///
/// This is used to disable more specialized lowerings when the shufps lowering
/// will happen to be efficient.
return true;
}
-/// \brief Lower a vector shuffle using the SHUFPS instruction.
+/// Lower a vector shuffle using the SHUFPS instruction.
///
/// This is a helper routine dedicated to lowering vector shuffles using SHUFPS.
/// It makes no assumptions about whether this is the *best* lowering, it simply
getV4X86ShuffleImm8ForMask(NewMask, DL, DAG));
}
-/// \brief Lower 4-lane 32-bit floating point shuffles.
+/// Lower 4-lane 32-bit floating point shuffles.
///
/// Uses instructions exclusively from the floating point unit to minimize
/// domain crossing penalties, as these are sufficient to implement all v4f32
return lowerVectorShuffleWithSHUFPS(DL, MVT::v4f32, Mask, V1, V2, DAG);
}
-/// \brief Lower 4-lane i32 vector shuffles.
+/// Lower 4-lane i32 vector shuffles.
///
/// We try to handle these with integer-domain shuffles where we can, but for
/// blends we use the floating point domain blend instructions.
return DAG.getBitcast(MVT::v4i32, ShufPS);
}
-/// \brief Lowering of single-input v8i16 shuffles is the cornerstone of SSE2
+/// Lowering of single-input v8i16 shuffles is the cornerstone of SSE2
/// shuffle lowering, and the most complex part.
///
/// The lowering strategy is to try to form pairs of input lanes which are
return DAG.getBitcast(VT, V);
}
-/// \brief Generic lowering of 8-lane i16 shuffles.
+/// Generic lowering of 8-lane i16 shuffles.
///
/// This handles both single-input shuffles and combined shuffle/blends with
/// two inputs. The single input shuffles are immediately delegated to
Mask, DAG);
}
-/// \brief Check whether a compaction lowering can be done by dropping even
+/// Check whether a compaction lowering can be done by dropping even
/// elements and compute how many times even elements must be dropped.
///
/// This handles shuffles which take every Nth element where N is a power of
return DAG.getNode(X86ISD::VPERMV3, DL, VT, V1, MaskNode, V2);
}
-/// \brief Generic lowering of v16i8 shuffles.
+/// Generic lowering of v16i8 shuffles.
///
/// This is a hybrid strategy to lower v16i8 vectors. It first attempts to
/// detect any complexity reducing interleaving. If that doesn't help, it uses
return DAG.getNode(X86ISD::PACKUS, DL, MVT::v16i8, LoV, HiV);
}
-/// \brief Dispatching routine to lower various 128-bit x86 vector shuffles.
+/// Dispatching routine to lower various 128-bit x86 vector shuffles.
///
/// This routine breaks down the specific type of 128-bit shuffle and
/// dispatches to the lowering routines accordingly.
}
}
-/// \brief Generic routine to split vector shuffle into half-sized shuffles.
+/// Generic routine to split vector shuffle into half-sized shuffles.
///
/// This routine just extracts two subvectors, shuffles them independently, and
/// then concatenates them back together. This should work effectively with all
return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi);
}
-/// \brief Either split a vector in halves or decompose the shuffles and the
+/// Either split a vector in halves or decompose the shuffles and the
/// blend.
///
/// This is provided as a good fallback for many lowerings of non-single-input
return lowerVectorShuffleAsDecomposedShuffleBlend(DL, VT, V1, V2, Mask, DAG);
}
-/// \brief Lower a vector shuffle crossing multiple 128-bit lanes as
+/// Lower a vector shuffle crossing multiple 128-bit lanes as
/// a permutation and blend of those lanes.
///
/// This essentially blends the out-of-lane inputs to each lane into the lane
return DAG.getVectorShuffle(VT, DL, V1, Flipped, FlippedBlendMask);
}
-/// \brief Handle lowering 2-lane 128-bit shuffles.
+/// Handle lowering 2-lane 128-bit shuffles.
static SDValue lowerV2X128VectorShuffle(const SDLoc &DL, MVT VT, SDValue V1,
SDValue V2, ArrayRef<int> Mask,
const APInt &Zeroable,
DAG.getConstant(PermMask, DL, MVT::i8));
}
-/// \brief Lower a vector shuffle by first fixing the 128-bit lanes and then
+/// Lower a vector shuffle by first fixing the 128-bit lanes and then
/// shuffling each lane.
///
/// This will only succeed when the result of fixing the 128-bit lanes results
DAG.getIntPtrConstant(Offset, DL));
}
-/// \brief Test whether the specified input (0 or 1) is in-place blended by the
+/// Test whether the specified input (0 or 1) is in-place blended by the
/// given mask.
///
/// This returns true if the elements from a particular input are already in the
DAG.getConstant(Immediate, DL, MVT::i8));
}
-/// \brief Handle lowering of 4-lane 64-bit floating point shuffles.
+/// Handle lowering of 4-lane 64-bit floating point shuffles.
///
/// Also ends up handling lowering of 4-lane 64-bit integer shuffles when AVX2
/// isn't available.
return lowerVectorShuffleAsSplitOrBlend(DL, MVT::v4f64, V1, V2, Mask, DAG);
}
-/// \brief Handle lowering of 4-lane 64-bit integer shuffles.
+/// Handle lowering of 4-lane 64-bit integer shuffles.
///
/// This routine is only called when we have AVX2 and thus a reasonable
/// instruction set for v4i64 shuffling..
Mask, DAG);
}
-/// \brief Handle lowering of 8-lane 32-bit floating point shuffles.
+/// Handle lowering of 8-lane 32-bit floating point shuffles.
///
/// Also ends up handling lowering of 8-lane 32-bit integer shuffles when AVX2
/// isn't available.
return lowerVectorShuffleAsSplitOrBlend(DL, MVT::v8f32, V1, V2, Mask, DAG);
}
-/// \brief Handle lowering of 8-lane 32-bit integer shuffles.
+/// Handle lowering of 8-lane 32-bit integer shuffles.
///
/// This routine is only called when we have AVX2 and thus a reasonable
/// instruction set for v8i32 shuffling..
Mask, DAG);
}
-/// \brief Handle lowering of 16-lane 16-bit integer shuffles.
+/// Handle lowering of 16-lane 16-bit integer shuffles.
///
/// This routine is only called when we have AVX2 and thus a reasonable
/// instruction set for v16i16 shuffling..
return lowerVectorShuffleAsSplitOrBlend(DL, MVT::v16i16, V1, V2, Mask, DAG);
}
-/// \brief Handle lowering of 32-lane 8-bit integer shuffles.
+/// Handle lowering of 32-lane 8-bit integer shuffles.
///
/// This routine is only called when we have AVX2 and thus a reasonable
/// instruction set for v32i8 shuffling..
return lowerVectorShuffleAsSplitOrBlend(DL, MVT::v32i8, V1, V2, Mask, DAG);
}
-/// \brief High-level routine to lower various 256-bit x86 vector shuffles.
+/// High-level routine to lower various 256-bit x86 vector shuffles.
///
/// This routine either breaks down the specific type of a 256-bit x86 vector
/// shuffle or splits it into two 128-bit shuffles and fuses the results back
}
}
-/// \brief Try to lower a vector shuffle as a 128-bit shuffles.
+/// Try to lower a vector shuffle as a 128-bit shuffles.
static SDValue lowerV4X128VectorShuffle(const SDLoc &DL, MVT VT,
ArrayRef<int> Mask,
const APInt &Zeroable,
DAG.getConstant(PermMask, DL, MVT::i8));
}
-/// \brief Handle lowering of 8-lane 64-bit floating point shuffles.
+/// Handle lowering of 8-lane 64-bit floating point shuffles.
static SDValue lowerV8F64VectorShuffle(const SDLoc &DL, ArrayRef<int> Mask,
const APInt &Zeroable,
SDValue V1, SDValue V2,
return lowerVectorShuffleWithPERMV(DL, MVT::v8f64, Mask, V1, V2, DAG);
}
-/// \brief Handle lowering of 16-lane 32-bit floating point shuffles.
+/// Handle lowering of 16-lane 32-bit floating point shuffles.
static SDValue lowerV16F32VectorShuffle(const SDLoc &DL, ArrayRef<int> Mask,
const APInt &Zeroable,
SDValue V1, SDValue V2,
return lowerVectorShuffleWithPERMV(DL, MVT::v16f32, Mask, V1, V2, DAG);
}
-/// \brief Handle lowering of 8-lane 64-bit integer shuffles.
+/// Handle lowering of 8-lane 64-bit integer shuffles.
static SDValue lowerV8I64VectorShuffle(const SDLoc &DL, ArrayRef<int> Mask,
const APInt &Zeroable,
SDValue V1, SDValue V2,
return lowerVectorShuffleWithPERMV(DL, MVT::v8i64, Mask, V1, V2, DAG);
}
-/// \brief Handle lowering of 16-lane 32-bit integer shuffles.
+/// Handle lowering of 16-lane 32-bit integer shuffles.
static SDValue lowerV16I32VectorShuffle(const SDLoc &DL, ArrayRef<int> Mask,
const APInt &Zeroable,
SDValue V1, SDValue V2,
return lowerVectorShuffleWithPERMV(DL, MVT::v16i32, Mask, V1, V2, DAG);
}
-/// \brief Handle lowering of 32-lane 16-bit integer shuffles.
+/// Handle lowering of 32-lane 16-bit integer shuffles.
static SDValue lowerV32I16VectorShuffle(const SDLoc &DL, ArrayRef<int> Mask,
const APInt &Zeroable,
SDValue V1, SDValue V2,
return lowerVectorShuffleWithPERMV(DL, MVT::v32i16, Mask, V1, V2, DAG);
}
-/// \brief Handle lowering of 64-lane 8-bit integer shuffles.
+/// Handle lowering of 64-lane 8-bit integer shuffles.
static SDValue lowerV64I8VectorShuffle(const SDLoc &DL, ArrayRef<int> Mask,
const APInt &Zeroable,
SDValue V1, SDValue V2,
return splitAndLowerVectorShuffle(DL, MVT::v64i8, V1, V2, Mask, DAG);
}
-/// \brief High-level routine to lower various 512-bit x86 vector shuffles.
+/// High-level routine to lower various 512-bit x86 vector shuffles.
///
/// This routine either breaks down the specific type of a 512-bit x86 vector
/// shuffle or splits it into two 256-bit shuffles and fuses the results back
return false;
}
-/// \brief Top-level lowering for x86 vector shuffles.
+/// Top-level lowering for x86 vector shuffles.
///
/// This handles decomposition, canonicalization, and lowering of all x86
/// vector shuffles. Most of the specific lowering strategies are encapsulated
llvm_unreachable("Unimplemented!");
}
-/// \brief Try to lower a VSELECT instruction to a vector shuffle.
+/// Try to lower a VSELECT instruction to a vector shuffle.
static SDValue lowerVSELECTtoVectorShuffle(SDValue Op,
const X86Subtarget &Subtarget,
SelectionDAG &DAG) {
return getSETCC(CC == ISD::SETEQ ? X86::COND_E : X86::COND_NE, Res, DL, DAG);
}
-/// \brief return true if \c Op has a use that doesn't just read flags.
+/// return true if \c Op has a use that doesn't just read flags.
static bool hasNonFlagsUse(SDValue Op) {
for (SDNode::use_iterator UI = Op->use_begin(), UE = Op->use_end(); UI != UE;
++UI) {
DAG.getConstant(SSECC, dl, MVT::i8));
}
-/// \brief Try to turn a VSETULT into a VSETULE by modifying its second
+/// Try to turn a VSETULT into a VSETULE by modifying its second
/// operand \p Op1. If non-trivial (for example because it's not constant)
/// return an empty value.
static SDValue ChangeVSETULTtoVSETULE(const SDLoc &dl, SDValue Op1,
return DAG.getNode(Opc, dl, VT, SrcOp, ShAmt);
}
-/// \brief Return Mask with the necessary casting or extending
+/// Return Mask with the necessary casting or extending
/// for \p Mask according to \p MaskVT when lowering masking intrinsics
static SDValue getMaskNode(SDValue Mask, MVT MaskVT,
const X86Subtarget &Subtarget, SelectionDAG &DAG,
}
}
-/// \brief Return (and \p Op, \p Mask) for compare instructions or
+/// Return (and \p Op, \p Mask) for compare instructions or
/// (vselect \p Mask, \p Op, \p PreservedSrc) for others along with the
/// necessary casting or extending for \p Mask when lowering masking intrinsics
static SDValue getVectorMaskingNode(SDValue Op, SDValue Mask,
return DAG.getNode(OpcodeSelect, dl, VT, VMask, Op, PreservedSrc);
}
-/// \brief Creates an SDNode for a predicated scalar operation.
+/// Creates an SDNode for a predicated scalar operation.
/// \returns (X86vselect \p Mask, \p Op, \p PreservedSrc).
/// The mask is coming as MVT::i8 and it should be transformed
/// to MVT::v1i1 while lowering masking intrinsics.
return LowerVectorIntUnary(Op, DAG);
}
-/// \brief Lower a vector CTLZ using native supported vector CTLZ instruction.
+/// Lower a vector CTLZ using native supported vector CTLZ instruction.
//
// i8/i16 vector implemented using dword LZCNT vector instruction
// ( sub(trunc(lzcnt(zext32(x)))) ). In case zext32(x) is illegal,
return false;
}
-/// \brief Combine an arbitrary chain of shuffles into a single instruction if
+/// Combine an arbitrary chain of shuffles into a single instruction if
/// possible.
///
/// This is the leaf of the recursive combine below. When we have found some
return DAG.getBitcast(VT, CstOp);
}
-/// \brief Fully generic combining of x86 shuffle instructions.
+/// Fully generic combining of x86 shuffle instructions.
///
/// This should be the last combine run over the x86 shuffle instructions. Once
/// they have been fully optimized, this will recursively consider all chains
Subtarget);
}
-/// \brief Get the PSHUF-style mask from PSHUF node.
+/// Get the PSHUF-style mask from PSHUF node.
///
/// This is a very minor wrapper around getTargetShuffleMask to easy forming v4
/// PSHUF-style masks that can be reused with such instructions.
}
}
-/// \brief Search for a combinable shuffle across a chain ending in pshufd.
+/// Search for a combinable shuffle across a chain ending in pshufd.
///
/// We walk up the chain and look for a combinable shuffle, skipping over
/// shuffles that we could hoist this shuffle's transformation past without
return V;
}
-/// \brief Search for a combinable shuffle across a chain ending in pshuflw or
+/// Search for a combinable shuffle across a chain ending in pshuflw or
/// pshufhw.
///
/// We walk up the chain, skipping shuffles of the other half and looking
return true;
}
-/// \brief Try to combine x86 target specific shuffles.
+/// Try to combine x86 target specific shuffles.
static SDValue combineTargetShuffle(SDValue N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI,
const X86Subtarget &Subtarget) {
return true;
}
-/// \brief Try to combine a shuffle into a target-specific add-sub or
+/// Try to combine a shuffle into a target-specific add-sub or
/// mul-add-sub node.
static SDValue combineShuffleToAddSubOrFMAddSub(SDNode *N,
const X86Subtarget &Subtarget,
/// the immediate into a register.
bool isLegalAddImmediate(int64_t Imm) const override;
- /// \brief Return the cost of the scaling factor used in the addressing
+ /// Return the cost of the scaling factor used in the addressing
/// mode represented by AM for this target, for a load/store
/// of the specified type.
/// If the AM is supported, the return value must be >= 0.
(VT == MVT::f32 && X86ScalarSSEf32); // f32 is when SSE1
}
- /// \brief Returns true if it is beneficial to convert a load of a constant
+ /// Returns true if it is beneficial to convert a load of a constant
/// to just the constant itself.
bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
Type *Ty) const override;
bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
- /// \brief Customize the preferred legalization strategy for certain types.
+ /// Customize the preferred legalization strategy for certain types.
LegalizeTypeAction getPreferredVectorAction(EVT VT) const override;
MVT getRegisterTypeForCallingConv(MVT VT) const override;
unsigned getMaxSupportedInterleaveFactor() const override { return 4; }
- /// \brief Lower interleaved load(s) into target specific
+ /// Lower interleaved load(s) into target specific
/// instructions/intrinsics.
bool lowerInterleavedLoad(LoadInst *LI,
ArrayRef<ShuffleVectorInst *> Shuffles,
ArrayRef<unsigned> Indices,
unsigned Factor) const override;
- /// \brief Lower interleaved store(s) into target specific
+ /// Lower interleaved store(s) into target specific
/// instructions/intrinsics.
bool lowerInterleavedStore(StoreInst *SI, ShuffleVectorInst *SVI,
unsigned Factor) const override;
}
}
-/// \brief Get the VPCMP immediate if the opcodes are swapped.
+/// Get the VPCMP immediate if the opcodes are swapped.
unsigned X86::getSwappedVPCMPImm(unsigned Imm) {
switch (Imm) {
default: llvm_unreachable("Unreachable!");
return Imm;
}
-/// \brief Get the VPCOM immediate if the opcodes are swapped.
+/// Get the VPCOM immediate if the opcodes are swapped.
unsigned X86::getSwappedVPCOMImm(unsigned Imm) {
switch (Imm) {
default: llvm_unreachable("Unreachable!");
// Turn condition code into conditional branch opcode.
unsigned GetCondBranchFromCond(CondCode CC);
-/// \brief Return a pair of condition code for the given predicate and whether
+/// Return a pair of condition code for the given predicate and whether
/// the instruction operands should be swaped to match the condition code.
std::pair<CondCode, bool> getX86ConditionCode(CmpInst::Predicate Predicate);
-/// \brief Return a set opcode for the given condition and whether it has
+/// Return a set opcode for the given condition and whether it has
/// a memory operand.
unsigned getSETFromCond(CondCode CC, bool HasMemoryOperand = false);
-/// \brief Return a cmov opcode for the given condition, register size in
+/// Return a cmov opcode for the given condition, register size in
/// bytes, and operand type.
unsigned getCMovFromCond(CondCode CC, unsigned RegBytes,
bool HasMemoryOperand = false);
/// e.g. turning COND_E to COND_NE.
CondCode GetOppositeBranchCondition(CondCode CC);
-/// \brief Get the VPCMP immediate if the opcodes are swapped.
+/// Get the VPCMP immediate if the opcodes are swapped.
unsigned getSwappedVPCMPImm(unsigned Imm);
-/// \brief Get the VPCOM immediate if the opcodes are swapped.
+/// Get the VPCOM immediate if the opcodes are swapped.
unsigned getSwappedVPCOMImm(unsigned Imm);
} // namespace X86
namespace {
-/// \brief This class holds necessary information to represent an interleaved
+/// This class holds necessary information to represent an interleaved
/// access group and supports utilities to lower the group into
/// X86-specific instructions/intrinsics.
/// E.g. A group of interleaving access loads (Factor = 2; accessing every
/// %v0 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <0, 2, 4, 6>
/// %v1 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <1, 3, 5, 7>
class X86InterleavedAccessGroup {
- /// \brief Reference to the wide-load instruction of an interleaved access
+ /// Reference to the wide-load instruction of an interleaved access
/// group.
Instruction *const Inst;
- /// \brief Reference to the shuffle(s), consumer(s) of the (load) 'Inst'.
+ /// Reference to the shuffle(s), consumer(s) of the (load) 'Inst'.
ArrayRef<ShuffleVectorInst *> Shuffles;
- /// \brief Reference to the starting index of each user-shuffle.
+ /// Reference to the starting index of each user-shuffle.
ArrayRef<unsigned> Indices;
- /// \brief Reference to the interleaving stride in terms of elements.
+ /// Reference to the interleaving stride in terms of elements.
const unsigned Factor;
- /// \brief Reference to the underlying target.
+ /// Reference to the underlying target.
const X86Subtarget &Subtarget;
const DataLayout &DL;
IRBuilder<> &Builder;
- /// \brief Breaks down a vector \p 'Inst' of N elements into \p NumSubVectors
+ /// Breaks down a vector \p 'Inst' of N elements into \p NumSubVectors
/// sub vectors of type \p T. Returns the sub-vectors in \p DecomposedVectors.
void decompose(Instruction *Inst, unsigned NumSubVectors, VectorType *T,
SmallVectorImpl<Instruction *> &DecomposedVectors);
- /// \brief Performs matrix transposition on a 4x4 matrix \p InputVectors and
+ /// Performs matrix transposition on a 4x4 matrix \p InputVectors and
/// returns the transposed-vectors in \p TransposedVectors.
/// E.g.
/// InputVectors:
: Inst(I), Shuffles(Shuffs), Indices(Ind), Factor(F), Subtarget(STarget),
DL(Inst->getModule()->getDataLayout()), Builder(B) {}
- /// \brief Returns true if this interleaved access group can be lowered into
+ /// Returns true if this interleaved access group can be lowered into
/// x86-specific instructions/intrinsics, false otherwise.
bool isSupported() const;
- /// \brief Lowers this interleaved access group into X86-specific
+ /// Lowers this interleaved access group into X86-specific
/// instructions/intrinsics.
bool lowerIntoOptimizedSequence();
};
return MCOperand::createExpr(Expr);
}
-/// \brief Simplify FOO $imm, %{al,ax,eax,rax} to FOO $imm, for instruction with
+/// Simplify FOO $imm, %{al,ax,eax,rax} to FOO $imm, for instruction with
/// a short fixed-register form.
static void SimplifyShortImmForm(MCInst &Inst, unsigned Opcode) {
unsigned ImmOp = Inst.getNumOperands() - 1;
Inst.addOperand(Saved);
}
-/// \brief If a movsx instruction has a shorter encoding for the used register
+/// If a movsx instruction has a shorter encoding for the used register
/// simplify the instruction to use it instead.
static void SimplifyMOVSX(MCInst &Inst) {
unsigned NewOpcode = 0;
}
}
-/// \brief Simplify things like MOV32rm to MOV32o32a.
+/// Simplify things like MOV32rm to MOV32o32a.
static void SimplifyShortMoveForm(X86AsmPrinter &Printer, MCInst &Inst,
unsigned Opcode) {
// Don't make these simplifications in 64-bit mode; other assemblers don't
.addExpr(tlsRef));
}
-/// \brief Emit the largest nop instruction smaller than or equal to \p NumBytes
+/// Emit the largest nop instruction smaller than or equal to \p NumBytes
/// bytes. Return the size of nop emitted.
static unsigned EmitNop(MCStreamer &OS, unsigned NumBytes, bool Is64Bit,
const MCSubtargetInfo &STI) {
return NopSize;
}
-/// \brief Emit the optimal amount of multi-byte nops on X86.
+/// Emit the optimal amount of multi-byte nops on X86.
static void EmitNops(MCStreamer &OS, unsigned NumBytes, bool Is64Bit,
const MCSubtargetInfo &STI) {
unsigned NopsToEmit = NumBytes;
/// ReturnAddrIndex - FrameIndex for return slot.
int ReturnAddrIndex = 0;
- /// \brief FrameIndex for return slot.
+ /// FrameIndex for return slot.
int FrameAddrIndex = 0;
/// TailCallReturnAddrDelta - The number of bytes by which return address
using namespace llvm;
-/// \brief Check if the instr pair, FirstMI and SecondMI, should be fused
+/// Check if the instr pair, FirstMI and SecondMI, should be fused
/// together. Given SecondMI, when FirstMI is unspecified, then check if
/// SecondMI may be part of a fused pair at all.
static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
STATISTIC(NumSubstLEAs, "Number of LEA instruction substitutions");
STATISTIC(NumRedundantLEAs, "Number of redundant LEA instructions removed");
-/// \brief Returns true if two machine operands are identical and they are not
+/// Returns true if two machine operands are identical and they are not
/// physical registers.
static inline bool isIdenticalOp(const MachineOperand &MO1,
const MachineOperand &MO2);
-/// \brief Returns true if two address displacement operands are of the same
+/// Returns true if two address displacement operands are of the same
/// type and use the same symbol/index/address regardless of the offset.
static bool isSimilarDispOp(const MachineOperand &MO1,
const MachineOperand &MO2);
-/// \brief Returns true if the instruction is LEA.
+/// Returns true if the instruction is LEA.
static inline bool isLEA(const MachineInstr &MI);
namespace {
} // end namespace llvm
-/// \brief Returns a hash table key based on memory operands of \p MI. The
+/// Returns a hash table key based on memory operands of \p MI. The
/// number of the first memory operand of \p MI is specified through \p N.
static inline MemOpKey getMemOpKey(const MachineInstr &MI, unsigned N) {
assert((isLEA(MI) || MI.mayLoadOrStore()) &&
StringRef getPassName() const override { return "X86 LEA Optimize"; }
- /// \brief Loop over all of the basic blocks, replacing address
+ /// Loop over all of the basic blocks, replacing address
/// calculations in load and store instructions, if it's already
/// been calculated by LEA. Also, remove redundant LEAs.
bool runOnMachineFunction(MachineFunction &MF) override;
private:
using MemOpMap = DenseMap<MemOpKey, SmallVector<MachineInstr *, 16>>;
- /// \brief Returns a distance between two instructions inside one basic block.
+ /// Returns a distance between two instructions inside one basic block.
/// Negative result means, that instructions occur in reverse order.
int calcInstrDist(const MachineInstr &First, const MachineInstr &Last);
- /// \brief Choose the best \p LEA instruction from the \p List to replace
+ /// Choose the best \p LEA instruction from the \p List to replace
/// address calculation in \p MI instruction. Return the address displacement
/// and the distance between \p MI and the chosen \p BestLEA in
/// \p AddrDispShift and \p Dist.
const MachineInstr &MI, MachineInstr *&BestLEA,
int64_t &AddrDispShift, int &Dist);
- /// \brief Returns the difference between addresses' displacements of \p MI1
+ /// Returns the difference between addresses' displacements of \p MI1
/// and \p MI2. The numbers of the first memory operands for the instructions
/// are specified through \p N1 and \p N2.
int64_t getAddrDispShift(const MachineInstr &MI1, unsigned N1,
const MachineInstr &MI2, unsigned N2) const;
- /// \brief Returns true if the \p Last LEA instruction can be replaced by the
+ /// Returns true if the \p Last LEA instruction can be replaced by the
/// \p First. The difference between displacements of the addresses calculated
/// by these LEAs is returned in \p AddrDispShift. It'll be used for proper
/// replacement of the \p Last LEA's uses with the \p First's def register.
bool isReplaceable(const MachineInstr &First, const MachineInstr &Last,
int64_t &AddrDispShift) const;
- /// \brief Find all LEA instructions in the basic block. Also, assign position
+ /// Find all LEA instructions in the basic block. Also, assign position
/// numbers to all instructions in the basic block to speed up calculation of
/// distance between them.
void findLEAs(const MachineBasicBlock &MBB, MemOpMap &LEAs);
- /// \brief Removes redundant address calculations.
+ /// Removes redundant address calculations.
bool removeRedundantAddrCalc(MemOpMap &LEAs);
/// Replace debug value MI with a new debug value instruction using register
MachineInstr *replaceDebugValue(MachineInstr &MI, unsigned VReg,
int64_t AddrDispShift);
- /// \brief Removes LEAs which calculate similar addresses.
+ /// Removes LEAs which calculate similar addresses.
bool removeRedundantLEAs(MemOpMap &LEAs);
DenseMap<const MachineInstr *, unsigned> InstrPos;
MCStreamer &Streamer) const override;
};
- /// \brief This implemenatation is used for X86 ELF targets that don't
+ /// This implemenatation is used for X86 ELF targets that don't
/// have a further specialization.
class X86ELFTargetObjectFile : public TargetLoweringObjectFileELF {
public:
PLTRelativeVariantKind = MCSymbolRefExpr::VK_PLT;
}
- /// \brief Describe a TLS variable address within debug info.
+ /// Describe a TLS variable address within debug info.
const MCExpr *getDebugThreadLocalSymbol(const MCSymbol *Sym) const override;
};
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
};
- /// \brief This implementation is used for Fuchsia on x86-64.
+ /// This implementation is used for Fuchsia on x86-64.
class X86FuchsiaTargetObjectFile : public X86ELFTargetObjectFile {
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
};
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
};
- /// \brief This implementation is used for Solaris on x86/x86-64.
+ /// This implementation is used for Solaris on x86/x86-64.
class X86SolarisTargetObjectFile : public X86ELFTargetObjectFile {
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
};
- /// \brief This implementation is used for Windows targets on x86 and x86-64.
+ /// This implementation is used for Windows targets on x86 and x86-64.
class X86WindowsTargetObjectFile : public TargetLoweringObjectFileCOFF {
const MCExpr *
lowerRelativeReference(const GlobalValue *LHS, const GlobalValue *RHS,
const TargetMachine &TM) const override;
- /// \brief Given a mergeable constant with the specified size and relocation
+ /// Given a mergeable constant with the specified size and relocation
/// information, return a section that it should be placed in.
MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind,
const Constant *C,
return BaseT::getMinMaxReductionCost(ValTy, CondTy, IsPairwise, IsUnsigned);
}
-/// \brief Calculate the cost of materializing a 64-bit value. This helper
+/// Calculate the cost of materializing a 64-bit value. This helper
/// method might only calculate a fraction of a larger immediate. Therefore it
/// is valid to return a cost of ZERO.
int X86TTIImpl::getIntImmCost(int64_t Val) {
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file is part of the XCore Disassembler.
+/// This file is part of the XCore Disassembler.
///
//===----------------------------------------------------------------------===//
namespace {
-/// \brief A disassembler class for XCore.
+/// A disassembler class for XCore.
class XCoreDisassembler : public MCDisassembler {
public:
XCoreDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx) :
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains the declaration of the XCoreInstPrinter class,
+/// This file contains the declaration of the XCoreInstPrinter class,
/// which is used to print XCore MCInst to a .s file.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains a pass that lowers thread local variables on the
+/// This file contains a pass that lowers thread local variables on the
/// XCore.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file contains code to lower XCore MachineInstrs to their
+/// This file contains code to lower XCore MachineInstrs to their
/// corresponding MCInst records.
///
//===----------------------------------------------------------------------===//
class Mangler;
class AsmPrinter;
-/// \brief This class is used to lower an MachineInstr into an MCInst.
+/// This class is used to lower an MachineInstr into an MCInst.
class LLVM_LIBRARY_VISIBILITY XCoreMCInstLower {
typedef MachineOperand::MachineOperandType MachineOperandType;
MCContext *Ctx;
return new AlwaysInlinerLegacyPass(InsertLifetime);
}
-/// \brief Get the inline cost for the always-inliner.
+/// Get the inline cost for the always-inliner.
///
/// The always inliner *only* handles functions which are marked with the
/// attribute to force inlining. As such, it is dramatically simpler and avoids
return true;
}
-/// \brief Checks if a type could have padding bytes.
+/// Checks if a type could have padding bytes.
static bool isDenselyPacked(Type *type, const DataLayout &DL) {
// There is no size information, so be conservative.
if (!type->isSized())
return true;
}
-/// \brief Checks if the padding bytes of an argument could be accessed.
+/// Checks if the padding bytes of an argument could be accessed.
static bool canPaddingBeAccessed(Argument *arg) {
assert(arg->hasByValAttr());
using namespace llvm;
namespace {
-/// \brief A nonce module pass used to place a barrier in a pass manager.
+/// A nonce module pass used to place a barrier in a pass manager.
///
/// There is no mechanism for ending a CGSCC pass manager once one is started.
/// This prevents extension points from having clear deterministic ordering
namespace {
-/// \brief Actual inliner pass implementation.
+/// Actual inliner pass implementation.
///
/// The common implementation of the inlining logic is shared between this
/// inliner pass and the always inliner pass. The two passes use different cost
uint64_t TotalUsedSamples = 0;
};
-/// \brief Sample profile pass.
+/// Sample profile pass.
///
/// This pass reads profile data from the file specified by
/// -sample-profile-file and annotates every affected function with the
void computeDominanceAndLoopInfo(Function &F);
void clearFunctionData();
- /// \brief Map basic blocks to their computed weights.
+ /// Map basic blocks to their computed weights.
///
/// The weight of a basic block is defined to be the maximum
/// of all the instruction weights in that block.
BlockWeightMap BlockWeights;
- /// \brief Map edges to their computed weights.
+ /// Map edges to their computed weights.
///
/// Edge weights are computed by propagating basic block weights in
/// SampleProfile::propagateWeights.
EdgeWeightMap EdgeWeights;
- /// \brief Set of visited blocks during propagation.
+ /// Set of visited blocks during propagation.
SmallPtrSet<const BasicBlock *, 32> VisitedBlocks;
- /// \brief Set of visited edges during propagation.
+ /// Set of visited edges during propagation.
SmallSet<Edge, 32> VisitedEdges;
- /// \brief Equivalence classes for block weights.
+ /// Equivalence classes for block weights.
///
/// Two blocks BB1 and BB2 are in the same equivalence class if they
/// dominate and post-dominate each other, and they are in the same loop
/// is one-to-one mapping.
StringMap<Function *> SymbolMap;
- /// \brief Dominance, post-dominance and loop information.
+ /// Dominance, post-dominance and loop information.
std::unique_ptr<DominatorTree> DT;
std::unique_ptr<PostDomTreeBase<BasicBlock>> PDT;
std::unique_ptr<LoopInfo> LI;
std::function<AssumptionCache &(Function &)> GetAC;
std::function<TargetTransformInfo &(Function &)> GetTTI;
- /// \brief Predecessors for each basic block in the CFG.
+ /// Predecessors for each basic block in the CFG.
BlockEdgeMap Predecessors;
- /// \brief Successors for each basic block in the CFG.
+ /// Successors for each basic block in the CFG.
BlockEdgeMap Successors;
SampleCoverageTracker CoverageTracker;
- /// \brief Profile reader object.
+ /// Profile reader object.
std::unique_ptr<SampleProfileReader> Reader;
- /// \brief Samples collected for the body of this function.
+ /// Samples collected for the body of this function.
FunctionSamples *Samples = nullptr;
- /// \brief Name of the profile file to load.
+ /// Name of the profile file to load.
std::string Filename;
- /// \brief Flag indicating whether the profile input loaded successfully.
+ /// Flag indicating whether the profile input loaded successfully.
bool ProfileIsValid = false;
- /// \brief Flag indicating if the pass is invoked in ThinLTO compile phase.
+ /// Flag indicating if the pass is invoked in ThinLTO compile phase.
///
/// In this phase, in annotation, we should not promote indirect calls.
/// Instead, we will mark GUIDs that needs to be annotated to the function.
bool IsThinLTOPreLink;
- /// \brief Total number of samples collected in this profile.
+ /// Total number of samples collected in this profile.
///
/// This is the sum of all the samples collected in all the functions executed
/// at runtime.
uint64_t TotalCollectedSamples = 0;
- /// \brief Optimization Remark Emitter used to emit diagnostic remarks.
+ /// Optimization Remark Emitter used to emit diagnostic remarks.
OptimizationRemarkEmitter *ORE = nullptr;
};
}
#ifndef NDEBUG
-/// \brief Print the weight of edge \p E on stream \p OS.
+/// Print the weight of edge \p E on stream \p OS.
///
/// \param OS Stream to emit the output to.
/// \param E Edge to print.
<< "]: " << EdgeWeights[E] << "\n";
}
-/// \brief Print the equivalence class of block \p BB on stream \p OS.
+/// Print the equivalence class of block \p BB on stream \p OS.
///
/// \param OS Stream to emit the output to.
/// \param BB Block to print.
<< "]: " << ((Equiv) ? EquivalenceClass[BB]->getName() : "NONE") << "\n";
}
-/// \brief Print the weight of block \p BB on stream \p OS.
+/// Print the weight of block \p BB on stream \p OS.
///
/// \param OS Stream to emit the output to.
/// \param BB Block to print.
}
#endif
-/// \brief Get the weight for an instruction.
+/// Get the weight for an instruction.
///
/// The "weight" of an instruction \p Inst is the number of samples
/// collected on that instruction at runtime. To retrieve it, we
return R;
}
-/// \brief Compute the weight of a basic block.
+/// Compute the weight of a basic block.
///
/// The weight of basic block \p BB is the maximum weight of all the
/// instructions in BB.
return HasWeight ? ErrorOr<uint64_t>(Max) : std::error_code();
}
-/// \brief Compute and store the weights of every basic block.
+/// Compute and store the weights of every basic block.
///
/// This populates the BlockWeights map by computing
/// the weights of every basic block in the CFG.
return Changed;
}
-/// \brief Get the FunctionSamples for a call instruction.
+/// Get the FunctionSamples for a call instruction.
///
/// The FunctionSamples of a call/invoke instruction \p Inst is the inlined
/// instance in which that call instruction is calling to. It contains
return R;
}
-/// \brief Get the FunctionSamples for an instruction.
+/// Get the FunctionSamples for an instruction.
///
/// The FunctionSamples of an instruction \p Inst is the inlined instance
/// in which that instruction is coming from. We traverse the inline stack
return false;
}
-/// \brief Iteratively inline hot callsites of a function.
+/// Iteratively inline hot callsites of a function.
///
/// Iteratively traverse all callsites of the function \p F, and find if
/// the corresponding inlined instance exists and is hot in profile. If
return Changed;
}
-/// \brief Find equivalence classes for the given block.
+/// Find equivalence classes for the given block.
///
/// This finds all the blocks that are guaranteed to execute the same
/// number of times as \p BB1. To do this, it traverses all the
}
}
-/// \brief Find equivalence classes.
+/// Find equivalence classes.
///
/// Since samples may be missing from blocks, we can fill in the gaps by setting
/// the weights of all the blocks in the same equivalence class to the same
}
}
-/// \brief Visit the given edge to decide if it has a valid weight.
+/// Visit the given edge to decide if it has a valid weight.
///
/// If \p E has not been visited before, we copy to \p UnknownEdge
/// and increment the count of unknown edges.
return EdgeWeights[E];
}
-/// \brief Propagate weights through incoming/outgoing edges.
+/// Propagate weights through incoming/outgoing edges.
///
/// If the weight of a basic block is known, and there is only one edge
/// with an unknown weight, we can calculate the weight of that edge.
return Changed;
}
-/// \brief Build in/out edge lists for each basic block in the CFG.
+/// Build in/out edge lists for each basic block in the CFG.
///
/// We are interested in unique edges. If a block B1 has multiple
/// edges to another block B2, we only add a single B1->B2 edge.
return R;
}
-/// \brief Propagate weights into edges
+/// Propagate weights into edges
///
/// The following rules are applied to every block BB in the CFG:
///
}
}
-/// \brief Get the line number for the function header.
+/// Get the line number for the function header.
///
/// This looks up function \p F in the current compilation unit and
/// retrieves the line number where the function is defined. This is
LI->analyze(*DT);
}
-/// \brief Generate branch weight metadata for all branches in \p F.
+/// Generate branch weight metadata for all branches in \p F.
///
/// Branch weights are computed out of instruction samples using a
/// propagation heuristic. Propagation proceeds in 3 phases:
return createFMul(OpndVal, Coeff.getValue(Instr->getType()));
}
-/// \brief Return true if we can prove that:
+/// Return true if we can prove that:
/// (sub LHS, RHS) === (sub nsw LHS, RHS)
/// This basically requires proving that the add in the original type would not
/// overflow to change the sign bit or have a carry out.
return false;
}
-/// \brief Return true if we can prove that:
+/// Return true if we can prove that:
/// (sub LHS, RHS) === (sub nuw LHS, RHS)
bool InstCombiner::willNotOverflowUnsignedSub(const Value *LHS,
const Value *RHS,
return Builder.CreateFCmp(Pred, LHS, RHS);
}
-/// \brief Transform BITWISE_OP(BSWAP(A),BSWAP(B)) or
+/// Transform BITWISE_OP(BSWAP(A),BSWAP(B)) or
/// BITWISE_OP(BSWAP(A), Constant) to BSWAP(BITWISE_OP(A, B))
/// \param I Binary operator to transform.
/// \return Pointer to node that must replace the original binary operator, or
return false;
}
-/// \brief Recognize and process idiom involving test for multiplication
+/// Recognize and process idiom involving test for multiplication
/// overflow.
///
/// The caller has matched a pattern of the form:
return GoodToSwap > 0;
}
-/// \brief Check that one use is in the same block as the definition and all
+/// Check that one use is in the same block as the definition and all
/// other uses are in blocks dominated by a given block.
///
/// \param DI Definition
return true;
}
-/// \brief True when a select result is replaced by one of its operands
+/// True when a select result is replaced by one of its operands
/// in select-icmp sequence. This will eventually result in the elimination
/// of the select.
///
return V;
}
-/// \brief Add one to a Constant
+/// Add one to a Constant
static inline Constant *AddOne(Constant *C) {
return ConstantExpr::getAdd(C, ConstantInt::get(C->getType(), 1));
}
-/// \brief Subtract one from a Constant
+/// Subtract one from a Constant
static inline Constant *SubOne(Constant *C) {
return ConstantExpr::getSub(C, ConstantInt::get(C->getType(), 1));
}
-/// \brief Return true if the specified value is free to invert (apply ~ to).
+/// Return true if the specified value is free to invert (apply ~ to).
/// This happens in cases where the ~ can be eliminated. If WillInvertAllUses
/// is true, work under the assumption that the caller intends to remove all
/// uses of V and only keep uses of ~V.
return false;
}
-/// \brief Specific patterns of overflow check idioms that we match.
+/// Specific patterns of overflow check idioms that we match.
enum OverflowCheckFlavor {
OCF_UNSIGNED_ADD,
OCF_SIGNED_ADD,
OCF_INVALID
};
-/// \brief Returns the OverflowCheckFlavor corresponding to a overflow_with_op
+/// Returns the OverflowCheckFlavor corresponding to a overflow_with_op
/// intrinsic.
static inline OverflowCheckFlavor
IntrinsicIDToOverflowCheckFlavor(unsigned ID) {
}
}
-/// \brief The core instruction combiner logic.
+/// The core instruction combiner logic.
///
/// This class provides both the logic to recursively visit instructions and
/// combine them.
: public InstVisitor<InstCombiner, Instruction *> {
// FIXME: These members shouldn't be public.
public:
- /// \brief A worklist of the instructions that need to be simplified.
+ /// A worklist of the instructions that need to be simplified.
InstCombineWorklist &Worklist;
- /// \brief An IRBuilder that automatically inserts new instructions into the
+ /// An IRBuilder that automatically inserts new instructions into the
/// worklist.
using BuilderTy = IRBuilder<TargetFolder, IRBuilderCallbackInserter>;
BuilderTy &Builder;
ExpensiveCombines(ExpensiveCombines), AA(AA), AC(AC), TLI(TLI), DT(DT),
DL(DL), SQ(DL, &TLI, &DT, &AC), ORE(ORE), LI(LI) {}
- /// \brief Run the combiner over the entire worklist until it is empty.
+ /// Run the combiner over the entire worklist until it is empty.
///
/// \returns true if the IR is changed.
bool run();
/// if it cannot already be eliminated by some other transformation.
bool shouldOptimizeCast(CastInst *CI);
- /// \brief Try to optimize a sequence of instructions checking if an operation
+ /// Try to optimize a sequence of instructions checking if an operation
/// on LHS and RHS overflows.
///
/// If this overflow check is done via one of the overflow check intrinsics,
Value *foldAndOrOfICmpsOfAndWithPow2(ICmpInst *LHS, ICmpInst *RHS,
bool JoinedByAnd, Instruction &CxtI);
public:
- /// \brief Inserts an instruction \p New before instruction \p Old
+ /// Inserts an instruction \p New before instruction \p Old
///
/// Also adds the new instruction to the worklist and returns \p New so that
/// it is suitable for use as the return from the visitation patterns.
return New;
}
- /// \brief Same as InsertNewInstBefore, but also sets the debug loc.
+ /// Same as InsertNewInstBefore, but also sets the debug loc.
Instruction *InsertNewInstWith(Instruction *New, Instruction &Old) {
New->setDebugLoc(Old.getDebugLoc());
return InsertNewInstBefore(New, Old);
}
- /// \brief A combiner-aware RAUW-like routine.
+ /// A combiner-aware RAUW-like routine.
///
/// This method is to be used when an instruction is found to be dead,
/// replaceable with another preexisting expression. Here we add all uses of
return InsertValueInst::Create(Struct, Result, 0);
}
- /// \brief Combiner aware instruction erasure.
+ /// Combiner aware instruction erasure.
///
/// When dealing with an instruction that has side effects or produces a void
/// value, we can't rely on DCE to delete the instruction. Instead, visit
uint64_t MaxArraySizeForCombine;
private:
- /// \brief Performs a few simplifications for operators which are associative
+ /// Performs a few simplifications for operators which are associative
/// or commutative.
bool SimplifyAssociativeOrCommutative(BinaryOperator &I);
- /// \brief Tries to simplify binary operations which some other binary
+ /// Tries to simplify binary operations which some other binary
/// operation distributes over.
///
/// It does this by either by factorizing out common terms (eg "(A*B)+(A*C)"
ConstantInt *&Less, ConstantInt *&Equal,
ConstantInt *&Greater);
- /// \brief Attempts to replace V with a simpler value based on the demanded
+ /// Attempts to replace V with a simpler value based on the demanded
/// bits.
Value *SimplifyDemandedUseBits(Value *V, APInt DemandedMask, KnownBits &Known,
unsigned Depth, Instruction *CxtI);
Instruction *Shr, const APInt &ShrOp1, Instruction *Shl,
const APInt &ShlOp1, const APInt &DemandedMask, KnownBits &Known);
- /// \brief Tries to simplify operands to an integer instruction based on its
+ /// Tries to simplify operands to an integer instruction based on its
/// demanded bits.
bool SimplifyDemandedInstructionBits(Instruction &Inst);
Instruction *foldAddWithConstant(BinaryOperator &Add);
- /// \brief Try to rotate an operation below a PHI node, using PHI nodes for
+ /// Try to rotate an operation below a PHI node, using PHI nodes for
/// its operands.
Instruction *FoldPHIArgOpIntoPHI(PHINode &PN);
Instruction *FoldPHIArgBinOpIntoPHI(PHINode &PN);
Value *EvaluateInDifferentType(Value *V, Type *Ty, bool isSigned);
- /// \brief Returns a value X such that Val = X * Scale, or null if none.
+ /// Returns a value X such that Val = X * Scale, or null if none.
///
/// If the multiplication is known not to overflow then NoSignedWrap is set.
Value *Descale(Value *Val, APInt Scale, bool &NoSignedWrap);
return Ty->isIntegerTy() || Ty->isPointerTy() || Ty->isFloatingPointTy();
}
-/// \brief Helper to combine a load to a new type.
+/// Helper to combine a load to a new type.
///
/// This just does the work of combining a load to a new type. It handles
/// metadata, etc., and returns the new instruction. The \c NewTy should be the
return NewLoad;
}
-/// \brief Combine a store to a new type.
+/// Combine a store to a new type.
///
/// Returns the newly created store instruction.
static StoreInst *combineStoreToNewValue(InstCombiner &IC, StoreInst &SI, Value *V) {
match(L2, m_Load(m_Specific(LHS))));
}
-/// \brief Combine loads to match the type of their uses' value after looking
+/// Combine loads to match the type of their uses' value after looking
/// through intervening bitcasts.
///
/// The core idea here is that if the result of a load is used in an operation,
return nullptr;
}
-/// \brief Look for extractelement/insertvalue sequence that acts like a bitcast.
+/// Look for extractelement/insertvalue sequence that acts like a bitcast.
///
/// \returns underlying value that was "cast", or nullptr otherwise.
///
return U;
}
-/// \brief Combine stores to match the type of value being stored.
+/// Combine stores to match the type of value being stored.
///
/// The core idea here is that the memory does not have any intrinsic type and
/// where we can we should match the type of a store to the type of value being
return MadeChange ? V : nullptr;
}
-/// \brief A helper routine of InstCombiner::visitMul().
+/// A helper routine of InstCombiner::visitMul().
///
/// If C is a scalar/vector of known powers of 2, then this function returns
/// a new scalar/vector obtained from logBase2 of C.
return ConstantVector::get(Elts);
}
-/// \brief Return true if we can prove that:
+/// Return true if we can prove that:
/// (mul LHS, RHS) === (mul nsw LHS, RHS)
bool InstCombiner::willNotOverflowSignedMul(const Value *LHS,
const Value *RHS,
const BinaryOperator &I,
InstCombiner &IC);
-/// \brief Used to maintain state for visitUDivOperand().
+/// Used to maintain state for visitUDivOperand().
struct UDivFoldAction {
/// Informs visitUDiv() how to fold this operand. This can be zero if this
/// action joins two actions together.
return LShr;
}
-// \brief Recursively visits the possible right hand operands of a udiv
+// Recursively visits the possible right hand operands of a udiv
// instruction, seeing through select instructions, to determine if we can
// replace the udiv with something simpler. If we find that an operand is not
// able to simplify the udiv, we abort the entire transformation.
} while (true);
}
-/// \brief Creates node of binary operation with the same attributes as the
+/// Creates node of binary operation with the same attributes as the
/// specified one but with other operands.
static Value *CreateBinOpAsGiven(BinaryOperator &Inst, Value *LHS, Value *RHS,
InstCombiner::BuilderTy &B) {
return BO;
}
-/// \brief Makes transformation of binary operation specific for vector types.
+/// Makes transformation of binary operation specific for vector types.
/// \param Inst Binary operator to transform.
/// \return Pointer to node that must replace the original binary operator, or
/// null pointer if no transformation was made.
return nullptr;
}
-/// \brief Move the call to free before a NULL test.
+/// Move the call to free before a NULL test.
///
/// Check if this free is accessed after its argument has been test
/// against NULL (property 0).
return MadeIRChange;
}
-/// \brief Populate the IC worklist from a function, and prune any dead basic
+/// Populate the IC worklist from a function, and prune any dead basic
/// blocks discovered in the process.
///
/// This also does basic constant propagation and other forward fixing to make
void createDynamicAllocasInitStorage();
// ----------------------- Visitors.
- /// \brief Collect all Ret instructions.
+ /// Collect all Ret instructions.
void visitReturnInst(ReturnInst &RI) { RetVec.push_back(&RI); }
- /// \brief Collect all Resume instructions.
+ /// Collect all Resume instructions.
void visitResumeInst(ResumeInst &RI) { RetVec.push_back(&RI); }
- /// \brief Collect all CatchReturnInst instructions.
+ /// Collect all CatchReturnInst instructions.
void visitCleanupReturnInst(CleanupReturnInst &CRI) { RetVec.push_back(&CRI); }
void unpoisonDynamicAllocasBeforeInst(Instruction *InstBefore,
// requested memory, but also left, partial and right redzones.
void handleDynamicAllocaCall(AllocaInst *AI);
- /// \brief Collect Alloca instructions we want (and can) handle.
+ /// Collect Alloca instructions we want (and can) handle.
void visitAllocaInst(AllocaInst &AI) {
if (!ASan.isInterestingAlloca(AI)) {
if (AI.isStaticAlloca()) {
AllocaVec.push_back(&AI);
}
- /// \brief Collect lifetime intrinsic calls to check for use-after-scope
+ /// Collect lifetime intrinsic calls to check for use-after-scope
/// errors.
void visitIntrinsicInst(IntrinsicInst &II) {
Intrinsic::ID ID = II.getIntrinsicID();
return Res;
}
-// \brief Create a constant for Str so that we can pass it to the run-time lib.
+// Create a constant for Str so that we can pass it to the run-time lib.
static GlobalVariable *createPrivateGlobalForString(Module &M, StringRef Str,
bool AllowMerging) {
Constant *StrConst = ConstantDataArray::getString(M.getContext(), Str);
return GV;
}
-/// \brief Create a global describing a source location.
+/// Create a global describing a source location.
static GlobalVariable *createPrivateGlobalForSourceLoc(Module &M,
LocationMetadata MD) {
Constant *LocData[] = {
return GV;
}
-/// \brief Check if \p G has been created by a trusted compiler pass.
+/// Check if \p G has been created by a trusted compiler pass.
static bool GlobalWasGeneratedByCompiler(GlobalVariable *G) {
// Do not instrument asan globals.
if (G->getName().startswith(kAsanGenPrefix) ||
namespace llvm {
-/// \brief An union-find based Minimum Spanning Tree for CFG
+/// An union-find based Minimum Spanning Tree for CFG
///
/// Implements a Union-find algorithm to compute Minimum Spanning Tree
/// for a given CFG.
namespace {
-/// \brief An instrumentation pass implementing detection of addressability bugs
+/// An instrumentation pass implementing detection of addressability bugs
/// using tagged pointers.
class HWAddressSanitizer : public FunctionPass {
public:
return new HWAddressSanitizer(CompileKernel, Recover);
}
-/// \brief Module-level initialization.
+/// Module-level initialization.
///
/// inserts a call to __hwasan_init to the module's constructor list.
bool HWAddressSanitizer::doInitialization(Module &M) {
// Accesses sizes are powers of two: 1, 2, 4, 8.
static const size_t kNumberOfAccessSizes = 4;
-/// \brief Track origins of uninitialized values.
+/// Track origins of uninitialized values.
///
/// Adds a section to MemorySanitizer report that points to the allocation
/// (stack or heap) the uninitialized bits came from originally.
namespace {
-/// \brief An instrumentation pass implementing detection of uninitialized
+/// An instrumentation pass implementing detection of uninitialized
/// reads.
///
/// MemorySanitizer: instrument the code in module to find
void initializeCallbacks(Module &M);
- /// \brief Track origins (allocation points) of uninitialized values.
+ /// Track origins (allocation points) of uninitialized values.
int TrackOrigins;
bool Recover;
Type *IntptrTy;
Type *OriginTy;
- /// \brief Thread-local shadow storage for function parameters.
+ /// Thread-local shadow storage for function parameters.
GlobalVariable *ParamTLS;
- /// \brief Thread-local origin storage for function parameters.
+ /// Thread-local origin storage for function parameters.
GlobalVariable *ParamOriginTLS;
- /// \brief Thread-local shadow storage for function return value.
+ /// Thread-local shadow storage for function return value.
GlobalVariable *RetvalTLS;
- /// \brief Thread-local origin storage for function return value.
+ /// Thread-local origin storage for function return value.
GlobalVariable *RetvalOriginTLS;
- /// \brief Thread-local shadow storage for in-register va_arg function
+ /// Thread-local shadow storage for in-register va_arg function
/// parameters (x86_64-specific).
GlobalVariable *VAArgTLS;
- /// \brief Thread-local shadow storage for va_arg overflow area
+ /// Thread-local shadow storage for va_arg overflow area
/// (x86_64-specific).
GlobalVariable *VAArgOverflowSizeTLS;
- /// \brief Thread-local space used to pass origin value to the UMR reporting
+ /// Thread-local space used to pass origin value to the UMR reporting
/// function.
GlobalVariable *OriginTLS;
- /// \brief The run-time callback to print a warning.
+ /// The run-time callback to print a warning.
Value *WarningFn = nullptr;
// These arrays are indexed by log2(AccessSize).
Value *MaybeWarningFn[kNumberOfAccessSizes];
Value *MaybeStoreOriginFn[kNumberOfAccessSizes];
- /// \brief Run-time helper that generates a new origin value for a stack
+ /// Run-time helper that generates a new origin value for a stack
/// allocation.
Value *MsanSetAllocaOrigin4Fn;
- /// \brief Run-time helper that poisons stack on function entry.
+ /// Run-time helper that poisons stack on function entry.
Value *MsanPoisonStackFn;
- /// \brief Run-time helper that records a store (or any event) of an
+ /// Run-time helper that records a store (or any event) of an
/// uninitialized value and returns an updated origin id encoding this info.
Value *MsanChainOriginFn;
- /// \brief MSan runtime replacements for memmove, memcpy and memset.
+ /// MSan runtime replacements for memmove, memcpy and memset.
Value *MemmoveFn, *MemcpyFn, *MemsetFn;
- /// \brief Memory map parameters used in application-to-shadow calculation.
+ /// Memory map parameters used in application-to-shadow calculation.
const MemoryMapParams *MapParams;
- /// \brief Custom memory map parameters used when -msan-shadow-base or
+ /// Custom memory map parameters used when -msan-shadow-base or
// -msan-origin-base is provided.
MemoryMapParams CustomMapParams;
MDNode *ColdCallWeights;
- /// \brief Branch weights for origin store.
+ /// Branch weights for origin store.
MDNode *OriginStoreWeights;
- /// \brief An empty volatile inline asm that prevents callback merge.
+ /// An empty volatile inline asm that prevents callback merge.
InlineAsm *EmptyAsm;
Function *MsanCtorFunction;
return new MemorySanitizer(TrackOrigins, Recover);
}
-/// \brief Create a non-const global initialized with the given string.
+/// Create a non-const global initialized with the given string.
///
/// Creates a writable global for Str so that we can pass it to the
/// run-time lib. Runtime uses first 4 bytes of the string to store the
GlobalValue::PrivateLinkage, StrConst, "");
}
-/// \brief Insert extern declaration of runtime-provided functions and globals.
+/// Insert extern declaration of runtime-provided functions and globals.
void MemorySanitizer::initializeCallbacks(Module &M) {
// Only do this once.
if (WarningFn)
/*hasSideEffects=*/true);
}
-/// \brief Module-level initialization.
+/// Module-level initialization.
///
/// inserts a call to __msan_init to the module's constructor list.
bool MemorySanitizer::doInitialization(Module &M) {
namespace {
-/// \brief A helper class that handles instrumentation of VarArg
+/// A helper class that handles instrumentation of VarArg
/// functions on a particular platform.
///
/// Implementations are expected to insert the instrumentation
struct VarArgHelper {
virtual ~VarArgHelper() = default;
- /// \brief Visit a CallSite.
+ /// Visit a CallSite.
virtual void visitCallSite(CallSite &CS, IRBuilder<> &IRB) = 0;
- /// \brief Visit a va_start call.
+ /// Visit a va_start call.
virtual void visitVAStartInst(VAStartInst &I) = 0;
- /// \brief Visit a va_copy call.
+ /// Visit a va_copy call.
virtual void visitVACopyInst(VACopyInst &I) = 0;
- /// \brief Finalize function instrumentation.
+ /// Finalize function instrumentation.
///
/// This method is called after visiting all interesting (see above)
/// instructions in a function.
return IRB.CreateOr(Origin, IRB.CreateShl(Origin, kOriginSize * 8));
}
- /// \brief Fill memory range with the given origin value.
+ /// Fill memory range with the given origin value.
void paintOrigin(IRBuilder<> &IRB, Value *Origin, Value *OriginPtr,
unsigned Size, unsigned Alignment) {
const DataLayout &DL = F.getParent()->getDataLayout();
}
}
- /// \brief Helper function to insert a warning at IRB's current insert point.
+ /// Helper function to insert a warning at IRB's current insert point.
void insertWarningFn(IRBuilder<> &IRB, Value *Origin) {
if (!Origin)
Origin = (Value *)IRB.getInt32(0);
DEBUG(dbgs() << "DONE:\n" << F);
}
- /// \brief Add MemorySanitizer instrumentation to a function.
+ /// Add MemorySanitizer instrumentation to a function.
bool runOnFunction() {
// In the presence of unreachable blocks, we may see Phi nodes with
// incoming nodes from such blocks. Since InstVisitor skips unreachable
return true;
}
- /// \brief Compute the shadow type that corresponds to a given Value.
+ /// Compute the shadow type that corresponds to a given Value.
Type *getShadowTy(Value *V) {
return getShadowTy(V->getType());
}
- /// \brief Compute the shadow type that corresponds to a given Type.
+ /// Compute the shadow type that corresponds to a given Type.
Type *getShadowTy(Type *OrigTy) {
if (!OrigTy->isSized()) {
return nullptr;
return IntegerType::get(*MS.C, TypeSize);
}
- /// \brief Flatten a vector type.
+ /// Flatten a vector type.
Type *getShadowTyNoVec(Type *ty) {
if (VectorType *vt = dyn_cast<VectorType>(ty))
return IntegerType::get(*MS.C, vt->getBitWidth());
return ty;
}
- /// \brief Convert a shadow value to it's flattened variant.
+ /// Convert a shadow value to it's flattened variant.
Value *convertToShadowTyNoVec(Value *V, IRBuilder<> &IRB) {
Type *Ty = V->getType();
Type *NoVecTy = getShadowTyNoVec(Ty);
return IRB.CreateBitCast(V, NoVecTy);
}
- /// \brief Compute the integer shadow offset that corresponds to a given
+ /// Compute the integer shadow offset that corresponds to a given
/// application address.
///
/// Offset = (Addr & ~AndMask) ^ XorMask
return OffsetLong;
}
- /// \brief Compute the shadow and origin addresses corresponding to a given
+ /// Compute the shadow and origin addresses corresponding to a given
/// application address.
///
/// Shadow = ShadowBase + Offset
return ret;
}
- /// \brief Compute the shadow address for a given function argument.
+ /// Compute the shadow address for a given function argument.
///
/// Shadow = ParamTLS+ArgOffset.
Value *getShadowPtrForArgument(Value *A, IRBuilder<> &IRB,
"_msarg");
}
- /// \brief Compute the origin address for a given function argument.
+ /// Compute the origin address for a given function argument.
Value *getOriginPtrForArgument(Value *A, IRBuilder<> &IRB,
int ArgOffset) {
if (!MS.TrackOrigins) return nullptr;
"_msarg_o");
}
- /// \brief Compute the shadow address for a retval.
+ /// Compute the shadow address for a retval.
Value *getShadowPtrForRetval(Value *A, IRBuilder<> &IRB) {
return IRB.CreatePointerCast(MS.RetvalTLS,
PointerType::get(getShadowTy(A), 0),
"_msret");
}
- /// \brief Compute the origin address for a retval.
+ /// Compute the origin address for a retval.
Value *getOriginPtrForRetval(IRBuilder<> &IRB) {
// We keep a single origin for the entire retval. Might be too optimistic.
return MS.RetvalOriginTLS;
}
- /// \brief Set SV to be the shadow value for V.
+ /// Set SV to be the shadow value for V.
void setShadow(Value *V, Value *SV) {
assert(!ShadowMap.count(V) && "Values may only have one shadow");
ShadowMap[V] = PropagateShadow ? SV : getCleanShadow(V);
}
- /// \brief Set Origin to be the origin value for V.
+ /// Set Origin to be the origin value for V.
void setOrigin(Value *V, Value *Origin) {
if (!MS.TrackOrigins) return;
assert(!OriginMap.count(V) && "Values may only have one origin");
return Constant::getNullValue(ShadowTy);
}
- /// \brief Create a clean shadow value for a given value.
+ /// Create a clean shadow value for a given value.
///
/// Clean shadow (all zeroes) means all bits of the value are defined
/// (initialized).
return getCleanShadow(V->getType());
}
- /// \brief Create a dirty shadow of a given shadow type.
+ /// Create a dirty shadow of a given shadow type.
Constant *getPoisonedShadow(Type *ShadowTy) {
assert(ShadowTy);
if (isa<IntegerType>(ShadowTy) || isa<VectorType>(ShadowTy))
llvm_unreachable("Unexpected shadow type");
}
- /// \brief Create a dirty shadow for a given value.
+ /// Create a dirty shadow for a given value.
Constant *getPoisonedShadow(Value *V) {
Type *ShadowTy = getShadowTy(V);
if (!ShadowTy)
return getPoisonedShadow(ShadowTy);
}
- /// \brief Create a clean (zero) origin.
+ /// Create a clean (zero) origin.
Value *getCleanOrigin() {
return Constant::getNullValue(MS.OriginTy);
}
- /// \brief Get the shadow value for a given Value.
+ /// Get the shadow value for a given Value.
///
/// This function either returns the value set earlier with setShadow,
/// or extracts if from ParamTLS (for function arguments).
return getCleanShadow(V);
}
- /// \brief Get the shadow for i-th argument of the instruction I.
+ /// Get the shadow for i-th argument of the instruction I.
Value *getShadow(Instruction *I, int i) {
return getShadow(I->getOperand(i));
}
- /// \brief Get the origin for a value.
+ /// Get the origin for a value.
Value *getOrigin(Value *V) {
if (!MS.TrackOrigins) return nullptr;
if (!PropagateShadow) return getCleanOrigin();
return Origin;
}
- /// \brief Get the origin for i-th argument of the instruction I.
+ /// Get the origin for i-th argument of the instruction I.
Value *getOrigin(Instruction *I, int i) {
return getOrigin(I->getOperand(i));
}
- /// \brief Remember the place where a shadow check should be inserted.
+ /// Remember the place where a shadow check should be inserted.
///
/// This location will be later instrumented with a check that will print a
/// UMR warning in runtime if the shadow value is not 0.
ShadowOriginAndInsertPoint(Shadow, Origin, OrigIns));
}
- /// \brief Remember the place where a shadow check should be inserted.
+ /// Remember the place where a shadow check should be inserted.
///
/// This location will be later instrumented with a check that will print a
/// UMR warning in runtime if the value is not fully defined.
InstVisitor<MemorySanitizerVisitor>::visit(I);
}
- /// \brief Instrument LoadInst
+ /// Instrument LoadInst
///
/// Loads the corresponding shadow and (optionally) origin.
/// Optionally, checks that the load address is fully defined.
}
}
- /// \brief Instrument StoreInst
+ /// Instrument StoreInst
///
/// Stores the corresponding shadow and (optionally) origin.
/// Optionally, checks that the store address is fully defined.
void visitFPExtInst(CastInst& I) { handleShadowOr(I); }
void visitFPTruncInst(CastInst& I) { handleShadowOr(I); }
- /// \brief Propagate shadow for bitwise AND.
+ /// Propagate shadow for bitwise AND.
///
/// This code is exact, i.e. if, for example, a bit in the left argument
/// is defined and 0, then neither the value not definedness of the
setOriginForNaryOp(I);
}
- /// \brief Default propagation of shadow and/or origin.
+ /// Default propagation of shadow and/or origin.
///
/// This class implements the general case of shadow propagation, used in all
/// cases where we don't know and/or don't care about what the operation
Combiner(MemorySanitizerVisitor *MSV, IRBuilder<> &IRB)
: IRB(IRB), MSV(MSV) {}
- /// \brief Add a pair of shadow and origin values to the mix.
+ /// Add a pair of shadow and origin values to the mix.
Combiner &Add(Value *OpShadow, Value *OpOrigin) {
if (CombineShadow) {
assert(OpShadow);
return *this;
}
- /// \brief Add an application value to the mix.
+ /// Add an application value to the mix.
Combiner &Add(Value *V) {
Value *OpShadow = MSV->getShadow(V);
Value *OpOrigin = MSV->MS.TrackOrigins ? MSV->getOrigin(V) : nullptr;
return Add(OpShadow, OpOrigin);
}
- /// \brief Set the current combined values as the given instruction's shadow
+ /// Set the current combined values as the given instruction's shadow
/// and origin.
void Done(Instruction *I) {
if (CombineShadow) {
using ShadowAndOriginCombiner = Combiner<true>;
using OriginCombiner = Combiner<false>;
- /// \brief Propagate origin for arbitrary operation.
+ /// Propagate origin for arbitrary operation.
void setOriginForNaryOp(Instruction &I) {
if (!MS.TrackOrigins) return;
IRBuilder<> IRB(&I);
Ty->getPrimitiveSizeInBits();
}
- /// \brief Cast between two shadow types, extending or truncating as
+ /// Cast between two shadow types, extending or truncating as
/// necessary.
Value *CreateShadowCast(IRBuilder<> &IRB, Value *V, Type *dstTy,
bool Signed = false) {
// TODO: handle struct types.
}
- /// \brief Cast an application value to the type of its own shadow.
+ /// Cast an application value to the type of its own shadow.
Value *CreateAppToShadowCast(IRBuilder<> &IRB, Value *V) {
Type *ShadowTy = getShadowTy(V);
if (V->getType() == ShadowTy)
return IRB.CreateBitCast(V, ShadowTy);
}
- /// \brief Propagate shadow for arbitrary operation.
+ /// Propagate shadow for arbitrary operation.
void handleShadowOr(Instruction &I) {
IRBuilder<> IRB(&I);
ShadowAndOriginCombiner SC(this, IRB);
SC.Done(&I);
}
- // \brief Handle multiplication by constant.
+ // Handle multiplication by constant.
//
// Handle a special case of multiplication by constant that may have one or
// more zeros in the lower bits. This makes corresponding number of lower bits
void visitSRem(BinaryOperator &I) { handleDiv(I); }
void visitFRem(BinaryOperator &I) { handleDiv(I); }
- /// \brief Instrument == and != comparisons.
+ /// Instrument == and != comparisons.
///
/// Sometimes the comparison result is known even if some of the bits of the
/// arguments are not.
setOriginForNaryOp(I);
}
- /// \brief Build the lowest possible value of V, taking into account V's
+ /// Build the lowest possible value of V, taking into account V's
/// uninitialized bits.
Value *getLowestPossibleValue(IRBuilder<> &IRB, Value *A, Value *Sa,
bool isSigned) {
}
}
- /// \brief Build the highest possible value of V, taking into account V's
+ /// Build the highest possible value of V, taking into account V's
/// uninitialized bits.
Value *getHighestPossibleValue(IRBuilder<> &IRB, Value *A, Value *Sa,
bool isSigned) {
}
}
- /// \brief Instrument relational comparisons.
+ /// Instrument relational comparisons.
///
/// This function does exact shadow propagation for all relational
/// comparisons of integers, pointers and vectors of those.
setOriginForNaryOp(I);
}
- /// \brief Instrument signed relational comparisons.
+ /// Instrument signed relational comparisons.
///
/// Handle sign bit tests: x<0, x>=0, x<=-1, x>-1 by propagating the highest
/// bit of the shadow. Everything else is delegated to handleShadowOr().
void visitAShr(BinaryOperator &I) { handleShift(I); }
void visitLShr(BinaryOperator &I) { handleShift(I); }
- /// \brief Instrument llvm.memmove
+ /// Instrument llvm.memmove
///
/// At this point we don't know if llvm.memmove will be inlined or not.
/// If we don't instrument it and it gets inlined,
VAHelper->visitVACopyInst(I);
}
- /// \brief Handle vector store-like intrinsics.
+ /// Handle vector store-like intrinsics.
///
/// Instrument intrinsics that look like a simple SIMD store: writes memory,
/// has 1 pointer argument and 1 vector argument, returns void.
return true;
}
- /// \brief Handle vector load-like intrinsics.
+ /// Handle vector load-like intrinsics.
///
/// Instrument intrinsics that look like a simple SIMD load: reads memory,
/// has 1 pointer argument, returns a vector.
return true;
}
- /// \brief Handle (SIMD arithmetic)-like intrinsics.
+ /// Handle (SIMD arithmetic)-like intrinsics.
///
/// Instrument intrinsics with any number of arguments of the same type,
/// equal to the return type. The type should be simple (no aggregates or
return true;
}
- /// \brief Heuristically instrument unknown intrinsics.
+ /// Heuristically instrument unknown intrinsics.
///
/// The main purpose of this code is to do something reasonable with all
/// random intrinsics we might encounter, most importantly - SIMD intrinsics.
setOrigin(&I, getOrigin(Op));
}
- // \brief Instrument vector convert instrinsic.
+ // Instrument vector convert instrinsic.
//
// This function instruments intrinsics like cvtsi2ss:
// %Out = int_xxx_cvtyyy(%ConvertOp)
return IRB.CreateSExt(S2, T);
}
- // \brief Instrument vector shift instrinsic.
+ // Instrument vector shift instrinsic.
//
// This function instruments intrinsics like int_x86_avx2_psll_w.
// Intrinsic shifts %In by %ShiftSize bits.
setOriginForNaryOp(I);
}
- // \brief Get an X86_MMX-sized vector type.
+ // Get an X86_MMX-sized vector type.
Type *getMMXVectorTy(unsigned EltSizeInBits) {
const unsigned X86_MMXSizeInBits = 64;
return VectorType::get(IntegerType::get(*MS.C, EltSizeInBits),
X86_MMXSizeInBits / EltSizeInBits);
}
- // \brief Returns a signed counterpart for an (un)signed-saturate-and-pack
+ // Returns a signed counterpart for an (un)signed-saturate-and-pack
// intrinsic.
Intrinsic::ID getSignedPackIntrinsic(Intrinsic::ID id) {
switch (id) {
}
}
- // \brief Instrument vector pack instrinsic.
+ // Instrument vector pack instrinsic.
//
// This function instruments intrinsics like x86_mmx_packsswb, that
// packs elements of 2 input vectors into half as many bits with saturation.
setOriginForNaryOp(I);
}
- // \brief Instrument sum-of-absolute-differencies intrinsic.
+ // Instrument sum-of-absolute-differencies intrinsic.
void handleVectorSadIntrinsic(IntrinsicInst &I) {
const unsigned SignificantBitsPerResultElement = 16;
bool isX86_MMX = I.getOperand(0)->getType()->isX86_MMXTy();
setOriginForNaryOp(I);
}
- // \brief Instrument multiply-add intrinsic.
+ // Instrument multiply-add intrinsic.
void handleVectorPmaddIntrinsic(IntrinsicInst &I,
unsigned EltSizeInBits = 0) {
bool isX86_MMX = I.getOperand(0)->getType()->isX86_MMXTy();
setOriginForNaryOp(I);
}
- // \brief Instrument compare-packed intrinsic.
+ // Instrument compare-packed intrinsic.
// Basically, an or followed by sext(icmp ne 0) to end up with all-zeros or
// all-ones shadow.
void handleVectorComparePackedIntrinsic(IntrinsicInst &I) {
setOriginForNaryOp(I);
}
- // \brief Instrument compare-scalar intrinsic.
+ // Instrument compare-scalar intrinsic.
// This handles both cmp* intrinsics which return the result in the first
// element of a vector, and comi* which return the result as i32.
void handleVectorCompareScalarIntrinsic(IntrinsicInst &I) {
}
};
-/// \brief AMD64-specific implementation of VarArgHelper.
+/// AMD64-specific implementation of VarArgHelper.
struct VarArgAMD64Helper : public VarArgHelper {
// An unfortunate workaround for asymmetric lowering of va_arg stuff.
// See a comment in visitCallSite for more details.
IRB.CreateStore(OverflowSize, MS.VAArgOverflowSizeTLS);
}
- /// \brief Compute the shadow address for a given va_arg.
+ /// Compute the shadow address for a given va_arg.
Value *getShadowPtrForVAArgument(Type *Ty, IRBuilder<> &IRB,
int ArgOffset) {
Value *Base = IRB.CreatePointerCast(MS.VAArgTLS, MS.IntptrTy);
}
};
-/// \brief MIPS64-specific implementation of VarArgHelper.
+/// MIPS64-specific implementation of VarArgHelper.
struct VarArgMIPS64Helper : public VarArgHelper {
Function &F;
MemorySanitizer &MS;
IRB.CreateStore(TotalVAArgSize, MS.VAArgOverflowSizeTLS);
}
- /// \brief Compute the shadow address for a given va_arg.
+ /// Compute the shadow address for a given va_arg.
Value *getShadowPtrForVAArgument(Type *Ty, IRBuilder<> &IRB,
int ArgOffset) {
Value *Base = IRB.CreatePointerCast(MS.VAArgTLS, MS.IntptrTy);
}
};
-/// \brief AArch64-specific implementation of VarArgHelper.
+/// AArch64-specific implementation of VarArgHelper.
struct VarArgAArch64Helper : public VarArgHelper {
static const unsigned kAArch64GrArgSize = 64;
static const unsigned kAArch64VrArgSize = 128;
}
};
-/// \brief PowerPC64-specific implementation of VarArgHelper.
+/// PowerPC64-specific implementation of VarArgHelper.
struct VarArgPowerPC64Helper : public VarArgHelper {
Function &F;
MemorySanitizer &MS;
IRB.CreateStore(TotalVAArgSize, MS.VAArgOverflowSizeTLS);
}
- /// \brief Compute the shadow address for a given va_arg.
+ /// Compute the shadow address for a given va_arg.
Value *getShadowPtrForVAArgument(Type *Ty, IRBuilder<> &IRB,
int ArgOffset) {
Value *Base = IRB.CreatePointerCast(MS.VAArgTLS, MS.IntptrTy);
}
};
-/// \brief A no-op implementation of VarArgHelper.
+/// A no-op implementation of VarArgHelper.
struct VarArgNoOpHelper : public VarArgHelper {
VarArgNoOpHelper(Function &F, MemorySanitizer &MS,
MemorySanitizerVisitor &MSV) {}
namespace {
-/// \brief An MST based instrumentation for PGO
+/// An MST based instrumentation for PGO
///
/// Implements a Minimum Spanning Tree (MST) based instrumentation for PGO
/// in the function level.
namespace llvm {
-/// \brief An associative container with fast insertion-order (deterministic)
+/// An associative container with fast insertion-order (deterministic)
/// iteration over its elements. Plus the special blot operation.
template <class KeyT, class ValueT> class BlotMapVector {
/// Map keys to indices in Vector.
class ProvenanceAnalysis;
/// \enum DependenceKind
-/// \brief Defines different dependence kinds among various ARC constructs.
+/// Defines different dependence kinds among various ARC constructs.
///
/// There are several kinds of dependence-like concepts in use here.
///
namespace llvm {
namespace objcarc {
-/// \brief Erase the given instruction.
+/// Erase the given instruction.
///
/// Many ObjC calls return their argument verbatim,
/// so if it's such a call and the return value has users, replace them with the
#define DEBUG_TYPE "objc-arc-ap-elim"
namespace {
- /// \brief Autorelease pool elimination.
+ /// Autorelease pool elimination.
class ObjCARCAPElim : public ModulePass {
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnModule(Module &M) override;
//===----------------------------------------------------------------------===//
namespace {
- /// \brief Late ARC optimizations
+ /// Late ARC optimizations
///
/// These change the IR in a way that makes it difficult to be analyzed by
/// ObjCARCOpt, so it's run late.
using namespace llvm::objcarc;
namespace {
- /// \brief Early ARC transformations.
+ /// Early ARC transformations.
class ObjCARCExpand : public FunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool doInitialization(Module &M) override;
/// \defgroup ARCUtilities Utility declarations/definitions specific to ARC.
/// @{
-/// \brief This is similar to GetRCIdentityRoot but it stops as soon
+/// This is similar to GetRCIdentityRoot but it stops as soon
/// as it finds a value with multiple uses.
static const Value *FindSingleUseIdentifiedObject(const Value *Arg) {
// ConstantData (like ConstantPointerNull and UndefValue) is used across
namespace {
- /// \brief Per-BasicBlock state.
+ /// Per-BasicBlock state.
class BBState {
/// The number of unique control paths from the entry which can reach this
/// block.
namespace {
- /// \brief The main ARC optimization pass.
+ /// The main ARC optimization pass.
class ObjCARCOpt : public FunctionPass {
bool Changed;
ProvenanceAnalysis PA;
namespace objcarc {
-/// \brief This is similar to BasicAliasAnalysis, and it uses many of the same
+/// This is similar to BasicAliasAnalysis, and it uses many of the same
/// techniques, except it uses special ObjC-specific reasoning about pointer
/// relationships.
///
/// \enum Sequence
///
-/// \brief A sequence of states that a pointer may go through in which an
+/// A sequence of states that a pointer may go through in which an
/// objc_retain and objc_release are actually needed.
enum Sequence {
S_None,
raw_ostream &operator<<(raw_ostream &OS,
const Sequence S) LLVM_ATTRIBUTE_UNUSED;
-/// \brief Unidirectional information about either a
+/// Unidirectional information about either a
/// retain-decrement-use-release sequence or release-use-decrement-retain
/// reverse sequence.
struct RRInfo {
bool Merge(const RRInfo &Other);
};
-/// \brief This class summarizes several per-pointer runtime properties which
+/// This class summarizes several per-pointer runtime properties which
/// are propagated through the flow graph.
class PtrState {
protected:
namespace {
-/// \brief The constant hoisting pass.
+/// The constant hoisting pass.
class ConstantHoistingLegacyPass : public FunctionPass {
public:
static char ID; // Pass identification, replacement for typeid
return new ConstantHoistingLegacyPass();
}
-/// \brief Perform the constant hoisting optimization for the given function.
+/// Perform the constant hoisting optimization for the given function.
bool ConstantHoistingLegacyPass::runOnFunction(Function &Fn) {
if (skipFunction(Fn))
return false;
return MadeChange;
}
-/// \brief Find the constant materialization insertion point.
+/// Find the constant materialization insertion point.
Instruction *ConstantHoistingPass::findMatInsertPt(Instruction *Inst,
unsigned Idx) const {
// If the operand is a cast instruction, then we have to materialize the
return IDom->getBlock()->getTerminator();
}
-/// \brief Given \p BBs as input, find another set of BBs which collectively
+/// Given \p BBs as input, find another set of BBs which collectively
/// dominates \p BBs and have the minimal sum of frequencies. Return the BB
/// set found in \p BBs.
static void findBestInsertionSet(DominatorTree &DT, BlockFrequencyInfo &BFI,
}
}
-/// \brief Find an insertion point that dominates all uses.
+/// Find an insertion point that dominates all uses.
SmallPtrSet<Instruction *, 8> ConstantHoistingPass::findConstantInsertionPoint(
const ConstantInfo &ConstInfo) const {
assert(!ConstInfo.RebasedConstants.empty() && "Invalid constant info entry.");
return InsertPts;
}
-/// \brief Record constant integer ConstInt for instruction Inst at operand
+/// Record constant integer ConstInt for instruction Inst at operand
/// index Idx.
///
/// The operand at index Idx is not necessarily the constant integer itself. It
}
}
-/// \brief Check the operand for instruction Inst at index Idx.
+/// Check the operand for instruction Inst at index Idx.
void ConstantHoistingPass::collectConstantCandidates(
ConstCandMapType &ConstCandMap, Instruction *Inst, unsigned Idx) {
Value *Opnd = Inst->getOperand(Idx);
}
}
-/// \brief Scan the instruction for expensive integer constants and record them
+/// Scan the instruction for expensive integer constants and record them
/// in the constant candidate vector.
void ConstantHoistingPass::collectConstantCandidates(
ConstCandMapType &ConstCandMap, Instruction *Inst) {
} // end of for all operands
}
-/// \brief Collect all integer constants in the function that cannot be folded
+/// Collect all integer constants in the function that cannot be folded
/// into an instruction itself.
void ConstantHoistingPass::collectConstantCandidates(Function &Fn) {
ConstCandMapType ConstCandMap;
return NumUses;
}
-/// \brief Find the base constant within the given range and rebase all other
+/// Find the base constant within the given range and rebase all other
/// constants with respect to the base constant.
void ConstantHoistingPass::findAndMakeBaseConstant(
ConstCandVecType::iterator S, ConstCandVecType::iterator E) {
ConstantVec.push_back(std::move(ConstInfo));
}
-/// \brief Finds and combines constant candidates that can be easily
+/// Finds and combines constant candidates that can be easily
/// rematerialized with an add from a common base constant.
void ConstantHoistingPass::findBaseConstants() {
// Sort the constants by value and type. This invalidates the mapping!
findAndMakeBaseConstant(MinValItr, ConstCandVec.end());
}
-/// \brief Updates the operand at Idx in instruction Inst with the result of
+/// Updates the operand at Idx in instruction Inst with the result of
/// instruction Mat. If the instruction is a PHI node then special
/// handling for duplicate values form the same incoming basic block is
/// required.
return true;
}
-/// \brief Emit materialization code for all rebased constants and update their
+/// Emit materialization code for all rebased constants and update their
/// users.
void ConstantHoistingPass::emitBaseConstants(Instruction *Base,
Constant *Offset,
}
}
-/// \brief Hoist and hide the base constant behind a bitcast and emit
+/// Hoist and hide the base constant behind a bitcast and emit
/// materialization code for derived constants.
bool ConstantHoistingPass::emitBaseConstants() {
bool MadeChange = false;
return MadeChange;
}
-/// \brief Check all cast instructions we made a copy of and remove them if they
+/// Check all cast instructions we made a copy of and remove them if they
/// have no more users.
void ConstantHoistingPass::deleteDeadCastInst() const {
for (auto const &I : ClonedCastMap)
I.first->eraseFromParent();
}
-/// \brief Optimize expensive integer constants in the given function.
+/// Optimize expensive integer constants in the given function.
bool ConstantHoistingPass::runImpl(Function &Fn, TargetTransformInfo &TTI,
DominatorTree &DT, BlockFrequencyInfo *BFI,
BasicBlock &Entry) {
namespace {
-/// \brief Struct representing the available values in the scoped hash table.
+/// Struct representing the available values in the scoped hash table.
struct SimpleValue {
Instruction *Inst;
namespace {
-/// \brief Struct representing the available call values in the scoped hash
+/// Struct representing the available call values in the scoped hash
/// table.
struct CallValue {
Instruction *Inst;
namespace {
-/// \brief A simple and fast domtree-based CSE pass.
+/// A simple and fast domtree-based CSE pass.
///
/// This pass does a simple depth-first walk over the dominator tree,
/// eliminating trivially redundant instructions and using instsimplify to
ScopedHashTable<SimpleValue, Value *, DenseMapInfo<SimpleValue>,
AllocatorTy>;
- /// \brief A scoped hash table of the current values of all of our simple
+ /// A scoped hash table of the current values of all of our simple
/// scalar expressions.
///
/// As we walk down the domtree, we look to see if instructions are in this:
InvariantMapAllocator>;
InvariantHTType AvailableInvariants;
- /// \brief A scoped hash table of the current values of read-only call
+ /// A scoped hash table of the current values of read-only call
/// values.
///
/// It uses the same generation count as loads.
ScopedHashTable<CallValue, std::pair<Instruction *, unsigned>>;
CallHTType AvailableCalls;
- /// \brief This is the current generation of the memory value.
+ /// This is the current generation of the memory value.
unsigned CurrentGeneration = 0;
- /// \brief Set up the EarlyCSE runner for a particular function.
+ /// Set up the EarlyCSE runner for a particular function.
EarlyCSE(const DataLayout &DL, const TargetLibraryInfo &TLI,
const TargetTransformInfo &TTI, DominatorTree &DT,
AssumptionCache &AC, MemorySSA *MSSA)
bool Processed = false;
};
- /// \brief Wrapper class to handle memory instructions, including loads,
+ /// Wrapper class to handle memory instructions, including loads,
/// stores and intrinsic loads and stores defined by the target.
class ParseMemoryInst {
public:
namespace {
-/// \brief A simple and fast domtree-based CSE pass.
+/// A simple and fast domtree-based CSE pass.
///
/// This pass does a simple depth-first walk over the dominator tree,
/// eliminating trivially redundant instructions and using instsimplify to
return false;
}
-/// \brief Try to locate the three instruction involved in a missed
+/// Try to locate the three instruction involved in a missed
/// load-elimination case that is due to an intervening store.
static void reportMayClobberedLoad(LoadInst *LI, MemDepResult DepInfo,
DominatorTree *DT,
using ValueToAddrSpaceMapTy = DenseMap<const Value *, unsigned>;
-/// \brief InferAddressSpaces
+/// InferAddressSpaces
class InferAddressSpaces : public FunctionPass {
/// Target specific address space which uses of should be replaced if
/// possible.
private:
bool runOnLoop(Loop *L);
- /// \brief Check if the stride of the accesses is large enough to
+ /// Check if the stride of the accesses is large enough to
/// warrant a prefetch.
bool isStrideLargeEnough(const SCEVAddRecExpr *AR);
namespace {
-/// \brief Maintains the set of instructions of the loop for a partition before
+/// Maintains the set of instructions of the loop for a partition before
/// cloning. After cloning, it hosts the new loop.
class InstPartition {
using InstructionSet = SmallPtrSet<Instruction *, 8>;
Set.insert(I);
}
- /// \brief Returns whether this partition contains a dependence cycle.
+ /// Returns whether this partition contains a dependence cycle.
bool hasDepCycle() const { return DepCycle; }
- /// \brief Adds an instruction to this partition.
+ /// Adds an instruction to this partition.
void add(Instruction *I) { Set.insert(I); }
- /// \brief Collection accessors.
+ /// Collection accessors.
InstructionSet::iterator begin() { return Set.begin(); }
InstructionSet::iterator end() { return Set.end(); }
InstructionSet::const_iterator begin() const { return Set.begin(); }
InstructionSet::const_iterator end() const { return Set.end(); }
bool empty() const { return Set.empty(); }
- /// \brief Moves this partition into \p Other. This partition becomes empty
+ /// Moves this partition into \p Other. This partition becomes empty
/// after this.
void moveTo(InstPartition &Other) {
Other.Set.insert(Set.begin(), Set.end());
Other.DepCycle |= DepCycle;
}
- /// \brief Populates the partition with a transitive closure of all the
+ /// Populates the partition with a transitive closure of all the
/// instructions that the seeded instructions dependent on.
void populateUsedSet() {
// FIXME: We currently don't use control-dependence but simply include all
}
}
- /// \brief Clones the original loop.
+ /// Clones the original loop.
///
/// Updates LoopInfo and DominatorTree using the information that block \p
/// LoopDomBB dominates the loop.
return ClonedLoop;
}
- /// \brief The cloned loop. If this partition is mapped to the original loop,
+ /// The cloned loop. If this partition is mapped to the original loop,
/// this is null.
const Loop *getClonedLoop() const { return ClonedLoop; }
- /// \brief Returns the loop where this partition ends up after distribution.
+ /// Returns the loop where this partition ends up after distribution.
/// If this partition is mapped to the original loop then use the block from
/// the loop.
const Loop *getDistributedLoop() const {
return ClonedLoop ? ClonedLoop : OrigLoop;
}
- /// \brief The VMap that is populated by cloning and then used in
+ /// The VMap that is populated by cloning and then used in
/// remapinstruction to remap the cloned instructions.
ValueToValueMapTy &getVMap() { return VMap; }
- /// \brief Remaps the cloned instructions using VMap.
+ /// Remaps the cloned instructions using VMap.
void remapInstructions() {
remapInstructionsInBlocks(ClonedLoopBlocks, VMap);
}
- /// \brief Based on the set of instructions selected for this partition,
+ /// Based on the set of instructions selected for this partition,
/// removes the unnecessary ones.
void removeUnusedInsts() {
SmallVector<Instruction *, 8> Unused;
}
private:
- /// \brief Instructions from OrigLoop selected for this partition.
+ /// Instructions from OrigLoop selected for this partition.
InstructionSet Set;
- /// \brief Whether this partition contains a dependence cycle.
+ /// Whether this partition contains a dependence cycle.
bool DepCycle;
- /// \brief The original loop.
+ /// The original loop.
Loop *OrigLoop;
- /// \brief The cloned loop. If this partition is mapped to the original loop,
+ /// The cloned loop. If this partition is mapped to the original loop,
/// this is null.
Loop *ClonedLoop = nullptr;
- /// \brief The blocks of ClonedLoop including the preheader. If this
+ /// The blocks of ClonedLoop including the preheader. If this
/// partition is mapped to the original loop, this is empty.
SmallVector<BasicBlock *, 8> ClonedLoopBlocks;
- /// \brief These gets populated once the set of instructions have been
+ /// These gets populated once the set of instructions have been
/// finalized. If this partition is mapped to the original loop, these are not
/// set.
ValueToValueMapTy VMap;
};
-/// \brief Holds the set of Partitions. It populates them, merges them and then
+/// Holds the set of Partitions. It populates them, merges them and then
/// clones the loops.
class InstPartitionContainer {
using InstToPartitionIdT = DenseMap<Instruction *, int>;
InstPartitionContainer(Loop *L, LoopInfo *LI, DominatorTree *DT)
: L(L), LI(LI), DT(DT) {}
- /// \brief Returns the number of partitions.
+ /// Returns the number of partitions.
unsigned getSize() const { return PartitionContainer.size(); }
- /// \brief Adds \p Inst into the current partition if that is marked to
+ /// Adds \p Inst into the current partition if that is marked to
/// contain cycles. Otherwise start a new partition for it.
void addToCyclicPartition(Instruction *Inst) {
// If the current partition is non-cyclic. Start a new one.
PartitionContainer.back().add(Inst);
}
- /// \brief Adds \p Inst into a partition that is not marked to contain
+ /// Adds \p Inst into a partition that is not marked to contain
/// dependence cycles.
///
// Initially we isolate memory instructions into as many partitions as
PartitionContainer.emplace_back(Inst, L);
}
- /// \brief Merges adjacent non-cyclic partitions.
+ /// Merges adjacent non-cyclic partitions.
///
/// The idea is that we currently only want to isolate the non-vectorizable
/// partition. We could later allow more distribution among these partition
[](const InstPartition *P) { return !P->hasDepCycle(); });
}
- /// \brief If a partition contains only conditional stores, we won't vectorize
+ /// If a partition contains only conditional stores, we won't vectorize
/// it. Try to merge it with a previous cyclic partition.
void mergeNonIfConvertible() {
mergeAdjacentPartitionsIf([&](const InstPartition *Partition) {
});
}
- /// \brief Merges the partitions according to various heuristics.
+ /// Merges the partitions according to various heuristics.
void mergeBeforePopulating() {
mergeAdjacentNonCyclic();
if (!DistributeNonIfConvertible)
mergeNonIfConvertible();
}
- /// \brief Merges partitions in order to ensure that no loads are duplicated.
+ /// Merges partitions in order to ensure that no loads are duplicated.
///
/// We can't duplicate loads because that could potentially reorder them.
/// LoopAccessAnalysis provides dependency information with the context that
return true;
}
- /// \brief Sets up the mapping between instructions to partitions. If the
+ /// Sets up the mapping between instructions to partitions. If the
/// instruction is duplicated across multiple partitions, set the entry to -1.
void setupPartitionIdOnInstructions() {
int PartitionID = 0;
}
}
- /// \brief Populates the partition with everything that the seeding
+ /// Populates the partition with everything that the seeding
/// instructions require.
void populateUsedSet() {
for (auto &P : PartitionContainer)
P.populateUsedSet();
}
- /// \brief This performs the main chunk of the work of cloning the loops for
+ /// This performs the main chunk of the work of cloning the loops for
/// the partitions.
void cloneLoops() {
BasicBlock *OrigPH = L->getLoopPreheader();
Curr->getDistributedLoop()->getExitingBlock());
}
- /// \brief Removes the dead instructions from the cloned loops.
+ /// Removes the dead instructions from the cloned loops.
void removeUnusedInsts() {
for (auto &Partition : PartitionContainer)
Partition.removeUnusedInsts();
}
- /// \brief For each memory pointer, it computes the partitionId the pointer is
+ /// For each memory pointer, it computes the partitionId the pointer is
/// used in.
///
/// This returns an array of int where the I-th entry corresponds to I-th
private:
using PartitionContainerT = std::list<InstPartition>;
- /// \brief List of partitions.
+ /// List of partitions.
PartitionContainerT PartitionContainer;
- /// \brief Mapping from Instruction to partition Id. If the instruction
+ /// Mapping from Instruction to partition Id. If the instruction
/// belongs to multiple partitions the entry contains -1.
InstToPartitionIdT InstToPartitionId;
LoopInfo *LI;
DominatorTree *DT;
- /// \brief The control structure to merge adjacent partitions if both satisfy
+ /// The control structure to merge adjacent partitions if both satisfy
/// the \p Predicate.
template <class UnaryPredicate>
void mergeAdjacentPartitionsIf(UnaryPredicate Predicate) {
}
};
-/// \brief For each memory instruction, this class maintains difference of the
+/// For each memory instruction, this class maintains difference of the
/// number of unsafe dependences that start out from this instruction minus
/// those that end here.
///
AccessesType Accesses;
};
-/// \brief The actual class performing the per-loop work.
+/// The actual class performing the per-loop work.
class LoopDistributeForLoop {
public:
LoopDistributeForLoop(Loop *L, Function *F, LoopInfo *LI, DominatorTree *DT,
setForced();
}
- /// \brief Try to distribute an inner-most loop.
+ /// Try to distribute an inner-most loop.
bool processLoop(std::function<const LoopAccessInfo &(Loop &)> &GetLAA) {
assert(L->empty() && "Only process inner loops.");
return true;
}
- /// \brief Provide diagnostics then \return with false.
+ /// Provide diagnostics then \return with false.
bool fail(StringRef RemarkName, StringRef Message) {
LLVMContext &Ctx = F->getContext();
bool Forced = isForced().getValueOr(false);
return false;
}
- /// \brief Return if distribution forced to be enabled/disabled for the loop.
+ /// Return if distribution forced to be enabled/disabled for the loop.
///
/// If the optional has a value, it indicates whether distribution was forced
/// to be enabled (true) or disabled (false). If the optional has no value
const Optional<bool> &isForced() const { return IsForced; }
private:
- /// \brief Filter out checks between pointers from the same partition.
+ /// Filter out checks between pointers from the same partition.
///
/// \p PtrToPartition contains the partition number for pointers. Partition
/// number -1 means that the pointer is used in multiple partitions. In this
return Checks;
}
- /// \brief Check whether the loop metadata is forcing distribution to be
+ /// Check whether the loop metadata is forcing distribution to be
/// enabled/disabled.
void setForced() {
Optional<const MDOperand *> Value =
ScalarEvolution *SE;
OptimizationRemarkEmitter *ORE;
- /// \brief Indicates whether distribution is forced to be enabled/disabled for
+ /// Indicates whether distribution is forced to be enabled/disabled for
/// the loop.
///
/// If the optional has a value, it indicates whether distribution was forced
namespace {
-/// \brief The pass class.
+/// The pass class.
class LoopDistributeLegacy : public FunctionPass {
public:
static char ID;
"InnerLoopHeader\n");
}
-/// \brief Move all instructions except the terminator from FromBB right before
+/// Move all instructions except the terminator from FromBB right before
/// InsertBefore
static void moveBBContents(BasicBlock *FromBB, Instruction *InsertBefore) {
auto &ToList = InsertBefore->getParent()->getInstList();
}
}
-/// \brief Update BI to jump to NewBB instead of OldBB. Records updates to
+/// Update BI to jump to NewBB instead of OldBB. Records updates to
/// the dominator tree in DTUpdates, if DT should be preserved.
static void updateSuccessor(BranchInst *BI, BasicBlock *OldBB,
BasicBlock *NewBB,
namespace {
-/// \brief Represent a store-to-forwarding candidate.
+/// Represent a store-to-forwarding candidate.
struct StoreToLoadForwardingCandidate {
LoadInst *Load;
StoreInst *Store;
StoreToLoadForwardingCandidate(LoadInst *Load, StoreInst *Store)
: Load(Load), Store(Store) {}
- /// \brief Return true if the dependence from the store to the load has a
+ /// Return true if the dependence from the store to the load has a
/// distance of one. E.g. A[i+1] = A[i]
bool isDependenceDistanceOfOne(PredicatedScalarEvolution &PSE,
Loop *L) const {
} // end anonymous namespace
-/// \brief Check if the store dominates all latches, so as long as there is no
+/// Check if the store dominates all latches, so as long as there is no
/// intervening store this value will be loaded in the next iteration.
static bool doesStoreDominatesAllLatches(BasicBlock *StoreBlock, Loop *L,
DominatorTree *DT) {
});
}
-/// \brief Return true if the load is not executed on all paths in the loop.
+/// Return true if the load is not executed on all paths in the loop.
static bool isLoadConditional(LoadInst *Load, Loop *L) {
return Load->getParent() != L->getHeader();
}
namespace {
-/// \brief The per-loop class that does most of the work.
+/// The per-loop class that does most of the work.
class LoadEliminationForLoop {
public:
LoadEliminationForLoop(Loop *L, LoopInfo *LI, const LoopAccessInfo &LAI,
DominatorTree *DT)
: L(L), LI(LI), LAI(LAI), DT(DT), PSE(LAI.getPSE()) {}
- /// \brief Look through the loop-carried and loop-independent dependences in
+ /// Look through the loop-carried and loop-independent dependences in
/// this loop and find store->load dependences.
///
/// Note that no candidate is returned if LAA has failed to analyze the loop
return Candidates;
}
- /// \brief Return the index of the instruction according to program order.
+ /// Return the index of the instruction according to program order.
unsigned getInstrIndex(Instruction *Inst) {
auto I = InstOrder.find(Inst);
assert(I != InstOrder.end() && "No index for instruction");
return I->second;
}
- /// \brief If a load has multiple candidates associated (i.e. different
+ /// If a load has multiple candidates associated (i.e. different
/// stores), it means that it could be forwarding from multiple stores
/// depending on control flow. Remove these candidates.
///
});
}
- /// \brief Given two pointers operations by their RuntimePointerChecking
+ /// Given two pointers operations by their RuntimePointerChecking
/// indices, return true if they require an alias check.
///
/// We need a check if one is a pointer for a candidate load and the other is
(PtrsWrittenOnFwdingPath.count(Ptr2) && CandLoadPtrs.count(Ptr1)));
}
- /// \brief Return pointers that are possibly written to on the path from a
+ /// Return pointers that are possibly written to on the path from a
/// forwarding store to a load.
///
/// These pointers need to be alias-checked against the forwarding candidates.
return PtrsWrittenOnFwdingPath;
}
- /// \brief Determine the pointer alias checks to prove that there are no
+ /// Determine the pointer alias checks to prove that there are no
/// intervening stores.
SmallVector<RuntimePointerChecking::PointerCheck, 4> collectMemchecks(
const SmallVectorImpl<StoreToLoadForwardingCandidate> &Candidates) {
return Checks;
}
- /// \brief Perform the transformation for a candidate.
+ /// Perform the transformation for a candidate.
void
propagateStoredValueToLoadUsers(const StoreToLoadForwardingCandidate &Cand,
SCEVExpander &SEE) {
Cand.Load->replaceAllUsesWith(PHI);
}
- /// \brief Top-level driver for each loop: find store->load forwarding
+ /// Top-level driver for each loop: find store->load forwarding
/// candidates, add run-time checks and perform transformation.
bool processLoop() {
DEBUG(dbgs() << "\nIn \"" << L->getHeader()->getParent()->getName()
private:
Loop *L;
- /// \brief Maps the load/store instructions to their index according to
+ /// Maps the load/store instructions to their index according to
/// program order.
DenseMap<Instruction *, unsigned> InstOrder;
namespace {
-/// \brief The pass. Most of the work is delegated to the per-loop
+/// The pass. Most of the work is delegated to the per-loop
/// LoadEliminationForLoop class.
class LoopLoadElimination : public FunctionPass {
public:
canonicalize(*L);
}
-/// \brief Check whether or not this formula satisfies the canonical
+/// Check whether or not this formula satisfies the canonical
/// representation.
/// \see Formula::BaseRegs.
bool Formula::isCanonical(const Loop &L) const {
return I == BaseRegs.end();
}
-/// \brief Helper method to morph a formula into its canonical representation.
+/// Helper method to morph a formula into its canonical representation.
/// \see Formula::BaseRegs.
/// Every formula having more than one base register, must use the ScaledReg
/// field. Otherwise, we would have to do special cases everywhere in LSR
}
}
-/// \brief Get rid of the scale in the formula.
+/// Get rid of the scale in the formula.
/// In other words, this method morphes reg1 + 1*reg2 into reg1 + reg2.
/// \return true if it was possible to get rid of the scale, false otherwise.
/// \note After this operation the formula may not be in the canonical form.
} // end anonymous namespace
-/// \brief Check if the addressing mode defined by \p F is completely
+/// Check if the addressing mode defined by \p F is completely
/// folded in \p LU at isel time.
/// This includes address-mode folding and special icmp tricks.
/// This function returns true if \p LU can accommodate what \p F
return false;
}
-/// \brief Helper function for LSRInstance::GenerateReassociations.
+/// Helper function for LSRInstance::GenerateReassociations.
void LSRInstance::GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
const Formula &Base,
unsigned Depth, size_t Idx,
}
}
-/// \brief Helper function for LSRInstance::GenerateSymbolicOffsets.
+/// Helper function for LSRInstance::GenerateSymbolicOffsets.
void LSRInstance::GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
const Formula &Base, size_t Idx,
bool IsScaledReg) {
/* IsScaledReg */ true);
}
-/// \brief Helper function for LSRInstance::GenerateConstantOffsets.
+/// Helper function for LSRInstance::GenerateConstantOffsets.
void LSRInstance::GenerateConstantOffsetsImpl(
LSRUse &LU, unsigned LUIdx, const Formula &Base,
const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
};
struct EstimatedUnrollCost {
- /// \brief The estimated cost after unrolling.
+ /// The estimated cost after unrolling.
unsigned UnrolledCost;
- /// \brief The estimated dynamic cost of executing the instructions in the
+ /// The estimated dynamic cost of executing the instructions in the
/// rolled form.
unsigned RolledDynamicCost;
};
} // end anonymous namespace
-/// \brief Figure out if the loop is worth full unrolling.
+/// Figure out if the loop is worth full unrolling.
///
/// Complete loop unrolling can make some loads constant, and we need to know
/// if that would expose any further optimization opportunities. This routine
"LoopVersioningLICM's threshold for maximum allowed loop nest/depth"),
cl::init(2), cl::Hidden);
-/// \brief Create MDNode for input string.
+/// Create MDNode for input string.
static MDNode *createStringMetadata(Loop *TheLoop, StringRef Name, unsigned V) {
LLVMContext &Context = TheLoop->getHeader()->getContext();
Metadata *MDs[] = {
return MDNode::get(Context, MDs);
}
-/// \brief Set input string into loop metadata by keeping other values intact.
+/// Set input string into loop metadata by keeping other values intact.
void llvm::addStringMetadataToLoop(Loop *TheLoop, const char *MDString,
unsigned V) {
SmallVector<Metadata *, 4> MDs(1);
} // end anonymous namespace
-/// \brief Check loop structure and confirms it's good for LoopVersioningLICM.
+/// Check loop structure and confirms it's good for LoopVersioningLICM.
bool LoopVersioningLICM::legalLoopStructure() {
// Loop must be in loop simplify form.
if (!CurLoop->isLoopSimplifyForm()) {
return true;
}
-/// \brief Check memory accesses in loop and confirms it's good for
+/// Check memory accesses in loop and confirms it's good for
/// LoopVersioningLICM.
bool LoopVersioningLICM::legalLoopMemoryAccesses() {
bool HasMayAlias = false;
return true;
}
-/// \brief Check loop instructions safe for Loop versioning.
+/// Check loop instructions safe for Loop versioning.
/// It returns true if it's safe else returns false.
/// Consider following:
/// 1) Check all load store in loop body are non atomic & non volatile.
return true;
}
-/// \brief Check loop instructions and confirms it's good for
+/// Check loop instructions and confirms it's good for
/// LoopVersioningLICM.
bool LoopVersioningLICM::legalLoopInstructions() {
// Resetting counters.
return true;
}
-/// \brief It checks loop is already visited or not.
+/// It checks loop is already visited or not.
/// check loop meta data, if loop revisited return true
/// else false.
bool LoopVersioningLICM::isLoopAlreadyVisited() {
return false;
}
-/// \brief Checks legality for LoopVersioningLICM by considering following:
+/// Checks legality for LoopVersioningLICM by considering following:
/// a) loop structure legality b) loop instruction legality
/// c) loop memory access legality.
/// Return true if legal else returns false.
return true;
}
-/// \brief Update loop with aggressive aliasing assumptions.
+/// Update loop with aggressive aliasing assumptions.
/// It marks no-alias to any pairs of memory operations by assuming
/// loop should not have any must-alias memory accesses pairs.
/// During LoopVersioningLICM legality we ignore loops having must
}
namespace {
-/// \brief Legacy pass for lowering expect intrinsics out of the IR.
+/// Legacy pass for lowering expect intrinsics out of the IR.
///
/// When this pass is run over a function it uses expect intrinsics which feed
/// branches and switches to provide branch weight metadata for those
//===----------------------------------------------------------------------===//
//
//! \file
-//! \brief This pass performs merges of loads and stores on both sides of a
+//! This pass performs merges of loads and stores on both sides of a
// diamond (hammock). It hoists the loads and sinks the stores.
//
// The algorithm iteratively hoists two loads to the same address out of a
} // end anonymous namespace
///
-/// \brief Return tail block of a diamond.
+/// Return tail block of a diamond.
///
BasicBlock *MergedLoadStoreMotion::getDiamondTail(BasicBlock *BB) {
assert(isDiamondHead(BB) && "Basic block is not head of a diamond");
}
///
-/// \brief True when BB is the head of a diamond (hammock)
+/// True when BB is the head of a diamond (hammock)
///
bool MergedLoadStoreMotion::isDiamondHead(BasicBlock *BB) {
if (!BB)
///
-/// \brief True when instruction is a sink barrier for a store
+/// True when instruction is a sink barrier for a store
/// located in Loc
///
/// Whenever an instruction could possibly read or modify the
}
///
-/// \brief Check if \p BB contains a store to the same address as \p SI
+/// Check if \p BB contains a store to the same address as \p SI
///
/// \return The store in \p when it is safe to sink. Otherwise return Null.
///
}
///
-/// \brief Create a PHI node in BB for the operands of S0 and S1
+/// Create a PHI node in BB for the operands of S0 and S1
///
PHINode *MergedLoadStoreMotion::getPHIOperand(BasicBlock *BB, StoreInst *S0,
StoreInst *S1) {
}
///
-/// \brief Merge two stores to same address and sink into \p BB
+/// Merge two stores to same address and sink into \p BB
///
/// Also sinks GEP instruction computing the store address
///
}
///
-/// \brief True when two stores are equivalent and can sink into the footer
+/// True when two stores are equivalent and can sink into the footer
///
/// Starting from a diamond tail block, iterate over the instructions in one
/// predecessor block and try to match a store in the second predecessor.
}
///
- /// \brief Run the transformation for each function
+ /// Run the transformation for each function
///
bool runOnFunction(Function &F) override {
if (skipFunction(F))
} // anonymous namespace
///
-/// \brief createMergedLoadStoreMotionPass - The public interface to this file.
+/// createMergedLoadStoreMotionPass - The public interface to this file.
///
FunctionPass *llvm::createMergedLoadStoreMotionPass() {
return new MergedLoadStoreMotionLegacyPass();
return nullptr;
}
-/// \brief Build up a vector of value/power pairs factoring a product.
+/// Build up a vector of value/power pairs factoring a product.
///
/// Given a series of multiplication operands, build a vector of factors and
/// the powers each is raised to when forming the final product. Sort them in
return true;
}
-/// \brief Build a tree of multiplies, computing the product of Ops.
+/// Build a tree of multiplies, computing the product of Ops.
static Value *buildMultiplyTree(IRBuilder<> &Builder,
SmallVectorImpl<Value*> &Ops) {
if (Ops.size() == 1)
return LHS;
}
-/// \brief Build a minimal multiplication DAG for (a^x)*(b^y)*(c^z)*...
+/// Build a minimal multiplication DAG for (a^x)*(b^y)*(c^z)*...
///
/// Given a vector of values raised to various powers, where no two values are
/// equal and the powers are sorted in decreasing order, compute the minimal
namespace {
-/// \brief A custom IRBuilder inserter which prefixes all names, but only in
+/// A custom IRBuilder inserter which prefixes all names, but only in
/// Assert builds.
class IRBuilderPrefixedInserter : public IRBuilderDefaultInserter {
std::string Prefix;
}
};
-/// \brief Provide a type for IRBuilder that drops names in release builds.
+/// Provide a type for IRBuilder that drops names in release builds.
using IRBuilderTy = IRBuilder<ConstantFolder, IRBuilderPrefixedInserter>;
-/// \brief A used slice of an alloca.
+/// A used slice of an alloca.
///
/// This structure represents a slice of an alloca used by some instruction. It
/// stores both the begin and end offsets of this use, a pointer to the use
/// itself, and a flag indicating whether we can classify the use as splittable
/// or not when forming partitions of the alloca.
class Slice {
- /// \brief The beginning offset of the range.
+ /// The beginning offset of the range.
uint64_t BeginOffset = 0;
- /// \brief The ending offset, not included in the range.
+ /// The ending offset, not included in the range.
uint64_t EndOffset = 0;
- /// \brief Storage for both the use of this slice and whether it can be
+ /// Storage for both the use of this slice and whether it can be
/// split.
PointerIntPair<Use *, 1, bool> UseAndIsSplittable;
bool isDead() const { return getUse() == nullptr; }
void kill() { UseAndIsSplittable.setPointer(nullptr); }
- /// \brief Support for ordering ranges.
+ /// Support for ordering ranges.
///
/// This provides an ordering over ranges such that start offsets are
/// always increasing, and within equal start offsets, the end offsets are
return false;
}
- /// \brief Support comparison with a single offset to allow binary searches.
+ /// Support comparison with a single offset to allow binary searches.
friend LLVM_ATTRIBUTE_UNUSED bool operator<(const Slice &LHS,
uint64_t RHSOffset) {
return LHS.beginOffset() < RHSOffset;
} // end namespace llvm
-/// \brief Representation of the alloca slices.
+/// Representation of the alloca slices.
///
/// This class represents the slices of an alloca which are formed by its
/// various uses. If a pointer escapes, we can't fully build a representation
/// starting at a particular offset before splittable slices.
class llvm::sroa::AllocaSlices {
public:
- /// \brief Construct the slices of a particular alloca.
+ /// Construct the slices of a particular alloca.
AllocaSlices(const DataLayout &DL, AllocaInst &AI);
- /// \brief Test whether a pointer to the allocation escapes our analysis.
+ /// Test whether a pointer to the allocation escapes our analysis.
///
/// If this is true, the slices are never fully built and should be
/// ignored.
bool isEscaped() const { return PointerEscapingInstr; }
- /// \brief Support for iterating over the slices.
+ /// Support for iterating over the slices.
/// @{
using iterator = SmallVectorImpl<Slice>::iterator;
using range = iterator_range<iterator>;
const_iterator end() const { return Slices.end(); }
/// @}
- /// \brief Erase a range of slices.
+ /// Erase a range of slices.
void erase(iterator Start, iterator Stop) { Slices.erase(Start, Stop); }
- /// \brief Insert new slices for this alloca.
+ /// Insert new slices for this alloca.
///
/// This moves the slices into the alloca's slices collection, and re-sorts
/// everything so that the usual ordering properties of the alloca's slices
class partition_iterator;
iterator_range<partition_iterator> partitions();
- /// \brief Access the dead users for this alloca.
+ /// Access the dead users for this alloca.
ArrayRef<Instruction *> getDeadUsers() const { return DeadUsers; }
- /// \brief Access the dead operands referring to this alloca.
+ /// Access the dead operands referring to this alloca.
///
/// These are operands which have cannot actually be used to refer to the
/// alloca as they are outside its range and the user doesn't correct for
friend class AllocaSlices::SliceBuilder;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
- /// \brief Handle to alloca instruction to simplify method interfaces.
+ /// Handle to alloca instruction to simplify method interfaces.
AllocaInst &AI;
#endif
- /// \brief The instruction responsible for this alloca not having a known set
+ /// The instruction responsible for this alloca not having a known set
/// of slices.
///
/// When an instruction (potentially) escapes the pointer to the alloca, we
/// alloca. This will be null if the alloca slices are analyzed successfully.
Instruction *PointerEscapingInstr;
- /// \brief The slices of the alloca.
+ /// The slices of the alloca.
///
/// We store a vector of the slices formed by uses of the alloca here. This
/// vector is sorted by increasing begin offset, and then the unsplittable
/// details.
SmallVector<Slice, 8> Slices;
- /// \brief Instructions which will become dead if we rewrite the alloca.
+ /// Instructions which will become dead if we rewrite the alloca.
///
/// Note that these are not separated by slice. This is because we expect an
/// alloca to be completely rewritten or not rewritten at all. If rewritten,
/// they come from outside of the allocated space.
SmallVector<Instruction *, 8> DeadUsers;
- /// \brief Operands which will become dead if we rewrite the alloca.
+ /// Operands which will become dead if we rewrite the alloca.
///
/// These are operands that in their particular use can be replaced with
/// undef when we rewrite the alloca. These show up in out-of-bounds inputs
SmallVector<Use *, 8> DeadOperands;
};
-/// \brief A partition of the slices.
+/// A partition of the slices.
///
/// An ephemeral representation for a range of slices which can be viewed as
/// a partition of the alloca. This range represents a span of the alloca's
using iterator = AllocaSlices::iterator;
- /// \brief The beginning and ending offsets of the alloca for this
+ /// The beginning and ending offsets of the alloca for this
/// partition.
uint64_t BeginOffset, EndOffset;
- /// \brief The start and end iterators of this partition.
+ /// The start and end iterators of this partition.
iterator SI, SJ;
- /// \brief A collection of split slice tails overlapping the partition.
+ /// A collection of split slice tails overlapping the partition.
SmallVector<Slice *, 4> SplitTails;
- /// \brief Raw constructor builds an empty partition starting and ending at
+ /// Raw constructor builds an empty partition starting and ending at
/// the given iterator.
Partition(iterator SI) : SI(SI), SJ(SI) {}
public:
- /// \brief The start offset of this partition.
+ /// The start offset of this partition.
///
/// All of the contained slices start at or after this offset.
uint64_t beginOffset() const { return BeginOffset; }
- /// \brief The end offset of this partition.
+ /// The end offset of this partition.
///
/// All of the contained slices end at or before this offset.
uint64_t endOffset() const { return EndOffset; }
- /// \brief The size of the partition.
+ /// The size of the partition.
///
/// Note that this can never be zero.
uint64_t size() const {
return EndOffset - BeginOffset;
}
- /// \brief Test whether this partition contains no slices, and merely spans
+ /// Test whether this partition contains no slices, and merely spans
/// a region occupied by split slices.
bool empty() const { return SI == SJ; }
iterator end() const { return SJ; }
/// @}
- /// \brief Get the sequence of split slice tails.
+ /// Get the sequence of split slice tails.
///
/// These tails are of slices which start before this partition but are
/// split and overlap into the partition. We accumulate these while forming
ArrayRef<Slice *> splitSliceTails() const { return SplitTails; }
};
-/// \brief An iterator over partitions of the alloca's slices.
+/// An iterator over partitions of the alloca's slices.
///
/// This iterator implements the core algorithm for partitioning the alloca's
/// slices. It is a forward iterator as we don't support backtracking for
Partition> {
friend class AllocaSlices;
- /// \brief Most of the state for walking the partitions is held in a class
+ /// Most of the state for walking the partitions is held in a class
/// with a nice interface for examining them.
Partition P;
- /// \brief We need to keep the end of the slices to know when to stop.
+ /// We need to keep the end of the slices to know when to stop.
AllocaSlices::iterator SE;
- /// \brief We also need to keep track of the maximum split end offset seen.
+ /// We also need to keep track of the maximum split end offset seen.
/// FIXME: Do we really?
uint64_t MaxSplitSliceEndOffset = 0;
- /// \brief Sets the partition to be empty at given iterator, and sets the
+ /// Sets the partition to be empty at given iterator, and sets the
/// end iterator.
partition_iterator(AllocaSlices::iterator SI, AllocaSlices::iterator SE)
: P(SI), SE(SE) {
advance();
}
- /// \brief Advance the iterator to the next partition.
+ /// Advance the iterator to the next partition.
///
/// Requires that the iterator not be at the end of the slices.
void advance() {
Partition &operator*() { return P; }
};
-/// \brief A forward range over the partitions of the alloca's slices.
+/// A forward range over the partitions of the alloca's slices.
///
/// This accesses an iterator range over the partitions of the alloca's
/// slices. It computes these partitions on the fly based on the overlapping
return nullptr;
}
-/// \brief A helper that folds a PHI node or a select.
+/// A helper that folds a PHI node or a select.
static Value *foldPHINodeOrSelectInst(Instruction &I) {
if (PHINode *PN = dyn_cast<PHINode>(&I)) {
// If PN merges together the same value, return that value.
return foldSelectInst(cast<SelectInst>(I));
}
-/// \brief Builder for the alloca slices.
+/// Builder for the alloca slices.
///
/// This class builds a set of alloca slices by recursively visiting the uses
/// of an alloca and making a slice for each load and store at each offset.
SmallDenseMap<Instruction *, unsigned> MemTransferSliceMap;
SmallDenseMap<Instruction *, uint64_t> PHIOrSelectSizes;
- /// \brief Set to de-duplicate dead instructions found in the use walk.
+ /// Set to de-duplicate dead instructions found in the use walk.
SmallPtrSet<Instruction *, 4> VisitedDeadInsts;
public:
void visitSelectInst(SelectInst &SI) { visitPHINodeOrSelectInst(SI); }
- /// \brief Disable SROA entirely if there are unhandled users of the alloca.
+ /// Disable SROA entirely if there are unhandled users of the alloca.
void visitInstruction(Instruction &I) { PI.setAborted(&I); }
};
SI.eraseFromParent();
}
-/// \brief Build a GEP out of a base pointer and indices.
+/// Build a GEP out of a base pointer and indices.
///
/// This will return the BasePtr if that is valid, or build a new GEP
/// instruction using the IRBuilder if GEP-ing is needed.
NamePrefix + "sroa_idx");
}
-/// \brief Get a natural GEP off of the BasePtr walking through Ty toward
+/// Get a natural GEP off of the BasePtr walking through Ty toward
/// TargetTy without changing the offset of the pointer.
///
/// This routine assumes we've already established a properly offset GEP with
return buildGEP(IRB, BasePtr, Indices, NamePrefix);
}
-/// \brief Recursively compute indices for a natural GEP.
+/// Recursively compute indices for a natural GEP.
///
/// This is the recursive step for getNaturalGEPWithOffset that walks down the
/// element types adding appropriate indices for the GEP.
Indices, NamePrefix);
}
-/// \brief Get a natural GEP from a base pointer to a particular offset and
+/// Get a natural GEP from a base pointer to a particular offset and
/// resulting in a particular type.
///
/// The goal is to produce a "natural" looking GEP that works with the existing
Indices, NamePrefix);
}
-/// \brief Compute an adjusted pointer from Ptr by Offset bytes where the
+/// Compute an adjusted pointer from Ptr by Offset bytes where the
/// resulting pointer has PointerTy.
///
/// This tries very hard to compute a "natural" GEP which arrives at the offset
return Ptr;
}
-/// \brief Compute the adjusted alignment for a load or store from an offset.
+/// Compute the adjusted alignment for a load or store from an offset.
static unsigned getAdjustedAlignment(Instruction *I, uint64_t Offset,
const DataLayout &DL) {
unsigned Alignment;
return MinAlign(Alignment, Offset);
}
-/// \brief Test whether we can convert a value from the old to the new type.
+/// Test whether we can convert a value from the old to the new type.
///
/// This predicate should be used to guard calls to convertValue in order to
/// ensure that we only try to convert viable values. The strategy is that we
return true;
}
-/// \brief Generic routine to convert an SSA value to a value of a different
+/// Generic routine to convert an SSA value to a value of a different
/// type.
///
/// This will try various different casting techniques, such as bitcasts,
return IRB.CreateBitCast(V, NewTy);
}
-/// \brief Test whether the given slice use can be promoted to a vector.
+/// Test whether the given slice use can be promoted to a vector.
///
/// This function is called to test each entry in a partition which is slated
/// for a single slice.
return true;
}
-/// \brief Test whether the given alloca partitioning and range of slices can be
+/// Test whether the given alloca partitioning and range of slices can be
/// promoted to a vector.
///
/// This is a quick test to check whether we can rewrite a particular alloca
return nullptr;
}
-/// \brief Test whether a slice of an alloca is valid for integer widening.
+/// Test whether a slice of an alloca is valid for integer widening.
///
/// This implements the necessary checking for the \c isIntegerWideningViable
/// test below on a single slice of the alloca.
return true;
}
-/// \brief Test whether the given alloca partition's integer operations can be
+/// Test whether the given alloca partition's integer operations can be
/// widened to promotable ones.
///
/// This is a quick test to check whether we can rewrite the integer loads and
return V;
}
-/// \brief Visitor to rewrite instructions using p particular slice of an alloca
+/// Visitor to rewrite instructions using p particular slice of an alloca
/// to use a new alloca.
///
/// Also implements the rewriting to vector-based accesses when the partition
);
}
- /// \brief Compute suitable alignment to access this slice of the *new*
+ /// Compute suitable alignment to access this slice of the *new*
/// alloca.
///
/// You can optionally pass a type to this routine and if that type's ABI
return NewSI->getPointerOperand() == &NewAI && !SI.isVolatile();
}
- /// \brief Compute an integer value from splatting an i8 across the given
+ /// Compute an integer value from splatting an i8 across the given
/// number of bytes.
///
/// Note that this routine assumes an i8 is a byte. If that isn't true, don't
return V;
}
- /// \brief Compute a vector splat for a given element value.
+ /// Compute a vector splat for a given element value.
Value *getVectorSplat(Value *V, unsigned NumElements) {
V = IRB.CreateVectorSplat(NumElements, V, "vsplat");
DEBUG(dbgs() << " splat: " << *V << "\n");
namespace {
-/// \brief Visitor to rewrite aggregate loads and stores as scalar.
+/// Visitor to rewrite aggregate loads and stores as scalar.
///
/// This pass aggressively rewrites all aggregate loads and stores on
/// a particular pointer (or any pointer derived from it which we can identify)
// Conservative default is to not rewrite anything.
bool visitInstruction(Instruction &I) { return false; }
- /// \brief Generic recursive split emission class.
+ /// Generic recursive split emission class.
template <typename Derived> class OpSplitter {
protected:
/// The builder used to form new instructions.
: IRB(InsertionPoint), GEPIndices(1, IRB.getInt32(0)), Ptr(Ptr) {}
public:
- /// \brief Generic recursive split emission routine.
+ /// Generic recursive split emission routine.
///
/// This method recursively splits an aggregate op (load or store) into
/// scalar or vector ops. It splits recursively until it hits a single value
} // end anonymous namespace
-/// \brief Strip aggregate type wrapping.
+/// Strip aggregate type wrapping.
///
/// This removes no-op aggregate types wrapping an underlying type. It will
/// strip as many layers of types as it can without changing either the type
return stripAggregateTypeWrapping(DL, InnerTy);
}
-/// \brief Try to find a partition of the aggregate type passed in for a given
+/// Try to find a partition of the aggregate type passed in for a given
/// offset and size.
///
/// This recurses through the aggregate type and tries to compute a subtype
return SubTy;
}
-/// \brief Pre-split loads and stores to simplify rewriting.
+/// Pre-split loads and stores to simplify rewriting.
///
/// We want to break up the splittable load+store pairs as much as
/// possible. This is important to do as a preprocessing step, as once we
return true;
}
-/// \brief Rewrite an alloca partition's users.
+/// Rewrite an alloca partition's users.
///
/// This routine drives both of the rewriting goals of the SROA pass. It tries
/// to rewrite uses of an alloca partition to be conducive for SSA value
return NewAI;
}
-/// \brief Walks the slices of an alloca and form partitions based on them,
+/// Walks the slices of an alloca and form partitions based on them,
/// rewriting each of their uses.
bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) {
if (AS.begin() == AS.end())
return Changed;
}
-/// \brief Clobber a use with undef, deleting the used value if it becomes dead.
+/// Clobber a use with undef, deleting the used value if it becomes dead.
void SROA::clobberUse(Use &U) {
Value *OldV = U;
// Replace the use with an undef value.
}
}
-/// \brief Analyze an alloca for SROA.
+/// Analyze an alloca for SROA.
///
/// This analyzes the alloca to ensure we can reason about it, builds
/// the slices of the alloca, and then hands it off to be split and
return Changed;
}
-/// \brief Delete the dead instructions accumulated in this run.
+/// Delete the dead instructions accumulated in this run.
///
/// Recursively deletes the dead instructions we've accumulated. This is done
/// at the very end to maximize locality of the recursive delete and to
return Changed;
}
-/// \brief Promote the allocas, using the best available technique.
+/// Promote the allocas, using the best available technique.
///
/// This attempts to promote whatever allocas have been identified as viable in
/// the PromotableAllocas list. If that list is empty, there is nothing to do.
namespace {
-/// \brief A helper class for separating a constant offset from a GEP index.
+/// A helper class for separating a constant offset from a GEP index.
///
/// In real programs, a GEP index may be more complicated than a simple addition
/// of something and a constant integer which can be trivially splitted. For
const DominatorTree *DT;
};
-/// \brief A pass that tries to split every GEP in the function into a variadic
+/// A pass that tries to split every GEP in the function into a variadic
/// base and a constant offset. It is a FunctionPass because searching for the
/// constant offset may inspect other basic blocks.
class SeparateConstOffsetFromGEP : public FunctionPass {
INITIALIZE_PASS_END(StructurizeCFG, "structurizecfg", "Structurize the CFG",
false, false)
-/// \brief Initialize the types and constants used in the pass
+/// Initialize the types and constants used in the pass
bool StructurizeCFG::doInitialization(Region *R, RGPassManager &RGM) {
LLVMContext &Context = R->getEntry()->getContext();
return false;
}
-/// \brief Build up the general order of nodes
+/// Build up the general order of nodes
void StructurizeCFG::orderNodes() {
ReversePostOrderTraversal<Region*> RPOT(ParentRegion);
SmallDenseMap<Loop*, unsigned, 8> LoopBlocks;
std::reverse(Order.begin(), Order.end());
}
-/// \brief Determine the end of the loops
+/// Determine the end of the loops
void StructurizeCFG::analyzeLoops(RegionNode *N) {
if (N->isSubRegion()) {
// Test for exit as back edge
}
}
-/// \brief Invert the given condition
+/// Invert the given condition
Value *StructurizeCFG::invert(Value *Condition) {
// First: Check if it's a constant
if (Constant *C = dyn_cast<Constant>(Condition))
llvm_unreachable("Unhandled condition to invert");
}
-/// \brief Build the condition for one edge
+/// Build the condition for one edge
Value *StructurizeCFG::buildCondition(BranchInst *Term, unsigned Idx,
bool Invert) {
Value *Cond = Invert ? BoolFalse : BoolTrue;
return Cond;
}
-/// \brief Analyze the predecessors of each block and build up predicates
+/// Analyze the predecessors of each block and build up predicates
void StructurizeCFG::gatherPredicates(RegionNode *N) {
RegionInfo *RI = ParentRegion->getRegionInfo();
BasicBlock *BB = N->getEntry();
}
}
-/// \brief Collect various loop and predicate infos
+/// Collect various loop and predicate infos
void StructurizeCFG::collectInfos() {
// Reset predicate
Predicates.clear();
}
}
-/// \brief Insert the missing branch conditions
+/// Insert the missing branch conditions
void StructurizeCFG::insertConditions(bool Loops) {
BranchVector &Conds = Loops ? LoopConds : Conditions;
Value *Default = Loops ? BoolTrue : BoolFalse;
}
}
-/// \brief Remove all PHI values coming from "From" into "To" and remember
+/// Remove all PHI values coming from "From" into "To" and remember
/// them in DeletedPhis
void StructurizeCFG::delPhiValues(BasicBlock *From, BasicBlock *To) {
PhiMap &Map = DeletedPhis[To];
}
}
-/// \brief Add a dummy PHI value as soon as we knew the new predecessor
+/// Add a dummy PHI value as soon as we knew the new predecessor
void StructurizeCFG::addPhiValues(BasicBlock *From, BasicBlock *To) {
for (PHINode &Phi : To->phis()) {
Value *Undef = UndefValue::get(Phi.getType());
AddedPhis[To].push_back(From);
}
-/// \brief Add the real PHI value as soon as everything is set up
+/// Add the real PHI value as soon as everything is set up
void StructurizeCFG::setPhiValues() {
SSAUpdater Updater;
for (const auto &AddedPhi : AddedPhis) {
assert(DeletedPhis.empty());
}
-/// \brief Remove phi values from all successors and then remove the terminator.
+/// Remove phi values from all successors and then remove the terminator.
void StructurizeCFG::killTerminator(BasicBlock *BB) {
TerminatorInst *Term = BB->getTerminator();
if (!Term)
Term->eraseFromParent();
}
-/// \brief Let node exit(s) point to NewExit
+/// Let node exit(s) point to NewExit
void StructurizeCFG::changeExit(RegionNode *Node, BasicBlock *NewExit,
bool IncludeDominator) {
if (Node->isSubRegion()) {
}
}
-/// \brief Create a new flow node and update dominator tree and region info
+/// Create a new flow node and update dominator tree and region info
BasicBlock *StructurizeCFG::getNextFlow(BasicBlock *Dominator) {
LLVMContext &Context = Func->getContext();
BasicBlock *Insert = Order.empty() ? ParentRegion->getExit() :
return Flow;
}
-/// \brief Create a new or reuse the previous node as flow node
+/// Create a new or reuse the previous node as flow node
BasicBlock *StructurizeCFG::needPrefix(bool NeedEmpty) {
BasicBlock *Entry = PrevNode->getEntry();
return Flow;
}
-/// \brief Returns the region exit if possible, otherwise just a new flow node
+/// Returns the region exit if possible, otherwise just a new flow node
BasicBlock *StructurizeCFG::needPostfix(BasicBlock *Flow,
bool ExitUseAllowed) {
if (!Order.empty() || !ExitUseAllowed)
return Exit;
}
-/// \brief Set the previous node
+/// Set the previous node
void StructurizeCFG::setPrevNode(BasicBlock *BB) {
PrevNode = ParentRegion->contains(BB) ? ParentRegion->getBBNode(BB)
: nullptr;
}
-/// \brief Does BB dominate all the predicates of Node?
+/// Does BB dominate all the predicates of Node?
bool StructurizeCFG::dominatesPredicates(BasicBlock *BB, RegionNode *Node) {
BBPredicates &Preds = Predicates[Node->getEntry()];
return llvm::all_of(Preds, [&](std::pair<BasicBlock *, Value *> Pred) {
});
}
-/// \brief Can we predict that this node will always be called?
+/// Can we predict that this node will always be called?
bool StructurizeCFG::isPredictableTrue(RegionNode *Node) {
BBPredicates &Preds = Predicates[Node->getEntry()];
bool Dominated = false;
return true;
}
-/// \brief Run the transformation for each region found
+/// Run the transformation for each region found
bool StructurizeCFG::runOnRegion(Region *R, RGPassManager &RGM) {
if (R->isTopLevelRegion())
return false;
STATISTIC(NumRetDuped, "Number of return duplicated");
STATISTIC(NumAccumAdded, "Number of accumulators introduced");
-/// \brief Scan the specified function for alloca instructions.
+/// Scan the specified function for alloca instructions.
/// If it contains any dynamic allocas, returns false.
static bool canTRE(Function &F) {
// Because of PR962, we don't TRE dynamic allocas.
return !isa<IntrinsicInst>(I) || isa<MemIntrinsic>(I);
}
-/// \brief Assign DWARF discriminators.
+/// Assign DWARF discriminators.
///
/// To assign discriminators, we examine the boundaries of every
/// basic block and its successors. Suppose there is a basic block B1
return isDivisionOp() ? Value.Quotient : Value.Remainder;
}
-/// \brief Check if a value looks like a hash.
+/// Check if a value looks like a hash.
///
/// The routine is expected to detect values computed using the most common hash
/// algorithms. Typically, hash computations end with one of the following
ModuleLevelChanges, Returns, NameSuffix, CodeInfo);
}
-/// \brief Remaps instructions in \p Blocks using the mapping in \p VMap.
+/// Remaps instructions in \p Blocks using the mapping in \p VMap.
void llvm::remapInstructionsInBlocks(
const SmallVectorImpl<BasicBlock *> &Blocks, ValueToValueMapTy &VMap) {
// Rewrite the code to refer to itself.
RF_NoModuleLevelChanges | RF_IgnoreMissingLocals);
}
-/// \brief Clones a loop \p OrigLoop. Returns the loop and the blocks in \p
+/// Clones a loop \p OrigLoop. Returns the loop and the blocks in \p
/// Blocks.
///
/// Updates LoopInfo and DominatorTree assuming the loop is dominated by block
return NewLoop;
}
-/// \brief Duplicate non-Phi instructions from the beginning of block up to
+/// Duplicate non-Phi instructions from the beginning of block up to
/// StopAt instruction into a split block between BB and its predecessor.
BasicBlock *
llvm::DuplicateInstructionsInSplitBetween(BasicBlock *BB, BasicBlock *PredBB,
AggregateArgsOpt("aggregate-extracted-args", cl::Hidden,
cl::desc("Aggregate arguments to code-extracted functions"));
-/// \brief Test whether a block is valid for extraction.
+/// Test whether a block is valid for extraction.
bool CodeExtractor::isBlockValidForExtraction(const BasicBlock &BB,
bool AllowVarArgs) {
// Landing pads must be in the function where they were inserted for cleanup.
return true;
}
-/// \brief Build a set of blocks to extract if the input blocks are viable.
+/// Build a set of blocks to extract if the input blocks are viable.
static SetVector<BasicBlock *>
buildExtractionBlockSet(ArrayRef<BasicBlock *> BBs, DominatorTree *DT,
bool AllowVarArgs) {
class FlattenCFGOpt {
AliasAnalysis *AA;
- /// \brief Use parallel-and or parallel-or to generate conditions for
+ /// Use parallel-and or parallel-or to generate conditions for
/// conditional branches.
bool FlattenParallelAndOr(BasicBlock *BB, IRBuilder<> &Builder);
- /// \brief If \param BB is the merge block of an if-region, attempt to merge
+ /// If \param BB is the merge block of an if-region, attempt to merge
/// the if-region with an adjacent if-region upstream if two if-regions
/// contain identical instructions.
bool MergeIfRegion(BasicBlock *BB, IRBuilder<> &Builder);
- /// \brief Compare a pair of blocks: \p Block1 and \p Block2, which
+ /// Compare a pair of blocks: \p Block1 and \p Block2, which
/// are from two if-regions whose entry blocks are \p Head1 and \p
/// Head2. \returns true if \p Block1 and \p Block2 contain identical
/// instructions, and have no memory reference alias with \p Head2.
using PredBlockVector = SmallVector<BasicBlock *, 16>;
using IncomingValueMap = DenseMap<BasicBlock *, Value *>;
-/// \brief Determines the value to use as the phi node input for a block.
+/// Determines the value to use as the phi node input for a block.
///
/// Select between \p OldVal any value that we know flows from \p BB
/// to a particular phi on the basis of which one (if either) is not
return OldVal;
}
-/// \brief Create a map from block to value for the operands of a
+/// Create a map from block to value for the operands of a
/// given phi.
///
/// Create a map from block to value for each non-undef value flowing
}
}
-/// \brief Replace the incoming undef values to a phi with the values
+/// Replace the incoming undef values to a phi with the values
/// from a block-to-value map.
///
/// \param PN The phi we are replacing the undefs in.
}
}
-/// \brief Replace a value flowing from a block to a phi with
+/// Replace a value flowing from a block to a phi with
/// potentially multiple instances of that value flowing from the
/// block's predecessors to the phi.
///
} while (!Worklist.empty());
}
-/// \brief The first part of loop-nestification is to find a PHI node that tells
+/// The first part of loop-nestification is to find a PHI node that tells
/// us how to partition the loops.
static PHINode *findPHIToPartitionLoops(Loop *L, DominatorTree *DT,
AssumptionCache *AC) {
return nullptr;
}
-/// \brief If this loop has multiple backedges, try to pull one of them out into
+/// If this loop has multiple backedges, try to pull one of them out into
/// a nested loop.
///
/// This is important for code that looks like
return NewOuter;
}
-/// \brief This method is called when the specified loop has more than one
+/// This method is called when the specified loop has more than one
/// backedge in it.
///
/// If this occurs, revector all of these backedges to target a new basic block
return BEBlock;
}
-/// \brief Simplify one loop and queue further loops for simplification.
+/// Simplify one loop and queue further loops for simplification.
static bool simplifyOneLoop(Loop *L, SmallVectorImpl<Loop *> &Worklist,
DominatorTree *DT, LoopInfo *LI,
ScalarEvolution *SE, AssumptionCache *AC,
}
}
-/// \brief Update the branch weights of the latch of a peeled-off loop
+/// Update the branch weights of the latch of a peeled-off loop
/// iteration.
/// This sets the branch weights for the latch of the recently peeled off loop
/// iteration correctly.
}
}
-/// \brief Clones the body of the loop L, putting it between \p InsertTop and \p
+/// Clones the body of the loop L, putting it between \p InsertTop and \p
/// InsertBot.
/// \param IterNumber The serial number of the iteration currently being
/// peeled off.
LVMap[KV.first] = KV.second;
}
-/// \brief Peel off the first \p PeelCount iterations of loop \p L.
+/// Peel off the first \p PeelCount iterations of loop \p L.
///
/// Note that this does not peel them off as a single straight-line block.
/// Rather, each iteration is peeled off separately, and needs to check the
return Changed;
}
-/// \brief Returns the instructions that use values defined in the loop.
+/// Returns the instructions that use values defined in the loop.
SmallVector<Instruction *, 8> llvm::findDefsUsedOutsideOfLoop(Loop *L) {
SmallVector<Instruction *, 8> UsedOutside;
INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass)
}
-/// \brief Find string metadata for loop
+/// Find string metadata for loop
///
/// If it has a value (e.g. {"llvm.distribute", 1} return the value as an
/// operand or null otherwise. If the string metadata is not found return
return (FalseVal + (TrueVal / 2)) / TrueVal;
}
-/// \brief Adds a 'fast' flag to floating point operations.
+/// Adds a 'fast' flag to floating point operations.
static Value *addFastMathFlag(Value *V) {
if (isa<FPMathOperator>(V)) {
FastMathFlags Flags;
}
namespace {
-/// \brief Also expose this is a pass. Currently this is only used for
+/// Also expose this is a pass. Currently this is only used for
/// unit-testing. It adds all memchecks necessary to remove all may-aliasing
/// array accesses from the loop.
class LoopVersioningPass : public FunctionPass {
return O << "]";
}
-/// \brief Update the first occurrence of the "switch statement" BB in the PHI
+/// Update the first occurrence of the "switch statement" BB in the PHI
/// node with the "new" BB. The other occurrences will:
///
/// 1) Be updated by subsequent calls to this function. Switch statements may
return PreservedAnalyses::all();
}
-/// \brief An assembly annotator class to print PredicateInfo information in
+/// An assembly annotator class to print PredicateInfo information in
/// comments.
class PredicateInfoAnnotatedWriter : public AssemblyAnnotationWriter {
friend class PredicateInfo;
LocationVector Locations;
};
-/// \brief This assigns and keeps a per-bb relative ordering of load/store
+/// This assigns and keeps a per-bb relative ordering of load/store
/// instructions in the block that directly load or store an alloca.
///
/// This functionality is important because it avoids scanning large basic
/// blocks multiple times when promoting many allocas in the same block.
class LargeBlockInfo {
- /// \brief For each instruction that we track, keep the index of the
+ /// For each instruction that we track, keep the index of the
/// instruction.
///
/// The index starts out as the number of the instruction from the start of
/// Reverse mapping of Allocas.
DenseMap<AllocaInst *, unsigned> AllocaLookup;
- /// \brief The PhiNodes we're adding.
+ /// The PhiNodes we're adding.
///
/// That map is used to simplify some Phi nodes as we iterate over it, so
/// it should have deterministic iterators. We could use a MapVector, but
}
}
-/// \brief Rewrite as many loads as possible given a single store.
+/// Rewrite as many loads as possible given a single store.
///
/// When there is only a single store, we can use the domtree to trivially
/// replace all of the dominated loads with the stored value. Do so, and return
NewPhiNodes.clear();
}
-/// \brief Determine which blocks the value is live in.
+/// Determine which blocks the value is live in.
///
/// These are blocks which lead to uses. Knowing this allows us to avoid
/// inserting PHI nodes into blocks which don't lead to uses (thus, the
}
}
-/// \brief Queue a phi-node to be added to a basic-block for a specific Alloca.
+/// Queue a phi-node to be added to a basic-block for a specific Alloca.
///
/// Returns true if there wasn't already a phi-node for that variable
bool PromoteMem2Reg::QueuePhiNode(BasicBlock *BB, unsigned AllocaNo,
PN->setDebugLoc(DL);
}
-/// \brief Recursively traverse the CFG of the function, renaming loads and
+/// Recursively traverse the CFG of the function, renaming loads and
/// stores to the allocas which we are promoting.
///
/// IncomingVals indicates what value each Alloca contains on exit from the
return Changed;
}
-/// \brief Determine if we can hoist sink a sole store instruction out of a
+/// Determine if we can hoist sink a sole store instruction out of a
/// conditional block.
///
/// We are looking for code like the following:
return nullptr;
}
-/// \brief Speculate a conditional basic block flattening the CFG.
+/// Speculate a conditional basic block flattening the CFG.
///
/// Note that this is a very risky transform currently. Speculating
/// instructions like this is most often not desirable. Instead, there is an MI
return true;
}
-/// \brief Check whether it is safe to if-convert this phi node.
+/// Check whether it is safe to if-convert this phi node.
///
/// Phi nodes with constant expressions that can trap are not safe to if
/// convert.
return Ty1;
}
-/// \brief Check that the instruction has outside loop users and is not an
+/// Check that the instruction has outside loop users and is not an
/// identified reduction variable.
static bool hasOutsideLoopUser(const Loop *TheLoop, Instruction *Inst,
SmallPtrSetImpl<Value *> &AllowedExit) {
public:
VPBuilder() {}
- /// \brief This specifies that created VPInstructions should be appended to
+ /// This specifies that created VPInstructions should be appended to
/// the end of the specified block.
void setInsertPoint(VPBasicBlock *TheBB) {
assert(TheBB && "Attempting to set a null insert point");
void vectorizeMemoryInstruction(Instruction *Instr,
VectorParts *BlockInMask = nullptr);
- /// \brief Set the debug location in the builder using the debug location in
+ /// Set the debug location in the builder using the debug location in
/// the instruction.
void setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr);
/// vectorizing this phi node.
void fixReduction(PHINode *Phi);
- /// \brief The Loop exit block may have single value PHI nodes with some
+ /// The Loop exit block may have single value PHI nodes with some
/// incoming value. While vectorizing we only handled real values
/// that were defined inside the loop and we should have one value for
/// each predecessor of its parent basic block. See PR14725.
/// loop.
void addMetadata(Instruction *To, Instruction *From);
- /// \brief Similar to the previous function but it adds the metadata to a
+ /// Similar to the previous function but it adds the metadata to a
/// vector of instructions.
void addMetadata(ArrayRef<Value *> To, Instruction *From);
/// Interface to emit optimization remarks.
OptimizationRemarkEmitter *ORE;
- /// \brief LoopVersioning. It's only set up (non-null) if memchecks were
+ /// LoopVersioning. It's only set up (non-null) if memchecks were
/// used.
///
/// This is currently only used to add no-alias metadata based on the
} // end namespace llvm
-/// \brief Look for a meaningful debug location on the instruction or it's
+/// Look for a meaningful debug location on the instruction or it's
/// operands.
static Instruction *getDebugLocFromInstOrOperands(Instruction *I) {
if (!I)
namespace llvm {
-/// \brief The group of interleaved loads/stores sharing the same stride and
+/// The group of interleaved loads/stores sharing the same stride and
/// close to each other.
///
/// Each member in this group has an index starting from 0, and the largest
unsigned getAlignment() const { return Align; }
unsigned getNumMembers() const { return Members.size(); }
- /// \brief Try to insert a new member \p Instr with index \p Index and
+ /// Try to insert a new member \p Instr with index \p Index and
/// alignment \p NewAlign. The index is related to the leader and it could be
/// negative if it is the new leader.
///
return true;
}
- /// \brief Get the member with the given index \p Index
+ /// Get the member with the given index \p Index
///
/// \returns nullptr if contains no such member.
Instruction *getMember(unsigned Index) const {
return Members.find(Key)->second;
}
- /// \brief Get the index for the given member. Unlike the key in the member
+ /// Get the index for the given member. Unlike the key in the member
/// map, the index starts from 0.
unsigned getIndex(Instruction *Instr) const {
for (auto I : Members)
namespace {
-/// \brief Drive the analysis of interleaved memory accesses in the loop.
+/// Drive the analysis of interleaved memory accesses in the loop.
///
/// Use this class to analyze interleaved accesses only when we can vectorize
/// a loop. Otherwise it's meaningless to do analysis as the vectorization
delete Ptr;
}
- /// \brief Analyze the interleaved accesses and collect them in interleave
+ /// Analyze the interleaved accesses and collect them in interleave
/// groups. Substitute symbolic strides using \p Strides.
void analyzeInterleaving();
- /// \brief Check if \p Instr belongs to any interleave group.
+ /// Check if \p Instr belongs to any interleave group.
bool isInterleaved(Instruction *Instr) const {
return InterleaveGroupMap.count(Instr);
}
- /// \brief Get the interleave group that \p Instr belongs to.
+ /// Get the interleave group that \p Instr belongs to.
///
/// \returns nullptr if doesn't have such group.
InterleaveGroup *getInterleaveGroup(Instruction *Instr) const {
return nullptr;
}
- /// \brief Returns true if an interleaved group that may access memory
+ /// Returns true if an interleaved group that may access memory
/// out-of-bounds requires a scalar epilogue iteration for correctness.
bool requiresScalarEpilogue() const { return RequiresScalarEpilogue; }
/// access to a set of dependent sink accesses.
DenseMap<Instruction *, SmallPtrSet<Instruction *, 2>> Dependences;
- /// \brief The descriptor for a strided memory access.
+ /// The descriptor for a strided memory access.
struct StrideDescriptor {
StrideDescriptor() = default;
StrideDescriptor(int64_t Stride, const SCEV *Scev, uint64_t Size,
unsigned Align = 0;
};
- /// \brief A type for holding instructions and their stride descriptors.
+ /// A type for holding instructions and their stride descriptors.
using StrideEntry = std::pair<Instruction *, StrideDescriptor>;
- /// \brief Create a new interleave group with the given instruction \p Instr,
+ /// Create a new interleave group with the given instruction \p Instr,
/// stride \p Stride and alignment \p Align.
///
/// \returns the newly created interleave group.
return InterleaveGroupMap[Instr];
}
- /// \brief Release the group and remove all the relationships.
+ /// Release the group and remove all the relationships.
void releaseGroup(InterleaveGroup *Group) {
for (unsigned i = 0; i < Group->getFactor(); i++)
if (Instruction *Member = Group->getMember(i))
delete Group;
}
- /// \brief Collect all the accesses with a constant stride in program order.
+ /// Collect all the accesses with a constant stride in program order.
void collectConstStrideAccesses(
MapVector<Instruction *, StrideDescriptor> &AccessStrideInfo,
const ValueToValueMap &Strides);
- /// \brief Returns true if \p Stride is allowed in an interleaved group.
+ /// Returns true if \p Stride is allowed in an interleaved group.
static bool isStrided(int Stride) {
unsigned Factor = std::abs(Stride);
return Factor >= 2 && Factor <= MaxInterleaveGroupFactor;
}
- /// \brief Returns true if \p BB is a predicated block.
+ /// Returns true if \p BB is a predicated block.
bool isPredicated(BasicBlock *BB) const {
return LoopAccessInfo::blockNeedsPredication(BB, TheLoop, DT);
}
- /// \brief Returns true if LoopAccessInfo can be used for dependence queries.
+ /// Returns true if LoopAccessInfo can be used for dependence queries.
bool areDependencesValid() const {
return LAI && LAI->getDepChecker().getDependences();
}
- /// \brief Returns true if memory accesses \p A and \p B can be reordered, if
+ /// Returns true if memory accesses \p A and \p B can be reordered, if
/// necessary, when constructing interleaved groups.
///
/// \p A must precede \p B in program order. We return false if reordering is
return !Dependences.count(Src) || !Dependences.lookup(Src).count(Sink);
}
- /// \brief Collect the dependences from LoopAccessInfo.
+ /// Collect the dependences from LoopAccessInfo.
///
/// We process the dependences once during the interleaved access analysis to
/// enable constant-time dependence queries.
/// avoid redundant calculations.
void setCostBasedWideningDecision(unsigned VF);
- /// \brief A struct that represents some properties of the register usage
+ /// A struct that represents some properties of the register usage
/// of a loop.
struct RegisterUsage {
/// Holds the number of loop invariant values that are used in the loop.
/// access that can be widened.
bool memoryInstructionCanBeWidened(Instruction *I, unsigned VF = 1);
- /// \brief Check if \p Instr belongs to any interleaved access group.
+ /// Check if \p Instr belongs to any interleaved access group.
bool isAccessInterleaved(Instruction *Instr) {
return InterleaveInfo.isInterleaved(Instr);
}
- /// \brief Get the interleaved access group that \p Instr belongs to.
+ /// Get the interleaved access group that \p Instr belongs to.
const InterleaveGroup *getInterleavedAccessGroup(Instruction *Instr) {
return InterleaveInfo.getInterleaveGroup(Instr);
}
- /// \brief Returns true if an interleaved group requires a scalar iteration
+ /// Returns true if an interleaved group requires a scalar iteration
/// to handle accesses with gaps.
bool requiresScalarEpilogue() const {
return InterleaveInfo.requiresScalarEpilogue();
} // end anonymous namespace
-///\brief Perform cse of induction variable instructions.
+///Perform cse of induction variable instructions.
static void cse(BasicBlock *BB) {
// Perform simple cse.
SmallDenseMap<Instruction *, Instruction *, 4, CSEDenseMapInfo> CSEMap;
}
}
-/// \brief Estimate the overhead of scalarizing an instruction. This is a
+/// Estimate the overhead of scalarizing an instruction. This is a
/// convenience wrapper for the type-based getScalarizationOverhead API.
static unsigned getScalarizationOverhead(Instruction *I, unsigned VF,
const TargetTransformInfo &TTI) {
return Cost;
}
-/// \brief Gets Address Access SCEV after verifying that the access pattern
+/// Gets Address Access SCEV after verifying that the access pattern
/// is loop invariant except the induction variable dependence.
///
/// This SCEV can be sent to the Target in order to estimate the address
/// regions to be handled.
static const int MinScheduleRegionSize = 16;
-/// \brief Predicate for the element types that the SLP vectorizer supports.
+/// Predicate for the element types that the SLP vectorizer supports.
///
/// The most important thing to filter here are types which are invalid in LLVM
/// vectors. We also filter target specific types which have absolutely no
MinVecRegSize = TTI->getMinVectorRegisterBitWidth();
}
- /// \brief Vectorize the tree that starts with the elements in \p VL.
+ /// Vectorize the tree that starts with the elements in \p VL.
/// Returns the vectorized root.
Value *vectorizeTree();
unsigned getTreeSize() const { return VectorizableTree.size(); }
- /// \brief Perform LICM and CSE on the newly generated gather sequences.
+ /// Perform LICM and CSE on the newly generated gather sequences.
void optimizeGatherSequence();
/// \returns The best order of instructions for vectorization.
return MinVecRegSize;
}
- /// \brief Check if ArrayType or StructType is isomorphic to some VectorType.
+ /// Check if ArrayType or StructType is isomorphic to some VectorType.
///
/// \returns number of elements in vector if isomorphism exists, 0 otherwise.
unsigned canMapToVector(Type *T, const DataLayout &DL) const;
/// roots. This method calculates the cost of extracting the values.
int getGatherCost(ArrayRef<Value *> VL);
- /// \brief Set the Builder insert point to one after the last instruction in
+ /// Set the Builder insert point to one after the last instruction in
/// the bundle
void setInsertPointAfterBundle(ArrayRef<Value *> VL, Value *OpValue);
/// NodeRef has to be a pointer per the GraphWriter.
using NodeRef = TreeEntry *;
- /// \brief Add the VectorizableTree to the index iterator to be able to return
+ /// Add the VectorizableTree to the index iterator to be able to return
/// TreeEntry pointers.
struct ChildIteratorType
: public iterator_adaptor_base<ChildIteratorType,
return Changed;
}
-/// \brief Check that the Values in the slice in VL array are still existent in
+/// Check that the Values in the slice in VL array are still existent in
/// the WeakTrackingVH array.
/// Vectorization of part of the VL array may cause later values in the VL array
/// to become invalid. We track when this has happened in the WeakTrackingVH
return false;
}
-/// \brief Generate a shuffle mask to be used in a reduction tree.
+/// Generate a shuffle mask to be used in a reduction tree.
///
/// \param VecLen The length of the vector to be reduced.
/// \param NumEltsToRdx The number of elements that should be reduced in the
public:
HorizontalReduction() = default;
- /// \brief Try to find a reduction tree.
+ /// Try to find a reduction tree.
bool matchAssociativeReduction(PHINode *Phi, Instruction *B) {
assert((!Phi || is_contained(Phi->operands(), B)) &&
"Thi phi needs to use the binary operator");
return true;
}
- /// \brief Attempt to vectorize the tree found by
+ /// Attempt to vectorize the tree found by
/// matchAssociativeReduction.
bool tryToReduce(BoUpSLP &V, TargetTransformInfo *TTI) {
if (ReducedVals.empty())
}
private:
- /// \brief Calculate the cost of a reduction.
+ /// Calculate the cost of a reduction.
int getReductionCost(TargetTransformInfo *TTI, Value *FirstReducedVal,
unsigned ReduxWidth) {
Type *ScalarTy = FirstReducedVal->getType();
return VecReduxCost - ScalarReduxCost;
}
- /// \brief Emit a horizontal reduction of the vectorized value.
+ /// Emit a horizontal reduction of the vectorized value.
Value *emitReduction(Value *VectorizedValue, IRBuilder<> &Builder,
unsigned ReduxWidth, const TargetTransformInfo *TTI) {
assert(VectorizedValue && "Need to have a vectorized tree node");
} // end anonymous namespace
-/// \brief Recognize construction of vectors like
+/// Recognize construction of vectors like
/// %ra = insertelement <4 x float> undef, float %s0, i32 0
/// %rb = insertelement <4 x float> %ra, float %s1, i32 1
/// %rc = insertelement <4 x float> %rb, float %s2, i32 2
return true;
}
-/// \brief Like findBuildVector, but looks for construction of aggregate.
+/// Like findBuildVector, but looks for construction of aggregate.
///
/// \return true if it matches.
static bool findBuildAggregate(InsertValueInst *IV,
return V->getType() < V2->getType();
}
-/// \brief Try and get a reduction value from a phi node.
+/// Try and get a reduction value from a phi node.
///
/// Given a phi node \p P in a block \p ParentBB, consider possible reductions
/// if they come from either \p ParentBB or a containing loop latch.
inline const VPRecipeBase &back() const { return Recipes.back(); }
inline VPRecipeBase &back() { return Recipes.back(); }
- /// \brief Returns a pointer to a member of the recipe list.
+ /// Returns a pointer to a member of the recipe list.
static RecipeListTy VPBasicBlock::*getSublistAccess(VPRecipeBase *) {
return &VPBasicBlock::Recipes;
}
LinkModeStatic = 2,
};
-/// \brief Traverse a single component adding to the topological ordering in
+/// Traverse a single component adding to the topological ordering in
/// \arg RequiredLibs.
///
/// \param Name - The component to traverse.
}
}
-/// \brief Compute the list of required libraries for a given list of
+/// Compute the list of required libraries for a given list of
/// components, in an order suitable for passing to a linker (that is, libraries
/// appear prior to their dependencies).
///
exit(1);
}
-/// \brief Compute the path to the main executable.
+/// Compute the path to the main executable.
std::string GetExecutablePath(const char *Argv0) {
// This just needs to be some symbol in the binary; C++ doesn't
// allow taking the address of ::main however.
return llvm::sys::fs::getMainExecutable(Argv0, P);
}
-/// \brief Expand the semi-colon delimited LLVM_DYLIB_COMPONENTS into
+/// Expand the semi-colon delimited LLVM_DYLIB_COMPONENTS into
/// the full list of components.
std::vector<std::string> GetAllDyLibComponents(const bool IsInDevelopmentTree,
const bool GetComponentNames,
raw_ostream &OS);
namespace {
-/// \brief The implementation of the coverage tool.
+/// The implementation of the coverage tool.
class CodeCoverageTool {
public:
enum Command {
- /// \brief The show command.
+ /// The show command.
Show,
- /// \brief The report command.
+ /// The report command.
Report,
- /// \brief The export command.
+ /// The export command.
Export
};
int run(Command Cmd, int argc, const char **argv);
private:
- /// \brief Print the error message to the error output stream.
+ /// Print the error message to the error output stream.
void error(const Twine &Message, StringRef Whence = "");
- /// \brief Print the warning message to the error output stream.
+ /// Print the warning message to the error output stream.
void warning(const Twine &Message, StringRef Whence = "");
- /// \brief Convert \p Path into an absolute path and append it to the list
+ /// Convert \p Path into an absolute path and append it to the list
/// of collected paths.
void addCollectedPath(const std::string &Path);
- /// \brief If \p Path is a regular file, collect the path. If it's a
+ /// If \p Path is a regular file, collect the path. If it's a
/// directory, recursively collect all of the paths within the directory.
void collectPaths(const std::string &Path);
- /// \brief Return a memory buffer for the given source file.
+ /// Return a memory buffer for the given source file.
ErrorOr<const MemoryBuffer &> getSourceFile(StringRef SourceFile);
- /// \brief Create source views for the expansions of the view.
+ /// Create source views for the expansions of the view.
void attachExpansionSubViews(SourceCoverageView &View,
ArrayRef<ExpansionRecord> Expansions,
const CoverageMapping &Coverage);
- /// \brief Create the source view of a particular function.
+ /// Create the source view of a particular function.
std::unique_ptr<SourceCoverageView>
createFunctionView(const FunctionRecord &Function,
const CoverageMapping &Coverage);
- /// \brief Create the main source view of a particular source file.
+ /// Create the main source view of a particular source file.
std::unique_ptr<SourceCoverageView>
createSourceFileView(StringRef SourceFile, const CoverageMapping &Coverage);
- /// \brief Load the coverage mapping data. Return nullptr if an error occurred.
+ /// Load the coverage mapping data. Return nullptr if an error occurred.
std::unique_ptr<CoverageMapping> load();
- /// \brief Create a mapping from files in the Coverage data to local copies
+ /// Create a mapping from files in the Coverage data to local copies
/// (path-equivalence).
void remapPathNames(const CoverageMapping &Coverage);
- /// \brief Remove input source files which aren't mapped by \p Coverage.
+ /// Remove input source files which aren't mapped by \p Coverage.
void removeUnmappedInputs(const CoverageMapping &Coverage);
- /// \brief If a demangler is available, demangle all symbol names.
+ /// If a demangler is available, demangle all symbol names.
void demangleSymbols(const CoverageMapping &Coverage);
- /// \brief Write out a source file view to the filesystem.
+ /// Write out a source file view to the filesystem.
void writeSourceFileView(StringRef SourceFile, CoverageMapping *Coverage,
CoveragePrinter *Printer, bool ShowFilenames);
namespace llvm {
-/// \brief Exports the code coverage information.
+/// Exports the code coverage information.
class CoverageExporter {
protected:
- /// \brief The full CoverageMapping object to export.
+ /// The full CoverageMapping object to export.
const coverage::CoverageMapping &Coverage;
- /// \brief The options passed to the tool.
+ /// The options passed to the tool.
const CoverageViewOptions &Options;
- /// \brief Output stream to print JSON to.
+ /// Output stream to print JSON to.
raw_ostream &OS;
CoverageExporter(const coverage::CoverageMapping &CoverageMapping,
public:
virtual ~CoverageExporter(){};
- /// \brief Render the CoverageMapping object.
+ /// Render the CoverageMapping object.
virtual void renderRoot(const CoverageFilters &IgnoreFilenameFilters) = 0;
- /// \brief Render the CoverageMapping object for specified source files.
+ /// Render the CoverageMapping object for specified source files.
virtual void renderRoot(const std::vector<std::string> &SourceFiles) = 0;
};
#include "CoverageExporterJson.h"
#include "CoverageReport.h"
-/// \brief The semantic version combined as a string.
+/// The semantic version combined as a string.
#define LLVM_COVERAGE_EXPORT_JSON_STR "2.0.0"
-/// \brief Unique type identifier for JSON coverage export.
+/// Unique type identifier for JSON coverage export.
#define LLVM_COVERAGE_EXPORT_JSON_TYPE_STR "llvm.coverage.json.export"
using namespace llvm;
namespace llvm {
class CoverageExporterJson : public CoverageExporter {
- /// \brief States that the JSON rendering machine can be in.
+ /// States that the JSON rendering machine can be in.
enum JsonState { None, NonEmptyElement, EmptyElement };
- /// \brief Tracks state of the JSON output.
+ /// Tracks state of the JSON output.
std::stack<JsonState> State;
- /// \brief Emit a serialized scalar.
+ /// Emit a serialized scalar.
void emitSerialized(const int64_t Value);
- /// \brief Emit a serialized string.
+ /// Emit a serialized string.
void emitSerialized(const std::string &Value);
- /// \brief Emit a comma if there is a previous element to delimit.
+ /// Emit a comma if there is a previous element to delimit.
void emitComma();
- /// \brief Emit a starting dictionary/object character.
+ /// Emit a starting dictionary/object character.
void emitDictStart();
- /// \brief Emit a dictionary/object key but no value.
+ /// Emit a dictionary/object key but no value.
void emitDictKey(const std::string &Key);
- /// \brief Emit a dictionary/object key/value pair.
+ /// Emit a dictionary/object key/value pair.
template <typename V>
void emitDictElement(const std::string &Key, const V &Value) {
emitComma();
emitSerialized(Value);
}
- /// \brief Emit a closing dictionary/object character.
+ /// Emit a closing dictionary/object character.
void emitDictEnd();
- /// \brief Emit a starting array character.
+ /// Emit a starting array character.
void emitArrayStart();
- /// \brief Emit an array element.
+ /// Emit an array element.
template <typename V> void emitArrayElement(const V &Value) {
emitComma();
emitSerialized(Value);
}
- /// \brief emit a closing array character.
+ /// emit a closing array character.
void emitArrayEnd();
- /// \brief Render an array of all the given functions.
+ /// Render an array of all the given functions.
void renderFunctions(
const iterator_range<coverage::FunctionRecordIterator> &Functions);
- /// \brief Render an array of all the source files, also pass back a Summary.
+ /// Render an array of all the source files, also pass back a Summary.
void renderFiles(ArrayRef<std::string> SourceFiles,
ArrayRef<FileCoverageSummary> FileReports);
- /// \brief Render a single file.
+ /// Render a single file.
void renderFile(const std::string &Filename,
const FileCoverageSummary &FileReport);
- /// \brief Render summary for a single file.
+ /// Render summary for a single file.
void renderFileCoverage(const coverage::CoverageData &FileCoverage,
const FileCoverageSummary &FileReport);
- /// \brief Render a CoverageSegment.
+ /// Render a CoverageSegment.
void renderSegment(const coverage::CoverageSegment &Segment);
- /// \brief Render an ExpansionRecord.
+ /// Render an ExpansionRecord.
void renderExpansion(const coverage::ExpansionRecord &Expansion);
- /// \brief Render a list of CountedRegions.
+ /// Render a list of CountedRegions.
void renderRegions(ArrayRef<coverage::CountedRegion> Regions);
- /// \brief Render a single CountedRegion.
+ /// Render a single CountedRegion.
void renderRegion(const coverage::CountedRegion &Region);
- /// \brief Render a FileCoverageSummary.
+ /// Render a FileCoverageSummary.
void renderSummary(const FileCoverageSummary &Summary);
public:
CoverageExporterJson(const coverage::CoverageMapping &CoverageMapping,
const CoverageViewOptions &Options, raw_ostream &OS);
- /// \brief Render the CoverageMapping object.
+ /// Render the CoverageMapping object.
void renderRoot(const CoverageFilters &IgnoreFilenameFilters) override;
- /// \brief Render the CoverageMapping object for specified source files.
+ /// Render the CoverageMapping object for specified source files.
void renderRoot(const std::vector<std::string> &SourceFiles) override;
};
namespace llvm {
-/// \brief Matches specific functions that pass the requirement of this filter.
+/// Matches specific functions that pass the requirement of this filter.
class CoverageFilter {
public:
virtual ~CoverageFilter() {}
- /// \brief Return true if the function passes the requirements of this filter.
+ /// Return true if the function passes the requirements of this filter.
virtual bool matches(const coverage::CoverageMapping &CM,
const coverage::FunctionRecord &Function) const {
return true;
}
- /// \brief Return true if the filename passes the requirements of this filter.
+ /// Return true if the filename passes the requirements of this filter.
virtual bool matchesFilename(StringRef Filename) const {
return true;
}
};
-/// \brief Matches functions that contain a specific string in their name.
+/// Matches functions that contain a specific string in their name.
class NameCoverageFilter : public CoverageFilter {
StringRef Name;
const coverage::FunctionRecord &Function) const override;
};
-/// \brief Matches functions whose name matches a certain regular expression.
+/// Matches functions whose name matches a certain regular expression.
class NameRegexCoverageFilter : public CoverageFilter {
StringRef Regex;
bool matchesFilename(StringRef Filename) const override;
};
-/// \brief Matches functions whose name appears in a SpecialCaseList in the
+/// Matches functions whose name appears in a SpecialCaseList in the
/// whitelist_fun section.
class NameWhitelistCoverageFilter : public CoverageFilter {
const SpecialCaseList &Whitelist;
const coverage::FunctionRecord &Function) const override;
};
-/// \brief Matches numbers that pass a certain threshold.
+/// Matches numbers that pass a certain threshold.
template <typename T> class StatisticThresholdFilter {
public:
enum Operation { LessThan, GreaterThan };
StatisticThresholdFilter(Operation Op, T Threshold)
: Op(Op), Threshold(Threshold) {}
- /// \brief Return true if the given number is less than
+ /// Return true if the given number is less than
/// or greater than the certain threshold.
bool PassesThreshold(T Value) const {
switch (Op) {
}
};
-/// \brief Matches functions whose region coverage percentage
+/// Matches functions whose region coverage percentage
/// is above/below a certain percentage.
class RegionCoverageFilter : public CoverageFilter,
public StatisticThresholdFilter<double> {
const coverage::FunctionRecord &Function) const override;
};
-/// \brief Matches functions whose line coverage percentage
+/// Matches functions whose line coverage percentage
/// is above/below a certain percentage.
class LineCoverageFilter : public CoverageFilter,
public StatisticThresholdFilter<double> {
const coverage::FunctionRecord &Function) const override;
};
-/// \brief A collection of filters.
+/// A collection of filters.
/// Matches functions that match any filters contained
/// in an instance of this class.
class CoverageFilters : public CoverageFilter {
std::vector<std::unique_ptr<CoverageFilter>> Filters;
public:
- /// \brief Append a filter to this collection.
+ /// Append a filter to this collection.
void push_back(std::unique_ptr<CoverageFilter> Filter);
bool empty() const { return Filters.empty(); }
bool matchesFilename(StringRef Filename) const override;
};
-/// \brief A collection of filters.
+/// A collection of filters.
/// Matches functions that match all of the filters contained
/// in an instance of this class.
class CoverageFiltersMatchAll : public CoverageFilters {
namespace {
-/// \brief Helper struct which prints trimmed and aligned columns.
+/// Helper struct which prints trimmed and aligned columns.
struct Column {
enum TrimKind { NoTrim, WidthTrim, RightTrim };
16, 16, 10, 12, 18, 10};
size_t FunctionReportColumns[] = {25, 10, 8, 8, 10, 8, 8};
-/// \brief Adjust column widths to fit long file paths and function names.
+/// Adjust column widths to fit long file paths and function names.
void adjustColumnWidths(ArrayRef<StringRef> Files,
ArrayRef<StringRef> Functions) {
for (StringRef Filename : Files)
std::max(FunctionReportColumns[0], Funcname.size());
}
-/// \brief Prints a horizontal divider long enough to cover the given column
+/// Prints a horizontal divider long enough to cover the given column
/// widths.
void renderDivider(ArrayRef<size_t> ColumnWidths, raw_ostream &OS) {
size_t Length = std::accumulate(ColumnWidths.begin(), ColumnWidths.end(), 0);
OS << '-';
}
-/// \brief Return the color which correponds to the coverage percentage of a
+/// Return the color which correponds to the coverage percentage of a
/// certain metric.
template <typename T>
raw_ostream::Colors determineCoveragePercentageColor(const T &Info) {
: raw_ostream::RED;
}
-/// \brief Get the number of redundant path components in each path in \p Paths.
+/// Get the number of redundant path components in each path in \p Paths.
unsigned getNumRedundantPathComponents(ArrayRef<std::string> Paths) {
// To start, set the number of redundant path components to the maximum
// possible value.
return NumRedundant;
}
-/// \brief Determine the length of the longest redundant prefix of the paths in
+/// Determine the length of the longest redundant prefix of the paths in
/// \p Paths.
unsigned getRedundantPrefixLen(ArrayRef<std::string> Paths) {
// If there's at most one path, no path components are redundant.
namespace llvm {
-/// \brief Displays the code coverage report.
+/// Displays the code coverage report.
class CoverageReport {
const CoverageViewOptions &Options;
const coverage::CoverageMapping &Coverage;
namespace llvm {
-/// \brief Provides information about region coverage for a function/file.
+/// Provides information about region coverage for a function/file.
class RegionCoverageInfo {
- /// \brief The number of regions that were executed at least once.
+ /// The number of regions that were executed at least once.
size_t Covered;
- /// \brief The total number of regions in a function/file.
+ /// The total number of regions in a function/file.
size_t NumRegions;
public:
}
};
-/// \brief Provides information about line coverage for a function/file.
+/// Provides information about line coverage for a function/file.
class LineCoverageInfo {
- /// \brief The number of lines that were executed at least once.
+ /// The number of lines that were executed at least once.
size_t Covered;
- /// \brief The total number of lines in a function/file.
+ /// The total number of lines in a function/file.
size_t NumLines;
public:
}
};
-/// \brief Provides information about function coverage for a file.
+/// Provides information about function coverage for a file.
class FunctionCoverageInfo {
- /// \brief The number of functions that were executed.
+ /// The number of functions that were executed.
size_t Executed;
- /// \brief The total number of functions in this file.
+ /// The total number of functions in this file.
size_t NumFunctions;
public:
}
};
-/// \brief A summary of function's code coverage.
+/// A summary of function's code coverage.
struct FunctionCoverageSummary {
std::string Name;
uint64_t ExecutionCount;
: Name(Name), ExecutionCount(ExecutionCount),
RegionCoverage(RegionCoverage), LineCoverage(LineCoverage) {}
- /// \brief Compute the code coverage summary for the given function coverage
+ /// Compute the code coverage summary for the given function coverage
/// mapping record.
static FunctionCoverageSummary get(const coverage::CoverageMapping &CM,
const coverage::FunctionRecord &Function);
ArrayRef<FunctionCoverageSummary> Summaries);
};
-/// \brief A summary of file's code coverage.
+/// A summary of file's code coverage.
struct FileCoverageSummary {
StringRef Name;
RegionCoverageInfo RegionCoverage;
}
};
-/// \brief A cache for demangled symbols.
+/// A cache for demangled symbols.
struct DemangleCache {
StringMap<std::string> DemangledNames;
- /// \brief Demangle \p Sym if possible. Otherwise, just return \p Sym.
+ /// Demangle \p Sym if possible. Otherwise, just return \p Sym.
StringRef demangle(StringRef Sym) const {
const auto DemangledName = DemangledNames.find(Sym);
if (DemangledName == DemangledNames.end())
namespace llvm {
-/// \brief The options for displaying the code coverage information.
+/// The options for displaying the code coverage information.
struct CoverageViewOptions {
enum class OutputFormat {
Text,
std::string CreatedTimeStr;
unsigned NumThreads;
- /// \brief Change the output's stream color if the colors are enabled.
+ /// Change the output's stream color if the colors are enabled.
ColoredRawOstream colored_ostream(raw_ostream &OS,
raw_ostream::Colors Color) const {
return llvm::colored_ostream(OS, Color, Colors);
}
- /// \brief Check if an output directory has been specified.
+ /// Check if an output directory has been specified.
bool hasOutputDirectory() const { return !ShowOutputDirectory.empty(); }
- /// \brief Check if a demangler has been specified.
+ /// Check if a demangler has been specified.
bool hasDemangler() const { return !DemanglerOpts.empty(); }
- /// \brief Check if a project title has been specified.
+ /// Check if a project title has been specified.
bool hasProjectTitle() const { return !ProjectTitle.empty(); }
- /// \brief Check if the created time of the profile data file is available.
+ /// Check if the created time of the profile data file is available.
bool hasCreatedTime() const { return !CreatedTimeStr.empty(); }
- /// \brief Get the LLVM version string.
+ /// Get the LLVM version string.
std::string getLLVMVersionString() const {
std::string VersionString = "Generated by llvm-cov -- llvm version ";
VersionString += LLVM_VERSION_STRING;
namespace llvm {
-/// \brief A helper class that resets the output stream's color if needed
+/// A helper class that resets the output stream's color if needed
/// when destroyed.
class ColoredRawOstream {
ColoredRawOstream(const ColoredRawOstream &OS) = delete;
return OS.OS << std::forward<T>(Value);
}
-/// \brief Change the color of the output stream if the `IsColorUsed` flag
+/// Change the color of the output stream if the `IsColorUsed` flag
/// is true. Returns an object that resets the color when destroyed.
inline ColoredRawOstream colored_ostream(raw_ostream &OS,
raw_ostream::Colors Color,
class CoverageFiltersMatchAll;
class SourceCoverageView;
-/// \brief A view that represents a macro or include expansion.
+/// A view that represents a macro or include expansion.
struct ExpansionView {
CounterMappingRegion Region;
std::unique_ptr<SourceCoverageView> View;
}
};
-/// \brief A view that represents a function instantiation.
+/// A view that represents a function instantiation.
struct InstantiationView {
StringRef FunctionName;
unsigned Line;
}
};
-/// \brief A file manager that handles format-aware file creation.
+/// A file manager that handles format-aware file creation.
class CoveragePrinter {
public:
struct StreamDestructor {
CoveragePrinter(const CoverageViewOptions &Opts) : Opts(Opts) {}
- /// \brief Return `OutputDir/ToplevelDir/Path.Extension`. If \p InToplevel is
+ /// Return `OutputDir/ToplevelDir/Path.Extension`. If \p InToplevel is
/// false, skip the ToplevelDir component. If \p Relative is false, skip the
/// OutputDir component.
std::string getOutputPath(StringRef Path, StringRef Extension,
bool InToplevel, bool Relative = true) const;
- /// \brief If directory output is enabled, create a file in that directory
+ /// If directory output is enabled, create a file in that directory
/// at the path given by getOutputPath(). Otherwise, return stdout.
Expected<OwnedStream> createOutputStream(StringRef Path, StringRef Extension,
bool InToplevel) const;
- /// \brief Return the sub-directory name for file coverage reports.
+ /// Return the sub-directory name for file coverage reports.
static StringRef getCoverageDir() { return "coverage"; }
public:
/// @name File Creation Interface
/// @{
- /// \brief Create a file to print a coverage view into.
+ /// Create a file to print a coverage view into.
virtual Expected<OwnedStream> createViewFile(StringRef Path,
bool InToplevel) = 0;
- /// \brief Close a file which has been used to print a coverage view.
+ /// Close a file which has been used to print a coverage view.
virtual void closeViewFile(OwnedStream OS) = 0;
- /// \brief Create an index which lists reports for the given source files.
+ /// Create an index which lists reports for the given source files.
virtual Error createIndexFile(ArrayRef<std::string> SourceFiles,
const CoverageMapping &Coverage,
const CoverageFiltersMatchAll &Filters) = 0;
/// @}
};
-/// \brief A code coverage view of a source file or function.
+/// A code coverage view of a source file or function.
///
/// A source coverage view and its nested sub-views form a file-oriented
/// representation of code coverage data. This view can be printed out by a
/// @name Rendering Interface
/// @{
- /// \brief Render a header for the view.
+ /// Render a header for the view.
virtual void renderViewHeader(raw_ostream &OS) = 0;
- /// \brief Render a footer for the view.
+ /// Render a footer for the view.
virtual void renderViewFooter(raw_ostream &OS) = 0;
- /// \brief Render the source name for the view.
+ /// Render the source name for the view.
virtual void renderSourceName(raw_ostream &OS, bool WholeFile) = 0;
- /// \brief Render the line prefix at the given \p ViewDepth.
+ /// Render the line prefix at the given \p ViewDepth.
virtual void renderLinePrefix(raw_ostream &OS, unsigned ViewDepth) = 0;
- /// \brief Render the line suffix at the given \p ViewDepth.
+ /// Render the line suffix at the given \p ViewDepth.
virtual void renderLineSuffix(raw_ostream &OS, unsigned ViewDepth) = 0;
- /// \brief Render a view divider at the given \p ViewDepth.
+ /// Render a view divider at the given \p ViewDepth.
virtual void renderViewDivider(raw_ostream &OS, unsigned ViewDepth) = 0;
- /// \brief Render a source line with highlighting.
+ /// Render a source line with highlighting.
virtual void renderLine(raw_ostream &OS, LineRef L,
const LineCoverageStats &LCS, unsigned ExpansionCol,
unsigned ViewDepth) = 0;
- /// \brief Render the line's execution count column.
+ /// Render the line's execution count column.
virtual void renderLineCoverageColumn(raw_ostream &OS,
const LineCoverageStats &Line) = 0;
- /// \brief Render the line number column.
+ /// Render the line number column.
virtual void renderLineNumberColumn(raw_ostream &OS, unsigned LineNo) = 0;
- /// \brief Render all the region's execution counts on a line.
+ /// Render all the region's execution counts on a line.
virtual void renderRegionMarkers(raw_ostream &OS,
const LineCoverageStats &Line,
unsigned ViewDepth) = 0;
- /// \brief Render the site of an expansion.
+ /// Render the site of an expansion.
virtual void renderExpansionSite(raw_ostream &OS, LineRef L,
const LineCoverageStats &LCS,
unsigned ExpansionCol,
unsigned ViewDepth) = 0;
- /// \brief Render an expansion view and any nested views.
+ /// Render an expansion view and any nested views.
virtual void renderExpansionView(raw_ostream &OS, ExpansionView &ESV,
unsigned ViewDepth) = 0;
- /// \brief Render an instantiation view and any nested views.
+ /// Render an instantiation view and any nested views.
virtual void renderInstantiationView(raw_ostream &OS, InstantiationView &ISV,
unsigned ViewDepth) = 0;
- /// \brief Render \p Title, a project title if one is available, and the
+ /// Render \p Title, a project title if one is available, and the
/// created time.
virtual void renderTitle(raw_ostream &OS, StringRef CellText) = 0;
- /// \brief Render the table header for a given source file.
+ /// Render the table header for a given source file.
virtual void renderTableHeader(raw_ostream &OS, unsigned FirstUncoveredLineNo,
unsigned IndentLevel) = 0;
/// @}
- /// \brief Format a count using engineering notation with 3 significant
+ /// Format a count using engineering notation with 3 significant
/// digits.
static std::string formatCount(uint64_t N);
- /// \brief Check if region marker output is expected for a line.
+ /// Check if region marker output is expected for a line.
bool shouldRenderRegionMarkers(const LineCoverageStats &LCS) const;
- /// \brief Check if there are any sub-views attached to this view.
+ /// Check if there are any sub-views attached to this view.
bool hasSubViews() const;
SourceCoverageView(StringRef SourceName, const MemoryBuffer &File,
virtual ~SourceCoverageView() {}
- /// \brief Return the source name formatted for the host OS.
+ /// Return the source name formatted for the host OS.
std::string getSourceName() const;
const CoverageViewOptions &getOptions() const { return Options; }
- /// \brief Add an expansion subview to this view.
+ /// Add an expansion subview to this view.
void addExpansion(const CounterMappingRegion &Region,
std::unique_ptr<SourceCoverageView> View);
- /// \brief Add a function instantiation subview to this view.
+ /// Add a function instantiation subview to this view.
void addInstantiation(StringRef FunctionName, unsigned Line,
std::unique_ptr<SourceCoverageView> View);
- /// \brief Print the code coverage information for a specific portion of a
+ /// Print the code coverage information for a specific portion of a
/// source file to the output stream.
void print(raw_ostream &OS, bool WholeFile, bool ShowSourceName,
bool ShowTitle, unsigned ViewDepth = 0);
struct FileCoverageSummary;
-/// \brief A coverage printer for html output.
+/// A coverage printer for html output.
class CoveragePrinterHTML : public CoveragePrinter {
public:
Expected<OwnedStream> createViewFile(StringRef Path,
const FileCoverageSummary &FCS) const;
};
-/// \brief A code coverage view which supports html-based rendering.
+/// A code coverage view which supports html-based rendering.
class SourceCoverageViewHTML : public SourceCoverageView {
void renderViewHeader(raw_ostream &OS) override;
static const unsigned LineCoverageColumnWidth = 7;
static const unsigned LineNumberColumnWidth = 5;
-/// \brief Get the width of the leading columns.
+/// Get the width of the leading columns.
unsigned getCombinedColumnWidth(const CoverageViewOptions &Opts) {
return (Opts.ShowLineStats ? LineCoverageColumnWidth + 1 : 0) +
(Opts.ShowLineNumbers ? LineNumberColumnWidth + 1 : 0);
}
-/// \brief The width of the line that is used to divide between the view and
+/// The width of the line that is used to divide between the view and
/// the subviews.
unsigned getDividerWidth(const CoverageViewOptions &Opts) {
return getCombinedColumnWidth(Opts) + 4;
using namespace coverage;
-/// \brief A coverage printer for text output.
+/// A coverage printer for text output.
class CoveragePrinterText : public CoveragePrinter {
public:
Expected<OwnedStream> createViewFile(StringRef Path,
: CoveragePrinter(Opts) {}
};
-/// \brief A code coverage view which supports text-based rendering.
+/// A code coverage view which supports text-based rendering.
class SourceCoverageViewText : public SourceCoverageView {
void renderViewHeader(raw_ostream &OS) override;
using namespace llvm;
-/// \brief The main entry point for the 'show' subcommand.
+/// The main entry point for the 'show' subcommand.
int showMain(int argc, const char *argv[]);
-/// \brief The main entry point for the 'report' subcommand.
+/// The main entry point for the 'report' subcommand.
int reportMain(int argc, const char *argv[]);
-/// \brief The main entry point for the 'export' subcommand.
+/// The main entry point for the 'export' subcommand.
int exportMain(int argc, const char *argv[]);
-/// \brief The main entry point for the 'convert-for-testing' subcommand.
+/// The main entry point for the 'convert-for-testing' subcommand.
int convertForTestingMain(int argc, const char *argv[]);
-/// \brief The main entry point for the gcov compatible coverage tool.
+/// The main entry point for the gcov compatible coverage tool.
int gcovMain(int argc, const char *argv[]);
-/// \brief Top level help.
+/// Top level help.
static int helpMain(int argc, const char *argv[]) {
errs() << "Usage: llvm-cov {export|gcov|report|show} [OPTION]...\n\n"
<< "Shows code coverage information.\n\n"
return 0;
}
-/// \brief Top level version information.
+/// Top level version information.
static int versionMain(int argc, const char *argv[]) {
cl::PrintVersionMessage();
return 0;
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a function that runs llvm-dwarfdump
+/// This file implements a function that runs llvm-dwarfdump
/// on a single input. This function is then linked into the Fuzzer library.
///
//===----------------------------------------------------------------------===//
}
}
-/// \brief List symbols in each IR file.
+/// List symbols in each IR file.
///
/// The main point here is to provide lit-testable coverage for the LTOModule
/// functionality that's exposed by the C API to list symbols. Moreover, this
class HWInstructionEvent;
class HWStallEvent;
-/// \brief An out of order backend for a specific subtarget.
+/// An out of order backend for a specific subtarget.
///
/// It emulates an out-of-order execution of instructions. Instructions are
/// fetched from a MCInst sequence managed by an object of class SourceMgr.
namespace mca {
-/// \brief A printer class that knows how to collects statistics on the
+/// A printer class that knows how to collects statistics on the
/// code analyzed by the llvm-mca tool.
///
/// This class knows how to print out the analysis information collected
namespace mca {
-/// \brief A region of assembly code.
+/// A region of assembly code.
///
/// It identifies a sequence of machine instructions.
class CodeRegion {
class Scheduler;
class Backend;
-/// \brief Manages hardware register files, and tracks data dependencies
+/// Manages hardware register files, and tracks data dependencies
/// between registers.
class RegisterFile {
const llvm::MCRegisterInfo &MRI;
#endif
};
-/// \brief tracks which instructions are in-flight (i.e. dispatched but not
+/// tracks which instructions are in-flight (i.e. dispatched but not
/// retired) in the OoO backend.
///
/// This class checks on every cycle if/which instructions can be retired.
#endif
};
-// \brief Implements the hardware dispatch logic.
+// Implements the hardware dispatch logic.
//
// This class is responsible for the dispatch stage, in which instructions are
// dispatched in groups to the Scheduler. An instruction can be dispatched if
class DispatchUnit;
-/// \brief A builder class that knows how to construct Instruction objects.
+/// A builder class that knows how to construct Instruction objects.
///
/// Every llvm-mca Instruction is described by an object of class InstrDesc.
/// An InstrDesc describes which registers are read/written by the instruction,
constexpr int UNKNOWN_CYCLES = -512;
-/// \brief A register write descriptor.
+/// A register write descriptor.
struct WriteDescriptor {
// Operand index. -1 if this is an implicit write.
int OpIndex;
bool IsOptionalDef;
};
-/// \brief A register read descriptor.
+/// A register read descriptor.
struct ReadDescriptor {
// A MCOperand index. This is used by the Dispatch logic to identify register
// reads. This field defaults to -1 if this is an implicit read.
bool HasReadAdvanceEntries;
};
-/// \brief Tracks uses of a register definition (e.g. register write).
+/// Tracks uses of a register definition (e.g. register write).
///
/// Each implicit/explicit register write is associated with an instance of
/// this class. A WriteState object tracks the dependent users of a
#endif
};
-/// \brief Tracks register operand latency in cycles.
+/// Tracks register operand latency in cycles.
///
/// A read may be dependent on more than one write. This occurs when some
/// writes only partially update the register associated to this read.
void setDependentWrites(unsigned Writes) { DependentWrites = Writes; }
};
-/// \brief A sequence of cycles.
+/// A sequence of cycles.
///
/// This class can be used as a building block to construct ranges of cycles.
class CycleSegment {
void setReserved() { Reserved = true; }
};
-/// \brief Helper used by class InstrDesc to describe how hardware resources
+/// Helper used by class InstrDesc to describe how hardware resources
/// are used.
///
/// This class describes how many resource units of a specific resource kind
void setReserved() { CS.setReserved(); }
};
-/// \brief An instruction descriptor
+/// An instruction descriptor
struct InstrDesc {
std::vector<WriteDescriptor> Writes; // Implicit writes are at the end.
std::vector<ReadDescriptor> Reads; // Implicit reads are at the end.
namespace mca {
-/// \brief A view that prints out generic instruction information.
+/// A view that prints out generic instruction information.
class InstructionInfoView : public View {
const llvm::MCSubtargetInfo &STI;
const llvm::MCInstrInfo &MCII;
struct InstrDesc;
-/// \brief A Load/Store Unit implementing a load and store queues.
+/// A Load/Store Unit implementing a load and store queues.
///
/// This class implements a load queue and a store queue to emulate the
/// out-of-order execution of memory operations.
RS_RESERVED
};
-/// \brief A descriptor for processor resources.
+/// A descriptor for processor resources.
///
/// Each object of class ResourceState is associated to a specific processor
/// resource. There is an instance of this class for every processor resource
#endif
};
-/// \brief A resource unit identifier.
+/// A resource unit identifier.
///
/// This is used to identify a specific processor resource unit using a pair
/// of indices where the 'first' index is a processor resource mask, and the
namespace mca {
-/// \brief A view that collects and prints a few performance numbers.
+/// A view that collects and prints a few performance numbers.
class SummaryView : public View {
const SourceMgr &Source;
const unsigned DispatchWidth;
namespace mca {
-/// \brief This class listens to instruction state transition events
+/// This class listens to instruction state transition events
/// in order to construct a timeline information.
///
/// For every instruction executed by the Backend, this class constructs
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the COFF-specific dumper for llvm-objdump.
+/// This file implements the COFF-specific dumper for llvm-objdump.
/// It outputs the Win64 EH data structures as plain text.
/// The encoding of the unwind codes is described in MSDN:
/// http://msdn.microsoft.com/en-us/library/ck9asaa9.aspx
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the ELF-specific dumper for llvm-objdump.
+/// This file implements the ELF-specific dumper for llvm-objdump.
///
//===----------------------------------------------------------------------===//
return SymbolName;
}
-/// \brief Emits the comments that are stored in the CommentStream.
+/// Emits the comments that are stored in the CommentStream.
/// Each comment in the CommentStream must end with a newline.
static void emitComments(raw_svector_ostream &CommentStream,
SmallString<128> &CommentsToEmit,
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the wasm-specific dumper for llvm-objdump.
+/// This file implements the wasm-specific dumper for llvm-objdump.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements a tool that can parse the YAML optimization
+/// This file implements a tool that can parse the YAML optimization
/// records and generate an optimization summary annotated source listing
/// report.
///
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the COFF-specific dumper for llvm-readobj.
+/// This file implements the COFF-specific dumper for llvm-readobj.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the COFF import library dumper for llvm-readobj.
+/// This file implements the COFF import library dumper for llvm-readobj.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements the ELF-specific dumper for llvm-readobj.
+/// This file implements the ELF-specific dumper for llvm-readobj.
///
//===----------------------------------------------------------------------===//
DynRegionInfo(const void *A, uint64_t S, uint64_t ES)
: Addr(A), Size(S), EntSize(ES) {}
- /// \brief Address in current address space.
+ /// Address in current address space.
const void *Addr = nullptr;
- /// \brief Size in bytes of the region.
+ /// Size in bytes of the region.
uint64_t Size = 0;
- /// \brief Size of each entity in the region.
+ /// Size of each entity in the region.
uint64_t EntSize = 0;
template <typename Type> ArrayRef<Type> getAsArrayRef() const {
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief This file implements ObjDumper.
+/// This file implements ObjDumper.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Breakpoint location printer.
+/// Breakpoint location printer.
///
//===----------------------------------------------------------------------===//
#include "BreakpointPrinter.h"
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Breakpoint location printer.
+/// Breakpoint location printer.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_TOOLS_OPT_BREAKPOINTPRINTER_H
};
}
-/// \brief Driver function to run the new pass manager over a module.
+/// Driver function to run the new pass manager over a module.
///
/// This function only exists factored away from opt.cpp in order to prevent
/// inclusion of the new pass manager headers and the old headers into the same
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Utilities to print analysis info for various kinds of passes.
+/// Utilities to print analysis info for various kinds of passes.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Utilities to print analysis info for various kinds of passes.
+/// Utilities to print analysis info for various kinds of passes.
///
//===----------------------------------------------------------------------===//
DenseMap<const Value *, unsigned> IDs;
std::vector<const Value *> Values;
- /// \brief Construct a value mapping for module.
+ /// Construct a value mapping for module.
///
/// Creates mapping from every value in \c M to an ID. This mapping includes
/// un-referencable values.
/// mapping, but others -- which wouldn't be serialized -- are not.
ValueMapping(const Module &M);
- /// \brief Map a value.
+ /// Map a value.
///
/// Maps a value. If it's a constant, maps all of its operands first.
void map(const Value *V);
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief The COFF component of yaml2obj.
+/// The COFF component of yaml2obj.
///
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief The ELF component of yaml2obj.
+/// The ELF component of yaml2obj.
///
//===----------------------------------------------------------------------===//
}
namespace {
-/// \brief "Single point of truth" for the ELF file construction.
+/// "Single point of truth" for the ELF file construction.
/// TODO: This class still has a ways to go before it is truly a "single
/// point of truth".
template <class ELFT>
enum class SymtabType { Static, Dynamic };
- /// \brief The future ".strtab" section.
+ /// The future ".strtab" section.
StringTableBuilder DotStrtab{StringTableBuilder::ELF};
- /// \brief The future ".shstrtab" section.
+ /// The future ".shstrtab" section.
StringTableBuilder DotShStrtab{StringTableBuilder::ELF};
- /// \brief The future ".dynstr" section.
+ /// The future ".dynstr" section.
StringTableBuilder DotDynstr{StringTableBuilder::ELF};
NameToIdxMap SN2I;
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief The Mach component of yaml2obj.
+/// The Mach component of yaml2obj.
///
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
/// \file
-/// \brief Common declarations for yaml2obj
+/// Common declarations for yaml2obj
//===----------------------------------------------------------------------===//
#ifndef LLVM_TOOLS_YAML2OBJ_YAML2OBJ_H
#define LLVM_TOOLS_YAML2OBJ_YAML2OBJ_H
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief The Wasm component of yaml2obj.
+/// The Wasm component of yaml2obj.
///
//===----------------------------------------------------------------------===//
//
return &dummy_arr1[i];
}
-/// \brief A test class that tries to check that construction and destruction
+/// A test class that tries to check that construction and destruction
/// occur correctly.
class CtorTester {
static std::set<CtorTester *> Constructed;
using testing::WithArgs;
using testing::_;
-/// \brief A CRTP base for analysis mock handles
+/// A CRTP base for analysis mock handles
///
/// This class reconciles mocking with the value semantics implementation of the
/// AnalysisManager. Analysis mock handles should derive from this class and
}
};
-/// \brief A CRTP base for pass mock handles
+/// A CRTP base for pass mock handles
///
/// This class reconciles mocking with the value semantics implementation of the
/// PassManager. Pass mock handles should derive from this class and
TestFunctionAnalysis(int &Runs) : Runs(Runs) {}
- /// \brief Run the analysis pass over the function and return a result.
+ /// Run the analysis pass over the function and return a result.
Result run(Function &F, FunctionAnalysisManager &AM) {
++Runs;
int Count = 0;
using namespace llvm;
namespace {
-/// \brief Tests an arbitrary set of bytes passed as \p Input.
+/// Tests an arbitrary set of bytes passed as \p Input.
void TestMD5Sum(ArrayRef<uint8_t> Input, StringRef Final) {
MD5 Hash;
Hash.update(Input);
//===----------------------------------------------------------------------===//
///
/// \file
-/// \brief Parallel.h unit tests.
+/// Parallel.h unit tests.
///
//===----------------------------------------------------------------------===//
return array_lengthof(FixedInstrs) - 1;
}
-/// \brief Return all of the instructions defined by the target, ordered by
+/// Return all of the instructions defined by the target, ordered by
/// their enum value.
void CodeGenTarget::ComputeInstrsByEnum() const {
const auto &Insts = getInstructions();
/// Helper class for storing information on a subtarget feature which
/// participates in instruction matching.
struct SubtargetFeatureInfo {
- /// \brief The predicate record for this feature.
+ /// The predicate record for this feature.
Record *TheDef;
- /// \brief An unique index assigned to represent this feature.
+ /// An unique index assigned to represent this feature.
uint64_t Index;
SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {}
- /// \brief The name of the enumerated constant identifying this feature.
+ /// The name of the enumerated constant identifying this feature.
std::string getEnumName() const {
return "Feature_" + TheDef->getName().str();
}
- /// \brief The name of the enumerated constant identifying the bitnumber for
+ /// The name of the enumerated constant identifying the bitnumber for
/// this feature.
std::string getEnumBitName() const {
return "Feature_" + TheDef->getName().str() + "Bit";
static OperandEncoding writemaskRegisterEncodingFromString(const std::string &s,
uint8_t OpSize);
- /// \brief Adjust the encoding type for an operand based on the instruction.
+ /// Adjust the encoding type for an operand based on the instruction.
void adjustOperandEncoding(OperandEncoding &encoding);
/// handleOperand - Converts a single operand from the LLVM table format to
return os;
}
-/// \brief Pretty print a tag by replacing tag:yaml.org,2002: with !!.
+/// Pretty print a tag by replacing tag:yaml.org,2002: with !!.
static std::string prettyTag(yaml::Node *N) {
std::string Tag = N->getVerbatimTag();
if (StringRef(Tag).startswith("tag:yaml.org,2002:")) {
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