clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998

The gcc_usb3_phy_pipe_clk is generated by the phy, but is also used by
the phy during init.  The clock needs to be enabled during the init
sequence, but may not be fully active until after the init sequence is
complete.  This causes a catch-22 if the clock status is checked during
enable.  As a result, skip the checks to avoid the troubling situation.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
index 96cf00c425a80d3649a35d116eae7a470bca2a34..3cbabbb8bd9abe699fafea8bb85bea7b7d9495f6 100644 (file)
--- a/drivers/clk/qcom/gcc-msm8998.c
+++ b/drivers/clk/qcom/gcc-msm8998.c
@@ -2544,7 +2544,7 @@ static struct clk_branch gcc_usb3_phy_aux_clk = {
 
 static struct clk_branch gcc_usb3_phy_pipe_clk = {
        .halt_reg = 0x50004,
-       .halt_check = BRANCH_HALT,
+       .halt_check = BRANCH_HALT_SKIP,
        .clkr = {
                .enable_reg = 0x50004,
                .enable_mask = BIT(0),