drm/amd/pm: drop the incomplete fix for Navi14 runpm issue
authorEvan Quan <evan.quan@amd.com>
Tue, 25 May 2021 03:05:32 +0000 (11:05 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 11 Jun 2021 20:01:24 +0000 (16:01 -0400)
As the fix by adding PPSMC_MSG_PrepareMp1ForUnload is proved to
be incomplete. Another fix(see link below) has been sent out.
Link: https://lore.kernel.org/linux-pci/20210602021255.939090-1-evan.quan@amd.com/
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c

index 2570c2908b25554b91871991a1d51d6ad40c90c3..7ce31c24018f0d5d24886cf6d390e0e24edae7a8 100644 (file)
@@ -2188,10 +2188,7 @@ static int psp_load_smu_fw(struct psp_context *psp)
        if ((amdgpu_in_reset(adev) &&
             ras && adev->ras_enabled &&
             (adev->asic_type == CHIP_ARCTURUS ||
-             adev->asic_type == CHIP_VEGA20)) ||
-            (adev->in_runpm &&
-             adev->asic_type >= CHIP_NAVI10 &&
-             adev->asic_type <= CHIP_NAVI12)) {
+             adev->asic_type == CHIP_VEGA20))) {
                ret = amdgpu_dpm_set_mp1_state(adev, PP_MP1_STATE_UNLOAD);
                if (ret) {
                        DRM_WARN("Failed to set MP1 state prepare for reload\n");
index 6a0ea5d59b24a52289d96891acb10e875dff0039..dab1445d98bbf86b13e973acbafa66b25f494886 100644 (file)
@@ -468,30 +468,6 @@ static int navi10_store_powerplay_table(struct smu_context *smu)
        return 0;
 }
 
-static int navi10_set_mp1_state(struct smu_context *smu,
-                               enum pp_mp1_state mp1_state)
-{
-       struct amdgpu_device *adev = smu->adev;
-       uint32_t mp1_fw_flags;
-       int ret = 0;
-
-       ret = smu_cmn_set_mp1_state(smu, mp1_state);
-       if (ret)
-               return ret;
-
-       if (mp1_state == PP_MP1_STATE_UNLOAD) {
-               mp1_fw_flags = RREG32_PCIE(MP1_Public |
-                                          (smnMP1_FIRMWARE_FLAGS & 0xffffffff));
-
-               mp1_fw_flags &= ~MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK;
-
-               WREG32_PCIE(MP1_Public |
-                           (smnMP1_FIRMWARE_FLAGS & 0xffffffff), mp1_fw_flags);
-       }
-
-       return 0;
-}
-
 static int navi10_setup_pptable(struct smu_context *smu)
 {
        int ret = 0;
@@ -3146,7 +3122,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .get_fan_parameters = navi10_get_fan_parameters,
        .post_init = navi10_post_smu_init,
        .interrupt_work = smu_v11_0_interrupt_work,
-       .set_mp1_state = navi10_set_mp1_state,
+       .set_mp1_state = smu_cmn_set_mp1_state,
 };
 
 void navi10_set_ppt_funcs(struct smu_context *smu)