pinctrl: cy8c95x0: Fix regression

[ Upstream commit 04dfca968cf7349773126340991b68a83378aca2 ]

Commit 1fa3df901f2c ("pinctrl: cy8c95x0: Remove custom ->set_config()")
removed support for PIN_CONFIG_INPUT_ENABLE and
PIN_CONFIG_OUTPUT.

Add the following options to restore functionality:
- PIN_CONFIG_INPUT_ENABLE
- PIN_CONFIG_OUTPUT_ENABLE

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Link: https://lore.kernel.org/r/20231219125120.4028862-2-patrick.rudolph@9elements.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c
index 993b30e..280d7eb 100644 (file)
--- a/drivers/pinctrl/pinctrl-cy8c95x0.c
+++ b/drivers/pinctrl/pinctrl-cy8c95x0.c
@@ -307,6 +307,9 @@ static const char * const cy8c95x0_groups[] = {
        "gp77",
 };
 
+static int cy8c95x0_pinmux_direction(struct cy8c95x0_pinctrl *chip,
+                                    unsigned int pin, bool input);
+
 static inline u8 cypress_get_port(struct cy8c95x0_pinctrl *chip, unsigned int pin)
 {
        /* Account for GPORT2 which only has 4 bits */
@@ -726,6 +729,7 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip,
        u8 port = cypress_get_port(chip, off);
        u8 bit = cypress_get_pin_mask(chip, off);
        unsigned long param = pinconf_to_config_param(config);
+       unsigned long arg = pinconf_to_config_argument(config);
        unsigned int reg;
        int ret;
 
@@ -764,6 +768,12 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip,
        case PIN_CONFIG_MODE_PWM:
                reg = CY8C95X0_PWMSEL;
                break;
+       case PIN_CONFIG_OUTPUT_ENABLE:
+               ret = cy8c95x0_pinmux_direction(chip, off, !arg);
+               goto out;
+       case PIN_CONFIG_INPUT_ENABLE:
+               ret = cy8c95x0_pinmux_direction(chip, off, arg);
+               goto out;
        default:
                ret = -ENOTSUPP;
                goto out;