drm/amdgpu: Add SDMA v4.4.2 golden settings

Add programming of SDMA golden settings for v4.4.2

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
index 4350939..016813b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
@@ -96,11 +96,22 @@ static int sdma_v4_4_2_irq_id_to_seq(unsigned client_id)
 
 static void sdma_v4_4_2_init_golden_registers(struct amdgpu_device *adev)
 {
-       switch (adev->ip_versions[SDMA0_HWIP][0]) {
-       case IP_VERSION(4, 4, 2):
-               break;
-       default:
-               break;
+       u32 val;
+       int i;
+
+       for (i = 0; i < adev->sdma.num_instances; i++) {
+               val = RREG32_SDMA(i, regSDMA_GB_ADDR_CONFIG);
+               val = REG_SET_FIELD(val, SDMA_GB_ADDR_CONFIG, NUM_BANKS, 4);
+               val = REG_SET_FIELD(val, SDMA_GB_ADDR_CONFIG,
+                                   PIPE_INTERLEAVE_SIZE, 0);
+               WREG32_SDMA(i, regSDMA_GB_ADDR_CONFIG, val);
+
+               val = RREG32_SDMA(i, regSDMA_GB_ADDR_CONFIG_READ);
+               val = REG_SET_FIELD(val, SDMA_GB_ADDR_CONFIG_READ, NUM_BANKS,
+                                   4);
+               val = REG_SET_FIELD(val, SDMA_GB_ADDR_CONFIG_READ,
+                                   PIPE_INTERLEAVE_SIZE, 0);
+               WREG32_SDMA(i, regSDMA_GB_ADDR_CONFIG_READ, val);
        }
 }